Processor debugging method, device and system, electronic equipment and storage medium

Abstract

The invention provides a processor debugging method, device and system, electronic equipment and a storage medium, and the method comprises the steps: obtaining a debugging command which comprises a debugging object name and an operation instruction; searching address information corresponding to the debugging object name from a configuration file, wherein the debugging object name and the address information, corresponding to the debugging object name, in the to-be-debugged processor are stored in the configuration file; and sending the address information to the to-be-debugged processor according to the operation instruction so as to debug the to-be-debugged processor. The address information corresponding to the debugging object name is searched from the configuration file, and the address information is sent to the to-be-debugged processor according to the operation instruction, so that the to-be-debugged processor is debugged, and the debugging object name and the address information, corresponding to the debugging object name, in the to-be-debugged processor are stored in the configuration file. Therefore, the software and hardware resources, occupied by the object mapping process, of the to-be-debugged processor can be effectively reduced, and the debugging efficiency of the to-be-debugged processor is improved.

Description

Technical Field

[0001] The present application relates to the technical field of processor debugging and power control, and in particular to a processor debugging method, device, system, electronic device, and storage medium. Background Art

[0002] Currently, processor debugging is typically performed through hardware debugging. For example, hardware such as an oscilloscope or logic analyzer is connected to the processor to be debugged, and debugging operations such as viewing and monitoring signal data are performed on the processor. However, in practice, hardware debugging has been found to be inefficient. Summary of the Invention

[0003] The purpose of the embodiments of the present application is to provide a processor debugging method, device, system, electronic device and storage medium, which are used to improve the problem of low efficiency in debugging a processor.

[0004] An embodiment of the present application provides a processor debugging method, comprising: obtaining a debugging command, the debugging command including: a debugging object name and an operation instruction; searching for address information corresponding to the debugging object name from a configuration file, wherein the configuration file stores the debugging object name and the address information corresponding to the debugging object name in the processor to be debugged; and sending the address information to the processor to be debugged according to the operation instruction to debug the processor to be debugged. In the implementation process of the above scheme, by searching for the address information corresponding to the debugging object name from the configuration file and sending the address information to the processor to be debugged according to the operation instruction to debug the processor to be debugged, since the configuration file stores the debugging object name and the address information corresponding to the debugging object name in the processor to be debugged, the action of searching the configuration file for the address information corresponding to the debugging object name is not executed in the processor to be debugged, thereby effectively reducing the software and hardware resources of the processor to be debugged occupied by the object mapping process, thereby improving the efficiency of debugging the processor to be debugged.

[0005] Optionally, in an embodiment of the present application, before searching for the address information corresponding to the debug object name in the configuration file, the method further includes: obtaining multiple debug object names of the processor to be debugged and the address information corresponding to each debug object name; and storing the multiple debug object names and their corresponding address information in the configuration file. In the implementation of the above solution, the multiple debug object names and their corresponding address information are stored in the configuration file in a mapping manner. The mapping storage here can be understood as parameter mapping, such as variable mapping and register mapping, etc., so that the debugger can intuitively see the debug object name and its address information being operated, and thus directly operate its address information to improve operation efficiency.

[0006] Optionally, in an embodiment of the present application, the debug object name includes: a variable name and / or a register name; searching for address information corresponding to the debug object name from the configuration file includes: searching for memory address information of the variable name in the processor to be debugged from the configuration file; and / or searching for register address information of the register name in the processor to be debugged from the configuration file. During the implementation of the above scheme, by searching for variable memory address information or register address information from the configuration file, the process of searching for variable memory address information or register address information is separated from the work of the processor to be debugged, which can effectively reduce the software and hardware resources required by the processor to be debugged to handle the object mapping process, thereby improving the efficiency of debugging the processor to be debugged.

[0007] Optionally, in an embodiment of the present application, the operation instruction is a view instruction; sending address information to the processor to be debugged according to the operation instruction to debug the processor includes: sending the address information to the processor to be debugged; and receiving data returned by the processor to be debugged based on the address information. In the implementation of the above scheme, by sending the address information to the processor to be debugged, the processor to be debugged only needs to obtain and return the data corresponding to the processor to be debugged based on the address information, thereby separating the above-mentioned process of searching for variable memory address information or register address information from the work of the processor to be debugged, which can effectively save the software and hardware resources of the processor to be debugged to handle this process.

[0008] Optionally, in an embodiment of the present application, the operation instruction is a monitoring instruction; address information is sent to the processor to be debugged according to the operation instruction to debug the processor to be debugged, including: parsing the preset frequency corresponding to the address information from the monitoring instruction; sending the address information to the processor to be debugged at the preset frequency; and receiving the data value returned by the processor to be debugged according to the address information at the preset frequency. In the implementation process of the above scheme, by sending the address information to the processor to be debugged at the preset frequency, the processor to be debugged can obtain and return the data corresponding to the processor to be debugged according to the address information at the preset frequency, thereby separating the above-mentioned process of searching for variable memory address information or register address information from the work of the processor to be debugged, effectively saving the software and hardware resources of the processor to be debugged to handle the object mapping process.

[0009] Optionally, in an embodiment of the present application, the operation instruction is a modification instruction; address information is sent to the processor to be debugged according to the operation instruction to debug the processor to be debugged, including: parsing new data from the modification instruction; sending the address information and the new data to the processor to be debugged; and receiving the result of the processor to be debugged modifying the old data obtained by the address information using the new data.

[0010] Optionally, in an embodiment of the present application, the operation instruction is a compound instruction; sending address information to the processor to be debugged according to the operation instruction to debug the processor includes: sending the address information and the compound instruction to the processor to be debugged, wherein the address information is used to obtain data in the processor to be debugged, and the compound instruction is used to perform a compound operation on the data obtained by the address information. In the implementation of the above scheme, by adding a compound instruction that allows the processor to be debugged to perform a compound operation on the data corresponding to the address information, the relatively simple debugging instructions are improved, and the operational richness of the debugging instructions is effectively increased.

[0011] Optionally, in an embodiment of the present application, the debug object name is a function name; searching for address information corresponding to the debug object name from a configuration file includes searching for memory address information of the function name in the processor to be debugged from the configuration file. In implementing the above solution, by searching for memory address information of the function name in the processor to be debugged from the configuration file, the process of searching for memory address information of the function name in the processor to be debugged is separated from the work of the processor to be debugged, effectively conserving the software and hardware resources of the processor to be debugged that handle this process.

[0012] Optionally, in an embodiment of the present application, the operation instruction is a jump instruction; and sending address information to the processor to be debugged according to the operation instruction to debug the processor includes: sending the address information and a jump instruction to the processor to be debugged, wherein the jump instruction is used to jump to the function corresponding to the address information. In the implementation of the above scheme, by sending the address information and the jump instruction to the processor to be debugged, the situation in which the processor to be debugged resolves the address based on the name, thereby improving the situation in which the processor to be debugged consumes software and hardware resources, effectively saving software and hardware resources used by the processor to be debugged to handle the object mapping process.

[0013] Optionally, in an embodiment of the present application, obtaining a debug command includes: receiving a debug command from a remote device; and after sending address information to the processor to be debugged according to the operating instruction to debug the processor to be debugged, further including: sending a debug result to the remote device. During the implementation of the above solution, the remote device can debug multiple processors to be debugged using the debug command, thereby achieving the effect of operating multiple processors to be debugged, effectively improving the debugging efficiency of the processors to be debugged.

[0014] Optionally, in an embodiment of the present application, before receiving a debugging command sent by a remote device, the method further includes: receiving target configuration data sent by the remote device, and storing the target configuration data in a target storage module containing a configuration file; and updating the target configuration data stored in the target storage module to the processor to be debugged. The above scheme is configured in this way so that the configuration data can be sent via the remote device after being updated, and the updated target configuration data is stored in the target storage module containing the configuration file, thereby enabling remote updating of the configuration data of the processor to be debugged without the need for technicians to go on-site to perform the update.

[0015] An embodiment of the present application also provides a processor debugging device, including: a debugging command acquisition module, used to obtain a debugging command, the debugging command including: a debugging object name and an operation instruction; an address information search module, used to search for address information corresponding to the debugging object name from a configuration file, the configuration file storing the debugging object name and the address information corresponding to the debugging object name in the processor to be debugged; a processor debugging module, used to send address information to the processor to be debugged according to the operation instruction, so as to debug the processor to be debugged.

[0016] Optionally, in an embodiment of the present application, the processor debugging device further includes: an address information acquisition module for acquiring multiple debugging object names and their corresponding address information of the processor to be debugged; and an object address storage module for storing multiple debugging object names and the address information corresponding to each debugging object name in a configuration file.

[0017] Optionally, in an embodiment of the present application, the debugging object name includes: a variable name and / or a register name; the address information search module includes: a memory address search sub-module, used to search for memory address information of the variable name in the processor to be debugged from a configuration file; and / or, a register address search sub-module, used to search for register address information of the register name in the processor to be debugged from a configuration file.

[0018] Optionally, in an embodiment of the present application, the operation instruction is a viewing instruction; the processor debugging module includes: a first information sending submodule, used to send address information to the processor to be debugged; and a first information receiving submodule, used to receive data returned by the processor to be debugged according to the address information.

[0019] Optionally, in an embodiment of the present application, the operation instruction is a monitoring instruction; the processor debugging module includes: a preset frequency parsing submodule, used to parse the preset frequency corresponding to the address information from the monitoring instruction; a second information sending submodule, used to send address information to the processor to be debugged at a preset frequency; and a second information receiving submodule, used to receive the data value returned by the processor to be debugged according to the address information at the preset frequency.

[0020] Optionally, in an embodiment of the present application, the operation instruction is a modification instruction; the processor debugging module includes: a new data parsing submodule, used to parse new data from the modification instruction; a third information sending submodule, used to send address information and new data to the processor to be debugged; and a third information receiving submodule, used to receive the result of the processor to be debugged using the new data to modify the old data obtained by the address information.

[0021] Optionally, in an embodiment of the present application, the operation instruction is a compound instruction; the processor debugging module includes: a fourth information sending submodule, used to send address information and a compound instruction to the processor to be debugged, and the compound instruction is used to perform a compound operation on the data obtained from the address information.

[0022] Optionally, in an embodiment of the present application, the debugging object name is a function name; the address information search module includes: a function address search module, which is used to search for memory address information of the function name in the processor to be debugged from a configuration file.

[0023] Optionally, in an embodiment of the present application, the operation instruction is a jump instruction; the processor debugging module includes: a fifth information sending submodule, used to send address information and a jump instruction to the processor to be debugged, and the jump instruction is used to jump to the function corresponding to the execution address information.

[0024] Optionally, in an embodiment of the present application, the processor debugging apparatus further includes: a debugging command receiving module for receiving a debugging command sent by a remote device; and a debugging result sending module for sending a debugging result to the remote device.

[0025] Optionally, in an embodiment of the present application, the processor debugging device also includes: a configuration data storage module for receiving target configuration data sent by a remote device and storing the target configuration data in a target storage module containing a configuration file; and a configuration data update module for updating the target configuration data stored in the target storage module to the processor to be debugged.

[0026] The embodiment of the present application also provides a processor debugging system, including: an intermediate processor and a processor to be debugged, wherein the intermediate processor and the processor to be debugged are in communication connection; the intermediate processor is used to obtain a debugging command, wherein the debugging command includes a debugging object name and an operation instruction; the intermediate processor is also used to search for address information corresponding to the debugging object name from a configuration file, wherein the configuration file stores the debugging object name and the address information corresponding to the debugging object name in the processor to be debugged; the intermediate processor is also used to send address information to the processor to be debugged according to the operation instruction, so as to debug the processor to be debugged; the processor to be debugged is used to be debugged by the intermediate processor according to the address information. In the implementation process of the above scheme, by adopting a processor debugging system of an intermediate processor and a processor to be debugged, the situation in which the processor to be debugged needs to allocate resources such as memory when directly debugging the processor to be debugged is improved, and part of the resource consumption is effectively transferred to the intermediate processor, thereby saving resources of the processor to be debugged and improving the debugging efficiency of the processor to be debugged.

[0027] Optionally, in an embodiment of the present application, it further includes: a remote device, the remote device is connected to the intermediate processor via communication; the remote device is used to send debugging commands to the intermediate processor; the intermediate processor is also used to receive debugging commands sent by the remote device; the intermediate processor is also used to send debugging results to the remote device. During the implementation of the above scheme, the remote device can debug the processor to be debugged through the intermediate processor, thereby achieving the effect of operating multiple intermediate processors, so that one remote device can complete the debugging work of multiple processors to be debugged, effectively improving the debugging efficiency of the processor to be debugged. An embodiment of the present application also provides an electronic device, including: a processor and a memory, the memory storing machine-readable instructions executable by the processor, and the method described above is executed when the machine-readable instructions are executed by the processor.

[0028] An embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the method described above is executed. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. It should be understood that the following drawings only illustrate certain embodiments of the embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0030] Figure 1 A schematic diagram of interaction between the comparative embodiment and the processor to be debugged is shown;

[0031] Figure 2 A schematic diagram of the structure of a processor debugging system provided by an embodiment of the present application is shown;

[0032] Figure 3 A flowchart of a processor debugging method provided by an embodiment of the present application is shown;

[0033] Figure 4 A schematic diagram of the flow of interaction between the intermediate processor and the remote device provided in an embodiment of the present application is shown;

[0034] Figure 5 A schematic diagram of the structure of a processor debugging device provided in an embodiment of the present application is shown;

[0035] Figure 6 A schematic structural diagram of an electronic device provided in an embodiment of the present application is shown.

[0036] Icons: 100 - processor debugging system; 110 - remote device; 120 - intermediate processor; 130 - processor to be debugged; 400 - processor debugging device; 410 - debugging command acquisition module; 420 - address information search module; 430 - processor debugging module; 500 - electronic device; 510 - processor; 520 - memory; 530 - storage medium. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the drawings in the embodiments of the present application only serve the purpose of illustration and description and are not intended to limit the scope of protection of the embodiments of the present application. In addition, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in the embodiments of the present application illustrate the operations implemented according to some embodiments of the embodiments of the present application. It should be understood that the operations of the flowcharts can be implemented out of sequence, and steps without logical context can be reversed in order or implemented simultaneously. In addition, those skilled in the art, guided by the contents of the embodiments of the present application, can add one or more other operations to the flowcharts, or remove one or more operations from the flowcharts.

[0038] In addition, the described embodiments are only a portion of the embodiments of the present application, rather than all embodiments. The components of the embodiments of the present application generally described and shown in the accompanying drawings can be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the claimed embodiments of the present application, but rather merely represents selected embodiments of the embodiments of the present application.

[0039] It will be understood that the "first" and "second" in the embodiments of the present application are used to distinguish similar objects. Those skilled in the art will understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different. In the description of the embodiments of the present application, the term "and / or" is merely a description of the association relationship of associated objects, indicating that there may be three relationships, such as A and / or B, which can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the related objects before and after are in an "or" relationship. The term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups).

[0040] It is understood that the processor to be debugged (hereinafter referred to as the processor to be debugged) includes, but is not limited to, embedded processors or non-embedded processors. Among them, embedded processors may include: embedded microprocessor units (MPUs), embedded microcontroller units (MCUs), digital signal processors (DSPs), embedded DSPs (EDSPs), embedded systems on chips (SoCs), field programmable gate arrays (FPGAs), etc. Non-embedded processors may include: Intel Core series processors, AMD Ryzen series processors, and Qualcomm Snapdragon series processors, etc. For ease of understanding and explanation, the following detailed description will take embedded processors as an example.

[0041] See Figure 1 A schematic diagram of the interaction between the processor to be debugged and the controller in the comparative embodiment is shown. In the comparative embodiment, before the embedded processor is officially mass-produced and put into use, it is usually debugged to identify potential risks. Most debugging methods for embedded processors include: using hardware such as an oscilloscope or logic analyzer to connect to the processor to be debugged, or connecting to the processor to be debugged via a Joint Test Action Group (JTAG) to view or monitor signal changes in the embedded processor.

[0042] In some scenarios, a dedicated software debugger (such as Vivado or Quartus) can be used to debug an embedded processor. For example, a software debugger can be used to view internal signal values in the processor to be debugged. If the signal value to be observed needs to be added or modified, the code in the program code file needs to be modified to output the signal value to be observed. Then, a bitstream file is compiled based on the program code file and sent to the processor to be debugged. After executing the bitstream file, the processor to be debugged returns the execution result to the software debugger, so that the software debugger can obtain the signal value to be observed from the execution result.

[0043] After long-term research, it was found that because the above-mentioned debugging process requires that the program code file be recompiled each time after being modified, the debugging process cycle is prolonged. Although the debug object name (such as the variable name or register name) in the program code file is often modified during the debugging process, it was found in actual practice that the correspondence between the debug object name in the program code file (such as the variable name or register name given by the programmer for the signal value to be observed) and the address information of the debug object name in the processor to be debugged is already determined during compilation. Therefore, the debug object name and the address information corresponding to the debug object name are unchanged in most cases. For example, if the debug object name is a static binding of a global variable name or a static local variable name, the address information of this correspondence will not change during the debugging process. If only the variable name or register name is modified, recompiling the program code file will consume a lot of time.

[0044] To address the above-mentioned issues, in an embodiment of the present application, by mapping and storing the correspondence between the debug object name and the address information of the debug object name in the processor to be debugged in a configuration file, since this correspondence is unchanged in most cases, the software debugger can directly find the signal value to be observed based on the address information of the debug object name in the processor to be debugged, thereby eliminating the need to repeatedly compile the program code file, effectively saving compilation time and shortening the debugging process cycle. Furthermore, the above-mentioned mapping and storing of the correspondence between the debug object name and the address information of the debug object name in the processor to be debugged, and the process of finding the address information corresponding to the debug object name based on this correspondence, can be referred to as the object mapping process. In an embodiment of the present application, separating the above-mentioned object mapping process from the processor to be debugged can effectively reduce the software and hardware resources of the processor to be debugged to handle the object mapping process, thereby improving the efficiency of debugging the processor to be debugged.

[0045] See Figure 2 The schematic diagram of the structure of the processor debugging system provided by the embodiment of the present application is shown; the embodiment of the present application provides a processor debugging system 100, comprising: an intermediate processor 120 and a processor to be debugged 130. Among them, the intermediate processor and the processor to be debugged are communicatively connected. Specifically, the intermediate processor 120 and the processor to be debugged 130 can be connected through a serial bus. For example, if the processor to be debugged is an FPGA chip, the intermediate processor 120 can be connected to the processor to be debugged 130 through a serial peripheral interface (SPI) bus or a universal asynchronous receiver / transmitter (UART) bus. It can be understood that since the intermediate processor 120 and the processor to be debugged 130 are connected through a serial bus, there are usually multiple serial ports on the intermediate processor and the processor to be debugged. Therefore, one intermediate processor can be connected to multiple processors to be debugged, that is, one intermediate processor can be used to debug multiple processors to be debugged.

[0046] The intermediate processor 120 is used to obtain debugging commands, which include: debugging object name and operation instructions; wherein, the debugging commands can be received from a remote device (such as a PC or server) or stored in the intermediate processor and read at a timed trigger.

[0047] The intermediate processor 120 is further configured to search for address information corresponding to the debugged object name from a configuration file. The configuration file stores the debugged object name and its corresponding address information in the processor to be debugged 130. It is understood that the configuration file may be pre-cached in the intermediate processor or sent by a remote device (e.g., a PC) during debugging. The specific method for obtaining the configuration file can be configured based on the specific situation.

[0048] The intermediate processor 120 is further configured to send address information to the processor to be debugged according to the operating instruction, thereby debugging the processor to be debugged 130. Because different operating instructions process and send address information in different ways, there are many implementation methods for debugging the processor to be debugged, which are described in detail below.

[0049] The processor to be debugged 130 is used to be debugged by the intermediate processor 120 according to the address information.

[0050] Optionally, in an embodiment of the present application, it further includes: a remote device 110, the remote device is connected to the intermediate processor via communication; specifically, the remote device can be connected to the intermediate processor via a network cable of a network device, so that the remote device can be connected to multiple intermediate processors, thereby achieving the effect of operating multiple intermediate processors, so that one remote device can complete the debugging work of multiple processors to be debugged, effectively improving the debugging efficiency of the processors to be debugged. The remote device 110 is used to send debugging commands to the intermediate processor 120. The intermediate processor 120 is also used to receive the debugging commands sent by the remote device 110, and after obtaining the debugging results corresponding to the debugging commands, send the debugging results to the remote device 110. The remote device 110 is also used to receive the debugging results sent by the intermediate processor 120 and display the debugging results.

[0051] See Figure 3 The flowchart of the processor debugging method provided by the embodiment of the present application is shown; the processor debugging method can be executed by the above-mentioned intermediate processor, and can also be executed by an electronic device equipped with the above-mentioned intermediate processor. For ease of understanding and explanation, the following description takes the execution of the processor debugging method by the above-mentioned intermediate processor as an example. The implementation method of the above-mentioned processor debugging method may include:

[0052] Step S210: Obtain a debugging command, where the debugging command includes a debugging object name and an operation instruction.

[0053] The debug object name refers to the name of the target object being debugged. The target object here can be a variable, a register, or a function, etc. The debug object name can include: a function name, a variable name, and / or a register name.

[0054] The implementation methods of the above-mentioned step S210 are, for example: in a first implementation method, the intermediate processor receives a debugging command sent by a remote device (such as a PC or a server of a personal computer); in a second implementation method, the intermediate processor obtains a pre-stored debugging command from a storage device. The debugging command may be previously sent to the intermediate processor by the remote device, and the intermediate processor stores it in the storage device after receiving the debugging command.

[0055] Step S220: searching for address information corresponding to the debug object name from a configuration file, wherein the configuration file stores the debug object name and address information corresponding to the debug object name in the processor to be debugged.

[0056] The aforementioned configuration file refers to a file that stores the correspondence between debug object names and the addresses of those debug object names in the processor to be debugged. This configuration file may be pre-cached in the intermediate processor or sent by a remote device (e.g., a PC) during debugging. For example, after the remote device sends a debug command to the intermediate processor, the intermediate processor can parse the configuration file from the debug command. Therefore, the specific method for obtaining the configuration file can be configured based on the specific situation. It is understood that the aforementioned address information includes: the physical address information of the memory area in the processor to be debugged corresponding to the debug object name (referred to as memory address information), and / or the physical address information of the registers in the processor to be debugged (referred to as register address information).

[0057] Step S230: sending address information to the processor to be debugged according to the operation instruction, so as to debug the processor to be debugged.

[0058] It is understandable that the intermediate processor can debug the processor to be debugged by sending address information to the processor to be debugged according to the operation instruction. Because different operation instructions process and send address information in different ways, there are many implementation methods for debugging the processor to be debugged. The implementation methods for debugging the processor to be debugged are described in detail below.

[0059] In the implementation process of the above scheme, the address information corresponding to the debug object name is searched from the configuration file, and the address information is sent to the processor to be debugged according to the operation instruction to debug the processor to be debugged. Since the configuration file stores the debug object name and the address information corresponding to the debug object name in the processor to be debugged, the object mapping process can effectively reduce the software and hardware resources of the processor to be debugged, thereby improving the efficiency of debugging the processor to be debugged.

[0060] As an optional implementation of the above debugger processing method, before searching the configuration file for the address information corresponding to the debug object name, the following steps may be further included:

[0061] Step S211: Acquire multiple debug object names of the processor to be debugged and address information corresponding to each debug object name.

[0062] Step S212: storing multiple debugging object names and their corresponding address information in a configuration file.

[0063] The implementation of steps S211 to S212 includes:

[0064] In a first embodiment, if the above-mentioned configuration file is pre-cached in the intermediate processor, the intermediate processor can first obtain relevant data from the processor to be debugged and store the relevant data as a configuration file. For example, the intermediate processor can read all the debugging object names (such as function names, variable names and / or register names, etc.) and the address information corresponding to the debugging object name in the currently running program from the processor to be debugged, and can also read the specific value corresponding to the debugging object name, and summarize and map the debugging object name, the address information corresponding to the debugging object name and / or the specific value corresponding to the debugging object name into a configuration file, and send the configuration file to a remote device (such as a PC).

[0065] In a second embodiment, if the configuration file is sent by a remote device (e.g., a PC) during debugging, the intermediate processor may first obtain relevant data from the processor to be debugged and send the relevant data to the remote device (e.g., a PC), which then performs parameter mapping. For example, a user sends a mapping start command to the intermediate processor via the remote device (e.g., a PC). After receiving the mapping start command from the remote device, the intermediate processor reads all debug object names (e.g., function names, variable names, and / or register names, etc.) and the address information corresponding to the debug object names in the currently running program from the processor to be debugged, and may also read the specific values corresponding to the debug object names, and sends the debug object names, the address information corresponding to the debug object names, and / or the specific values corresponding to the debug object names to the remote device. After receiving the debug object names, the address information corresponding to the debug object names, and / or the specific values corresponding to the debug object names, the remote device may aggregate and map the debug object names, the address information corresponding to the debug object names, and / or the specific values corresponding to the debug object names and store them as a configuration file.

[0066] In the implementation process of the above solution, multiple debugging object names and their corresponding address information are stored in the configuration file in a mapping manner. The mapping storage here can be understood as parameter mapping, such as variable mapping and register mapping, etc., so that the debugger can intuitively see the name of the debug object being operated and its address information, and thus directly operate its address information to improve operation efficiency.

[0067] As an optional implementation of step S220, the debug object name may include: a variable name and / or a register name; and the implementation of searching for address information corresponding to the debug object name from the configuration file may include:

[0068] Step S221: searching the configuration file for the memory address information of the variable name in the processor to be debugged.

[0069] For example, in the implementation of step S221, it is understood that the configuration file may store variable names and address information corresponding to the variable names (also known as variable addresses), and may also store specific values corresponding to the variables (e.g., initial values and modified values). Therefore, the intermediate processor may search the configuration file for the memory address information of the variable names in the processor to be debugged.

[0070] And / or, the implementation method of searching for address information corresponding to the debug object name from the configuration file may include:

[0071] Step S222: searching the configuration file for register address information of the register name in the processor to be debugged.

[0072] For example, in the implementation of step S222, it is understood that the configuration file may store register names and address information corresponding to the register names (also known as register addresses), and may also store specific values corresponding to the registers (e.g., initial values and modified values). Therefore, the intermediate processor may search the configuration file for the memory address information of the register names in the processor to be debugged.

[0073] As an optional implementation of step S230, the operation instruction may be a viewing instruction. The implementation of sending address information to the processor to be debugged according to the operation instruction to debug the processor may include:

[0074] Step S231: the intermediate processor sends address information to the processor to be debugged, and the address information is used to obtain and return data corresponding to the processor to be debugged.

[0075] Step S232: The intermediate processor receives data returned by the processor to be debugged according to the address information.

[0076] For example, in the implementation of steps S231 to S232, after searching for address information corresponding to a variable name or register name in a configuration file, the intermediate processor may send the address information to the processor to be debugged. After receiving the address information, the processor to be debugged may search for data corresponding to the address information and then send the data corresponding to the address information to the intermediate processor. After receiving the data corresponding to the address information sent by the processor to be debugged, the intermediate processor may send the data corresponding to the address information to a remote terminal so that the remote terminal can view the data corresponding to the address information, for example, by displaying the data corresponding to the address information in a debugging window of the remote terminal.

[0077] As an optional implementation of step S230, the operation instruction may be a monitoring instruction. The implementation of sending address information to the processor to be debugged according to the operation instruction to debug the processor may include:

[0078] Step S233: parse the monitoring instruction to obtain the preset frequency corresponding to the address information.

[0079] The preset frequency refers to the frequency of checking the data value corresponding to the address information. The frequency may be preset by the remote device in the monitoring instruction, or may be set in the monitoring instruction by the intermediate processor through the preset frequency in the cache data.

[0080] Step S234: sending address information to the processor to be debugged at a preset frequency, where the address information is used to obtain and return data values corresponding to the processor to be debugged.

[0081] Step S235: receiving data values returned by the processor to be debugged according to the address information at a preset frequency.

[0082] The implementation principles and implementation methods of steps S234 to S235 are similar to those of steps S231 to S232. Therefore, their specific implementation principles and implementation methods are not described here. Reference may be made to the description of steps S231 to S232. The difference is that the processor to be debugged can send the data value corresponding to the address information to the intermediate processor at a preset frequency. At the same time, after receiving the data value corresponding to the address information sent by the processor to be debugged, the intermediate processor can also send the data value corresponding to the address information to the remote device at a preset frequency, so that the remote device refreshes and displays the data value corresponding to the address information at a fixed preset frequency.

[0083] As an optional implementation of step S230, the operation instruction may be a modification instruction. The implementation of sending address information to the processor to be debugged according to the operation instruction to debug the processor may include:

[0084] Step S236: the intermediate processor parses the new data from the modification instruction and sends the address information and the new data to the processor to be debugged. The address information is used to obtain the old data in the processor to be debugged, and the new data is used to modify the old data.

[0085] It can be understood that the modification instructions here can modify multiple objects, and can modify function names, variable names and / or register names, etc., that is, use new data to modify the data value obtained by the address information corresponding to the function name, variable name and / or register name.

[0086] Step S237: the intermediate processor receives the result of the processor to be debugged using new data to modify the old data obtained from the address information.

[0087] An example implementation of steps S236 to S237 is as follows: the intermediate processor parses the new data from the modification instruction and sends the address information and the new data to the processor to be debugged. After receiving the address information and new data sent by the intermediate processor, the processor to be debugged can obtain the old data stored in the processor to be debugged (e.g., the old data corresponding to the variable name and / or register name) based on the address information, and then use the new data to modify the old data, such as replacing the new data with the old data, to obtain a modification result. Optionally, after obtaining the modification result, the processor to be debugged can also send the modification result to the intermediate processor. The intermediate processor can receive the modification result of the processor to be debugged using the new data to modify the old data obtained from the address information.

[0088] As an optional implementation of step S230, the operation instruction may be a compound instruction. The implementation of sending address information to the processor to be debugged according to the operation instruction to debug the processor may include:

[0089] Step S238: sending address information and a compound instruction to the processor to be debugged, where the address information is used to obtain data in the processor to be debugged, and the compound instruction is used to perform a compound operation on the data obtained by the address information.

[0090] A composite instruction is an instruction used to perform composite operations on data obtained from address information. Its function is usually to perform complex operations on data in the memory or registers of an embedded system through single or continuous debugging actions.

[0091] It can be understood that the above-mentioned compound instructions can be at least two of viewing instructions, monitoring instructions, modification instructions and / or jump instructions. For ease of understanding, an example of a compound instruction that contains both monitoring instructions and modification instructions is listed here. A compound instruction in a scenario is, for example: assuming that there is a compound instruction that can monitor and modify memory at the same time, and check specific conditions after modification, then the data of the memory address can be modified first through the modification instruction, and then a monitoring point can be set through the monitoring instruction to monitor the data of the memory address, and the program execution can also be interrupted when the data of the modified memory address meets specific conditions.

[0092] For example, in step S238, after the intermediate processor parses the address information and compound instruction from the debug command, it can send the address information and compound instruction to the processor to be debugged. After receiving the address information and compound instruction from the intermediate processor, the processor to be debugged can retrieve data stored in the debug processor based on the address information. Then, based on the compound instruction, it can perform a compound operation on the data stored in the processor to be debugged to obtain an operation result. For example, it can sort or calculate a sum of the data stored in the processor to be debugged. The resulting sorting result or sum result can be understood as the operation result. The operation result is then sent to the intermediate processor. After receiving the operation result, the intermediate processor can send the operation result to a remote device via the Transmission Control Protocol (TCP) or the User Datagram Protocol (UDP), so that the remote device can view the operation result of the compound instruction.

[0093] As an optional implementation of step S220, the debug object name may be a function name; and the implementation of searching for address information corresponding to the debug object name from the configuration file may include:

[0094] Step S223: searching the configuration file for the memory address information of the function name in the processor to be debugged.

[0095] As an optional implementation of step S230, the operation instruction may be a jump instruction. The implementation of sending address information to the processor to be debugged according to the operation instruction to debug the processor may include:

[0096] Step S239: sending the address information and the jump instruction to the processor to be debugged, where the jump instruction is used to jump to the function corresponding to the address information.

[0097] For example, the implementation of the above-mentioned steps S223 and S239 is as follows: It can be understood that the function name is the memory address information in the processor to be debugged, that is, when the processor to be debugged wants to execute the function instance corresponding to the function name, it directly jumps to the memory address of the function name in the processor to be debugged to execute the function instance corresponding to the function name. Therefore, the intermediate processor can search the memory address information of the function name in the processor to be debugged from the configuration file in advance, and send the memory address information and jump instruction to the processor to be debugged. After receiving the memory address information and the jump instruction, the processor to be debugged can directly jump to the memory address information according to the jump instruction and directly execute the function instance corresponding to the memory address information.

[0098] See Figure 4 The flowchart of the interaction between the intermediate processor and the remote device provided in the embodiment of the present application is shown; as an optional implementation of the above-mentioned processor debugging method, the processor debugging method can be run on the intermediate processor, and the intermediate processor can interact with the remote device. The interaction process can obtain debugging commands. This implementation may include:

[0099] Step S310: The intermediate processor receives a debugging command sent by a remote device.

[0100] A remote device is a device used to remotely debug a processor to be debugged (such as an embedded processor). The remote device can be a personal computer with a development environment or a server that can send debugging commands.

[0101] An implementation of the above step S310 is, for example: the intermediate processor receives the debugging command sent by the remote device via Hyper Text Transfer Protocol (HTTP) or Hyper Text Transfer Protocol Secure (HTTPS).

[0102] Step S320: the intermediate processor searches for address information corresponding to the debug object name from the configuration file. The configuration file stores the debug object name and the address information corresponding to the debug object name in the processor to be debugged.

[0103] Step S330: the intermediate processor sends address information to the processor to be debugged according to the operation instruction, so as to debug the processor to be debugged and obtain a debugging result.

[0104] The implementation principles and implementation methods of the above-mentioned steps S320 to S330 are similar to those of steps S220 to S230. Therefore, their implementation principles and implementation methods are no longer explained here, and reference may be made to the description of steps S220 to S230.

[0105] Step S340: The intermediate processor sends the debugging result to the remote device.

[0106] An implementation example of the above step S340 is: the intermediate processor sends the debugging result to the remote device via the HTTP protocol or the HTTPS protocol.

[0107] As an optional implementation of the processor debugging method, before receiving the debugging command sent by the remote device in step S310, the following steps may be further included:

[0108] Step S301: receiving target configuration data sent by a remote device, and storing the target configuration data in a target storage module containing a configuration file.

[0109] For example, in step S301, to further facilitate debugging of the embedded processor, the intermediate processor may further receive target configuration data sent by a remote device and store the target configuration data in a target storage module containing a configuration file. The target storage module may be a register of a programmable module on the intermediate processor or a memory module on the intermediate processor. The programmable module on the intermediate processor then reads the target configuration data from the register or memory module upon power-up.

[0110] Step S302: updating the target configuration data stored in the target storage module to the processor to be debugged.

[0111] An implementation example of the above-mentioned step S302 is as follows: after the programmable module on the intermediate processor reads the target configuration data from the register or memory module when powered on, it can also send the target configuration data to the processor to be debugged, so that the processor to be debugged configures debugging-related parameters according to the target configuration data. The target configuration data here includes but is not limited to: breakpoints, data watchpoints, register monitoring status, tracking setting parameters and redirection parameters, etc.; the above-mentioned breakpoints include conditional breakpoints, function code line number breakpoints and memory address breakpoints, etc., and the tracking setting parameters include software counters or hardware performance counters, which are used to count performance indicators such as the number of function calls and cycle time.

[0112] The above scheme is configured in such a way that the remote device obtains the target configuration data after updating the configuration data, and can send it to the intermediate processor via the configuration data network. After receiving the target configuration data sent by the remote device, the intermediate processor can store the updated target configuration data in the target storage module containing the configuration file. This means that even if the operating system of the embedded device is powered off and restarted, the updated target configuration data can be saved, and the processor to be debugged can be used to load the updated target configuration data at the next startup and apply it to the running state of the debugging process, thereby realizing remote configuration data updates for the processor to be debugged. This mechanism greatly improves maintenance and upgrade efficiency, allowing developers or maintenance personnel to remotely manage a large number of distributed embedded devices without the need for technicians to go on-site to manually operate and update, effectively improving the debugging efficiency of embedded devices.

[0113] See Figure 5 FIG2 shows a schematic diagram of the structure of a processor debugging device provided in an embodiment of the present application. The embodiment of the present application provides a processor debugging device 400, comprising:

[0114] The debugging command acquisition module 410 is used to acquire a debugging command, where the debugging command includes a debugging object name and an operation instruction.

[0115] The address information search module 420 is used to search for address information corresponding to a debug object name from a configuration file. The configuration file stores the debug object name and the address information corresponding to the debug object name in the processor to be debugged.

[0116] The processor debugging module 430 is configured to send address information to the processor to be debugged according to an operation instruction, so as to debug the processor to be debugged.

[0117] Optionally, in the embodiment of the present application, the processor debugging device further includes:

[0118] The address information acquisition module is used to acquire multiple debugging object names of the processor to be debugged and the address information corresponding to each debugging object name.

[0119] The object address storage module is used to store multiple debugging object names and their corresponding address information in a configuration file.

[0120] Optionally, in an embodiment of the present application, the debugging object name includes: a variable name and / or a register name; the address information search module includes:

[0121] The memory address search submodule is used to search the memory address information of the variable name in the processor to be debugged from the configuration file.

[0122] And / or, a register address search submodule, used to search the register address information of the register name in the processor to be debugged from the configuration file.

[0123] Optionally, in an embodiment of the present application, the operation instruction is a viewing instruction; the processor debugging module includes:

[0124] The first information sending submodule is used to send address information to the processor to be debugged.

[0125] The second information receiving submodule is used to receive data returned by the processor to be debugged according to the address information.

[0126] Optionally, in an embodiment of the present application, the operation instruction is a monitoring instruction; the processor debugging module includes:

[0127] The preset frequency parsing submodule is used to parse the preset frequency corresponding to the address information from the monitoring instruction.

[0128] The second information sending submodule is used to send address information to the processor to be debugged at a preset frequency.

[0129] The second information receiving submodule is configured to receive data values returned by the processor to be debugged according to the address information at a preset frequency.

[0130] Optionally, in an embodiment of the present application, the operation instruction is a modification instruction; the processor debugging module includes:

[0131] The new data parsing submodule is used to parse new data from the modification instructions.

[0132] The third information sending submodule is used to send address information and new data to the processor to be debugged.

[0133] The third information receiving submodule is configured to receive a result of the processor to be debugged modifying old data obtained by using new data to obtain address information.

[0134] Optionally, in an embodiment of the present application, the operation instruction is a compound instruction; the processor debugging module includes:

[0135] The fourth information sending submodule is used to send address information and compound instructions to the processor to be debugged, where the compound instructions are used to perform compound operations on data obtained from the address information.

[0136] Optionally, in an embodiment of the present application, the debugging object name is a function name; the address information search module includes:

[0137] The function address search module is used to search the memory address information of the function name in the processor to be debugged from the configuration file.

[0138] Optionally, in an embodiment of the present application, the operation instruction is a jump instruction; the processor debugging module includes:

[0139] The fifth information sending submodule is used to send address information and a jump instruction to the processor to be debugged, where the jump instruction is used to jump to the function corresponding to the address information.

[0140] Optionally, in the embodiment of the present application, the processor debugging device further includes:

[0141] The debugging command receiving module is used to receive debugging commands sent by a remote device.

[0142] The debugging result sending module is used to send the debugging result to the remote device.

[0143] Optionally, in the embodiment of the present application, the processor debugging device further includes:

[0144] A configuration data storage module is used to receive target configuration data sent by a remote device and store the target configuration data in a target storage module containing a configuration file;

[0145] The configuration data updating module is used to update the target configuration data stored in the target storage module to the processor to be debugged.

[0146] It should be understood that the device corresponds to the above-mentioned processor debugging method embodiment and can perform each step involved in the above-mentioned method embodiment. The specific functions of the device can be found in the description above, and a detailed description is omitted here. The device includes at least one software function module that can be stored in the memory in the form of software or firmware or fixed in the operating system (OS) of the device.

[0147] See Figure 6 The electronic device 500 provided in the embodiment of the present application includes a processor 510 and a memory 520, wherein the memory 520 stores machine-readable instructions executable by the processor 510, and the machine-readable instructions execute the above method when executed by the processor 510.

[0148] The embodiment of the present application further provides a computer-readable storage medium 530, on which a computer program is stored, and the computer program is executed by the processor 510 to execute the above method. The computer-readable storage medium 530 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0149] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similarities between the various embodiments can be referred to in conjunction with each other. For device embodiments, since they are generally similar to method embodiments, their description is relatively simple, and for relevant details, reference can be made to the description of the method embodiments.

[0150] In the several embodiments provided in the embodiments of the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are only schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible implementation architectures, functions and operations of the devices, methods and computer program products according to the multiple embodiments of the embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and a module, a program segment or a part of a code contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also be different from the order of occurrence marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which is mainly based on the functions involved.

[0151] In addition, the functional modules of each embodiment in the embodiments of the present application can be integrated together to form an independent part, or each module can exist separately, or two or more modules can be integrated to form an independent part. In addition, in the description of this specification, the descriptions with reference to the terms "one embodiment", "some embodiments", "example", "specific example", "some examples", etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the embodiments of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in an appropriate manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction.

[0152] The above description is only an optional implementation method of the embodiment of the present application, but the protection scope of the embodiment of the present application is not limited to this. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in the embodiment of the present application, and they should all be covered by the protection scope of the embodiment of the present application.

Claims

1. A processor debugging method, characterized in that: include: Obtaining a debugging command, wherein the debugging command includes: a debugging object name and an operation instruction; Searching for address information corresponding to the debug object name from a configuration file, wherein the configuration file stores the debug object name and address information corresponding to the debug object name in the processor to be debugged; The address information is sent to the processor to be debugged according to the operation instruction, so as to debug the processor to be debugged.

2. The method according to claim 1, characterized in that Before searching the configuration file for the address information corresponding to the debug object name, the method further includes: Acquire multiple debugging object names of the processor to be debugged and address information corresponding to each of the debugging object names; The plurality of debugging object names and their corresponding address information are stored in the configuration file.

3. The method according to claim 1, characterized in that The debugging object name includes: a variable name and / or a register name; and searching for address information corresponding to the debugging object name from a configuration file includes: Searching the configuration file for memory address information of the variable name in the processor to be debugged; and / or, The register address information of the register name in the processor to be debugged is searched from the configuration file.

4. The method according to any one of claims 1 to 3, characterized in that The operation instruction is a viewing instruction; and sending the address information to the processor to be debugged according to the operation instruction to debug the processor to be debugged includes: Sending the address information to the processor to be debugged; Receive data returned by the processor to be debugged according to the address information.

5. The method according to any one of claims 1 to 4, characterized in that The operation instruction is a monitoring instruction; and sending the address information to the processor to be debugged according to the operation instruction to debug the processor to be debugged includes: Parsing the preset frequency corresponding to the address information from the monitoring instruction; Sending the address information to the processor to be debugged at the preset frequency; Receive a data value returned by the processor to be debugged according to the address information at the preset frequency.

6. The method according to any one of claims 1 to 5, characterized in that The operation instruction is a modification instruction; and sending the address information to the processor to be debugged according to the operation instruction to debug the processor to be debugged includes: Parsing new data from the modification instruction; Sending the address information and the new data to the processor to be debugged; A result of the processor to be debugged using the new data to modify the old data obtained from the address information is received.

7. The method according to any one of claims 1 to 6, characterized in that The operation instruction is a compound instruction; and sending the address information to the processor to be debugged according to the operation instruction to debug the processor to be debugged includes: The address information and the compound instruction are sent to the processor to be debugged, where the compound instruction is used to perform a compound operation on the data obtained by the address information.

8. The method according to claim 1, characterized in that The debugging object name is a function name; and searching for address information corresponding to the debugging object name from a configuration file includes: The memory address information of the function name in the processor to be debugged is searched from the configuration file.

9. The method according to claim 8, characterized in that The operation instruction is a jump instruction; and sending the address information to the processor to be debugged according to the operation instruction to debug the processor to be debugged includes: The address information and the jump instruction are sent to the processor to be debugged, where the jump instruction is used to jump to and execute the function corresponding to the address information.

10. The method according to any one of claims 1 to 9, characterized in that: The obtaining of the debugging command includes: receiving the debugging command sent by the remote device; After debugging the processor to be debugged according to the operation instruction and the address information, the method further includes: Sending the debugging result to the remote device.

11. The method according to claim 10, characterized in that Before receiving the debugging command sent by the remote device, the method further includes: receiving target configuration data sent by the remote device, and storing the target configuration data in a target storage module containing the configuration file; The target configuration data stored in the target storage module is updated to the processor to be debugged.

12. A processor debugging device, characterized in that: include: A debugging command acquisition module is used to acquire a debugging command, wherein the debugging command includes: a debugging object name and an operation instruction; An address information search module is configured to search for address information corresponding to the debug object name from a configuration file, wherein the configuration file stores the debug object name and address information corresponding to the debug object name in the processor to be debugged; The processor debugging module is used to send the address information to the processor to be debugged according to the operation instruction, so as to debug the processor to be debugged.

13. A processor debugging system, characterized in that: include: An intermediate processor and a processor to be debugged, wherein the intermediate processor and the processor to be debugged are communicatively connected; The intermediate processor is used to obtain a debugging command, wherein the debugging command includes: a debugging object name and an operation instruction; The intermediate processor is further configured to search for address information corresponding to the debug object name from a configuration file, wherein the configuration file stores the debug object name and address information corresponding to the debug object name in the processor to be debugged; The intermediate processor is further configured to send the address information to the processor to be debugged according to the operation instruction, so as to debug the processor to be debugged; The processor to be debugged is used to be debugged by the intermediate processor according to the address information.

14. The system according to claim 13, wherein: Also includes: a remote device, the remote device being communicatively connected to the intermediate processor; The remote device is used to send the debugging command to the intermediate processor; The intermediate processor is further configured to receive the debugging command sent by the remote device; The intermediate processor is further configured to send a debugging result to the remote device.

15. An electronic device, characterized in that: include: A processor and a memory, wherein the memory stores machine-readable instructions executable by the processor, and when the machine-readable instructions are executed by the processor, the method according to any one of claims 1 to 11 is performed.

16. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 11 is executed.

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