Over-temperature protection circuit, PCB and chip
By designing an over-temperature protection circuit, the real-time monitoring and protection of chip temperature is achieved by using stable reference voltage and hysteresis comparison, the circuit instability and reliability problems caused by chip high temperature are solved, and the stability and reliability of the system are improved.
Patent Information
- Application Number
- CN202510536503.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-27
- Publication Date
- 2025-08-12
AI Technical Summary
In integrated circuits, the circuit instability and reliability of the chip due to high temperatures may even be damaged or paralyzed by the circuit system, making it difficult for the existing technology to effectively achieve overtemperature protection.
An over-temperature protection circuit is designed, including a start-up unit, a reference unit, a temperature detection unit, a comparison unit and a discharge unit. Through stable reference voltage and hysteresis comparison, real-time monitoring and protection of chip temperature is achieved to ensure that the circuit is cut off in time when over-temperature is over-temperature.
Accurate monitoring and timely protection of chip temperature is achieved, the stability and reliability of the circuit system are improved, energy consumption and heating are reduced, and chip damage is prevented due to overheating.
Smart Images
Figure CN120473944A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of electronic technology, and in particular to an over-temperature protection circuit, a PCB board, and a chip. Background Art
[0002] In today's era of rapid electronic device development, integrated circuits are widely used in a wide range of electronic products. As chip integration continues to increase, their performance has significantly improved, but power consumption has also increased dramatically. When an integrated circuit operates continuously for extended periods of time or experiences abnormal circuit conditions such as a short circuit, the chip rapidly generates significant heat, causing its temperature to rise rapidly. Excessively high chip operating temperatures can have a number of adverse effects on the entire circuit system. On the one hand, high temperatures can destabilize the circuit, causing fluctuations in the performance of electronic devices, disrupting normal circuit operation and reducing device reliability. On the other hand, persistently high chip temperatures can directly damage electronic devices and, in severe cases, even paralyze the entire circuit system. Therefore, an overtemperature protection circuit needs to be integrated into the chip. Summary of the Invention
[0003] The present invention aims to improve at least one technical problem in the background technology.
[0004] A first aspect of the present invention provides an over-temperature protection circuit, comprising: a starting unit, a reference unit, a temperature detection unit, a comparison unit, and a discharge unit; the starting unit is electrically connected to the reference unit, the reference unit is electrically connected to the temperature detection unit, the temperature detection unit is electrically connected to the comparison unit, and the comparison unit is electrically connected to the discharge unit; the starting unit is used to provide a starting condition for the reference unit, the reference unit is used to provide a reference voltage for the temperature detection unit, the temperature detection unit is used to detect the temperature change of the chip and convert the temperature change into an electrical signal, the comparison unit is used to compare the electrical signal output by the temperature detection unit with a preset threshold and output a level signal, and the discharge unit is used to control the power supply of the chip according to the level signal output by the comparison unit.
[0005] The beneficial effects of the embodiments of the first aspect of the present invention are as follows: the startup unit is electrically connected to the reference unit, which can provide stable startup conditions for the reference unit, ensure that the reference unit outputs the reference voltage quickly and stably, so that the entire protection circuit can enter the working state in time, and avoid the chip being in an unprotected state in the early operation due to startup delay; the reference unit provides a stable reference voltage for the temperature detection unit, which is not affected by power supply voltage fluctuations and temperature changes, ensuring the accuracy of the temperature detection unit, so that it can accurately convert temperature changes into reliable electrical signals, avoiding temperature misjudgment due to unstable reference voltage; the temperature detection unit efficiently converts temperature changes into electrical signals and transmits them to the comparison unit; the comparison unit compares the electrical signal with a preset threshold, and outputs an accurate level signal to the discharge unit, reducing malfunctions caused by unstable signals; finally, the discharge unit quickly controls the on and off of the chip power supply according to the level signal output by the comparison unit to achieve over-temperature protection.
[0006] As some sub-solutions of the above technical solution, the startup unit includes a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, and a power supply voltage terminal; the source of the first MOS transistor M1 is connected to the power supply voltage terminal, the gate of the first MOS transistor M1 is connected to the reference unit, and the drain of the first MOS transistor M1 is connected to the drain of the second MOS transistor M2, the gate of the second MOS transistor M2, and the gate of the third MOS transistor M3; the source of the second MOS transistor M2 is grounded; the source of the third MOS transistor M3 is grounded, and the drain of the third MOS transistor M3 is connected to the reference unit.
[0007] As some sub-solutions of the above technical solution, the reference unit includes a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, and a first resistor R1; the source of the fourth MOS transistor M4 and the source of the fifth MOS transistor M5 are connected to the power supply voltage terminal, the gate of the fourth MOS transistor M4 is connected to the drain of the third MOS transistor M3, the gate of the fifth MOS transistor M5, the drain of the fifth MOS transistor M5, the drain of the seventh MOS transistor M7, the gate of the first MOS transistor M1, and the temperature detection unit; the drain of the fourth MOS transistor M4 is connected to the drain of the sixth MOS transistor M6, the gate of the sixth MOS transistor M6, and the gate of the seventh MOS transistor M7; the source of the sixth MOS transistor M6 is grounded; the source of the seventh MOS transistor M7 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is grounded.
[0008] As some sub-solutions of the above technical solution, the temperature detection unit includes an eighth MOS transistor M8 and a first transistor Q1; the source of the eighth MOS transistor M8 is connected to the power supply voltage terminal, the gate of the eighth MOS transistor M8 is connected to the drain of the eighth MOS transistor M8, the emitter of the first transistor Q1, and the comparison unit; the collector of the first transistor Q1 is connected to the drain of the seventh MOS transistor M7, and the collector of the first transistor Q1 is grounded.
[0009] As some sub-solutions of the above technical solution, the comparing unit includes a ninth MOS transistor M9, a tenth MOS transistor M10, an eleventh MOS transistor M11, a twelfth MOS transistor M12, a thirteenth MOS transistor M13 and a fourteenth MOS transistor M14; the source of the ninth MOS transistor M9 is connected to the power supply voltage terminal, the gate of the ninth MOS transistor M9 is connected to the gate of the tenth MOS transistor M10, the gate of the twelfth MOS transistor M12, the gate of the thirteenth MOS transistor M13 and the emitter of the first transistor Q1; the source of the ninth MOS transistor M9 is connected to the gate of the tenth MOS transistor M10, the gate of the twelfth MOS transistor M12, the gate of the thirteenth MOS transistor M13 and the emitter of the first transistor Q1; The source of the tenth MOS transistor M10 is connected to the source of the eleventh MOS transistor M11; the drain of the tenth MOS transistor M10 is connected to the drain of the twelfth MOS transistor M12, the gate of the eleventh MOS transistor M11, the gate of the fourteenth MOS transistor M14, and the discharge unit; the drain of the eleventh MOS transistor M11 is connected to the drain of the fourteenth MOS transistor M14; the source of the twelfth MOS transistor M12 is connected to the source of the fourteenth MOS transistor M14 and the drain of the thirteenth MOS transistor M13; the source of the thirteenth MOS transistor M13 is grounded.
[0010] As some sub-solutions of the above technical solution, the discharge unit 5 includes a fifteenth MOS transistor M15 and a sixteenth MOS transistor M16; the source of the fifteenth MOS transistor M15 is connected to the power supply voltage, the gate of the fifteenth MOS transistor M15 is connected to the drain of the fifteenth MOS transistor M15 and the drain of the sixteenth MOS transistor M16; the gate of the sixteenth MOS transistor M16 is connected to the drain of the tenth MOS transistor M10; and the source of the sixteenth MOS transistor M16 is grounded.
[0011] As some sub-solutions of the above technical solution, the channel width-to-length ratios of the sixth MOS transistor M6 and the seventh MOS transistor M7 are the same; the channel width-to-length ratios of the fourth MOS transistor M4 and the fifth MOS transistor M5 are the same.
[0012] As some sub-solutions of the above technical solution, the first MOS transistor M1, the fourth MOS transistor M4, the fifth MOS transistor M5, the eighth MOS transistor M8, the ninth MOS transistor M9, the tenth MOS transistor M10, the eleventh MOS transistor M11, and the fifteenth MOS transistor M15 are all P-channel depletion-type field-effect transistors; the second MOS transistor M2, the third MOS transistor M3, the sixth MOS transistor M6, the seventh MOS transistor M7, the twelfth MOS transistor M12, the thirteenth MOS transistor M13, the fourteenth MOS transistor M14, and the sixteenth MOS transistor M16 are all N-channel depletion-type field-effect transistors.
[0013] A second aspect of the present invention provides a PCB board, on which any of the above-described over-temperature protection circuits is printed.
[0014] The PCB board according to the embodiment of the second aspect of the present invention also has corresponding beneficial effects because it includes the over-temperature protection circuit of the above technical solution.
[0015] A third aspect of the present invention provides a chip, which uses any of the above-mentioned over-temperature protection circuits to achieve operation control.
[0016] The chip according to the embodiment of the third aspect of the present invention also has corresponding beneficial effects because it includes the over-temperature protection circuit of the above technical solution. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:
[0018] Figure 1 A circuit block diagram of the over-temperature protection circuit provided by the present invention;
[0019] Figure 2 This is an application circuit diagram of the over-temperature protection circuit provided by the present invention.
[0020] In the accompanying drawings: 1 - starting unit 1; 2 - reference unit 2; 3 - temperature detection unit 3; 4 - comparison unit 4; 5 - discharge unit 5. DETAILED DESCRIPTION
[0021] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.
[0022] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present invention.
[0023] In the description of the present invention, "several" means an indefinite quantity, "multiple" means more than two, "greater than," "less than," and "exceed" are understood to exclude the number itself, and "above," "below," and "within" are understood to include the number itself. The use of "first" and "second" is solely for the purpose of distinguishing technical features and should not be understood to indicate or imply relative importance, or to implicitly indicate the number or order of the technical features indicated. "And / or" throughout the text represents three parallel solutions. For example, "A and / or B" means a solution where A satisfies, a solution where B satisfies, or a solution where both A and B satisfy.
[0024] In the description of the present invention, if there is a short sentence containing multiple parallel features, the attributive defines the closest feature. For example, "B, C, and E are arranged on A, and are connected to D" means that B is arranged on A and E is connected to D, and does not constitute a limitation on C. However, attributives that express the relationship between features, such as "spaced arrangement" or "circular arrangement", do not fall into this category. If the word "all" is preceded by an attributive, it means that all features in the short sentence are limited. For example, "B, C, and D are all arranged on A" means that B, C, and D are all arranged on A. In a sentence with an omitted subject, the omitted subject is the subject of the previous sentence, that is, "B is arranged on A, including C" means that B is arranged on A and A includes C.
[0025] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, and connecting should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.
[0026] The following combination Figures 1 to 2 Embodiments of the present invention are described.
[0027] An over-temperature protection circuit in this embodiment includes: a startup unit 1, a reference unit 2, a temperature detection unit 3, a comparison unit 4, and a discharge unit 5; the startup unit 1 is electrically connected to the reference unit 2, the reference unit 2 is electrically connected to the temperature detection unit 3, the temperature detection unit 3 is electrically connected to the comparison unit 4, and the comparison unit 4 is electrically connected to the discharge unit 5; the startup unit 1 is used to provide a startup condition for the reference unit 2, the reference unit 2 is used to provide a reference voltage for the temperature detection unit 3, the temperature detection unit 3 is used to detect temperature changes of a chip and convert the temperature changes into electrical signals, the comparison unit 4 is used to compare the electrical signal output by the temperature detection unit 3 with a preset threshold and output a level signal, and the discharge unit 5 is used to control the power supply of the chip based on the level signal output by the comparison unit 4.
[0028] In the embodiment of the first aspect of the present invention, when the circuit is powered on, the starting unit 1 is first activated to generate a suitable starting signal so that the relevant components in the reference unit 2 start working, ensuring that the reference unit 2 outputs the reference voltage quickly and stably, so that the entire protection circuit can enter the working state in time, avoiding the chip being in an unprotected state in the early operation due to startup delay; the reference unit 2 provides a stable reference voltage for the temperature detection unit 3, and the reference voltage is not affected by power supply voltage fluctuations and temperature changes, thereby ensuring the accuracy of the temperature detection unit 3; the temperature sensitive element in the temperature detection unit 3 will convert the change in chip temperature into an electrical signal and transmit it to the comparison unit 4; the comparison unit 4 compares this electrical signal with the pre-set upper and lower thresholds, and outputs a low level when the temperature is normal, and outputs a high level when the temperature is excessive. When the chip temperature is low, the circuit outputs a high level; when the comparison unit 4 outputs a low level, the components in the discharge unit 5 are in the cut-off state. At this time, the power supply voltage can normally power the chip, and the current flows from the power supply to the chip through the cut-off path of the discharge unit 5; when the comparison unit 4 outputs a high level, the components in the discharge unit 5 are turned on, forming a low-impedance discharge path, discharging the power supply voltage to the ground, thereby cutting off the power supply to the chip. At this time, the current flows directly from the power supply to the ground through the discharge unit 5; through this series of orderly work processes, real-time monitoring and protection of the chip temperature is achieved. When the chip temperature is within the normal range, the circuit can ensure normal power supply and operation of the chip. When the chip temperature exceeds the safe range, the power supply can be cut off in time to avoid damage to the chip due to overheating, thereby improving the stability and reliability of the entire circuit system.
[0029] The over-temperature protection circuit provided by the present invention utilizes a stable reference voltage in conjunction with a transistor to achieve accurate and stable temperature detection, has a fast response speed, and can react to temperature changes in a timely manner. Compared with traditional resistance temperature measurement, the circuit has low power consumption and low heat dissipation, reducing energy consumption and heat generation; the comparison unit 4 has strong anti-noise ability, ensuring the stable operation of the circuit in complex environments, and has a hysteresis function, avoiding frequent switching of the chip near the critical temperature; through the coordinated work of each unit, real-time monitoring and protection of the chip temperature is achieved.
[0030] Specifically, the startup unit 1 includes a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, and a power supply voltage terminal; the source of the first MOS transistor M1 is connected to the power supply voltage terminal, the gate of the first MOS transistor M1 is connected to the reference unit 2, and the drain of the first MOS transistor M1 is connected to the drain of the second MOS transistor M2, the gate of the second MOS transistor M2, and the gate of the third MOS transistor M3; the source of the second MOS transistor M2 is grounded; the source of the third MOS transistor M3 is grounded, and the drain of the third MOS transistor M3 is connected to the reference unit.
[0031] Specifically, in the startup phase of the over-temperature protection circuit, the gate potential of the first MOS transistor M1 is pulled down, and the first MOS transistor M1 is turned on. At this time, current flows from the power supply voltage VCC through the source of the first MOS transistor M1 to the drain, and flows into the gates of the second MOS transistor M2 and the third MOS transistor M3, so that the gate potentials of the second MOS transistor M2 and the third MOS transistor M3 increase, and the second MOS transistor M2 and the third MOS transistor M3 are turned on; after the third MOS transistor M3 is turned on, current flows from the drain to the source; and the gate potentials of the fourth MOS transistor M4 and the fifth MOS transistor M5 connected to the drain of the third MOS transistor M3 are reduced, and the fourth MOS transistor M4 and the fifth MOS transistor M5 are turned on, thereby starting to supply power to the reference unit 2; after the current enters the reference unit 2, part of the current flows to the ground through the sixth MOS transistor M6, and the other part flows to the ground through the seventh MOS transistor M7. The current flowing through the MOS transistor M7 and the resistor R1 flows to ground. Since the sixth MOS transistor M6 and the seventh MOS transistor M7 have the same channel width-to-length ratio, and the fourth MOS transistor M4 and the fifth MOS transistor M5 have the same channel width-to-length ratio, the drain of the seventh MOS transistor M7 generates a stable reference voltage Vb based on the electrical characteristics of the MOS transistors and the voltage division principle of the circuit. Furthermore, since the MOS transistors are positive temperature devices and the resistor R1 is a negative temperature device, their characteristics compensate for each other, making the reference voltage Vb unaffected by power supply voltage fluctuations and temperature changes. The reference voltage Vb, on the one hand, provides a continuous drive signal for the first MOS transistor M1 in the startup unit 1, maintaining a stable connection between the startup unit 1 and the reference unit 2. On the other hand, the reference voltage Vb is output to the temperature detection unit 3 as a reference voltage for temperature detection, ensuring the accurate operation of the entire over-temperature protection circuit.
[0032] During this process, the startup unit 1 provides the triggering conditions for the reference unit 2 to start, ensuring that the reference unit 2 can start working quickly and stably after the circuit is powered on, laying the foundation for subsequent temperature detection and protection functions; the reference unit 2 provides a stable and reliable reference voltage for the entire over-temperature protection circuit, so that the subsequent temperature detection unit 3 can accurately convert temperature changes into electrical signals, thereby improving the accuracy of temperature detection and the stability of the entire circuit.
[0033] Specifically, the reference unit includes a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, and a first resistor R1; the source of the fourth MOS transistor M4 and the source of the fifth MOS transistor M5 are connected to the power supply voltage terminal, the gate of the fourth MOS transistor M4 is connected to the drain of the third MOS transistor M3, the gate of the fifth MOS transistor M5, the drain of the fifth MOS transistor M5, the drain of the seventh MOS transistor M7, the gate of the first MOS transistor M1, and the temperature detection unit; the drain of the fourth MOS transistor M4 is connected to the drain of the sixth MOS transistor M6, the gate of the sixth MOS transistor M6, and the gate of the seventh MOS transistor M7; the source of the sixth MOS transistor M6 is grounded; the source of the seventh MOS transistor M7 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is grounded.
[0034] Specifically, the temperature detection unit includes an eighth MOS transistor M8 and a first transistor Q1; the source of the eighth MOS transistor M8 is connected to the power supply voltage terminal, the gate of the eighth MOS transistor M8 is connected to the drain of the eighth MOS transistor M8, the emitter of the first transistor Q1, and the comparison unit; the collector of the first transistor Q1 is connected to the drain of the seventh MOS transistor M7, and the collector of the first transistor Q1 is grounded.
[0035] In the temperature detection unit 3, the stable reference voltage Vb output by the reference unit 2 is input to the base of the first transistor Q1. At this time, the base potential of the first transistor Q1 is fixed at the reference voltage value. When the chip temperature changes, the BE junction voltage VBE of the first transistor Q1 will change. According to the characteristics of the transistor, VBE has a negative temperature coefficient, that is, when the temperature increases, VBE decreases; when the temperature decreases, VBE increases. Because the base potential is fixed, changes in VBE cause changes in the emitter potential Vc. When the temperature increases, VBE decreases, and the emitter potential Vc also decreases; when the temperature decreases, VBE increases, and the emitter potential Vc increases. Vc is the electrical signal output by the temperature detection unit 3. The gate and drain of the eighth MOS transistor M8 are short-circuited, equivalent to a resistor. Its drain is connected to the emitter of the first transistor Q1, which can buffer the potential changes of Vc and ensure that the comparison unit 4 can receive an accurate temperature change signal. The temperature detection unit 3 converts the temperature change of the chip into an electrical signal, providing key input information for subsequent comparison and judgment, so that the circuit can sense the temperature status of the chip in real time.
[0036] Specifically, the comparing unit includes a ninth MOS transistor M9, a tenth MOS transistor M10, an eleventh MOS transistor M11, a twelfth MOS transistor M12, a thirteenth MOS transistor M13, and a fourteenth MOS transistor M14; the source of the ninth MOS transistor M9 is connected to the power supply voltage terminal, the gate of the ninth MOS transistor M9 is connected to the gate of the tenth MOS transistor M10, the gate of the twelfth MOS transistor M12, the gate of the thirteenth MOS transistor M13, and the emitter of the first transistor Q1; the source of the ninth MOS transistor M9 is connected to the gate of the tenth MOS transistor M10, the gate of the twelfth MOS transistor M12, the gate of the thirteenth MOS transistor M13, and the emitter of the first transistor Q1; The source of the first MOS transistor M10 is connected to the source of the eleventh MOS transistor M11; the drain of the tenth MOS transistor M10 is connected to the drain of the twelfth MOS transistor M12, the gate of the eleventh MOS transistor M11, the gate of the fourteenth MOS transistor M14 and the discharge unit; the drain of the eleventh MOS transistor M11 is connected to the drain of the fourteenth MOS transistor M14; the source of the twelfth MOS transistor M12 is connected to the source of the fourteenth MOS transistor M14 and the drain of the thirteenth MOS transistor M13; the source of the thirteenth MOS transistor M13 is grounded.
[0037] The comparison unit 4 is essentially a Schmitt circuit consisting of a ninth MOS transistor M9, a tenth MOS transistor M10, an eleventh MOS transistor M11, a twelfth MOS transistor M12, a thirteenth MOS transistor M13, and a fourteenth MOS transistor M14. Therefore, it has a hysteresis function, which can effectively prevent the frequent flipping of the output signal due to slight oscillation of the input signal, thereby providing a stable and reliable signal for subsequent control operations. The working logic of the comparison unit 4 is as follows:
[0038] When the voltage at point c rises and exceeds the preset forward threshold voltage Vmax, the twelfth MOS transistor M12 and the thirteenth MOS transistor M13 are turned on because the gate voltage reaches the turn-on condition. At the same time, the ninth MOS transistor M9 and the tenth MOS transistor M10 are turned off due to the change in gate voltage. At this time, point d outputs a low level. The determination of the forward threshold voltage Vmax is related to the parameters of the twelfth MOS transistor M12, the thirteenth MOS transistor M13, and the fourteenth MOS transistor M14 in the circuit.
[0039] When the voltage at point c drops and falls below the preset negative threshold voltage Vmin, the twelfth MOS transistor M12 and the thirteenth MOS transistor M13 are turned off due to insufficient gate voltage, while the ninth MOS transistor M9 and the tenth MOS transistor M10 are turned on. As a result, the voltage at point d outputs a high level. The determination of the negative threshold voltage Vmin is related to the parameters of the ninth MOS transistor M9, the tenth MOS transistor M10, and the eleventh MOS transistor M11 in the circuit.
[0040] Because the positive threshold voltage Vmax and the negative threshold voltage Vmin are not equal, a hysteresis loop is formed. When the voltage at point c rises, the circuit state does not change until it reaches Vmax; and when the voltage at point c falls, the circuit state does not return to normal until it reaches Vmin. This characteristic enables the circuit to remember changes in the input signal voltage at point c, preventing frequent output signal reversals caused by small fluctuations in the input signal near the critical value. This achieves hysteresis and effectively prevents frequent switching of the chip near the critical temperature.
[0041] The comparison unit 4 makes the trigger threshold of the comparison unit 4 different when the chip temperature rises and falls, avoiding the frequent opening and closing of the chip due to small fluctuations in temperature around a certain critical value, thereby improving the stability and reliability of the entire over-temperature protection circuit.
[0042] Specifically, the discharge unit 5 includes a fifteenth MOS transistor M15 and a sixteenth MOS transistor M16; the source of the fifteenth MOS transistor M15 is connected to the power supply voltage, the gate of the fifteenth MOS transistor M15 is connected to the drain of the fifteenth MOS transistor M15 and the drain of the sixteenth MOS transistor M16; the gate of the sixteenth MOS transistor M16 is connected to the drain of the tenth MOS transistor M10; and the source of the sixteenth MOS transistor M16 is grounded.
[0043] The discharge unit 5 quickly and accurately controls the power supply to the chip based on the output level signal of the comparison unit 4. When the chip temperature is abnormal, the power supply is promptly cut off to protect the chip from overheating damage. When the temperature is normal, the power supply is restored to ensure the normal operation of the chip. Its working logic is as follows:
[0044] When the chip temperature is within the normal range, the voltage at point c is at a high potential and is greater than the upper limit voltage Vmax of the comparison module. At this time, the voltage at point d is at a low level. Since point d is connected to the gate of the sixteenth MOS transistor M16, the sixteenth MOS transistor M16 is turned off, and the chip can obtain power from the power supply normally and maintain normal working state.
[0045] When the chip temperature continues to rise and exceeds the upper temperature limit, the voltage at point C will drop accordingly. When the voltage at point C drops below the lower limit voltage Vmin of the comparison module, the voltage at point D will turn to a high level. The high-level signal turns on the sixteenth MOS tube M16, thereby discharging the voltage to the ground. The chip loses power and stops working, thus achieving over-temperature protection.
[0046] When the chip stops working, the temperature will gradually drop. When the temperature drops below the lower limit temperature, the voltage at point c will gradually rise and exceed the upper limit voltage Vmax of the comparison unit 4. At this time, the voltage at point d will reset to a low level, the sixteenth MOS tube M16 will be turned off again, the chip will resume power supply from the power supply, and will re-enter the normal working state.
[0047] Specifically, the sixth MOS transistor M6 and the seventh MOS transistor M7 have the same channel width-to-length ratio; the fourth MOS transistor M4 and the fifth MOS transistor M5 have the same channel width-to-length ratio.
[0048] Specifically, the first MOS transistor M1, the fourth MOS transistor M4, the fifth MOS transistor M5, the eighth MOS transistor M8, the ninth MOS transistor M9, the tenth MOS transistor M10, the eleventh MOS transistor M11, and the fifteenth MOS transistor M15 are all P-channel depletion-type field-effect transistors; the second MOS transistor M2, the third MOS transistor M3, the sixth MOS transistor M6, the seventh MOS transistor M7, the twelfth MOS transistor M12, the thirteenth MOS transistor M13, the fourteenth MOS transistor M14, and the sixteenth MOS transistor M16 are all N-channel depletion-type field-effect transistors.
[0049] A second aspect of the present invention provides a PCB board, on which any of the above-described over-temperature protection circuits is printed.
[0050] A third aspect of the present invention provides a chip, which uses any of the above-mentioned over-temperature protection circuits to achieve operation control.
[0051] The above specifically describes the preferred embodiments of the present invention, but the present disclosure is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present disclosure.
Claims
1. An over-temperature protection circuit, characterized in that: include: Start-up unit, reference unit, temperature detection unit, comparison unit and discharge unit; The startup unit is electrically connected to the reference unit, the reference unit is electrically connected to the temperature detection unit, the temperature detection unit is electrically connected to the comparison unit, and the comparison unit is electrically connected to the discharge unit; the startup unit is used to provide a startup condition for the reference unit, the reference unit is used to provide a reference voltage for the temperature detection unit, the temperature detection unit is used to detect the temperature change of the chip and convert the temperature change into an electrical signal, the comparison unit is used to compare the electrical signal output by the temperature detection unit with a preset threshold and output a level signal, and the discharge unit is used to control the power supply of the chip based on the level signal output by the comparison unit.
2. The over-temperature protection circuit according to claim 1, wherein: The startup unit includes a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3 and a power supply voltage terminal; the source of the first MOS transistor M1 is connected to the power supply voltage terminal, the gate of the first MOS transistor M1 is connected to the reference unit, and the drain of the first MOS transistor M1 is connected to the drain of the second MOS transistor M2, the gate of the second MOS transistor M2, and the gate of the third MOS transistor M3; the source of the second MOS transistor M2 is grounded; the source of the third MOS transistor M3 is grounded, and the drain of the third MOS transistor M3 is connected to the reference unit.
3. The over-temperature protection circuit according to claim 2, wherein: The reference unit includes a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, and a first resistor R1; the source of the fourth MOS transistor M4 and the source of the fifth MOS transistor M5 are connected to the power supply voltage terminal, the gate of the fourth MOS transistor M4 is connected to the drain of the third MOS transistor M3, the gate of the fifth MOS transistor M5, the drain of the fifth MOS transistor M5, the drain of the seventh MOS transistor M7, the gate of the first MOS transistor M1, and the temperature detection unit; the drain of the fourth MOS transistor M4 is connected to the drain of the sixth MOS transistor M6, the gate of the sixth MOS transistor M6, and the gate of the seventh MOS transistor M7; the source of the sixth MOS transistor M6 is grounded; the source of the seventh MOS transistor M7 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is grounded.
4. The over-temperature protection circuit according to claim 3, wherein: The temperature detection unit includes an eighth MOS transistor M8 and a first transistor Q1; the source of the eighth MOS transistor M8 is connected to the power supply voltage terminal, the gate of the eighth MOS transistor M8 is connected to the drain of the eighth MOS transistor M8, the emitter of the first transistor Q1, and the comparison unit; the collector of the first transistor Q1 is connected to the drain of the seventh MOS transistor M7, and the collector of the first transistor Q1 is grounded.
5. The over-temperature protection circuit according to claim 4, characterized in that: The comparing unit includes a ninth MOS transistor M9, a tenth MOS transistor M10, an eleventh MOS transistor M11, a twelfth MOS transistor M12, a thirteenth MOS transistor M13, and a fourteenth MOS transistor M14; the source of the ninth MOS transistor M9 is connected to the power supply voltage terminal, the gate of the ninth MOS transistor M9 is connected to the gate of the tenth MOS transistor M10, the gate of the twelfth MOS transistor M12, the gate of the thirteenth MOS transistor M13, and the emitter of the first transistor Q1; the source of the ninth MOS transistor M9 is connected to the gate of the tenth MOS transistor M10, the gate of the twelfth MOS transistor M12, the gate of the thirteenth MOS transistor M13, and the emitter of the first transistor Q1; The source of the first MOS transistor M12 is connected to the source of the eleventh MOS transistor M11; the drain of the tenth MOS transistor M10 is connected to the drain of the twelfth MOS transistor M12, the gate of the eleventh MOS transistor M11, the gate of the fourteenth MOS transistor M14, and the discharge unit; the drain of the eleventh MOS transistor M11 is connected to the drain of the fourteenth MOS transistor M14; the source of the twelfth MOS transistor M12 is connected to the source of the fourteenth MOS transistor M14 and the drain of the thirteenth MOS transistor M13; the source of the thirteenth MOS transistor M13 is grounded.
6. The over-temperature protection circuit according to claim 5, characterized in that: The discharge unit includes a fifteenth MOS transistor M15 and a sixteenth MOS transistor M16; the source of the fifteenth MOS transistor M15 is connected to the power supply voltage, the gate of the fifteenth MOS transistor M15 is connected to the drain of the fifteenth MOS transistor M15 and the drain of the sixteenth MOS transistor M16; the gate of the sixteenth MOS transistor M16 is connected to the drain of the tenth MOS transistor M10; and the source of the sixteenth MOS transistor M16 is grounded.
7. The over-temperature protection circuit according to claim 3, wherein: The sixth MOS transistor M6 and the seventh MOS transistor M7 have the same channel width-to-length ratio; the fourth MOS transistor M4 and the fifth MOS transistor M5 have the same channel width-to-length ratio.
8. The over-temperature protection circuit according to claim 1, wherein: The first MOS transistor M1, the fourth MOS transistor M4, the fifth MOS transistor M5, the eighth MOS transistor M8, the ninth MOS transistor M9, the tenth MOS transistor M10, the eleventh MOS transistor M11, and the fifteenth MOS transistor M15 are all P-channel depletion-type field-effect transistors; the second MOS transistor M2, the third MOS transistor M3, the sixth MOS transistor M6, the seventh MOS transistor M7, the twelfth MOS transistor M12, the thirteenth MOS transistor M13, the fourteenth MOS transistor M14, and the sixteenth MOS transistor M16 are all N-channel depletion-type field-effect transistors.
9. A PCB board, characterized in that: The device comprises an over-temperature protection circuit as claimed in any one of claims 1 to 8.
10. A chip, characterized in that: The device comprises an over-temperature protection circuit as claimed in any one of claims 1 to 8.