Power supply circuit and energy storage system

Abstract

The invention provides a power supply circuit and an energy storage system, the power supply circuit comprises a bidirectional flyback power supply circuit, the bidirectional flyback power supply circuit comprises a transformer, the transformer comprises a first coil and a second coil, and the first coil and the second coil are in coupling connection; a first driving circuit; a second driving circuit; the control circuit is connected to the first driving circuit and the second driving circuit; the first protection circuit is used for controlling the first driving circuit to enable the first coil to be in a disconnected state under the condition that the second driving circuit drives the second coil to be conducted; and the second protection circuit is used for controlling the second driving circuit to enable the second coil to be in a disconnected state under the condition that the first driving circuit drives the first coil to be conducted. According to the power supply circuit, through the first protection circuit and the second protection circuit, dual control over the first coil and the second coil can be achieved, simultaneous conduction of the first coil and the second coil of the transformer can be avoided, and then faults of the power supply circuit are avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of energy storage systems, and in particular to a power supply circuit and an energy storage system. Background Art

[0002] In related technologies, such as Figure 1 As shown, the bidirectional flyback power supply circuit includes an isolation power transformer, and the first side and the second side of the isolation power transformer are respectively connected to the power switch NMOS1 and the power switch NMOS2. The flyback driver chip U1 controls NMOS1, and the flyback driver chip U2 controls NMOS2. When the flyback is unidirectionally powered from the first side to the second side, the flyback driver chip U1 controls NMOS1 to be turned on, and the flyback driver chip U2 controls NMOS2 to be turned off. On the contrary, when the flyback is unidirectionally powered from the second side to the first side, the flyback driver chip U1 controls NMOS1 to be turned off, and the flyback driver chip U2 controls NMOS2 to be turned on.

[0003] However, in actual application, if the flyback driver chip U1 or the flyback driver chip U2 fails, the level signal output to NMOS1 and NMOS2 will be wrong, and the conduction state of NMOS1 and NMOS2 cannot be accurately controlled, which may cause the flyback driver chip U1 and the flyback driver chip U2 to drive NMOS1 and NMOS2 to turn on at the same time, thereby causing the coils at both ends of the isolation power transformer to be turned on at the same time, causing the bidirectional flyback power supply circuit to fail. Summary of the Invention

[0004] The present invention aims to at least solve the technical problem in the prior art that when a flyback driver chip fails, the coils at both ends of the isolation power transformer are simultaneously turned on.

[0005] To this end, a first aspect of the present invention provides a power supply circuit.

[0006] A second aspect of the present invention provides an energy storage system.

[0007] A first aspect of the present invention provides a power supply circuit, comprising: a bidirectional flyback power supply circuit, the bidirectional flyback power supply circuit comprising a transformer, a first drive circuit and a second drive circuit, the transformer comprising a first coil and a second coil, the first drive circuit and the second drive circuit being used to drive the first coil and the second coil, respectively, to control the direction of power conduction of the power supply circuit; a control circuit, connected to the first drive circuit and the second drive circuit, for controlling the first drive circuit and the second drive circuit; a first protection circuit, connected to the first drive circuit and the control circuit, for driving the first drive circuit when the second drive circuit drives the second coil to conduct, so that the first coil is in a disconnected state; a second protection circuit, connected to the second drive circuit and the control circuit, for driving the second drive circuit when the first drive circuit drives the first coil to conduct, so that the second coil is in a disconnected state.

[0008] The power supply circuit provided by the present invention is provided with a first protection circuit and a second protection circuit. When the control circuit controls the first drive circuit to drive the first coil to conduct, the control circuit and the second protection circuit can simultaneously control the second drive circuit, thereby achieving dual control protection of the second coil when the first coil is conducted, thereby ensuring that the second coil can be in a disconnected state. When the control circuit controls the second drive circuit to drive the second coil to conduct, the control circuit and the first protection circuit can simultaneously control the first drive circuit, thereby achieving dual control protection of the first coil when the second coil is conducted, thereby ensuring that the first coil can be in a disconnected state, thereby preventing the first and second coils from being conducted at the same time, thereby preventing power supply circuit failure.

[0009] In some technical solutions, optionally, the first drive circuit includes: a first transistor, the first end of the first transistor is connected to the first coil, the second end of the first transistor is grounded, and the control end of the first transistor is connected to the first protection circuit; a first drive chip, connected to the control end of the first transistor and the first output end of the control circuit; the second drive circuit includes: a second transistor, the first end of the second transistor is connected to the second coil, the second end of the second transistor is grounded, and the control end of the second transistor is connected to the second protection circuit; a second drive chip, connected to the control end of the second transistor and the second output end of the control circuit; wherein, when the first output end of the control circuit outputs a high-level signal to the first drive circuit, the first drive circuit drives the first transistor to turn on so that the first coil is turned on, and the second protection circuit drives the second transistor to be in an off state; when the second output end of the control circuit outputs a high-level signal to the second drive circuit, the second drive circuit drives the second transistor to turn on so that the second coil is turned on, and the first protection circuit drives the first transistor to be in an off state.

[0010] In this technical solution, the first driving circuit may include a first transistor and a first driving chip, wherein the first end of the first transistor is connected to the first coil, and the second end of the first transistor is grounded. When conduction occurs between the first transistor and the first end and the second end, the first coil can be turned on, thereby allowing electrical energy to be conducted from the first coil to the second coil.

[0011] Furthermore, the second driving circuit may include a second transistor and a second driving chip, wherein the first end of the second transistor is connected to the second coil, and the second end of the second transistor is grounded. When conduction occurs between the second transistor and the first end and the second end, the second coil can be turned on, thereby allowing electrical energy to be conducted from the second coil to the first coil.

[0012] In some technical solutions, optionally, the first protection circuit includes: a third transistor, the control end of the third transistor is connected to the first output end of the control circuit, the first end of the third transistor is connected to the first signal end, and the second end of the third transistor is grounded; a fourth transistor, the control end of the fourth transistor is connected to the first end of the third transistor, the first end of the fourth transistor is grounded, and the second end of the fourth transistor is connected to the control end of the first transistor; wherein, when the second output end of the control circuit outputs a high-level signal to the second drive circuit, the first output end of the control circuit outputs a low-level signal to put the third transistor in an off state, the fourth transistor is in an on state, and the fourth transistor outputs a low-level signal to the control end of the first transistor to put the first transistor in an off state.

[0013] In this technical solution, the first protection circuit includes a third transistor and a fourth transistor, wherein the control end of the third transistor is connected to the first output end of the control circuit, and the first end of the third transistor is connected to the first signal end. Through the first signal end, a high-level signal can be provided to the third transistor. At the same time, the second end of the third transistor is grounded to provide a low-level signal to the third transistor.

[0014] Furthermore, the control terminal of the fourth transistor is connected to the first terminal of the third transistor. When the third transistor is turned on, the high-level signal of the first signal terminal can be transmitted to the control terminal of the fourth transistor through the first terminal of the third transistor, thereby turning on the fourth transistor. At the same time, the first terminal of the fourth transistor is grounded, and the second terminal of the fourth transistor is connected to the control terminal of the first transistor. Therefore, when the fourth transistor is turned on, a low-level signal can be transmitted to the control terminal of the first transistor, thereby turning off the first transistor and the first coil.

[0015] In some technical solutions, optionally, the first protection circuit also includes: a first current limiting resistor connected between the first end of the third transistor and the first signal end; and a second current limiting resistor connected between the second end of the fourth transistor and the control end of the first transistor.

[0016] In this technical solution, the first protection circuit further includes a first current-limiting resistor connected between the first terminal of the third transistor and the first signal terminal. The first current-limiting resistor limits the current flowing to the third transistor, preventing damage to the third transistor caused by excessive current flowing through the third transistor.

[0017] Correspondingly, the first protection circuit also includes a second current limiting resistor, which is arranged between the second end of the fourth transistor and the control end of the first transistor, so that the current flowing through the fourth transistor and the current flowing to the first transistor is limited by the second current limiting resistor, thereby avoiding damage to the fourth transistor and the first transistor due to excessive current.

[0018] In some technical solutions, optionally, the second protection circuit includes: a fifth transistor, the control end of the fifth transistor is connected to the second output end of the control circuit, the first end of the fifth transistor is connected to the second signal end, and the second end of the fifth transistor is grounded; a sixth transistor, the control end of the sixth transistor is connected to the second end of the fifth transistor, the first end of the sixth transistor is grounded, and the second end of the sixth transistor is connected to the control end of the second transistor; wherein, when the first output end of the control circuit outputs a high-level signal to the first drive circuit, the second output end of the control circuit outputs a low-level signal to put the fifth transistor in an off state, the sixth transistor is in an on state, and the sixth transistor outputs a low-level signal to the control end of the second transistor to put the second transistor in an off state.

[0019] In this technical solution, the second protection circuit includes a fifth transistor and a sixth transistor, wherein the control end of the fifth transistor is connected to the second output end of the control circuit, and the first end of the fifth transistor is connected to the second signal end. Through the second signal end, a high-level signal can be provided to the fifth transistor. At the same time, the second end of the fifth transistor is grounded to provide a low-level signal to the fifth transistor.

[0020] Furthermore, the control terminal of the sixth transistor is connected to the first terminal of the fifth transistor. When the fifth transistor is turned on, the high-level signal at the second signal terminal can be transmitted to the control terminal of the sixth transistor through the first terminal of the fifth transistor, thereby turning on the sixth transistor. At the same time, the first terminal of the sixth transistor is grounded, and the second terminal of the sixth transistor is connected to the control terminal of the second transistor. Therefore, when the sixth transistor is turned on, a low-level signal can be transmitted to the control terminal of the second transistor, thereby turning off the second transistor and the second coil.

[0021] In some technical solutions, optionally, the second protection circuit includes: a digital isolation optocoupler, wherein the first input terminal of the digital isolation optocoupler is connected to the first signal terminal, the second input terminal of the digital isolation optocoupler is connected to the second signal terminal, and the first output terminal of the digital isolation optocoupler is connected to the control terminal of the fifth transistor and the control terminal of the second transistor; a seventh transistor, wherein the first terminal of the seventh transistor is connected to the second output terminal of the digital isolation optocoupler, the second terminal of the seventh transistor is grounded, and the control terminal of the seventh transistor is connected to the second output terminal of the control circuit; wherein, when the second output terminal of the control circuit outputs a high-level signal, the second input terminal of the digital isolation optocoupler and the second output terminal of the digital isolation optocoupler are connected, and the first output terminal of the digital isolation optocoupler outputs a high-level signal to put the second transistor in a conductive state, and when the second output terminal of the control circuit outputs a low-level signal, the second input terminal of the digital isolation optocoupler and the second output terminal of the digital isolation optocoupler are disconnected, and the first output terminal of the digital isolation optocoupler outputs a low-level signal to put the fifth transistor in a disconnected state.

[0022] In this technical solution, the second protection circuit further includes a digital isolation optocoupler, wherein a first input terminal of the digital isolation optocoupler is connected to the first signal terminal, and a second input terminal of the digital isolation optocoupler is connected to the second signal terminal, thereby providing a high-level signal to the digital isolation optocoupler via the first signal terminal and the second signal terminal. Furthermore, a first output terminal of the digital isolation optocoupler is connected to the control terminal of the fifth transistor and the control terminal of the second transistor.

[0023] Furthermore, the second protection circuit further includes a seventh transistor, wherein a first terminal of the seventh transistor is connected to the second output terminal of the digital isolation optocoupler, a second terminal of the seventh transistor is grounded, and a control terminal of the seventh transistor is connected to the second output terminal of the control circuit. When the second output terminal of the control circuit outputs a high-level signal, the control terminal of the seventh transistor receives the high-level signal, and the seventh transistor is turned on, thereby causing conduction between the second input terminal and the second output terminal of the digital isolation optocoupler, and further causing conduction between the first input terminal and the first output terminal of the digital isolation optocoupler. The second transistor receives the high-level signal provided by the first signal terminal, thereby causing conduction between the second coil, and at this time, electrical energy is conducted from the second coil to the first coil.

[0024] Furthermore, the second protection circuit further includes a third current-limiting resistor, and the third current-limiting resistor is connected between the first terminal and the second signal terminal of the fifth transistor. The third current-limiting resistor can limit the current flowing to the fifth transistor, thereby preventing excessive current flowing through the fifth transistor from damaging the fifth transistor.

[0025] Correspondingly, the second protection circuit also includes a fourth current limiting resistor, which is arranged between the second end of the sixth transistor and the control end of the second transistor, so that the current flowing through the sixth transistor and the current flowing to the second transistor is limited by the fourth current limiting resistor, thereby avoiding damage to the sixth transistor and the second transistor caused by excessive current.

[0026] In some technical solutions, optionally, the first drive circuit further includes: a first sampling resistor, one end of the first sampling resistor is connected to the second end of the first transistor, and the other end of the first sampling resistor is grounded; a second sampling resistor, one end of the second sampling resistor is connected to the first drive chip, and the other end of the second sampling resistor is grounded; the second drive circuit further includes: a third sampling resistor, one end of the third sampling resistor is connected to the second end of the second transistor, and the other end of the third sampling resistor is grounded; and a fourth sampling resistor, one end of the fourth sampling resistor is connected to the second drive chip, and the other end of the fourth sampling resistor is grounded.

[0027] In this technical solution, by setting a first sampling resistor, it is possible to detect the current flowing through the first sampling resistor, thereby sampling the current on one side of the first coil, and thus monitoring the operating status of the power supply circuit through the current on the first coil. By setting a second sampling resistor, it is possible to detect the voltage of the second sampling resistor, thereby sampling the voltage on one side of the first coil, and thus monitoring the operating status of the power supply circuit through the voltage on the first coil.

[0028] Furthermore, by providing a third sampling resistor, it is possible to detect the current flowing through the third sampling resistor, thereby sampling the current on one side of the second coil, thereby monitoring the operating status of the power supply circuit through the current on the second coil. Correspondingly, by providing a fourth sampling resistor, it is possible to detect the voltage across the fourth sampling resistor, thereby sampling the voltage on one side of the second coil, thereby monitoring the operating status of the power supply circuit through the voltage on the second coil.

[0029] In some technical solutions, optionally, the power supply circuit also includes: a third protection circuit, the input end of the third protection circuit is connected to the first output end of the control circuit and the second output end of the control circuit, and the output end of the third protection circuit is connected to the first protection circuit and the second protection circuit; wherein, when the first output end of the control circuit and the second output end of the control circuit both output high-level signals, the third protection circuit is used to control the first protection circuit to control the first drive circuit so that the first coil is in a disconnected state, and control the second protection circuit to control the second drive circuit so that the second coil is in a disconnected state.

[0030] In this technical solution, the power supply circuit also includes a third protection circuit, the input end of the third protection circuit is connected to the first output end of the control circuit and the second output end of the control circuit, and the output end of the third protection circuit is connected to the first protection circuit and the second protection circuit.

[0031] Specifically, when the first output terminal of the control circuit and the second output terminal of the control circuit simultaneously output high-level signals, the third protection circuit can control the first protection circuit and the second protection circuit so that the first protection circuit can control the first drive circuit, thereby enabling the first drive circuit to drive the first coil into the disconnected state. Simultaneously, the third protection circuit can also control the second protection circuit so that the second protection circuit controls the second drive circuit, thereby enabling the second drive circuit to drive the second coil into the disconnected state.

[0032] In some technical solutions, optionally, the third protection circuit includes: an AND gate circuit, wherein the first input end of the AND gate circuit is connected to the first output end of the control circuit, and the second input end of the AND gate circuit is connected to the second output end of the control circuit; an eighth transistor, wherein the control end of the eighth transistor is connected to the output end of the AND gate circuit, the first end of the eighth transistor is grounded, and the second end of the eighth transistor is connected to the first protection circuit; a ninth transistor, wherein the control end of the ninth transistor is connected to the output end of the AND gate circuit, the first end of the ninth transistor is grounded, and the second end of the ninth transistor is connected to the second protection circuit; wherein, when the first output end of the control circuit and the second output end of the control circuit both output high-level signals, the output end of the AND gate circuit outputs a high-level signal, the eighth transistor and the ninth transistor are in the on state, and output low-level signals to the first protection circuit and the second protection circuit to drive the first drive circuit and the second drive circuit, so that the first coil and the second coil are in the disconnected state.

[0033] In this technical solution, the third protection circuit may include an AND gate circuit and an eighth transistor, wherein the first input end of the AND gate circuit is connected to the first output end of the control circuit, the second input end of the AND gate circuit is connected to the second output end of the control circuit, and the output end of the AND gate circuit is connected to the control ends of the eighth transistor and the ninth transistor.

[0034] It is understood that, based on the principle of an AND gate circuit, when a high-level signal is simultaneously input to the first and second input terminals of the AND gate circuit, the output terminal of the AND gate circuit can output a high-level signal. This allows a high-level signal to be output to the control terminals of the eighth and ninth transistors, and at this time, the first and second terminals of the eighth transistor are conductive. When the first and second terminals of the eighth transistor are conductive, a low-level signal can be transmitted to the first protection circuit. This allows the first drive circuit to drive the first coil to disconnect. At the same time, when the first and second terminals of the ninth transistor are conductive, a low-level signal can be transmitted to the second protection circuit, causing the second drive circuit to drive the second coil to disconnect. This allows the first and second coils to be controlled to disconnect simultaneously when a fault occurs in the control circuit, causing the first and second output terminals to simultaneously output high-level signals, thereby preventing the first and second coils from being conductive at the same time, thereby ensuring the safety of the bidirectional flyback power supply circuit.

[0035] A second aspect of the present invention provides an energy storage system, comprising a power supply circuit as described in any one of the above technical solutions; a first power supply connected to the first coil; and / or a second power supply connected to the second coil.

[0036] The energy storage system provided by the present invention includes the power supply circuit of any one of the above technical solutions, so the energy storage system includes all the beneficial effects of the power supply circuit, which will not be repeated here.

[0037] Furthermore, the energy storage system also includes a first power supply and a second power supply, the first power supply is connected to the first coil, and the second power supply is connected to the second coil. By controlling the conduction state of the first coil or the second coil, it is possible to charge the second power supply through the first power supply, or charge the first power supply through the second power supply.

[0038] Additional aspects and advantages of the invention will become apparent from the description which follows, or may be learned by practice of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:

[0040] Figure 1 A circuit diagram of a power supply circuit in the related art is shown;

[0041] Figure 2 A circuit diagram of an energy storage system according to an embodiment of the present invention is shown;

[0042] Figure 3 A circuit diagram showing a power supply circuit according to an embodiment of the present invention.

[0043] in, Figure 2 and Figure 3 The corresponding relationship between the reference numerals and component names is as follows:

[0044] 100 power supply circuit, 102 bidirectional flyback power supply circuit, 104 transformer, 106 first coil, 108 second coil, 110 first drive circuit, 112 second drive circuit, 114 control circuit, 116 first protection circuit, 118 second protection circuit, 120 first transistor, 122 first drive chip, 124 second transistor, 126 second drive chip, 128 third transistor, 130 fourth transistor, 132 first current limiting resistor, 134 second current limiting resistor, 136 fifth transistor, 138 sixth transistor, 140 digital isolation optocoupler, 142 seventh transistor, 144 first sampling resistor, 146 second sampling resistor, 148 third sampling resistor, 150 fourth sampling resistor, 152 third protection circuit, 154 AND gate circuit, 156 eighth transistor, 158 third current limiting resistor, 160 fourth current limiting resistor, 162 ninth transistor, 200 energy storage system, 202 first power supply, 204 second power supply. DETAILED DESCRIPTION

[0045] In order to more clearly understand the above-mentioned objects, features and advantages of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that, in the absence of conflict, the embodiments of the present application and the features therein can be combined with each other.

[0046] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.

[0047] Refer to the following Figure 2 and Figure 3 The power supply circuit and energy storage system provided according to some embodiments of the present invention are described.

[0048] Some embodiments of the present invention provide a power supply circuit 100, such as Figure 3As shown, the power supply circuit 100 includes: a bidirectional flyback power supply circuit 102, and the bidirectional flyback power supply circuit 102 includes: a transformer 104, the transformer 104 includes a first coil 106 and a second coil 108, and the first coil 106 and the second coil 108 are coupled; a first drive circuit 110, connected to the first coil 106, for driving the first coil 106 to conduct, so that electric energy is conducted from the first coil 106 to the second coil 108; a second drive circuit 112, connected to the second coil 108, for driving the second coil 108 to conduct, so that electric energy is conducted from the second coil 108 to the first coil 106; a control circuit 114, The first protection circuit 116 is connected to the first drive circuit 110 and the second drive circuit 112, and is used to control the first drive circuit 110 and the second drive circuit 112; the first protection circuit 116 is connected to the first drive circuit 110 and the control circuit 114, and is used to drive the first drive circuit 110 to put the first coil 106 in a disconnected state when the second drive circuit 112 drives the second coil 108 to be turned on; the second protection circuit 118 is connected to the second drive circuit 112 and the control circuit 114, and is used to drive the second drive circuit 112 to put the second coil 108 in a disconnected state when the first drive circuit 110 drives the first coil 106 to be turned on.

[0049] The power supply circuit 100 provided by the present invention includes a bidirectional flyback power supply circuit 102, which includes a transformer 104. Specifically, the transformer 104 includes a first coil 106 and a second coil 108, which are coupled to each other. The first coil 106 and the second coil 108 have different numbers of turns, thereby adjusting the output voltage across the transformer 104. Furthermore, the bidirectional flyback power supply circuit 102 also includes a first drive circuit 110 and a second drive circuit 112. The first drive circuit 110 is coupled to the first coil 106. When electrical energy needs to be conducted from the first coil 106 to the second coil 108, the first drive circuit 110 can drive the first coil 106 to conduct. Since the first coil 106 and the second coil 108 are coupled to each other, current can flow through the second coil 108 based on the principle of electromagnetic induction, thereby conducting electrical energy from the first coil 106 to the second coil 108. On the contrary, when electric energy needs to be conducted from the second coil 108 to the first coil 106, the second driving circuit 112 can drive the second coil 108 to conduct. Since the first coil 106 and the second coil 108 are coupled, based on the principle of electromagnetic induction, current can flow through the second coil 108, thereby conducting electric energy from the second coil 108 to the first coil 106.

[0050] Furthermore, the power supply circuit 100 also includes a control circuit 114, which is connected to the first drive circuit 110 and the second drive circuit 112, so that the first drive circuit 110 and the second drive circuit 112 can be controlled by the control circuit 114, and then the first coil 106 and the second coil 108 can be driven respectively by the first drive circuit 110 and the second drive circuit 112.

[0051] Furthermore, the power supply circuit 100 also includes a first protection circuit 116 and a second protection circuit 118, wherein the first protection circuit 116 is connected to the first drive circuit 110 and the control circuit 114. When the control circuit 114 controls the second drive circuit 112 to drive the second coil 108 to conduct, the control circuit 114 can simultaneously control the first protection circuit 116 so that the first protection circuit 116 can control the first drive circuit 110 so that the first drive circuit 110 can drive the first coil 106, so that the first coil 106 is in a disconnected state. At the same time, the control circuit 114 is also connected to the first drive circuit 110. When the control circuit 114 controls the second drive circuit 112 to drive the second coil 108 to conduct, the control circuit 114 can also control the first drive circuit 110 so that the first drive circuit 110 can drive the first coil 106, so that the first coil 106 is in a disconnected state. That is, when the control circuit 114 controls the second drive circuit 112 to drive the second coil 108 to be turned on, the first drive circuit 110 can be controlled simultaneously by the control circuit 114 and the first protection circuit 116, thereby realizing dual control protection of the first coil 106 when the second coil 108 is turned on, so as to ensure that the first coil 106 can be in a disconnected state, thereby preventing the first coil 106 and the second coil 108 from being turned on at the same time, thereby preventing the power supply circuit 100 from malfunctioning.

[0052] Furthermore, the second protection circuit 118 is connected to the second drive circuit 112 and the control circuit 114. When the control circuit 114 controls the first drive circuit 110 to drive the first coil 106 to conduct, the control circuit 114 can simultaneously control the second protection circuit 118, so that the second protection circuit 118 can control the second drive circuit 112, so that the second drive circuit 112 can drive the second coil 108, so that the second coil 108 is in the disconnected state. At the same time, the control circuit 114 is also connected to the second drive circuit 112. When the control circuit 114 controls the first drive circuit 110 to drive the first coil 106 to conduct, the control circuit 114 can also control the second drive circuit 112, so that the second drive circuit 112 can drive the second coil 108, so that the second coil 108 is in the disconnected state. That is, when the control circuit 114 controls the first drive circuit 110 to drive the first coil 106 to be turned on, the second drive circuit 112 can be controlled simultaneously by the control circuit 114 and the second protection circuit 118, thereby realizing dual control protection of the second coil 108 when the first coil 106 is turned on, so as to ensure that the second coil 108 can be in a disconnected state, thereby avoiding the first coil 106 and the second coil 108 from being turned on at the same time, and further avoiding failure of the power supply circuit 100.

[0053] The power supply circuit 100 provided by the present invention is provided with a first protection circuit 116 and a second protection circuit 118. When the control circuit 114 controls the first drive circuit 110 to drive the first coil 106 to conduct, the control circuit 114 and the second protection circuit 118 can simultaneously control the second drive circuit 112, thereby achieving dual control protection of the second coil 108 when the first coil 106 is conducted, thereby ensuring that the second coil 108 can be in the disconnected state. When the control circuit 114 controls the second drive circuit 112 to drive the second coil 108 to conduct, the control circuit 114 and the first protection circuit 116 can simultaneously control the first drive circuit 110, thereby achieving dual control protection of the first coil 106 when the second coil 108 is conducted, thereby ensuring that the first coil 106 can be in the disconnected state, thereby preventing the first coil 106 and the second coil 108 from being conducted at the same time, thereby preventing malfunctions of the power supply circuit 100.

[0054] In some embodiments, the first driving circuit 110 optionally includes: a first transistor 120, a first terminal of the first transistor 120 is connected to the first coil 106, and a second terminal of the first transistor 120 is grounded, that is, Figure 3The GND terminal and the control terminal of the first transistor 120 are connected to the first protection circuit 116; the first driver chip 122 is connected to the control terminal of the first transistor 120 and the first output terminal of the control circuit 114; the second driver circuit 112 includes: a second transistor 124, a first terminal of the second transistor 124 is connected to the second coil 108, a second terminal of the second transistor 124 is grounded, and the control terminal of the second transistor 124 is connected to the second protection circuit 118; a second driver chip 126 is connected to the control terminal of the second transistor 124 and the second output terminal of the control circuit 114; In which, when the first output end of the control circuit 114 outputs a high-level signal to the first drive circuit 110, the first drive circuit 110 drives the first transistor 120 to turn on, so that the first coil 106 is turned on, and the second protection circuit 118 drives the second transistor 124 to be in the off state; when the second output end of the control circuit 114 outputs a high-level signal to the second drive circuit 112, the second drive circuit 112 drives the second transistor 124 to be turned on, so that the second coil 108 is turned on, and the first protection circuit 116 drives the first transistor 120 to be in the off state.

[0055] In this embodiment, the first driver circuit 110 may include a first transistor 120 and a first driver chip 122. The first terminal of the first transistor 120 is connected to the first coil 106, and the second terminal of the first transistor 120 is grounded. When conduction occurs between the first transistor 120 and the first and second terminals, the first coil 106 is turned on, thereby enabling electrical energy to flow from the first coil 106 to the second coil 108. It will be appreciated that the first coil 106 is also connected to a power source. When the first coil 106 is turned on, electrical energy provided by the power source can flow through the first coil 106, thereby enabling electrical energy to flow from the first coil 106 to the second coil 108. The first driver chip 122 may be connected to the control terminal of the first transistor 120 and the control circuit 114. The control circuit 114 controls the first driver chip 122 to drive the control terminal of the first transistor 120, thereby controlling whether the first and second terminals of the first transistor 120 are turned on or off.

[0056] Furthermore, the second driver circuit 112 may include a second transistor 124 and a second driver chip 126. A first terminal of the second transistor 124 is connected to the second coil 108, and a second terminal of the second transistor 124 is grounded. When conduction occurs between the second transistor 124 and the first and second terminals, the second coil 108 is turned on, thereby enabling electrical energy to flow from the second coil 108 to the first coil 106. It will be appreciated that the second coil 108 is also connected to a power source. When the second coil 108 is turned on, electrical energy provided by the power source can flow through the second coil 108, thereby enabling electrical energy to flow from the second coil 108 to the first coil 106. The second driver chip 126 may be connected to the control terminal of the second transistor 124 and the control circuit 114. The control circuit 114 controls the second driver chip 126, causing it to drive the control terminal of the second transistor 124 to control the conduction between the first and second terminals of the second transistor 124.

[0057] Specifically, both the first transistor 120 and the second transistor 124 can be NMOS transistors. When the first output terminal of the control circuit 114 outputs a high-level signal to the first driver circuit 110, the first driver chip 122 outputs a high-level signal to the control terminal of the first transistor 120, thereby driving the first and second terminals of the first transistor 120 to conduct, thereby turning on the first coil 106. At the same time, the second output terminal of the control circuit 114 outputs a low-level signal to the second driver chip 126, so that the second driver chip 126 outputs a low-level signal to the control terminal of the second transistor 124, thereby disconnecting the first and second terminals of the second transistor 124. At the same time, the second protection circuit 118 is connected to the control terminal of the second transistor 124, and the second protection circuit 118 also outputs a low-level signal to the control terminal of the second transistor 124, thereby disconnecting the first and second terminals of the second transistor 124. That is, when the first output end of the control circuit 114 outputs a high-level signal to the first drive circuit 110, the second drive circuit 112 is controlled simultaneously by the control circuit 114 and the second protection circuit 118 to achieve dual control of the second transistor 124, ensuring that the first end and the second end of the second transistor 124 are in a disconnected state, thereby ensuring that the second coil 108 can be in a disconnected state, thereby preventing the first coil 106 and the second coil 108 from being turned on at the same time, and further preventing the power supply circuit 100 from malfunctioning.

[0058] Accordingly, when the second output terminal of the control circuit 114 outputs a high-level signal to the second driver circuit 112, the second driver chip 126 outputs a high-level signal to the control terminal of the second transistor 124, thereby driving the first and second terminals of the second transistor 124 to conduct, thereby turning on the second coil 108. At the same time, the first output terminal of the control circuit 114 outputs a low-level signal to the first driver chip 122, causing the first driver chip 122 to output a low-level signal to the control terminal of the first transistor 120, thereby disconnecting the first and second terminals of the first transistor 120. At the same time, the first protection circuit 116 is connected to the control terminal of the first transistor 120, and the first protection circuit 116 also outputs a low-level signal to the control terminal of the first transistor 120, thereby disconnecting the first and second terminals of the first transistor 120. That is, when the second output end of the control circuit 114 outputs a high-level signal to the second drive circuit 112, the first drive circuit 110 is controlled simultaneously by the control circuit 114 and the first protection circuit 116 to achieve dual control of the first transistor 120, ensuring that the first end and the second end of the first transistor 120 are in a disconnected state, thereby ensuring that the first coil 106 can be in a disconnected state, thereby preventing the first coil 106 and the second coil 108 from being turned on at the same time, and further preventing the power supply circuit 100 from malfunctioning.

[0059] In some embodiments, optionally, the first protection circuit 116 includes: a third transistor 128, wherein the control end of the third transistor 128 is connected to the first output end of the control circuit 114, the first end of the third transistor 128 is connected to the first signal end VIN1, and the second end of the third transistor 128 is grounded; a fourth transistor 130, wherein the control end of the fourth transistor 130 is connected to the first end of the third transistor 128, the first end of the fourth transistor 130 is grounded, and the second end of the fourth transistor 130 is connected to the control end of the first transistor 120; wherein, when the second output end of the control circuit 114 outputs a high-level signal to the second drive circuit 112, the first output end of the control circuit 114 outputs a low-level signal to put the third transistor 128 in an off state and the fourth transistor 130 in an on state, and the fourth transistor 130 outputs a low-level signal to the control end of the first transistor 120 to put the first transistor 120 in an off state.

[0060] In this embodiment, the first protection circuit 116 includes a third transistor 128 and a fourth transistor 130, wherein the control end of the third transistor 128 is connected to the first output end of the control circuit 114, and the first end of the third transistor 128 is connected to the first signal end VIN1. Through the first signal end VIN1, a high-level signal can be provided to the third transistor 128. At the same time, the second end of the third transistor 128 is grounded to provide a low-level signal to the third transistor 128.

[0061] Furthermore, the control terminal of the fourth transistor 130 is connected to the first terminal of the third transistor 128. When the third transistor 128 is turned on, the high-level signal of the first signal terminal VIN1 can be transmitted to the control terminal of the fourth transistor 130 through the first terminal of the third transistor 128, thereby turning on the fourth transistor 130. At the same time, the first terminal of the fourth transistor 130 is grounded, and the second terminal of the fourth transistor 130 is connected to the control terminal of the first transistor 120. Therefore, when the fourth transistor 130 is turned on, a low-level signal can be transmitted to the control terminal of the first transistor 120, thereby turning off the first transistor 120 and the first coil 106.

[0062] Specifically, when the second output terminal of the control circuit 114 outputs a high-level signal to the second driving circuit 112, the first output terminal of the control circuit 114 outputs a low-level signal, thereby outputting a low-level signal to the control terminal of the third transistor 128, thereby disconnecting the first and second terminals of the third transistor 128. At this time, the control terminal of the fourth transistor 130 receives the high-level signal from the first signal terminal VIN1, the first and second terminals of the fourth transistor 130 are conductive, and the first terminal of the fourth transistor 130 is grounded, so that the second terminal of the fourth transistor 130 outputs a low-level signal to the control terminal of the first transistor 120, thereby disconnecting the first transistor 120 and the first coil 106. At the same time, since the first output terminal of the control circuit 114 outputs a low-level signal and the first output terminal of the control circuit 114 is connected to the control terminal of the first transistor 120, when the control terminal of the first transistor 120 receives the low-level signal from the first output terminal of the control circuit 114, the first transistor 120 is disconnected. Furthermore, dual control actions of the first transistor 120 are achieved through the control circuit 114 and the first protection circuit 116 to ensure that the first transistor 120 is in the off state, that is, to ensure that the first coil 106 is in the off state, thereby preventing the first coil 106 and the second coil 108 from being turned on at the same time, thereby preventing the power supply circuit 100 from malfunctioning.

[0063] Furthermore, the first protection circuit 116 further includes: a first current limiting resistor 132 connected between the first end of the third transistor 128 and the first signal end VIN1; and a second current limiting resistor 134 connected between the second end of the fourth transistor 130 and the control end of the first transistor 120 .

[0064] In this embodiment, the first protection circuit 116 further includes a first current-limiting resistor 132, and the first current-limiting resistor 132 is connected between the first terminal of the third transistor 128 and the first signal terminal VIN1. By setting the first current-limiting resistor, the current flowing to the third transistor 128 can be limited, thereby preventing the third transistor 128 from being damaged by excessive current flowing through the third transistor 128.

[0065] Correspondingly, the first protection circuit 116 also includes a second current limiting resistor 134, which is arranged between the second end of the fourth transistor 130 and the control end of the first transistor 120, so that the current flowing through the fourth transistor 130 and the current flowing to the first transistor 120 are limited by the second current limiting resistor 134, thereby preventing excessive current from damaging the fourth transistor 130 and the first transistor 120.

[0066] In some embodiments, optionally, the second protection circuit 118 includes: a fifth transistor 136, wherein the control end of the fifth transistor 136 is connected to the second output end of the control circuit 114, the first end of the fifth transistor 136 is connected to the second signal end VIN2, and the second end of the fifth transistor 136 is grounded; a sixth transistor 138, wherein the control end of the sixth transistor 138 is connected to the second end of the fifth transistor 136, the first end of the sixth transistor 138 is grounded, and the second end of the sixth transistor 138 is connected to the control end of the second transistor 124; wherein, when the first output end of the control circuit 114 outputs a high-level signal to the first drive circuit 110, the second output end of the control circuit 114 outputs a low-level signal to put the fifth transistor 136 in an off state, the sixth transistor 138 in an on state, and the sixth transistor 138 outputs a low-level signal to the control end of the second transistor 124 to put the second transistor 124 in an off state.

[0067] In this embodiment, the second protection circuit 118 includes a fifth transistor 136 and a sixth transistor 138, wherein the control end of the fifth transistor 136 is connected to the second output end of the control circuit 114, and the first end of the fifth transistor 136 is connected to the second signal end VIN2. Through the second signal end VIN2, a high-level signal can be provided to the fifth transistor 136. At the same time, the second end of the fifth transistor 136 is grounded to provide a low-level signal to the fifth transistor 136.

[0068] Furthermore, the control terminal of the sixth transistor 138 is connected to the first terminal of the fifth transistor 136. When the fifth transistor 136 is turned on, the high-level signal of the second signal terminal VIN2 can be transmitted to the control terminal of the sixth transistor 138 through the first terminal of the fifth transistor 136, thereby turning on the sixth transistor 138. At the same time, the first terminal of the sixth transistor 138 is grounded, and the second terminal of the sixth transistor 138 is connected to the control terminal of the second transistor 124. Therefore, when the sixth transistor 138 is turned on, a low-level signal can be transmitted to the control terminal of the second transistor 124, thereby turning off the second transistor 124 and the second coil 108.

[0069] Specifically, when the first output terminal of the control circuit 114 outputs a high-level signal to the first drive circuit 110, the second output terminal of the control circuit 114 outputs a low-level signal, thereby outputting a low-level signal to the control terminal of the fifth transistor 136, thereby disconnecting the first and second terminals of the fifth transistor 136. At this time, the control terminal of the sixth transistor 138 receives the high-level signal from the second signal terminal VIN2, the first and second terminals of the sixth transistor 138 are conductive, and the first terminal of the sixth transistor 138 is grounded, thereby causing the second terminal of the sixth transistor 138 to output a low-level signal to the control terminal of the second transistor 124, thereby causing the second transistor 124 to be in an off state, and the second coil 108 to be in an off state. At the same time, since the second output terminal of the control circuit 114 outputs a low-level signal and the second output terminal of the control circuit 114 is connected to the control terminal of the second transistor 124, when the control terminal of the second transistor 124 receives the low-level signal from the second output terminal of the control circuit 114, the second transistor 124 is in an off state. Furthermore, dual control actions of the second transistor 124 are achieved through the control circuit 114 and the second protection circuit 118 to ensure that the second transistor 124 is in the off state, that is, to ensure that the second coil 108 is in the off state, thereby preventing the first coil 106 and the second coil 108 from being turned on at the same time, thereby preventing the power supply circuit 100 from malfunctioning.

[0070] In some embodiments, optionally, the second protection circuit 118 includes: a digital isolation optocoupler 140, a first input terminal of the digital isolation optocoupler 140 is connected to the first signal terminal VIN1, a second input terminal of the digital isolation optocoupler 140 is connected to the second signal terminal VIN2, a first output terminal of the digital isolation optocoupler 140 is connected to the control terminal of the fifth transistor 136 and the control terminal of the second transistor 124; a seventh transistor 142, a first terminal of the seventh transistor 142 is connected to the second output terminal of the digital isolation optocoupler 140, a second terminal of the seventh transistor 142 is grounded, and a control terminal of the seventh transistor 142 is connected to the control circuit 114. Second output terminal; wherein, when the second output terminal of the control circuit 114 outputs a high-level signal, the second input terminal of the digital isolation optocoupler 140 and the second output terminal of the digital isolation optocoupler 140 are connected, and the first output terminal of the digital isolation optocoupler 140 outputs a high-level signal to put the second transistor 124 in a turned-on state; when the second output terminal of the control circuit 114 outputs a low-level signal, the second input terminal of the digital isolation optocoupler 140 and the second output terminal of the digital isolation optocoupler 140 are disconnected, and the first output terminal of the digital isolation optocoupler 140 outputs a low-level signal to put the fifth transistor 136 in a turned-off state.

[0071] In this embodiment, the second protection circuit 118 further includes a digital isolation optocoupler 140, wherein a first input terminal of the digital isolation optocoupler 140 is connected to the first signal terminal VIN1, and a second input terminal of the digital isolation optocoupler 140 is connected to the second signal terminal VIN2, thereby providing a high-level signal to the digital isolation optocoupler 140 via the first signal terminal VIN1 and the second signal terminal VIN2. Furthermore, a first output terminal of the digital isolation optocoupler 140 is connected to the control terminal of the fifth transistor 136 and the control terminal of the second transistor 124. It is understandable that, based on the operating principle of the digital isolation optocoupler 140, when the second input terminal and the second output terminal of the digital isolation optocoupler 140 are conductive, the first input terminal and the first output terminal of the digital isolation optocoupler 140 can be conductive, thereby outputting a high-level signal to the control terminal of the fifth transistor 136 and the control terminal of the second transistor 124 via the first signal terminal VIN1. By setting up the digital isolation optocoupler 140, while the control circuit 114 is able to simultaneously transmit control signals to the first drive circuit 110, the second drive circuit 112, the first protection circuit 116 and the second protection circuit 118, it is also possible to isolate the two ends of the power supply circuit 100, avoid direct connection between the two ends of the power supply circuit 100, and ensure the safety of the power supply circuit 100.

[0072] Furthermore, the second protection circuit 118 further includes a seventh transistor 142, a first terminal of the seventh transistor 142 being connected to the second output terminal of the digital isolation optocoupler 140, a second terminal of the seventh transistor 142 being grounded, and a control terminal of the seventh transistor 142 being connected to the second output terminal of the control circuit 114. When the second output terminal of the control circuit 114 outputs a high-level signal, the control terminal of the seventh transistor 142 receives the high-level signal, and the seventh transistor 142 is turned on, thereby conducting electricity between the second input terminal and the second output terminal of the digital isolation optocoupler 140, and further conducting electricity between the first input terminal and the first output terminal of the digital isolation optocoupler 140. The second transistor 124 receives the high-level signal provided by the first signal terminal VIN1, thereby conducting electricity between the second coil 108. At this time, electric energy is conducted from the second coil 108 to the first coil 106.

[0073] Furthermore, when the first output terminal of the control circuit 114 outputs a high-level signal to the first transistor 120, the first transistor 120 is turned on, and electric energy is conducted from the first coil 106 to the second coil 108. Simultaneously, the second output terminal of the control circuit 114 outputs a low-level signal to the control terminal of the seventh transistor 142, and the seventh transistor 142 is turned off, thereby disconnecting the second input terminal and the second output terminal of the digital isolation optocoupler 140, and further disconnecting the first input terminal and the first output terminal of the digital isolation optocoupler 140. At this time, the control terminals of the fifth transistor 136 both receive low-level signals, and the fifth transistor 136 is turned off, while the sixth transistor 138 is turned on, thereby causing the control terminal of the second transistor 124 to receive a low-level signal, and the second transistor 124 is turned off. At the same time, the first output end of the digital isolation optocoupler 140 outputs a low-level signal to the control end of the second transistor 124, so that the second transistor 124 is disconnected, realizing dual control of the second transistor 124, ensuring that the second transistor 124 is in the disconnected state, and then ensuring that the second coil 108 is in the disconnected state, preventing the first coil 106 and the second coil 108 from being turned on at the same time.

[0074] Furthermore, the second protection circuit 118 includes a third current-limiting resistor 158, and the third current-limiting resistor 158 is connected between the first terminal and the second signal terminal VIN2 of the fifth transistor 136. By setting the third current-limiting resistor, the current flowing to the fifth transistor 136 can be limited, thereby preventing the fifth transistor 136 from being damaged by excessive current flowing through the fifth transistor 136.

[0075] Correspondingly, the second protection circuit 118 also includes a fourth current limiting resistor 160, which is arranged between the second end of the sixth transistor 138 and the control end of the second transistor 124, so that the current flowing through the sixth transistor 138 and the current flowing to the second transistor 124 are limited by the fourth current limiting resistor 160, thereby preventing excessive current from damaging the sixth transistor 138 and the second transistor 124.

[0076] In some embodiments, the first driving circuit 110 optionally further includes: a first sampling resistor 144, one end of which is connected to the second end of the first transistor 120, and the other end of which is grounded; a second sampling resistor 146, one end of which is connected to the first driving chip 122, and the other end of which is grounded; the second driving circuit 112 further includes: a third sampling resistor 148, one end of which is connected to the second end of the second transistor 124, and the other end of which is grounded; and a fourth sampling resistor 150, one end of which is connected to the second driving chip 126, and the other end of which is grounded.

[0077] In this embodiment, the first drive circuit 110 further includes a first sampling resistor 144 and a second sampling resistor 146, wherein one end of the first sampling resistor 144 is connected to the second end of the first transistor 120, and the other end is grounded. The configuration of the first sampling resistor 144 enables detection of the current flowing through the first sampling resistor 144, thereby sampling the current on one side of the first coil 106, thereby monitoring the operating status of the power supply circuit 100 through the current on the first coil 106. Accordingly, one end of the second sampling resistor 146 is connected to the first drive chip 122, and the other end of the second sampling resistor 146 is grounded. The configuration of the second sampling resistor 146 enables detection of the voltage across the second sampling resistor 146, thereby sampling the voltage on one side of the first coil 106, thereby monitoring the operating status of the power supply circuit 100 through the voltage on the first coil 106.

[0078] Furthermore, the second drive circuit 112 further includes a third sampling resistor 148 and a fourth sampling resistor 150, wherein one end of the third sampling resistor 148 is connected to the second end of the second transistor 124, and the other end is grounded. The configuration of the third sampling resistor 148 enables detection of the current flowing through the third sampling resistor 148, thereby sampling the current on one side of the second coil 108, and thereby monitoring the operating status of the power supply circuit 100 through the current on the second coil 108. Accordingly, one end of the fourth sampling resistor 150 is connected to the second drive chip 126, and the other end of the fourth sampling resistor 150 is grounded. The configuration of the fourth sampling resistor 150 enables detection of the voltage across the fourth sampling resistor 150, thereby sampling the voltage on one side of the second coil 108, and thereby monitoring the operating status of the power supply circuit 100 through the voltage on the second coil 108.

[0079] In some embodiments, optionally, the power supply circuit 100 further includes: a third protection circuit 152, wherein the input end of the third protection circuit 152 is connected to the first output end of the control circuit 114 and the second output end of the control circuit 114, and the output end of the third protection circuit 152 is connected to the first protection circuit 116 and the second protection circuit 118; wherein, when the first output end of the control circuit 114 and the second output end of the control circuit 114 both output high-level signals, the third protection circuit 152 is used to control the first protection circuit 116 to control the first drive circuit 110 so that the first coil 106 is in a disconnected state, and control the second protection circuit 118 to control the second drive circuit 112 so that the second coil 108 is in a disconnected state.

[0080] In this embodiment, the power supply circuit 100 also includes a third protection circuit 152, the input end of the third protection circuit 152 is connected to the first output end of the control circuit 114 and the second output end of the control circuit 114, and the output end of the third protection circuit 152 is connected to the first protection circuit 116 and the second protection circuit 118.

[0081] Specifically, when the first output terminal of the control circuit 114 and the second output terminal of the control circuit 114 simultaneously output high-level signals, the third protection circuit 152 can control the first protection circuit 116 and the second protection circuit 118, so that the first protection circuit 116 can control the first drive circuit 110, thereby enabling the first drive circuit 110 to drive the first coil 106 into the disconnected state. At the same time, the third protection circuit 152 can also control the second protection circuit 118, so that the second protection circuit 118 controls the second drive circuit 112, thereby enabling the second drive circuit 112 to drive the second coil 108 into the disconnected state.

[0082] It should be noted that if the control circuit 114 fails, the first and second output terminals of the control circuit 114 may simultaneously output high-level signals. In this case, the control circuit 114 simultaneously controls the first and second drive circuits 110 and 112, causing the first and second drive circuits 110 and 112 to simultaneously drive the first and second coils 106 and 108 to conduct, thereby causing a failure in the bidirectional flyback power supply circuit 102. Through the provision of the third protection circuit 152, when the control circuit 114 fails, that is, when the first and second output terminals of the control circuit 114 simultaneously output high-level signals, the third protection circuit 152 can control the first and second protection circuits 116 and 118, thereby controlling the first and second drive circuits 110 and 112 to operate, causing the first and second coils 106 and 108 to be simultaneously disconnected, thereby preventing the first and second coils 106 and 108 from being simultaneously conducted, causing a failure in the bidirectional flyback power supply circuit 102, and ensuring the safety of the bidirectional flyback power supply circuit 102.

[0083] In some embodiments, optionally, the third protection circuit 152 includes: an AND gate circuit 154, wherein a first input terminal of the AND gate circuit 154 is connected to a first output terminal of the control circuit 114, and a second input terminal of the AND gate circuit 154 is connected to a second output terminal of the control circuit 114; an eighth transistor 156, wherein a control terminal of the eighth transistor 156 is connected to the output terminal of the AND gate circuit 154, a first terminal of the eighth transistor 156 is grounded, and a second terminal of the eighth transistor 156 is connected to the first protection circuit 116; and a ninth transistor 162, wherein a control terminal of the ninth transistor 162 is connected to the output terminal of the AND gate circuit 154. The first end of the ninth transistor 162 is grounded, and the second end of the ninth transistor 162 is connected to the second protection circuit 118; wherein, when the first output end of the control circuit 114 and the second output end of the control circuit 114 both output high-level signals, the output end of the AND gate circuit 154 outputs a high-level signal, the eighth transistor 156 and the ninth transistor 162 are in the on state, and output low-level signals to the first protection circuit 116 and the second protection circuit 118 to drive the first drive circuit 110 and the second drive circuit 112, so that the first coil 106 and the second coil 108 are in the disconnected state.

[0084] In this embodiment, the third protection circuit 152 may include an AND gate circuit 154, an eighth transistor 156 and a ninth transistor 162, wherein the first input terminal of the AND gate circuit 154 is connected to the first output terminal of the control circuit 114, the second input terminal of the AND gate circuit 154 is connected to the second output terminal of the control circuit 114, and the output terminal of the AND gate circuit 154 is connected to the control terminals of the eighth transistor 156 and the ninth transistor 162.

[0085] It is understood that, based on the principle of the AND gate circuit 154, when the first input terminal and the second input terminal of the AND gate circuit 154 simultaneously output high-level signals, the output terminal of the AND gate circuit 154 can output a high-level signal. This achieves outputting a high-level signal to the control terminals of the eighth transistor 156 and the ninth transistor 162, and at this time, the first terminal and the second terminal of the eighth transistor 156 are conductive.

[0086] Furthermore, a first terminal of the eighth transistor 156 is grounded, and a second terminal of the eighth transistor 156 is connected to the first protection circuit 116. When the first terminal and the second terminal of the eighth transistor 156 are conductive, a low-level signal is transmitted to the first protection circuit 116. When the first protection circuit 116 receives the low-level signal, it controls the first drive circuit 110 so that the first drive circuit 110 drives the first coil 106 to be disconnected. At the same time, the first end of the ninth transistor 162 is grounded, and the second end of the ninth transistor 162 is connected to the second protection circuit 118. When the first end and the second end of the ninth transistor 162 are conductive, the low-level signal can be transmitted to the second protection circuit 118. When the second protection circuit 118 receives the low-level signal, the second drive circuit 112 can be controlled to make the second drive circuit 112 drive the second coil 108 to disconnect, thereby realizing that when a fault occurs in the control circuit 114, and the first output end and the second output end simultaneously output high-level signals, the first coil 106 and the second coil 108 are controlled to be disconnected at the same time, thereby avoiding the first coil 106 and the second coil 108 being conductive at the same time, thereby ensuring the safety of the bidirectional flyback power supply circuit 102.

[0087] Specifically, the output end of the eighth transistor 156 can be connected to the control end of the third transistor 128. When the eighth transistor 156 is turned on, the eighth transistor 156 outputs a low-level signal to the control end of the third transistor 128, thereby disconnecting the third transistor 128. At this time, the control end of the fourth transistor 130 receives the high-level signal of the first signal end VIN1, and the two ends of the fourth transistor 130 are turned on. At the same time, since the first end of the fourth transistor 130 is grounded, the second end of the fourth transistor 130 is connected to the control end of the first transistor 120. Therefore, when the fourth transistor 130 is turned on, it can transmit a low-level signal to the control end of the first transistor 120, thereby disconnecting the first transistor 120, and thereby disconnecting the first coil 106.

[0088] Correspondingly, the output end of the ninth transistor 162 can be connected to the control end of the seventh transistor 142. When the ninth transistor 162 is turned on, the ninth transistor 162 outputs a low-level signal to the control end of the seventh transistor 142, thereby disconnecting the seventh transistor 142. At this time, the first input end and the first output end of the digital isolation optocoupler 140 are disconnected, thereby disconnecting the second input end and the second output end of the digital isolation optocoupler 140. At this time, the control end of the fifth transistor 136 receives a low-level signal, and the fifth transistor 136 is disconnected. At this time, the sixth transistor 138 receives a high-level signal provided by the second signal end VIN2, and the sixth transistor 138 is turned on. At this time, since the first end of the sixth transistor 138 is grounded, the second end of the sixth transistor 138 is connected to the control end of the second transistor 124. Therefore, when the sixth transistor 138 is turned on, it can transmit a low-level signal to the control end of the second transistor 124, thereby disconnecting the second transistor 124, and thereby disconnecting the second coil 108.

[0089] Some embodiments of the present invention provide an energy storage system 200, such as Figure 2 As shown, the energy storage system 200 includes: the power supply circuit 100 as any one of the above technical solutions; a first power supply 202 connected to the first coil 106; and / or a second power supply 204 connected to the second coil 108.

[0090] The energy storage system 200 provided by the present invention includes the power supply circuit 100 of any one of the above technical solutions. Therefore, the energy storage system 200 includes all the beneficial effects of the power supply circuit 100, which will not be repeated here.

[0091] Furthermore, the energy storage system 200 also includes a first power supply 202 and a second power supply 204. The first power supply 202 is connected to the first coil 106, and the second power supply 204 is connected to the second coil 108. By controlling the conduction state of the first coil 106 or the second coil 108, it is possible to charge the second power supply 204 through the first power supply 202, or charge the first power supply 202 through the second power supply 204.

[0092] Specifically, both the first power source 202 and the second power source 204 may be power supply devices capable of storing electrical energy and performing charge and discharge, such as batteries.

[0093] In a specific embodiment, Figure 3 As shown, the process of implementing the unidirectional flyback function from the first coil 106 side to the second coil 108 side is as follows:

[0094] The control chip of the control circuit 114 receives an instruction from the host or its own policy to initiate a unidirectional flyback function from the first coil 106 to the second coil 108. The EN2 pin of the control chip is set low, disabling the function. The control terminal of the seventh transistor 142 is also set low, disconnecting both ends of the seventh transistor 142. This disconnects the second input terminal and the second output terminal of the digital isolation optocoupler 140, and the second output terminal of the digital isolation optocoupler 140 remains low. The EN2 pin of the second driver chip 126 is set low, disabling the function. This means the GATE pin of the second driver chip 126 remains low, disabling the function.

[0095] At the same time, the second output terminal of digital isolation optocoupler 140 remains low, the control terminal of fifth transistor 136 is set to a low level, and fifth transistor 136 is turned off. This causes the control terminal of sixth transistor 138 to be set to a high level, turning sixth transistor 138 on, and GATE2-SW to be set to a low level. GATE2-SW and the EN2 pin of the control chip are simultaneously low, thereby achieving dual control over the control terminal of second transistor 124, causing second transistor 124 to be turned off.

[0096] The EN1 pin of the control chip enables a high-level output, driving the first driver chip 122 to enable operation. The first driver chip 122 recognizes that its own EN1 pin is set to a high-level input, and the first driver chip 122 drives its own GATE pin to output a PWM square wave. The current on the first coil 106 side is synchronously collected in real time through the first sampling resistor 144, and the voltage on the first coil 106 side is actually collected through the voltage feedback resistance loop of the second sampling resistor 146.

[0097] In a specific embodiment, Figure 3 As shown, the process of implementing the unidirectional flyback function from the second coil 108 to the first coil 106 is as follows:

[0098] The control chip of the control circuit 114 receives a command from the host or its own policy to initiate a unidirectional flyback function from the first coil 106 to the second coil 108. The EN1 pin of the control chip is set low to disable the function. The EN1 pin of the first driver chip 122 is also set low to disable the function. The GATE pin of the first driver chip 122 remains low to disable the function.

[0099] At the same time, the EN1 pin of the control chip is set to a low level, causing the control terminal of the third transistor 128 to be at a low level, and the third transistor 128 to be turned off. Accordingly, the fourth transistor 130 is turned on, which in turn causes GATE1-SW to be at a low level, and the fourth transistor 130 transmits a low-level signal to the control terminal of the first transistor 120. At the same time, the EN1 pin of the control chip is set to a low level, and the GATE2-SW terminal and the EN1 pin of the control chip are simultaneously at a low level, thereby achieving dual control over the control terminal of the first transistor 120, causing the first transistor 120 to be in an off state.

[0100] The EN2 pin of the control chip enables a high-level output to drive the seventh transistor 142 to turn on, so that the first input terminal and the first output terminal of the digital isolation optocoupler 140 are turned on, and then the second input terminal and the second output terminal of the digital isolation optocoupler 140 are turned on, and then a high-level signal is output to the EN2 pin of the second driver chip 126. The second driver chip 126 recognizes that its own EN2 pin is set to a high level, and the second driver chip 126 drives its own GATE pin to output a PWM square wave, synchronously turning on the third sampling resistor 148 to collect the current on one side of the second coil 108 in real time, and actually collects the voltage on the second coil 108 side through the fourth sampling resistor 150 voltage feedback resistor loop.

[0101] In a specific embodiment, Figure 3 As shown, the implementation process of the circuit protection when the EN1 pin and EN2 pin of the control chip are in the high level state at the same time is as follows:

[0102] In abnormal fault modes such as a software freeze within the control chip, both the EN1 and EN2 pins are abnormally set to a high level. The first and second input terminals of AND gate circuit 154 are simultaneously set to a high level, and the output terminal of AND gate circuit 154 outputs a high-level signal. The control terminals of eighth transistor 156 and ninth transistor 162 receive the high-level signal, turning on eighth transistor 156 and ninth transistor 162. At this point, the second terminal CHG_DSEN of eighth transistor 156 and the second terminal DSG_DSEN of ninth transistor 162 output low-level signals. The control terminal of third transistor 128 receives the low-level signal CHG_DSEN, turning off third transistor 128 and turning on fourth transistor 130. The second terminal of fourth transistor 130 outputs a low-level signal, which in turn causes the control terminal of first transistor 120 to receive a low-level signal, turning off first transistor 120 and turning off first coil 106.

[0103] Correspondingly, the control end of the seventh transistor 142 receives the low-level signal DSG_DSEN of the second end of the ninth transistor 162, the seventh transistor 142 is disconnected, the first input end and the first output end of the digital isolation optocoupler 140 are disconnected, and the second input end and the second output end of the digital isolation optocoupler 140 are disconnected, the control end of the fifth transistor 136 receives a low-level signal, the control end of the sixth transistor 138 receives a high-level signal, the sixth transistor 138 is turned on, the second end of the sixth transistor 138 outputs a low-level signal to the control end of the second transistor 124, the second transistor 124 is disconnected, and the second coil 108 is not conductive.

[0104] In the description of the present invention, the term "plurality" refers to two or more than two. Unless otherwise expressly defined, the orientations or positional relationships indicated by the terms "upper" and "lower" are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present invention. The terms "connect," "install," and "fix" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0105] Throughout this specification, terms such as "one embodiment," "some embodiments," and "specific embodiments" mean that the specific features, structures, materials, or characteristics described in conjunction with that embodiment or example are included in at least one embodiment or example of the present invention. In this specification, schematic representations of these terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0106] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. A power supply circuit, characterized in that: include: A bidirectional flyback power supply circuit, comprising a transformer, a first drive circuit, and a second drive circuit. The transformer comprises a first coil and a second coil. The first drive circuit and the second drive circuit are respectively configured to drive the first coil and the second coil to control the direction in which power is conducted in the power supply circuit. a control circuit, connected to the first drive circuit and the second drive circuit, and configured to control the first drive circuit and the second drive circuit; a first protection circuit, connected to the first drive circuit and the control circuit, for controlling the first drive circuit to turn the first coil off when the second drive circuit drives the second coil to turn on; The second protection circuit is connected to the second drive circuit and the control circuit, and is used to control the second drive circuit to put the second coil into an off state when the first drive circuit drives the first coil to be turned on.

2. The power supply circuit according to claim 1, wherein: The first driving circuit includes: a first transistor, wherein a first terminal of the first transistor is connected to the first coil, a second terminal of the first transistor is grounded, and a control terminal of the first transistor is connected to the first protection circuit; a first driver chip connected to the control terminal of the first transistor and the first output terminal of the control circuit; The second driving circuit includes: a second transistor, wherein a first terminal of the second transistor is connected to the second coil, a second terminal of the second transistor is grounded, and a control terminal of the second transistor is connected to the second protection circuit; a second driver chip connected to the control terminal of the second transistor and the second output terminal of the control circuit; Wherein, when the first output terminal of the control circuit outputs a high-level signal to the first drive circuit, the first drive circuit drives the first transistor to be turned on, so that the first coil is turned on, and the second protection circuit drives the second transistor to be in an off state; When the second output terminal of the control circuit outputs a high-level signal to the second drive circuit, the second drive circuit drives the second transistor to turn on to turn on the second coil, and the first protection circuit drives the first transistor to be in an off state.

3. The power supply circuit according to claim 2, wherein: The first protection circuit includes: a third transistor, wherein a control terminal of the third transistor is connected to the first output terminal of the control circuit, a first terminal of the third transistor is connected to the first signal terminal, and a second terminal of the third transistor is grounded; a fourth transistor, wherein a control terminal of the fourth transistor is connected to the first terminal of the third transistor, the first terminal of the fourth transistor is grounded, and a second terminal of the fourth transistor is connected to the control terminal of the first transistor; In which, when the second output end of the control circuit outputs a high-level signal to the second driving circuit, the first output end of the control circuit outputs a low-level signal to put the third transistor in an off state and the fourth transistor in an on state, and the fourth transistor outputs a low-level signal to the control end of the first transistor to put the first transistor in an off state.

4. The power supply circuit according to claim 3, wherein: The first protection circuit further includes: a first current limiting resistor connected between the first terminal of the third transistor and the first signal terminal; A second current limiting resistor is connected between the second end of the fourth transistor and the control end of the first transistor.

5. The power supply circuit according to claim 2, wherein: The second protection circuit includes: a fifth transistor, wherein a control terminal of the fifth transistor is connected to the second output terminal of the control circuit, a first terminal of the fifth transistor is connected to the second signal terminal, and a second terminal of the fifth transistor is grounded; a sixth transistor, wherein a control terminal of the sixth transistor is connected to the second terminal of the fifth transistor, a first terminal of the sixth transistor is grounded, and a second terminal of the sixth transistor is connected to the control terminal of the second transistor; In which, when the first output end of the control circuit outputs a high-level signal to the first driving circuit, the second output end of the control circuit outputs a low-level signal to put the fifth transistor in an off state and the sixth transistor in an on state, and the sixth transistor outputs a low-level signal to the control end of the second transistor to put the second transistor in an off state.

6. The power supply circuit according to claim 5, characterized in that: The second protection circuit includes: a digital isolation optocoupler, wherein a first input terminal of the digital isolation optocoupler is connected to the first signal terminal, a second input terminal of the digital isolation optocoupler is connected to the second signal terminal, and a first output terminal of the digital isolation optocoupler is connected to the control terminal of the fifth transistor and the control terminal of the second transistor; a seventh transistor, wherein a first terminal of the seventh transistor is connected to the second output terminal of the digital isolation optocoupler, a second terminal of the seventh transistor is grounded, and a control terminal of the seventh transistor is connected to the second output terminal of the control circuit; In which, when the second output end of the control circuit outputs a high-level signal, the second input end of the digital isolation optocoupler and the second output end of the digital isolation optocoupler are connected, and the first output end of the digital isolation optocoupler outputs a high-level signal to put the second transistor in a turned-on state; when the second output end of the control circuit outputs a low-level signal, the second input end of the digital isolation optocoupler and the second output end of the digital isolation optocoupler are disconnected, and the first output end of the digital isolation optocoupler outputs a low-level signal to put the fifth transistor in a turned-off state.

7. The power supply circuit according to claim 2, wherein: The first driving circuit further includes: a first sampling resistor, one end of the first sampling resistor being connected to the second end of the first transistor, and the other end of the first sampling resistor being grounded; a second sampling resistor, one end of the second sampling resistor being connected to the first driving chip, and the other end of the second sampling resistor being grounded; The second driving circuit further includes: a third sampling resistor, one end of the third sampling resistor being connected to the second end of the second transistor, and the other end of the third sampling resistor being grounded; a fourth sampling resistor, one end of the fourth sampling resistor being connected to the second driving chip, and the other end of the fourth sampling resistor being grounded.

8. The power supply circuit according to any one of claims 1 to 7, characterized in that: Also includes: a third protection circuit, wherein an input end of the third protection circuit is connected to the first output end of the control circuit and the second output end of the control circuit, and an output end of the third protection circuit is connected to the first protection circuit and the second protection circuit; Wherein, when the first output end of the control circuit and the second output end of the control circuit both output high-level signals, the third protection circuit is used to control the first protection circuit to drive the first drive circuit so that the first coil is in a disconnected state, and control the second protection circuit to drive the second drive circuit so that the second coil is in a disconnected state.

9. The power supply circuit according to claim 8, wherein: The third protection circuit includes: an AND gate circuit, wherein a first input terminal of the AND gate circuit is connected to the first output terminal of the control circuit, and a second input terminal of the AND gate circuit is connected to the second output terminal of the control circuit; an eighth transistor, wherein a control terminal of the eighth transistor is connected to the output terminal of the AND gate circuit, a first terminal of the eighth transistor is grounded, and a second terminal of the eighth transistor is connected to the first protection circuit; a ninth transistor, wherein a control terminal of the ninth transistor is connected to the output terminal of the AND gate circuit, a first terminal of the ninth transistor is grounded, and a second terminal of the ninth transistor is connected to the second protection circuit; In which, when the first output end of the control circuit and the second output end of the control circuit both output high-level signals, the output end of the AND gate circuit outputs a high-level signal, the eighth transistor and the ninth transistor are in the on state, and output low-level signals to the first protection circuit and the second protection circuit to drive the first drive circuit and the second drive circuit, so that the first coil and the second coil are in the disconnected state.

10. An energy storage system, characterized in that: include: The power supply circuit according to any one of claims 1 to 9; a first power source connected to the first coil; and / or A second power source is connected to the second coil.

Images