Real-time circuit board defect detection method and system based on improved YOLOv5 model

Abstract

This invention discloses a real-time circuit board defect detection method and system based on an improved YOLOv5 model. The method includes: acquiring a dataset; training an improved YOLOv5 model using the dataset; the improved YOLOv5 model is based on the YOLOv5 model, replacing the original backbone network with a lightweight SE-ENv2 backbone network to reduce computational complexity and retain more feature information of small-sized defects; replacing the original neck network with a GC-Neck network to improve the model's contextual modeling ability; replacing the original head network with a TECODE detection head to learn and fuse multi-scale defect features; pruning the trained YOLOv5 model; and inputting real-time acquired circuit board images into the pruned YOLOv5 model to obtain defect detection results. This invention can detect circuit board defects accurately and in real time.

Description

Technical Field

[0001] This invention relates to the fields of deep learning and computer vision technology, and industrial circuit board inspection technology, and in particular to a real-time circuit board defect detection method, system, terminal device, and computer-readable storage medium based on an improved YOLOv5 model. Background Technology

[0002] With the rapid development of integrated circuits and semiconductor technology, circuit boards have become an important carrier and core component of electronic devices and equipment. The integrity of circuit boards plays a vital role in the overall quality and stability of electronic devices. Defective circuit boards not only adversely affect the performance of electronic devices and impact user experience, but also pose safety hazards such as short circuits and fires during use.

[0003] Traditional circuit board defect detection methods primarily rely on manual inspection. However, due to the small size of circuit board defects and their high similarity to the background, manual inspection is inefficient and prone to causing visual fatigue among workers. Automated optical inspection methods emerged later, offering high accuracy, but the high cost of equipment further increases factory production costs. Image processing-based methods, such as image pattern recognition and wavelet transform, are less expensive and offer high accuracy, gradually becoming the choice for many factories. However, these methods lack robustness and are susceptible to external noise. Machine learning-based defect detection methods, such as support vector machines and random forests, require manual extraction of image features, and their detection performance heavily depends on classifier performance; furthermore, detection speed needs improvement. Therefore, achieving real-time and accurate circuit board defect detection has become a pressing technical problem.

[0004] In recent years, deep learning-based defect detection methods have been continuously proposed, capable of automatically learning low-level and high-level feature information of images and achieving good detection results. The YOLOv5 model is one of the most popular detection models, mainly composed of an input network, a backbone feature extraction network, a neck feature fusion network, and an output network. The YOLOv5 model has been applied to various industrial scenarios, demonstrating its stability. However, the YOLOv5 model has relatively large parameters and computational cost, and its detection performance for small targets needs further improvement. Summary of the Invention

[0005] To address the technical problems in the prior art, this invention provides a real-time circuit board defect detection method, system, terminal device, and computer-readable storage medium based on an improved YOLOv5 model. By improving the YOLOv5 model, the improved model has advantages such as lightweight design, high detection accuracy, and high detection efficiency, thus enhancing the detection performance of small targets. Simultaneously, by incorporating a pruning algorithm in the model compression method, the complexity of the model is reduced, improving the detection speed. Therefore, it is possible to detect circuit board defects accurately and in real time.

[0006] The first objective of this invention is to provide a real-time circuit board defect detection method based on an improved YOLOv5 model.

[0007] The second objective of this invention is to provide a real-time circuit board defect detection system based on an improved YOLOv5 model.

[0008] The third objective of this invention is to provide a terminal device.

[0009] A fourth objective of this invention is to provide a computer-readable storage medium.

[0010] The first objective of this invention can be achieved by adopting the following technical solution: A real-time circuit board defect detection method based on an improved YOLOv5 model, the method comprising: Obtain the dataset; the dataset includes multiple images containing circuit board defects and label files annotating the corresponding defect types; The improved YOLOv5 model was trained using a dataset. The improved YOLOv5 model is based on the YOLOv5 model, and uses a lightweight SE-ENv2 backbone network to replace the original backbone network to reduce computational complexity and retain more feature information of small-sized defects; it uses a GC-Neck network to replace the original neck network to improve the model's context modeling ability; and it uses a TECODE detection head to replace the original head network to learn and fuse multi-scale defect features. Prune the trained YOLOv5 model; The real-time acquired circuit board images are input into the pruned YOLOv5 model to obtain defect detection results.

[0011] Furthermore, let the size of the input image be H×W×3; where H and W represent the height and width of the image, respectively; The process of feature extraction by the lightweight SE-ENv2 backbone network is as follows: The input image undergoes a 3×3 convolution operation to obtain a feature map of size H×W×16; this is then passed through the SPDConv downsampling module to obtain a feature map of size H / 2×W / 2×16; feature extraction is performed using the Fused-MBConv module, resulting in a feature map of the same size; this is followed by the Fused-MBConv-SPD downsampling module to obtain a feature map of size H / 4×W / 4×24; feature extraction is then performed again using Fused-MBConv, resulting in a feature map of the same size, which is used as the first feature map; this is followed by the Fused-MBConv-SPD downsampling module to obtain a feature map of size H / 8×W / 8×32; this is then passed through the Fused-MBConv module... The ed-MBConv module extracts features, maintaining the same feature map size, and uses this feature map as the second feature map. The MBConv-SE module then performs downsampling, resulting in a feature map of size H / 16×W / 16×64. Next, the MBConv-ELA module extracts features, again maintaining the same feature map size, and uses this feature map as the third feature map. The MBConv-SE module then performs further downsampling, resulting in a feature map of size H / 32×W / 32×80, which becomes 20×20×80. Finally, the MBConv-ELA and SPPF modules extract features sequentially, maintaining the same feature map size, and these resulting feature maps are used as the final feature map. The Fused-MBConv-SPD downsampling module is the SPDConv downsampling module, which replaces the 3×3 regular convolution with a stride of 2 in the Fused-MBConv module of the EfficientNetv2 model. The MBConv-SE module replaces the 3×3 regular convolution with a stride of 2 in the MBConv module of the EfficientNetv2 model with the SPDConv downsampling module, and uses the ELA attention module to replace the SE module. The MBConv-ELA module replaces the SE attention mechanism in the MBConv module of the EfficientNetv2 model with the ELA attention module.

[0012] Furthermore, the process by which the GC-Neck network samples and stitches together the feature maps extracted by the lightweight SE-ENv2 backbone network is as follows: The final feature map is passed through the GSConv module to adjust the number of channels, and then upsampled to improve the feature map resolution. The upsampled feature map is then concatenated with the third feature map. The concatenated feature map is then passed through the C3-GC module for feature fusion and extraction, and then passed through the GSConv module to adjust the number of channels and upsample to improve the feature map size. It is then concatenated with the second feature map, and finally passed through the C3-GC module to obtain the learned feature map.

[0013] Furthermore, the C3-GC module processes the stitched feature map as follows: The concatenated feature maps are subjected to a 1×1 regular convolution operation to adjust the number of channels; then they are passed in parallel through a 1×1 regular convolution operation and the GC-Bottleneck module; the parallel output feature maps are then concatenated, and then passed through a 1×1 regular convolution operation for feature fusion and extraction.

[0014] Furthermore, the learned feature maps, the first feature map, and the third feature map are used as inputs to the TECODE detection head.

[0015] Furthermore, the LAMP pruning algorithm is used to prune the trained YOLOv5 model, including: First, calculate the LAMP score corresponding to the feature weights of each layer; Then, based on the LAMP score, the feature weights corresponding to low LAMP scores are pruned according to the set compression ratio.

[0016] Furthermore, before training the improved YOLOv5 model using the dataset, confirm whether the label file is in TXT format; if not, convert it to TXT format.

[0017] The second objective of this invention can be achieved by adopting the following technical solution: A real-time circuit board defect detection system based on an improved YOLOv5 model, the system comprising: The acquisition module is used to acquire a dataset; the dataset includes multiple images containing circuit board defects and label files indicating the corresponding defect types. The training module is used to train the improved YOLOv5 model using a dataset. The improved YOLOv5 model is based on the YOLOv5 model, and uses a lightweight SE-ENv2 backbone network to replace the original backbone network to reduce computational complexity and retain more feature information of small-sized defects; it uses a GC-Neck network to replace the original neck network to improve the model's context modeling ability; and it uses a TECODE detection head to replace the original head network to learn and fuse multi-scale defect features. The pruning module is used to prune the trained YOLOv5 model; The detection module is used to input real-time acquired circuit board images into the pruned YOLOv5 model to obtain defect detection results.

[0018] The third objective of this invention can be achieved by adopting the following technical solution: A terminal device includes a processor and a memory for storing a processor-executable program. When the processor executes the program stored in the memory, it implements the above-described real-time circuit board defect detection method based on the improved YOLOv5 model.

[0019] The fourth objective of this invention can be achieved by adopting the following technical solution: A computer-readable storage medium storing a program that, when executed by a processor, implements the above-described real-time circuit board defect detection method based on the improved YOLOv5 model.

[0020] The present invention has the following advantages over the prior art: (1) The present invention improves the YOLOv5 model by designing the SE-ENv2 backbone network to retain more small defect feature information during downsampling; by designing the C3-GC neck network to improve the model's context modeling ability; and by introducing the TECODE detection head to learn and fuse multi-scale defect features. The improved model has higher detection accuracy for small-scale circuit board defects.

[0021] (2) Based on the improved YOLOv5 model, this invention further combines the LAMP pruning algorithm to prune weights that have a small impact on the model detection effect according to the set compression ratio. The pruned model has lower computational complexity and faster detection speed. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of the real-time circuit board defect detection process based on the improved YOLOv5 model in Embodiment 1 of the present invention.

[0024] Figure 2 This is a sample image of each category of the dataset used in Embodiment 1 of the present invention.

[0025] Figure 3This is a structural diagram of the improved YOLOv5 model in Embodiment 1 of the present invention.

[0026] Figure 4 This is a structural diagram of the SPDConv and ELA modules in Embodiment 1 of the present invention.

[0027] Figure 5 This is a structural diagram of the Fused-MBConv-SPD module in Embodiment 1 of the present invention.

[0028] Figure 6 This is a structural diagram of the MBConv-SE module in Embodiment 1 of the present invention.

[0029] Figure 7 This is a structural diagram of the MBConv-ELA module in Embodiment 1 of the present invention.

[0030] Figure 8 This is a schematic diagram of the GSConv, CAA, and C3-GC modules in Embodiment 1 of the present invention.

[0031] Figure 9 This is a structural diagram of the TSCODE decoupling detection head in Embodiment 1 of the present invention.

[0032] Figure 10 This is a structural block diagram of the real-time circuit board defect detection system based on the improved YOLOv5 model according to Embodiment 2 of the present invention.

[0033] Figure 11 This is a structural block diagram of the terminal device according to Embodiment 3 of the present invention. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. It should be understood that the specific embodiments described are merely used to explain this application and are not intended to limit this application.

[0035] Example 1: like Figure 1 As shown, this embodiment provides a real-time circuit board defect detection method based on an improved YOLOv5 model, including the following steps: S101. Obtain the dataset.

[0036] The dataset used in this embodiment is the HRIPCB dataset released by Peking University. Some image samples can be referenced. Figure 2The dataset contains 1386 images with defects, with 6 types of defects (holes, rodent bites, open circuits, short circuits, strays, and copper strays).

[0037] S102. Convert the label files in the dataset.

[0038] The XML format tag file was converted into a TXT format tag file corresponding to the YOLOv5 model, and finally divided into training set, validation set and test set in a ratio of 8:1:1.

[0039] S103. Improve the YOLOv5 model.

[0040] The improved YOLOv5 model can be used as a reference. Figure 3 The specific improvements are as follows: (1) Based on the EfficientNetv2 network, a lightweight backbone network SE-ENv2 is designed to replace the original backbone network.

[0041] The schematic diagram of the backbone network SE-ENv2 can be found here. Figure 3 An input image of size 640×640×3 (height×width×channel) is processed by a 3×3 regular convolution, resulting in a feature map of size 640×640×16. This is then passed through the SPDConv downsampling module, reducing the feature map size to 320×320×16. Next, Fused-MBConv is used for feature extraction, keeping the feature map size unchanged. Then, Fused-MBConv-SPD downsampling is applied, reducing the feature map size to 160×160×24. This is followed by Fused-MBConv feature extraction, again keeping the feature map size unchanged. Finally, Fused-MB... The Conv-SPD downsampling module reduces the feature map size to 80×80×32. Then, Fused-MBConv performs feature extraction, keeping the feature map size unchanged. Next, the MBConv-SE module performs downsampling, increasing the feature map size to 40×40×64. Following this, MBConv-ELA performs feature extraction, again keeping the feature map size unchanged. MBConv-SE performs downsampling again, increasing the feature map size to 20×20×80. Finally, the MBConv-ELA and SPPF modules are used sequentially for feature extraction, keeping the feature map size unchanged.

[0042] The schematic diagram of the SPDConv downsampling module can be found here. Figure 4First, features are extracted at intervals, transforming the feature information from the spatial dimension to the channel dimension. The feature map is halved, and the number of channels is quadrupled. Then, the number of output channels is adjusted through convolution to reduce computational complexity. In this embodiment, the number of output channels is adjusted to be consistent with the number of input channels. The SPDConv downsampling module can retain more feature information of small-sized defects while completing feature map downsampling.

[0043] The schematic diagram of the Fused-MBConv-SPD downsampling module can be found here. Figure 5 The 3×3 regular convolution with a stride of 2 in the original Fused-MBConv module of EfficientNetv2 was replaced with the SPDConv downsampling module to retain more feature information of small targets.

[0044] The schematic diagram of the MBConv-SE module can be found here. Figure 6 The original 3×3 convolution with stride of 2 in the MBConv module of EfficientNetv2 was replaced with the SPDConv downsampling module, and the original SE module was replaced with the ELA attention module.

[0045] The schematic diagram of the ELA module can be referenced. Figure 4 It mainly consists of parallel skip connections and two feature extraction branches. The first feature extraction branch consists of cascaded X-direction average pooling, 1×1 convolution, group normalization and sigmoid activation function. The second feature extraction branch consists of cascaded Y-direction average pooling, 1×1 convolution, group normalization and sigmoid activation function. The feature information of the three branches is multiplied to obtain the final output. The ELA module can simultaneously focus on channel-level and spatial-level feature information.

[0046] The principle of the MBConv-ELA module is as follows: Figure 7 As shown, only the SE attention mechanism in the MBConv module is replaced with the ELA module.

[0047] Compared to the original backbone network, the SE-ENv2 backbone network designed in this embodiment has the advantages of being lighter and more efficient in extracting small target features.

[0048] (2) Design the GC-Neck network.

[0049] like Figure 3As shown, the GC-Neck mainly consists of the C3-GC module, GSConv, an upsampling module, and a stitching module. In the GC-Neck network, the input is a 20×20×80 feature map extracted from the backbone network. GSConv adjusts the number of channels, and the upsampling module further enhances the feature map resolution. It is then stitched with a 40×40×64 feature map from the backbone network. The resulting feature map undergoes feature fusion and extraction via the C3-GC module, followed by GSConv adjusting the number of channels and the upsampling module increasing the feature map size. It is then stitched with an 80×80×32 feature map from the backbone network, and the C3-GC module performs feature learning. Finally, the learned features are fed into the detection head.

[0050] The schematic diagram of the C3-GC module can be found here. Figure 8 The input features are first adjusted for the number of channels through 1×1 convolution, then passed in parallel through 1×1 convolution branches and GC-Bottleneck branches, and the learned features are concatenated. Finally, features are fused through 1×1 convolution.

[0051] The schematic diagram of the GC-Bottleneck module can be found here. Figure 8 The input feature map is passed through the GSConv and CAA attention mechanism modules in parallel, and then the learned feature information is multiplied. Finally, GSConv is used for feature learning and fusion.

[0052] The principle diagram of GSConv can be found in Figure 8. The input feature map first undergoes a regular convolution, then the resulting features are subjected to a depthwise convolution, and then the resulting feature maps are concatenated. Finally, the feature information is exchanged through the channel shuffling module. GSConv has a lower computational cost than regular convolution, which can reduce redundant computations and lower model complexity.

[0053] For a schematic diagram of the CAA attention mechanism, please refer to [link / reference]. Figure 7 The input feature map is first passed through a pooling module and a 1×1 convolution, then through two large-kernel bar convolutions to enhance the model's context awareness, and finally through a 1×1 convolution for feature fusion. The CAA attention mechanism can improve the model's context modeling ability while introducing only a small amount of computation.

[0054] (3) Introduce the TSCODE decoupling detection head.

[0055] The schematic diagram of the TSCODE decoupling detection head can be found here. Figure 9It is mainly divided into a classification branch (SCE branch) and a regression branch (DPE branch). The overall input consists of feature maps of size 80×80×64 (medium size) extracted by GC-Neck, and feature maps of size 160×160×24 (large size) and 40×40×64 (small size) in the backbone network.

[0056] The input to the classification branch consists of large and small feature maps. The large feature map is first downsampled by a 3×3 regular convolution with a stride of 2; then it is concatenated with the small feature map, followed by channel number adjustment and feature fusion through a 1×1 convolution; finally, a 3×3 convolution is used for feature learning and a 1×1 convolution is used for channel number adjustment to predict the category of the defect.

[0057] The input to the regression branch consists of large, medium, and small feature maps. The medium-sized feature map is first upsampled and added to the large-sized feature map. The resulting feature map is then downsampled using a 3×3 convolution with a stride of 2 and added to the medium-sized feature map. Simultaneously, the small-sized feature map is also upsampled and then added to the medium-sized feature map. Finally, features are extracted using two 3×3 convolutions with a stride of 1, and then the number of channels is adjusted using two 1×1 convolutions to predict the confidence, location, and size of defects, respectively.

[0058] In this embodiment, the TSCODE decoupled detection head can learn features at different levels, improving the model's detection accuracy for circuit board defects.

[0059] S104. Train the improved YOLOv5 model.

[0060] In this embodiment, the number of training epochs is set to 300, the batch size is 32, the image input size is 640×640 pixels, the optimizer used is stochastic gradient descent, and the learning rate is set to 0.01.

[0061] S105. Prune the trained YOLOv5 model.

[0062] By combining model pruning algorithms with compression of the trained model, the real-time performance of the model can be further improved.

[0063] This embodiment uses the LAMP pruning algorithm. The LAMP pruning algorithm first calculates the LAMP score corresponding to the feature weights of each layer. Then, based on the LAMP score, it prunes the feature weights with low LAMP scores according to a set compression ratio (1.25 in this embodiment). The LAMP score of the u-th index of the feature weight tensor W is defined as follows:

[0064] S106. Defect detection is performed using the pruned model.

[0065] The pruned model is used to perform defect detection on the input circuit board image, and the detection results are obtained.

[0066] Those skilled in the art will understand that all or part of the steps in the methods of the above embodiments can be implemented by a program instructing related hardware, and the corresponding program can be stored in a computer-readable storage medium.

[0067] It should be noted that although the method operations of the above embodiments are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. On the contrary, the order of execution of the described steps may be changed. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0068] Example 2: like Figure 10 As shown, this embodiment provides a real-time circuit board defect detection system based on an improved YOLOv5 model. The system includes an acquisition module 1001, a training module 1002, a pruning module 1003, and a detection module 1004, wherein: The acquisition module 1001 is used to acquire a dataset; the dataset includes multiple images containing circuit board defects and label files indicating the corresponding defect types. Training module 1002 is used to train the improved YOLOv5 model using a dataset. The improved YOLOv5 model is based on the YOLOv5 model, and uses a lightweight SE-ENv2 backbone network to replace the original backbone network to reduce computational complexity and retain more feature information of small-sized defects; it uses a GC-Neck network to replace the original neck network to improve the model's context modeling ability; and it uses a TECODE detection head to replace the original head network to learn and fuse multi-scale defect features. Pruning module 1003 is used to prune the trained YOLOv5 model; The detection module 1004 is used to input the real-time acquired circuit board image into the pruned YOLOv5 model to obtain the defect detection results.

[0069] The specific implementation of each module in this embodiment can be found in Embodiment 1 above, and will not be repeated here. It should be noted that the system provided in this embodiment is only illustrated by the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure can be divided into different functional modules to complete all or part of the functions described above.

[0070] Example 3: This embodiment provides a terminal device, which can be a computer, such as... Figure 11 As shown, the processor 1102, memory, input device 1103, display 1104, and network interface 1105 are connected via system bus 1101. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium 1106 and internal memory 1107. The non-volatile storage medium 1106 stores the operating system, computer programs, and database. The internal memory 1107 provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. When the processor 1102 executes the computer programs stored in the memory, it implements the real-time circuit board defect detection method based on the improved YOLOv5 model in Embodiment 1 described above, as follows: Obtain the dataset; the dataset includes multiple images containing circuit board defects and label files annotating the corresponding defect types; The improved YOLOv5 model was trained using a dataset. The improved YOLOv5 model is based on the YOLOv5 model, and uses a lightweight SE-ENv2 backbone network to replace the original backbone network to reduce computational complexity and retain more feature information of small-sized defects; it uses a GC-Neck network to replace the original neck network to improve the model's context modeling ability; and it uses a TECODE detection head to replace the original head network to learn and fuse multi-scale defect features. Prune the trained YOLOv5 model; The real-time acquired circuit board images are input into the pruned YOLOv5 model to obtain defect detection results.

[0071] Example 4: This embodiment provides a computer-readable storage medium storing a computer program. When executed by a processor, the computer program implements the real-time circuit board defect detection method based on the improved YOLOv5 model described in Embodiment 1 above, as follows: Obtain the dataset; the dataset includes multiple images containing circuit board defects and label files annotating the corresponding defect types; The improved YOLOv5 model was trained using a dataset. The improved YOLOv5 model is based on the YOLOv5 model, and uses a lightweight SE-ENv2 backbone network to replace the original backbone network to reduce computational complexity and retain more feature information of small-sized defects; it uses a GC-Neck network to replace the original neck network to improve the model's context modeling ability; and it uses a TECODE detection head to replace the original head network to learn and fuse multi-scale defect features. Prune the trained YOLOv5 model; The real-time acquired circuit board images are input into the pruned YOLOv5 model to obtain defect detection results.

[0072] It should be noted that the computer-readable storage medium in this embodiment can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof.

[0073] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope disclosed in the present invention, based on the technical solution and inventive concept of the present invention, shall fall within the scope of protection of the present invention.

Claims

1. A real-time circuit board defect detection method based on an improved YOLOv5 model, characterized in that, The method includes: Obtain the dataset; the dataset includes multiple images containing circuit board defects and label files annotating the corresponding defect types; The improved YOLOv5 model was trained using a dataset. The improved YOLOv5 model is based on the YOLOv5 model, and uses a lightweight SE-ENv2 backbone network to replace the original backbone network to reduce computational complexity and retain more feature information of small-sized defects; it uses a GC-Neck network to replace the original neck network to improve the model's context modeling ability; and it uses a TECODE detection head to replace the original head network to learn and fuse multi-scale defect features. Prune the trained YOLOv5 model; The real-time acquired circuit board images are input into the pruned YOLOv5 model to obtain defect detection results; The process of feature extraction by the lightweight SE-ENv2 backbone network is as follows: The input image undergoes a 3×3 convolution operation to obtain a feature map of size H×W×16, where H and W represent the height and width of the image, respectively. This is followed by an SPDConv downsampling module to obtain a feature map of size H / 2×W / 2×16. This is then processed by the Fused-MBConv module for feature extraction, maintaining the same feature map size. Next, the Fused-MBConv-SPD downsampling module yields a feature map of size H / 4×W / 4×24. This is then processed again by Fused-MBConv for feature extraction, maintaining the same feature map size, and used as the first feature map. Finally, the Fused-MBConv-SPD downsampling module yields a feature map of size H / 8×W. The first feature map is 8×32. Then, it undergoes feature extraction via Fused-MBConv, resulting in a feature map of the same size as the second feature map. Next, it is downsampled using the MBConv-SE module to obtain a feature map of size H / 16×W / 16×64. This is followed by feature extraction via MBConv-ELA, again with the same size, and used as the third feature map. This is then downsampled again using the MBConv-SE module, resulting in a feature map of size H / 32×W / 32×80, which becomes 20×20×80. Finally, it undergoes feature extraction via the MBConv-ELA and SPPF modules, again with the same size, and is used as the final feature map. Specifically, the Fused-MBConv-SPD downsampling module replaces the 3×3 regular convolution with a stride of 2 in the Fused-MBConv module of the EfficientNetv2 model with the SPDConv downsampling module; the MBConv-SE module replaces the 3×3 regular convolution with a stride of 2 in the MBConv module of the EfficientNetv2 model with the SPDConv downsampling module, and uses the ELA attention module instead of the SE module; the MBConv-ELA module replaces the SE attention mechanism in the MBConv module of the EfficientNetv2 model with the ELA attention module.

2. The real-time circuit board defect detection method according to claim 1, characterized in that, The process by which the GC-Neck network samples and stitches together the feature maps extracted by the lightweight SE-ENv2 backbone network is as follows: The final feature map is processed by the GSConv module to adjust the number of channels, and then upsampled to improve the feature map resolution; the upsampled feature map is then concatenated with the third feature map. The concatenated feature map is passed through the C3-GC module for feature fusion and extraction, then through the GSConv module to adjust the number of channels and upsampling to increase the feature map size, and then concatenated with the second feature map. The concatenated feature map is then passed through the C3-GC module again to obtain the learned feature map.

3. The real-time circuit board defect detection method according to claim 2, characterized in that, The C3-GC module processes the stitched feature map as follows: The concatenated feature maps are subjected to a 1×1 regular convolution operation to adjust the number of channels; then they are passed in parallel through a 1×1 regular convolution operation and the GC-Bottleneck module; the parallel output feature maps are then concatenated, and then passed through a 1×1 regular convolution operation for feature fusion and extraction.

4. The real-time circuit board defect detection method according to claim 2, characterized in that, The learned feature map, the first feature map, and the third feature map are used as inputs to the TECODE detection head.

5. The real-time circuit board defect detection method according to any one of claims 1 to 4, characterized in that, The LAMP pruning algorithm is used to prune the trained YOLOv5 model, including: First, calculate the LAMP score corresponding to the feature weights of each layer; Then, based on the LAMP score, the feature weights corresponding to low LAMP scores are pruned according to the set compression ratio.

6. The real-time circuit board defect detection method according to any one of claims 1 to 4, characterized in that, Before training the improved YOLOv5 model using the dataset, confirm that the label file is in TXT format; if not, convert it to TXT format.

7. A real-time circuit board defect detection system based on an improved YOLOv5 model, characterized in that, The system includes: The acquisition module is used to acquire a dataset; the dataset includes multiple images containing circuit board defects and label files indicating the corresponding defect types. The training module is used to train the improved YOLOv5 model using a dataset. The improved YOLOv5 model is based on the YOLOv5 model, and uses a lightweight SE-ENv2 backbone network to replace the original backbone network to reduce computational complexity and retain more feature information of small-sized defects; it uses a GC-Neck network to replace the original neck network to improve the model's context modeling ability; and it uses a TECODE detection head to replace the original head network to learn and fuse multi-scale defect features. The pruning module is used to prune the trained YOLOv5 model; The detection module is used to input real-time acquired circuit board images into the pruned YOLOv5 model to obtain defect detection results; The process of feature extraction by the lightweight SE-ENv2 backbone network is as follows: The input image undergoes a 3×3 convolution operation to obtain a feature map of size H×W×16, where H and W represent the height and width of the image, respectively. This is followed by an SPDConv downsampling module to obtain a feature map of size H / 2×W / 2×16. This is then processed by the Fused-MBConv module for feature extraction, maintaining the same feature map size. Next, the Fused-MBConv-SPD downsampling module yields a feature map of size H / 4×W / 4×24. This is then processed again by Fused-MBConv for feature extraction, maintaining the same feature map size, and used as the first feature map. Finally, the Fused-MBConv-SPD downsampling module yields a feature map of size H / 8×W. The first feature map is 8×32. Then, it undergoes feature extraction via Fused-MBConv, resulting in a feature map of the same size as the second feature map. Next, it is downsampled using the MBConv-SE module to obtain a feature map of size H / 16×W / 16×64. This is followed by feature extraction via MBConv-ELA, again with the same size, and used as the third feature map. This is then downsampled again using the MBConv-SE module, resulting in a feature map of size H / 32×W / 32×80, which becomes 20×20×80. Finally, it undergoes feature extraction via the MBConv-ELA and SPPF modules, again with the same size, and is used as the final feature map. Specifically, the Fused-MBConv-SPD downsampling module replaces the 3×3 regular convolution with a stride of 2 in the Fused-MBConv module of the EfficientNetv2 model with the SPDConv downsampling module; the MBConv-SE module replaces the 3×3 regular convolution with a stride of 2 in the MBConv module of the EfficientNetv2 model with the SPDConv downsampling module, and uses the ELA attention module instead of the SE module; the MBConv-ELA module replaces the SE attention mechanism in the MBConv module of the EfficientNetv2 model with the ELA attention module.

8. A terminal device, comprising a processor and a memory for storing a processor-executable program, characterized in that, When the processor executes the program stored in the memory, it implements the real-time circuit board defect detection method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the real-time circuit board defect detection method according to any one of claims 1 to 6.

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