Source voltage compensation method and device, electronic equipment and display panel

Abstract

The invention provides a source electrode voltage compensation method and device, electronic equipment and a display panel, and the method comprises the steps: determining a source electrode polarity arrangement mode of the display panel, and judging whether the source electrode polarity arrangement mode is a to-be-compensated source electrode polarity arrangement mode or not; determining a to-be-compensated source electrode data line of the display panel in response to the fact that the source electrode polarity arrangement mode is a to-be-compensated source electrode polarity arrangement mode; determining a voltage compensation value corresponding to the source electrode data line to be compensated; obtaining an original simulation gray-scale voltage to be applied to the source electrode data line to be compensated, and compensating the original simulation gray-scale voltage based on the voltage compensation value to obtain a compensated simulation gray-scale voltage; and applying the compensated analog gray scale voltage to the source data line to be compensated. By compensating the voltage on the source data line, the voltage of the common electrode of the odd-even line wires which are arranged in a layered and crossed mode can be kept consistent, and therefore the gray scale flicker problem caused by the line width difference of a fan-out area is solved.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a source voltage compensation method, device, electronic device, and display panel. Background Art

[0002] This section is intended to provide a background or context to the embodiments of the present disclosure that are recited in the claims. No statement herein is admitted to be prior art by virtue of its inclusion in this section.

[0003] In the field of display technology, to accommodate more wiring within a limited space, the fan-out area of a display panel can adopt a double-layer overlapping wiring method, that is, the odd and even column wiring is arranged in layers and crossed, wherein the wiring of the odd and even columns maintains the same center distance.

[0004] However, due to fluctuations in the manufacturing process, there will be a difference in line width between the odd column routing and the even column routing. The line width difference will cause a difference in line resistance between the odd column routing and the even column routing. The line resistance difference will cause the common electrode voltage to shift. That is, due to the different line resistances of the odd column routing and the even column routing, different common electrode voltage compensation values are required. As a result, when the same common electrode voltage compensation value is used for compensation, the actual driving voltages of the odd column pixels and the even column pixels are different, and grayscale flickering occurs on the display panel. Summary of the Invention

[0005] In view of this, the purpose of the present disclosure is to provide a source voltage compensation method, device, electronic device, and display panel, which at least to a certain extent solve one of the technical problems in the related art.

[0006] Based on the above objectives, a first aspect of an exemplary embodiment of the present disclosure provides a source voltage compensation method, including:

[0007] determining a source polarity arrangement pattern of the display panel, and judging whether the source polarity arrangement pattern is a source polarity arrangement pattern to be compensated;

[0008] In response to the source polarity arrangement pattern being a source polarity arrangement pattern to be compensated, determining a source data line to be compensated of the display panel;

[0009] Determining a voltage compensation value corresponding to the source data line to be compensated;

[0010] Acquiring an original analog grayscale voltage to be applied to the source data line to be compensated, and compensating the original analog grayscale voltage based on the voltage compensation value to obtain a compensated analog grayscale voltage;

[0011] Applying the compensated analog grayscale voltage to the source data line to be compensated.

[0012] In some exemplary embodiments, determining whether the source polarity arrangement pattern is a source polarity arrangement pattern to be compensated includes:

[0013] Determining whether the polarity of the signal voltage on the source data line in each layer of the double-layer wiring of the display panel in the source polarity arrangement mode is positive and negative, and whether the number of the source data lines with positive polarity is the same as the number of the source data lines with negative polarity;

[0014] The source polarity arrangement pattern determined to be negative is determined as the source polarity arrangement pattern to be compensated.

[0015] In some exemplary embodiments, determining the source data lines to be compensated of the display panel includes:

[0016] Determining a source data line in any one layer of double-layer wiring of the display panel as the source data line to be compensated;

[0017] or,

[0018] The source data lines in each layer of the double-layer wiring of the display panel are determined as the source data lines to be compensated.

[0019] In some exemplary embodiments, determining the voltage compensation value corresponding to the source data line to be compensated includes:

[0020] Compensating the source data line to be compensated according to a preset unit compensation voltage and a preset step, and detecting a flicker level value of the display panel after compensation;

[0021] In response to the flicker level value meeting a preset condition, the current total compensation voltage is determined to be the voltage compensation value.

[0022] In some exemplary embodiments, compensating the original analog grayscale voltage based on the voltage compensation value includes:

[0023] Adding the voltage compensation value to the original analog grayscale voltage;

[0024] or,

[0025] The voltage compensation value is subtracted from the original analog grayscale voltage.

[0026] In some exemplary embodiments, the step of obtaining the original analog grayscale voltage to be applied to the source data line to be compensated includes:

[0027] Acquire a serial data signal and a clock signal, and shift register the serial data signal based on the clock signal to obtain a parallel digital data signal;

[0028] Obtaining a latch control signal, and latching the parallel digital data signal based on the latch control signal;

[0029] Increasing the voltage amplitude of the parallel digital data signal to obtain a parallel digital data signal with increased voltage amplitude;

[0030] A reference voltage is obtained, and the original analog grayscale voltage is obtained based on the parallel digital data signal after the voltage amplitude is increased and the reference voltage.

[0031] In some exemplary embodiments, applying the compensated analog grayscale voltage to the source data line to be compensated includes:

[0032] enhancing the driving capability of the compensated analog grayscale voltage to obtain a compensated analog grayscale voltage having enhanced driving capability;

[0033] The compensated analog grayscale voltage with enhanced driving capability is applied to the source data line to be compensated.

[0034] Based on the same inventive concept, a second aspect of the exemplary embodiments of the present disclosure provides a source voltage compensation device, including:

[0035] a source polarity arrangement mode determination module configured to determine a source polarity arrangement mode of the display panel and determine whether the source polarity arrangement mode is a source polarity arrangement mode to be compensated;

[0036] a to-be-compensated source data line determination module, configured to determine a to-be-compensated source data line of the display panel in response to the source polarity arrangement pattern being the to-be-compensated source polarity arrangement pattern;

[0037] a voltage compensation value determining module, configured to determine a voltage compensation value corresponding to the source data line to be compensated;

[0038] a voltage compensation module configured to obtain an original analog grayscale voltage to be applied to the source data line to be compensated, and compensate the original analog grayscale voltage based on the voltage compensation value to obtain a compensated analog grayscale voltage;

[0039] The voltage applying module is configured to apply the compensated analog grayscale voltage to the source data line to be compensated.

[0040] Based on the same inventive concept, the third aspect of the exemplary embodiment of the present disclosure provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method described in the first aspect is implemented.

[0041] Based on the same inventive concept, a fourth aspect of the exemplary embodiments of the present disclosure provides a display panel, characterized in that it includes the source voltage compensation device as described in the second aspect or the electronic device as described in the third aspect.

[0042] As can be seen from the above, the source voltage compensation method, device, electronic device, and display panel provided by the embodiments of the present disclosure include: determining a source polarity arrangement pattern of the display panel, and determining whether the source polarity arrangement pattern is a source polarity arrangement pattern to be compensated; in response to the source polarity arrangement pattern being a source polarity arrangement pattern to be compensated, determining a source data line to be compensated of the display panel; determining a voltage compensation value corresponding to the source data line to be compensated; obtaining an original analog grayscale voltage to be applied to the source data line to be compensated, compensating the original analog grayscale voltage based on the voltage compensation value to obtain a compensated analog grayscale voltage; and applying the compensated analog grayscale voltage to the source data line to be compensated. By compensating the voltage on the source data line, the common electrode voltage of the odd and even column wiring arranged in a layered cross pattern can be kept consistent, thereby improving the grayscale flicker problem caused by line width differences in the fan-out area. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0044] Figure 1 A schematic diagram of line width differences provided for exemplary embodiments of the present disclosure;

[0045] Figure 2 A schematic diagram of a grayscale flicker improvement solution provided for related technologies;

[0046] Figure 3 A schematic flow chart of a source voltage compensation method provided by an exemplary embodiment of the present disclosure;

[0047] Figure 4 A schematic diagram of a source driver module provided by an exemplary embodiment of the present disclosure;

[0048] Figure 5 A schematic diagram of a source compensation module provided by an exemplary embodiment of the present disclosure;

[0049] Figure 6 A schematic diagram of a first source voltage compensation method provided by an exemplary embodiment of the present disclosure;

[0050] Figure 7 A schematic diagram of a second source voltage compensation method provided by an exemplary embodiment of the present disclosure;

[0051] Figure 8 A schematic diagram of a third source voltage compensation method provided by an exemplary embodiment of the present disclosure;

[0052] Figure 9 A schematic structural diagram of a source voltage compensation device provided by an exemplary embodiment of the present disclosure;

[0053] Figure 10 A schematic structural diagram of an electronic device provided by an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0054] To make the objectives, technical solutions, and advantages of the present disclosure more clearly understood, the principles and spirit of the present disclosure will be described below with reference to several exemplary embodiments. It should be understood that these embodiments are provided solely to enable those skilled in the art to better understand and implement the present disclosure, and are not intended to limit the scope of the present disclosure in any way. On the contrary, these embodiments are provided to make the present disclosure more thorough and complete, and to fully convey the scope of the present disclosure to those skilled in the art.

[0055] It should be understood herein that any number of elements in the drawings is for illustration only and not for limitation, and any naming is only for distinction and does not have any limiting meaning.

[0056] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should have the usual meanings understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly. The article "one" or "an" before an element does not exclude the presence of multiple such elements.

[0057] The principles and spirit of the present disclosure are explained in detail below with reference to several representative embodiments of the present disclosure.

[0058] In specific implementation, in low-frequency oxide products, especially high PPI products at low frequencies, the grayscale flicker problem is more serious.

[0059] As an example, see Figure 1 In the 11-inch, 10.92-inch, and 12.7-inch metal oxide products, the fan-out area data lines, including gate, drain, and source data lines, use double-layer overlapping routing, with odd and even column lines arranged in layers and crossed. The odd and even columns maintain the same center-to-center distance.

[0060] However, the inventors of the present disclosure discovered that due to fluctuations in the manufacturing process, there will be a difference in line width between the odd column routing and the even column routing, and the line width difference will cause a difference in line resistance between the odd column routing and the even column routing, and the line resistance difference will cause the common electrode voltage offset, that is, the odd column routing and the even column routing require different common electrode voltage compensation values due to their different line resistances, which results in different actual driving voltages for the odd column pixels and the even column pixels when compensated with the same common electrode voltage compensation value, resulting in grayscale flickering on the display panel.

[0061] Specifically, there is obvious grayscale flicker at low frequencies and even at 60Hz. The greater the line width difference, the more serious the grayscale flicker problem.

[0062] As an example, see Figure 2 In the related art, in order to improve grayscale flicker, the source polarity inversion method is improved from 1 column (+-+-) to 1+2 columns (+--++) in the horizontal direction.

[0063] Among them, S represents the source, G represents the gate, and D represents the drain.

[0064] 1 Column (+-+-) means that all pixels in each column have the same polarity, and the polarities between adjacent columns are opposite.

[0065] The horizontal 1+2 columns (+--++) means that polarity reversal is no longer based on a single column (1 column), but rather on a four-column basic repeating unit. Within this unit, the polarity distribution follows the (+-+-) pattern, and within the next unit, the polarity distribution follows the (-+-+) pattern, and so on.

[0066] However, the inventors of the present disclosure have discovered that the screen of the solution provided by the related art will easily have vertical stripes with a period of 8 sub-pixels, and the optimal VCOM setting is very sensitive to the vertical stripes.

[0067] In order to solve the above problems, the present disclosure provides a source voltage compensation solution, which specifically includes:

[0068] Determine a source polarity arrangement pattern of a display panel, and judge whether the source polarity arrangement pattern is a source polarity arrangement pattern to be compensated; in response to the source polarity arrangement pattern being the source polarity arrangement pattern to be compensated, determine a source data line to be compensated of the display panel; determine a voltage compensation value corresponding to the source data line to be compensated; obtain an original analog grayscale voltage to be applied to the source data line to be compensated, compensate the original analog grayscale voltage based on the voltage compensation value to obtain a compensated analog grayscale voltage; and apply the compensated analog grayscale voltage to the source data line to be compensated.

[0069] By compensating the voltage on the source data line, the common electrode voltage of the odd and even column wirings arranged in a hierarchical cross pattern can be kept consistent, thereby improving the grayscale flicker problem caused by the line width difference in the fan-out area.

[0070] After introducing the basic principles of the present disclosure, various non-limiting embodiments of the present disclosure are described in detail below.

[0071] refer to Figure 3 , which is a flow chart of a source voltage compensation method provided by an exemplary embodiment of the present disclosure.

[0072] The source voltage compensation method includes the following steps:

[0073] Step S310 : determining a source polarity arrangement pattern of the display panel, and judging whether the source polarity arrangement pattern is a source polarity arrangement pattern to be compensated.

[0074] In this exemplary embodiment, the source polarity refers to the polarity of the signal voltage on the source data line, that is, whether the signal voltage is positive or negative relative to a common reference point (usually Vcom, a common electrode voltage).

[0075] In a specific implementation, in a TFT-LCD display panel, a source data line connects a source driver and the source of a TFT transistor of each sub-pixel, and the source driver sends an analog voltage signal representing an image grayscale to each sub-pixel through the source data line.

[0076] The liquid crystal material in a TFT-LCD display panel requires AC drive. If a DC voltage in a single direction is applied for a long time, the liquid crystal molecules will undergo irreversible electrochemical reactions (ion adsorption), resulting in image retention or even permanent damage. To prevent this, the voltage applied to the liquid crystal layer must be periodically reversed. As a result, the source polarity corresponding to the source data line will change, meaning that the display panel has multiple source polarity arrangements.

[0077] As an example, refer to Table 1, which shows 13 source polarity arrangement modes (Case 1 to Case 13). It should be noted that the display panel has more than 13 source polarity arrangement modes. The 13 source polarity arrangement modes in Table 1 are only used as an example.

[0078] Table 1 Source polarity arrangement pattern table

[0079]

[0080] Among them, G represents the gate data line, S represents the source data line; S1 to S12 represent 12 source data lines; Source polarity represents the source polarity; + represents the positive source polarity, and - represents the negative source polarity; Case1 to Case13 represent 13 source polarity arrangement modes, 1 represents the gate data line or source data line in the current layer, and 0 represents the gate data line or source data line in another layer; CD difference represents the line width difference.

[0081] In the above exemplary embodiments, the source polarity arrangement patterns of the display panel are introduced. The following describes a method for determining the source polarity arrangement pattern to be compensated among these source polarity arrangement patterns. Specifically:

[0082] In this exemplary embodiment, the determining whether the source polarity arrangement pattern is a source polarity arrangement pattern to be compensated includes:

[0083] Determining whether the polarity of the signal voltage on the source data line in each layer of the double-layer wiring of the display panel in the source polarity arrangement mode is positive and negative, and whether the number of the source data lines with positive polarity is the same as the number of the source data lines with negative polarity;

[0084] The source polarity arrangement pattern determined to be negative is determined as the source polarity arrangement pattern to be compensated.

[0085] During implementation, the inventors discovered that not all source polarity arrangement modes have obvious grayscale flickering issues. To save resources, the present invention determines a source polarity arrangement mode to be compensated from several source polarity arrangement modes and performs compensation.

[0086] As an example, referring to Table 1, Case 2, Case 6, Case 7, Case 8, Case 9, and Case 10 are determined as source polarity arrangement patterns to be compensated.

[0087] Specifically, let's take Case 2 and Case 3 as examples for comparison:

[0088] In Case 3, the polarity of the signal voltage on the source data line in each layer of the double-layer wiring of the display panel is both positive and negative, and the number of positive polarities is the same as the number of negative polarities, so grayscale flicker is less likely to occur.

[0089] In Case 2, the polarity of the signal voltage on the source data line in one layer of the double-layer wiring of the display panel is only positive, while the polarity of the signal voltage on the source data line in the other layer of wiring is only negative, which easily causes grayscale flickering.

[0090] Step S320 : In response to the source polarity arrangement pattern being the source polarity arrangement pattern to be compensated, determining the source data lines to be compensated of the display panel.

[0091] In this exemplary embodiment, determining the source data lines to be compensated of the display panel includes:

[0092] Determining a source data line in any one layer of double-layer wiring of the display panel as the source data line to be compensated;

[0093] or,

[0094] The source data lines in each layer of the double-layer wiring of the display panel are determined as the source data lines to be compensated.

[0095] In a specific implementation, a driver chip (IC) has several output channels, each of which controls the analog grayscale voltage of a source data line. There is a one-to-one correspondence between output channels, source data lines, and analog grayscale voltages. Therefore, determining the source data line to be compensated for a display panel also determines the output channel for the analog grayscale voltage to be compensated among the multiple output channels.

[0096] Step S330: Determine the voltage compensation value corresponding to the source data line to be compensated.

[0097] In this exemplary embodiment, determining the voltage compensation value corresponding to the source data line to be compensated includes:

[0098] Compensating the source data line to be compensated according to a preset unit compensation voltage and a preset step, and detecting a flicker level value of the display panel after compensation;

[0099] In response to the flicker level value meeting a preset condition, the current total compensation voltage is determined to be the voltage compensation value.

[0100] As an example, the preset unit compensation voltage is 1mV and the preset step is 1step, that is, the analog grayscale voltage corresponding to the source data line to be compensated is adjusted by 1mV1step. The adjustment can be 1step plus 1mV or 1step minus 1mV.

[0101] Then, the total compensation voltage is 1mV×n step, where n is the number of adjustment steps.

[0102] In specific implementation, the flicker level value of the display panel is continuously detected during the adjustment process. The flicker level value is measured each time the analog grayscale voltage is adjusted until the flicker level value meets the preset conditions, for example: the measured flicker level value reaches the minimum value of all possible settings, and the total compensation voltage at this time is recorded as the voltage compensation value.

[0103] As an example, the flicker level value is a Flicker value.

[0104] As an example, the voltage compensation value ranges from -20 mV to +20 mV.

[0105] During specific implementation, the flicker level of the display panel is detected when the display panel displays a preset image.

[0106] As an example, the preset picture is a grayscale L63 picture.

[0107] During specific implementation, the obtained voltage compensation value is burned into a driver chip (IC).

[0108] As an example, for each display panel, a voltage compensation value is burned in separately, which has better accuracy.

[0109] As an example, for display panels of the same model in the same batch, the same voltage compensation value is burned in, saving resources.

[0110] Step S340 , obtaining an original analog grayscale voltage to be applied to the source data line to be compensated, and compensating the original analog grayscale voltage based on the voltage compensation value to obtain a compensated analog grayscale voltage.

[0111] In this exemplary embodiment, the step of obtaining the original analog grayscale voltage to be applied to the source data line to be compensated includes:

[0112] Acquire a serial data signal and a clock signal, and shift register the serial data signal based on the clock signal to obtain a parallel digital data signal;

[0113] Obtaining a latch control signal, and latching the parallel digital data signal based on the latch control signal;

[0114] Increasing the voltage amplitude of the parallel digital data signal to obtain a parallel digital data signal with increased voltage amplitude;

[0115] A reference voltage is obtained, and the original analog grayscale voltage is obtained based on the parallel digital data signal after the voltage amplitude is increased and the reference voltage.

[0116] As an example, see Figure 4 , wherein the functions are divided into various modules and described separately. It should be noted that when implementing the present disclosure, the functions of each module can be implemented in the same or multiple software and / or hardware.

[0117] The shift register 410 is configured to obtain a serial data signal and a clock signal from a timing controller (TCON, not shown in the figure), and shift and register the serial data signal based on the clock signal to obtain a parallel digital data signal;

[0118] a latch (Latch) 420 configured to obtain the parallel digital data signal and a latch control signal from the shift register 410 and latch the parallel digital data signal based on the latch control signal;

[0119] a level shifter 430 configured to obtain the parallel digital data signal from the latch 420 and increase the voltage amplitude of the parallel digital data signal to obtain a parallel digital data signal with increased voltage amplitude;

[0120] a digital-to-analog converter (DAC) 440 configured to obtain the parallel digital data signal after the voltage amplitude is increased from the level converter 430 and obtain a reference voltage from the gamma module 450, and to generate an analog grayscale voltage based on the parallel digital data signal after the voltage amplitude is increased and the reference voltage;

[0121] The source compensation module 460 is configured to obtain the analog grayscale voltage from the digital-to-analog converter 440 and compensate the analog grayscale voltage to obtain a compensated analog grayscale voltage.

[0122] The output buffer (Output Buffer) 470 is configured to obtain the compensated analog grayscale voltage from the source compensation module 460, enhance the driving capability of the compensated analog grayscale voltage, obtain the compensated analog grayscale voltage with enhanced driving capability, and apply the compensated analog grayscale voltage with enhanced driving capability to the source data line to be compensated.

[0123] In this exemplary embodiment, compensating the original analog grayscale voltage based on the voltage compensation value includes:

[0124] Adding the voltage compensation value to the original analog grayscale voltage;

[0125] or,

[0126] The voltage compensation value is subtracted from the original analog grayscale voltage.

[0127] As an example, see Figure 5 In the source compensation module 460 , an analog grayscale voltage is obtained, and the analog grayscale voltage is compensated based on the voltage compensation value by the signal controller to obtain a compensated analog grayscale voltage.

[0128] As an example, see Figure 6 、 7 , 8, where Source(1) represents a source data line in one layer of the double-layer wiring of the display panel, and Source(0) represents a source data line in the other layer of the double-layer wiring of the display panel. Assume that in the display panel, Source(1) is in an odd column and Source(0) is in an even column. ΔV1 represents a first voltage compensation value, and ΔV0 represents a second voltage compensation value.

[0129] like Figure 6 As shown, the original analog grayscale voltage corresponding to the source data line corresponding to Source (1) is compensated in the following manner: the voltage compensation value is added to or the first voltage compensation value is subtracted from the original analog grayscale voltages of positive and negative polarities.

[0130] like Figure 7 As shown, the original analog grayscale voltage corresponding to the source data line corresponding to Source (0) is compensated in the following manner: the voltage compensation value is added to or the second voltage compensation value is subtracted from the original analog grayscale voltages of positive and negative polarities.

[0131] like Figure 8 As shown, the original analog grayscale voltages corresponding to the source data lines corresponding to Source (0) and Source (1) are bidirectionally compensated, and the compensation method is: the positive and negative original analog grayscale voltages corresponding to Source (0) are both added with the voltage compensation value or both are subtracted with the second voltage compensation value; the positive and negative original analog grayscale voltages corresponding to Source (1) are both subtracted with the voltage compensation value or both are added with the first voltage compensation value.

[0132] Step S350: applying the compensated analog grayscale voltage to the source data line to be compensated.

[0133] In this exemplary embodiment, applying the compensated analog grayscale voltage to the source data line to be compensated includes:

[0134] enhancing the driving capability of the compensated analog grayscale voltage to obtain a compensated analog grayscale voltage having enhanced driving capability;

[0135] The compensated analog grayscale voltage with enhanced driving capability is applied to the source data line to be compensated.

[0136] As an example, see Figure 4 , wherein the output buffer (Output Buffer) 470 is configured to obtain the compensated analog grayscale voltage from the source compensation module 460, enhance the driving capability of the compensated analog grayscale voltage, obtain the compensated analog grayscale voltage with enhanced driving capability, and apply the compensated analog grayscale voltage with enhanced driving capability to the source data line to be compensated.

[0137] As can be seen from the above, the source voltage compensation method provided by the embodiment of the present disclosure includes: determining the source polarity arrangement pattern of the display panel, and judging whether the source polarity arrangement pattern is the source polarity arrangement pattern to be compensated; in response to the source polarity arrangement pattern being the source polarity arrangement pattern to be compensated, determining the source data line to be compensated of the display panel; determining the voltage compensation value corresponding to the source data line to be compensated; obtaining the original analog grayscale voltage to be applied to the source data line to be compensated, compensating the original analog grayscale voltage based on the voltage compensation value to obtain the compensated analog grayscale voltage; and applying the compensated analog grayscale voltage to the source data line to be compensated.

[0138] By compensating the voltage on the source data line, the common electrode voltage of the odd and even column wirings arranged in a hierarchical cross pattern can be kept consistent, thereby improving the grayscale flicker problem caused by the line width difference in the fan-out area.

[0139] It should be noted that the method of the embodiments of the present disclosure can be performed by a single device, such as a computer or server. The method of the embodiments of the present disclosure can also be applied in a distributed scenario, where multiple devices cooperate to perform the method. In such a distributed scenario, one of the multiple devices may only perform one or more steps of the method of the embodiments of the present disclosure, and the multiple devices will interact with each other to complete the method.

[0140] It should be noted that the above description is limited to some embodiments of the present disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in an order different from that described in the above embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order or sequential order shown to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0141] Based on the same inventive concept, corresponding to any of the above-mentioned embodiments and methods, the present disclosure further provides a source voltage compensation device.

[0142] refer to Figure 9 , which is a structural schematic diagram of a source voltage compensation device provided by an exemplary embodiment of the present disclosure.

[0143] The source voltage compensation device includes the following modules:

[0144] A source polarity arrangement mode determination module 910 is configured to determine a source polarity arrangement mode of the display panel and determine whether the source polarity arrangement mode is a source polarity arrangement mode to be compensated;

[0145] a source data line to be compensated determining module 920, configured to determine a source data line to be compensated of the display panel in response to the source polarity arrangement pattern being the source polarity arrangement pattern to be compensated;

[0146] The voltage compensation value determining module 930 is configured to determine the voltage compensation value corresponding to the source data line to be compensated;

[0147] The voltage compensation module 940 is configured to obtain an original analog grayscale voltage to be applied to the source data line to be compensated, and compensate the original analog grayscale voltage based on the voltage compensation value to obtain a compensated analog grayscale voltage;

[0148] The voltage applying module 950 is configured to apply the compensated analog grayscale voltage to the source data line to be compensated.

[0149] In some exemplary embodiments, the source polarity arrangement mode determination module 910 is configured to:

[0150] Determining whether the polarity of the signal voltage on the source data line in each layer of the double-layer wiring of the display panel in the source polarity arrangement mode is positive and negative, and whether the number of the source data lines with positive polarity is the same as the number of the source data lines with negative polarity;

[0151] The source polarity arrangement pattern determined to be negative is determined as the source polarity arrangement pattern to be compensated.

[0152] In some exemplary embodiments, the source data line to be compensated determining module 920 is configured to:

[0153] Determining a source data line in any one layer of double-layer wiring of the display panel as the source data line to be compensated;

[0154] or,

[0155] The source data lines in each layer of the double-layer wiring of the display panel are determined as the source data lines to be compensated.

[0156] In some exemplary embodiments, the voltage compensation value determination module 930 is configured to:

[0157] Compensating the source data line to be compensated according to a preset unit compensation voltage and a preset step, and detecting a flicker level value of the display panel after compensation;

[0158] In response to the flicker level value meeting a preset condition, the current total compensation voltage is determined to be the voltage compensation value.

[0159] In some exemplary embodiments, the voltage compensation module 940 is configured to:

[0160] Adding the voltage compensation value to the original analog grayscale voltage;

[0161] or,

[0162] The voltage compensation value is subtracted from the original analog grayscale voltage.

[0163] In some exemplary embodiments, the voltage compensation module 940 is configured to:

[0164] Acquire a serial data signal and a clock signal, and shift register the serial data signal based on the clock signal to obtain a parallel digital data signal;

[0165] Obtaining a latch control signal, and latching the parallel digital data signal based on the latch control signal;

[0166] Increasing the voltage amplitude of the parallel digital data signal to obtain a parallel digital data signal with increased voltage amplitude;

[0167] A reference voltage is obtained, and the original analog grayscale voltage is obtained based on the parallel digital data signal after the voltage amplitude is increased and the reference voltage.

[0168] In some exemplary embodiments, the voltage applying module 950 is configured to:

[0169] enhancing the driving capability of the compensated analog grayscale voltage to obtain a compensated analog grayscale voltage having enhanced driving capability;

[0170] The compensated analog grayscale voltage with enhanced driving capability is applied to the source data line to be compensated.

[0171] For the convenience of description, the above devices are described as being functionally divided into various modules. Of course, when implementing the present disclosure, the functions of each module can be implemented in the same or multiple software and / or hardware.

[0172] The device of the above embodiment is used to implement the corresponding source voltage compensation method in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be described in detail here.

[0173] Based on the same inventive concept, corresponding to any of the above-mentioned embodiments and methods, the present disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and runnable on the processor, wherein when the processor executes the program, the source voltage compensation method described in any of the above embodiments is implemented.

[0174] Figure 10 10 is a schematic diagram showing a more specific hardware structure of an electronic device provided in this embodiment. The device may include: a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040 are communicatively connected to each other within the device via the bus 1050.

[0175] The processor 1010 can be implemented using a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this specification.

[0176] The memory 1020 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage devices, dynamic storage devices, etc. The memory 1020 can store an operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 1020 and is called and executed by the processor 1010.

[0177] The input / output interface 1030 is used to connect an input / output module to implement information input and output. The input / output module can be configured as a component in the device (not shown in the figure) or can be externally connected to the device to provide corresponding functions. Input devices may include a keyboard, mouse, touch screen, microphone, various sensors, etc., and output devices may include a display, speaker, vibrator, indicator light, etc.

[0178] The communication interface 1040 is used to connect to a communication module (not shown) to enable communication between the device and other devices. The communication module can communicate via a wired method (such as USB, network cable, etc.) or a wireless method (such as mobile network, WiFi, Bluetooth, etc.).

[0179] The bus 1050 comprises a path for transmitting information between the various components of the device (eg, the processor 1010 , the memory 1020 , the input / output interface 1030 , and the communication interface 1040 ).

[0180] It should be noted that although the above device only shows the processor 1010, the memory 1020, the input / output interface 1030, the communication interface 1040, and the bus 1050, in a specific implementation, the device may also include other components necessary for normal operation. In addition, it will be understood by those skilled in the art that the above device may only include the components necessary to implement the embodiments of this specification, and does not necessarily include all the components shown in the figure.

[0181] The electronic device of the above embodiment is used to implement the corresponding source voltage compensation method in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be described in detail here.

[0182] Based on the same inventive concept, corresponding to any of the above-mentioned embodiment methods, the present disclosure also provides a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute the source voltage compensation method described in any of the above embodiments.

[0183] The computer-readable media of this embodiment include permanent and non-permanent, removable and non-removable media that can be used to store information by any method or technology. The information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device.

[0184] The above-mentioned non-transitory computer-readable storage medium can be any available medium or data storage device that can be accessed by a computer, including but not limited to magnetic storage (such as floppy disks, hard disks, magnetic tapes, magneto-optical disks (MO)), optical storage (such as CDs, DVDs, BDs, HVDs, etc.), and semiconductor storage (such as ROMs, EPROMs, EEPROMs, non-volatile memories (NAND FLASH), solid-state drives (SSDs)), etc.

[0185] The computer instructions stored in the storage medium of the above embodiment are used to enable the computer to execute the source voltage compensation method described in any embodiment in the above exemplary method part, and have the beneficial effects of the corresponding method embodiment, which will not be repeated here.

[0186] Based on the same inventive concept, corresponding to the source voltage compensation method described in any of the above embodiments, the present disclosure further provides a computer program product comprising computer program instructions. In some embodiments, the computer program instructions can be executed by one or more processors of a computer to cause the computer and / or the processors to perform the source voltage compensation method. For the execution entities corresponding to the steps in each embodiment of the source voltage compensation method, the processors executing the corresponding steps can belong to the corresponding execution entities.

[0187] The computer program product of the above embodiment is used to enable the computer and / or the processor to execute the source voltage compensation method as described in any of the above embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0188] Those skilled in the art will appreciate that embodiments of the present disclosure may be implemented as a system, method, or computer program product. Therefore, the present disclosure may be implemented in the following forms: entirely in hardware, entirely in software (including firmware, resident software, microcode, etc.), or in a combination of hardware and software, generally referred to herein as a "circuit," "module," or "system." Furthermore, in some embodiments, the present disclosure may also be implemented in the form of a computer program product in one or more computer-readable media containing computer-readable program code.

[0189] Any combination of one or more computer-readable media can be used. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or component, or any combination thereof. More specific examples (non-exhaustive examples) of computer-readable storage media can include, for example: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device.

[0190] A computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0191] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0192] Computer program code for performing the operations of the present disclosure may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0193] It should be understood that each block in the flowchart and / or block diagram, and combinations of blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine. These computer program instructions are executed by the computer or other programmable data processing device to produce a device that implements the functions / operations specified in the blocks in the flowchart and / or block diagram.

[0194] These computer program instructions can also be stored in a computer-readable medium that enables a computer or other programmable data processing device to operate in a specific manner. In this way, the instructions stored in the computer-readable medium produce a product that includes an instruction device that implements the functions / operations specified in the blocks in the flowchart and / or block diagram.

[0195] Computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, such that the instructions executed on the computer or other programmable apparatus provide a process that implements the functions / operations specified in the blocks in the flowchart and / or block diagram.

[0196] Furthermore, although the operations of the disclosed method are described in a particular order in the accompanying drawings, this does not require or imply that the operations must be performed in that particular order, or that all of the operations shown must be performed to achieve the desired results. Rather, the steps depicted in the flowcharts may be performed in a different order. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into a single step, and / or a single step may be broken down into multiple steps.

[0197] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. Among them, each box in the flowchart or block diagram can represent a module, program segment, or part of the code, and the above-mentioned module, program segment, or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0198] It should be noted that, although several modules or units of the device for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiment of the application, the features and functions of two or more modules or units described above can be concretized in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into multiple modules or units to be concretized.

[0199] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. Within the scope of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0200] In addition, for simplicity of description and discussion, and in order not to make the embodiment of the application difficult to understand, the known power supply / ground connection with integrated circuit (IC) chip and other components may or may not be shown in the accompanying drawings provided. In addition, the device can be shown in the form of a block diagram to avoid making the embodiment of the application difficult to understand, and this also takes into account the following fact, that is, the details of the embodiment of these block diagram devices are highly dependent on the platform to be implemented in the embodiment of the application (that is, these details should be fully within the scope of understanding of those skilled in the art). When specific details (for example, circuit) are set forth to describe exemplary embodiments of the application, it will be apparent to those skilled in the art that the embodiment of the application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered to be illustrative rather than restrictive.

[0201] Although the present invention has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of these embodiments will be apparent to those skilled in the art based on the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may utilize the embodiments discussed.

[0202] The embodiments of the present application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of this application.

[0203] Although the spirit and principles of the present disclosure have been described with reference to several specific embodiments, it should be understood that the present disclosure is not limited to the specific embodiments disclosed, and the division into various aspects does not mean that the features of these aspects cannot be combined to benefit. Such division is merely for the convenience of expression. The present disclosure is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. The scope of the appended claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.

Claims

1. A source voltage compensation method, characterized in that: include: determining a source polarity arrangement pattern of the display panel, and judging whether the source polarity arrangement pattern is a source polarity arrangement pattern to be compensated; In response to the source polarity arrangement pattern being a source polarity arrangement pattern to be compensated, determining a source data line to be compensated of the display panel; Determining a voltage compensation value corresponding to the source data line to be compensated; Acquiring an original analog grayscale voltage to be applied to the source data line to be compensated, and compensating the original analog grayscale voltage based on the voltage compensation value to obtain a compensated analog grayscale voltage; Applying the compensated analog grayscale voltage to the source data line to be compensated.

2. The method according to claim 1, characterized in that The determining whether the source polarity arrangement pattern is a source polarity arrangement pattern to be compensated includes: Determining whether the polarity of the signal voltage on the source data line in each layer of the double-layer wiring of the display panel in the source polarity arrangement mode is positive and negative, and whether the number of the source data lines with positive polarity is the same as the number of the source data lines with negative polarity; The source polarity arrangement pattern determined to be negative is determined as the source polarity arrangement pattern to be compensated.

3. The method according to claim 1, characterized in that The determining of the source data line to be compensated of the display panel includes: Determining a source data line in any one layer of double-layer wiring of the display panel as the source data line to be compensated; or, The source data lines in each layer of the double-layer wiring of the display panel are determined as the source data lines to be compensated.

4. The method according to claim 1, wherein The determining of the voltage compensation value corresponding to the source data line to be compensated includes: Compensating the source data line to be compensated according to a preset unit compensation voltage and a preset step, and detecting a flicker level value of the display panel after compensation; In response to the flicker level value meeting a preset condition, the current total compensation voltage is determined to be the voltage compensation value.

5. The method according to claim 1, wherein The compensating the original analog grayscale voltage based on the voltage compensation value includes: Adding the voltage compensation value to the original analog grayscale voltage; or, The voltage compensation value is subtracted from the original analog grayscale voltage.

6. The method according to claim 1, characterized in that The obtaining of the original analog grayscale voltage to be applied to the source data line to be compensated comprises: Acquire a serial data signal and a clock signal, and shift register the serial data signal based on the clock signal to obtain a parallel digital data signal; Obtaining a latch control signal, and latching the parallel digital data signal based on the latch control signal; Increasing the voltage amplitude of the parallel digital data signal to obtain a parallel digital data signal with increased voltage amplitude; A reference voltage is obtained, and the original analog grayscale voltage is obtained based on the parallel digital data signal after the voltage amplitude is increased and the reference voltage.

7. The method according to claim 1, characterized in that The step of applying the compensated analog grayscale voltage to the source data line to be compensated comprises: enhancing the driving capability of the compensated analog grayscale voltage to obtain a compensated analog grayscale voltage having enhanced driving capability; The compensated analog grayscale voltage with enhanced driving capability is applied to the source data line to be compensated.

8. A source voltage compensation device, characterized in that: include: a source polarity arrangement mode determination module configured to determine a source polarity arrangement mode of the display panel and determine whether the source polarity arrangement mode is a source polarity arrangement mode to be compensated; a to-be-compensated source data line determination module, configured to determine a to-be-compensated source data line of the display panel in response to the source polarity arrangement pattern being the to-be-compensated source polarity arrangement pattern; a voltage compensation value determining module, configured to determine a voltage compensation value corresponding to the source data line to be compensated; a voltage compensation module configured to obtain an original analog grayscale voltage to be applied to the source data line to be compensated, and compensate the original analog grayscale voltage based on the voltage compensation value to obtain a compensated analog grayscale voltage; The voltage applying module is configured to apply the compensated analog grayscale voltage to the source data line to be compensated.

9. An electronic device, characterized in that: The method comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method according to any one of claims 1 to 7 is implemented.

10. A display panel, characterized in that: The device comprises the source voltage compensation device as claimed in claim 8 or the electronic device as claimed in claim 9.

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