Grid-connected inverter fault ride-through negative sequence current control method and device

Abstract

The invention relates to the technical field of inverters, and discloses a grid-connected inverter fault ride-through negative sequence current control method and device, and the method comprises the steps: carrying out the phase locking of a positive sequence voltage of a three-phase sampling voltage, and obtaining a phase of the positive sequence voltage; using the phase of the positive sequence voltage to obtain a DQ axis negative sequence voltage, and according to the DQ axis negative sequence voltage, determining whether an unbalanced fault occurs in the power grid; when the power grid has an unbalanced fault, obtaining a negative sequence current given value of the DQ axis according to the negative sequence voltage of the DQ axis; the negative sequence current given value of the DQ axis is applied to current loop control, a modulation wave of the grid-connected inverter is obtained, and the modulation wave is used for generating a switching sequence signal of the grid-connected inverter. According to the method, the negative sequence voltage of the DQ axis is obtained by using the phase of the positive sequence voltage, so that the given conversion of the negative sequence current is avoided, and the occupation of interrupt resources is greatly reduced, so that the unbalanced fault of the power grid can be quickly and accurately detected, and a basis is provided for the switching of subsequent control strategies.

Description

Technical Field

[0001] The present invention relates to the technical field of inverters, and in particular to a method and device for controlling a negative-sequence current of a grid-connected inverter during fault ride-through. Background Art

[0002] When grid-connected inverters are connected to the grid, the current national standard requires positive-sequence reactive power compensation based on the positive-sequence voltage to restore the grid. However, with the increasing integration of renewable energy, synchronous generators struggle to maintain voltage during grid imbalance faults, and negative-sequence currents can also impact the power system. Therefore, the latest national standard requires compensation for negative-sequence reactive current.

[0003] According to the new regulations, during an unbalanced fault, the inverter must reduce the negative-sequence active current to zero and calculate the reactive current in real time based on the negative-sequence voltage amplitude. The mainstream control method separates the positive and negative sequence grid voltages, phase-locks them in the DQ coordinate system to obtain the phase amplitude. After calculation and coordinate transformation, a PI or PR controller is used to generate the modulation waveform. While this method can accurately control the negative-sequence current, it requires dual phase locking and rapid computation, resulting in time-consuming operation and high interruption resource usage. Summary of the Invention

[0004] In view of this, the present invention provides a method and device for controlling negative sequence current during fault ride-through of a grid-connected inverter, so as to solve the problem of how to reduce operation time and resolve interruption resources during fault ride-through of a grid-connected inverter.

[0005] In the first aspect, the present invention provides a method for controlling the negative-sequence current of a grid-connected inverter during fault crossing, comprising: phase-locking the positive-sequence voltage of the three-phase sampling voltage to obtain the phase of the positive-sequence voltage; using the phase of the positive-sequence voltage to obtain the negative-sequence voltage of the DQ axis, and judging whether an unbalanced fault occurs in the power grid based on the negative-sequence voltage of the DQ axis; when an unbalanced fault occurs in the power grid, obtaining a given value of the negative-sequence current of the DQ axis based on the negative-sequence voltage of the DQ axis; applying the given value of the negative-sequence current of the DQ axis to the current loop control to obtain a modulation wave of the grid-connected inverter, and the modulation wave is used to generate a switching sequence signal of the grid-connected inverter.

[0006] The present invention utilizes the phase of the positive-sequence voltage to obtain the DQ axis negative-sequence voltage, eliminates the need to phase-lock the negative-sequence voltage, avoids the conversion of the given negative-sequence current, and greatly reduces the occupation of interruption resources, thereby enabling rapid and accurate detection of power grid unbalance faults and providing a basis for subsequent switching of control strategies.

[0007] In an optional embodiment, the process of obtaining the positive-sequence voltage includes: performing a Clark equal-amplitude transformation on the three-phase sampled voltage to obtain an αβ-axis voltage component in a two-phase stationary coordinate system; based on the αβ-axis voltage component, using a second-order generalized integrator to virtually obtain an αβ-axis virtual voltage component; based on the αβ-axis voltage component and the virtual voltage component, constructing the αβ-axis positive-sequence voltage and negative-sequence voltage.

[0008] In an optional embodiment, it is characterized in that the αβ axis positive sequence voltage and negative sequence voltage are constructed by the following formula:

[0009]

[0010] Among them, U αp 、U βp are the positive sequence voltages of the α-axis and β-axis respectively; U αn 、U βn are the negative sequence voltages of the α-axis and β-axis respectively; U α 、U β are the voltage components of the α-axis and β-axis respectively; U′ α , U′ β are the virtual voltage components of the α-axis and β-axis respectively.

[0011] In an optional embodiment, the process of obtaining the phase of the positive-sequence voltage includes: converting the αβ-axis positive-sequence voltage and negative-sequence voltage into a DQ coordinate system with the same rotation direction as the voltage vector of the three-phase sampling voltage to obtain the DQ-axis positive-sequence voltage and negative-sequence voltage; using a proportional-integral controller and an integral controller to phase-lock the Q-axis positive-sequence voltage; when the Q-axis positive-sequence voltage is close to 0, the phase locking is completed and the phase of the positive-sequence voltage is obtained, and the phase of the positive-sequence voltage is applied to the DQ transformation.

[0012] In an optional embodiment, the process of determining whether an unbalanced fault occurs in the power grid based on the negative-sequence voltage of the DQ axis includes: calculating the amplitude of the negative-sequence voltage based on the negative-sequence voltage of the DQ axis; and determining whether an unbalanced fault occurs in the power grid based on the amplitude of the negative-sequence voltage.

[0013] In an optional embodiment, the negative sequence current set value of the DQ axis is obtained by the following formula:

[0014]

[0015] Among them, I dn , I qn are the given values of negative sequence current of axis D and axis Q respectively; U dn 、U qn D-axis and Q-axis negative sequence voltage respectively; I n is the rated current.

[0016] In an optional embodiment, the process of obtaining the modulation wave of the grid-connected inverter includes: taking the sum of the DQ axis positive-sequence current given value and the negative-sequence current given value as the DQ axis current given value; based on the DQ axis current given value, using a resonant controller to obtain a DQ axis voltage given adjustment value; taking the sum of the DQ axis voltage given adjustment value and the DQ axis positive-sequence voltage given value as the DQ axis voltage given value; using the phase of the positive-sequence voltage to perform inverse Park and inverse Clark transformation on the DQ axis voltage given value to obtain the modulation wave of the grid-connected inverter.

[0017] In a second aspect, the present invention provides a negative-sequence current control device for a grid-connected inverter fault crossing, comprising: a phase-locking module for phase-locking the positive-sequence voltage of the three-phase sampling voltage to obtain the phase of the positive-sequence voltage; a judgment module for obtaining the DQ axis negative-sequence voltage using the phase of the positive-sequence voltage, and judging whether an unbalanced fault occurs in the power grid based on the DQ axis negative-sequence voltage; a calculation module for obtaining a given value of the negative-sequence current of the DQ axis based on the DQ axis negative-sequence voltage when an unbalanced fault occurs in the power grid; and a control module for applying the given value of the negative-sequence current of the DQ axis to the current loop control to obtain a modulation wave of the grid-connected inverter, and the modulation wave is used to generate a switching sequence signal of the grid-connected inverter.

[0018] In a third aspect, the present invention provides a computer device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to thereby execute the negative sequence current control method for grid-connected inverter fault crossing according to the first aspect or any corresponding embodiment thereof.

[0019] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the method for controlling negative-sequence current of a grid-connected inverter during fault crossing according to the first aspect or any corresponding embodiment thereof.

[0020] In a fifth aspect, the present invention provides a computer program product comprising computer instructions, the computer instructions being used to enable a computer to execute the method for controlling negative-sequence current of a grid-connected inverter during fault riding according to the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 1 is a flow chart of a method for controlling a negative-sequence current of a grid-connected inverter during fault ride-through according to an embodiment of the present invention;

[0023] Figure 2 is a voltage vector coordinate axis projection diagram according to an embodiment of the present invention;

[0024] Figure 3 is a voltage vector coordinate axis projection diagram according to an embodiment of the present invention;

[0025] Figure 4 is a block diagram of a positive sequence voltage phase-locked control according to an embodiment of the present invention;

[0026] Figure 5 is a control block diagram for obtaining a modulation wave of a grid-connected inverter according to an embodiment of the present invention;

[0027] Figure 6 1 is a flow chart of a method for controlling a negative-sequence current of a grid-connected inverter during fault ride-through according to an embodiment of the present invention;

[0028] Figure 7 Schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present invention.

[0030] When a grid-connected inverter encounters a grid fault while connected to the grid, existing national standards require positive-sequence reactive power compensation based on the grid's positive-sequence voltage to support grid recovery. However, when an unbalanced grid fault occurs, both negative-sequence and positive-sequence voltages exist within the grid, requiring only synchronous generators to support grid recovery. However, due to the increasing proportion of new energy sources integrated into the grid, synchronous generators are no longer able to support grid voltage recovery when an unbalanced grid fault occurs. Furthermore, the generation of negative-sequence current during an unbalanced grid fault can adversely impact the power system. Therefore, the latest national standards require appropriate negative-sequence reactive current compensation to support grid recovery when an unbalanced grid fault occurs.

[0031] According to the latest national standards, grid-connected inverters must ensure that the negative-sequence active current fed into the grid is zero during a grid unbalance fault, and the negative-sequence reactive current must be calculated in real time based on the negative-sequence voltage amplitude during the fault. Separately controlling the negative-sequence current requires knowing the initial phase of the negative-sequence voltage. Otherwise, the current fed into the grid will not meet the national standard requirements. Currently, most grid systems separate the positive and negative sequence values, transforming them into a positive-sequence (DQ) coordinate system and phase-locking the positive and negative sequence voltages to obtain their real-time phase and amplitude information. This allows the negative-sequence active and reactive currents during the fault to be calculated using the national standard current reference formula. Based on the negative-sequence voltage phase information, the negative-sequence current reference is then transformed and controlled using a proportional-integral controller or a proportional resonant controller to generate a modulated waveform, meeting the national standard requirements for negative-sequence reactive power control. This approach can achieve zero-error tracking control of the negative-sequence current, but requires separate phase-locking of the positive and negative sequence currents. This phase-locking operation must be as fast as the control frequency, which consumes runtime and interrupt resources.

[0032] The above-mentioned solution of separate positive and negative sequence phase locking has the following problems.

[0033] To obtain the negative-sequence voltage phase using the negative-sequence voltage phase-locked method, a negative-sequence voltage phase-locked loop (PLL) is added. Once the negative-sequence voltage phase is obtained, the negative-sequence current given during a grid unbalanced fault must be calculated based on national standards and the negative-sequence voltage amplitude. Two control methods are then possible: one is to mathematically derive the DQ component of the negative-sequence current given on the positive-sequence DQ coordinate axis based on the phases of the positive and negative-sequence voltages, and control it using a parallel proportional resonant controller. The other is to add a negative-sequence current proportional-integral controller to control the negative-sequence current. Finally, the output is transformed into a three-phase stationary coordinate system based on the negative-sequence voltage phase for modulation. This control method involves a large amount of calculation and cannot be simplified, increasing the use of control interrupt resources.

[0034] Based on this, according to an embodiment of the present invention, an embodiment of a method for controlling negative-sequence current of a grid-connected inverter during fault riding is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0035] In this embodiment, a method for controlling negative sequence current of a grid-connected inverter during fault ride-through is provided. Figure 1 Shown, including:

[0036] Step S1: performing phase locking on the positive sequence voltage of the three-phase sampled voltage to obtain the phase of the positive sequence voltage.

[0037] Specifically, during the operation of the power system, the three-phase grid voltage is sampled in real time through a voltage transformer to obtain a three-phase sampled voltage signal. Due to the presence of interference factors such as harmonics and noise in the power grid, the sampled voltage must first be filtered and pre-processed to remove unnecessary high-frequency interference signals to improve signal quality. A positive-sequence component extraction algorithm based on instantaneous reactive power theory is used to separate the positive-sequence voltage component from the three-phase sampled voltage. Subsequently, a phase-locked operation is performed on the positive-sequence voltage component. A software phase-locked loop can be used to build a closed-loop control system and continuously adjust internal parameters to synchronize the phase of the output signal with the phase of the input positive-sequence voltage. Ultimately, the phase information of the positive-sequence voltage is accurately obtained, providing an accurate phase reference for subsequent control links.

[0038] Optionally, the process of obtaining the positive-sequence voltage includes: performing Clark equal-amplitude transformation on the three-phase sampled voltage to obtain the αβ-axis voltage components in a two-phase stationary coordinate system; based on the αβ-axis voltage components, using a second-order generalized integrator to virtually obtain the αβ-axis virtual voltage components; based on the αβ-axis voltage components and the virtual voltage components, constructing the αβ-axis positive-sequence voltage and negative-sequence voltage.

[0039] Specifically, the three-phase AC instantaneous voltage is sampled, such as Figure 2 As shown, the three-phase voltage can be regarded as a component of a voltage vector with a fixed amplitude and a unique rotation frequency in a three-phase stationary coordinate system. Therefore, it can also be regarded as obtaining two components alpha and beta signals U on a two-phase stationary coordinate axis. α and U β In order to ensure that the voltage vector amplitude remains unchanged, the actual alpha and beta signals are obtained by performing Clark equal amplitude transformation on the three-phase instantaneous voltage signal, and then U α and U β The signal passes through the second-order generalized integrator and is virtualized as U′ α and U′ β Signal, according to the following formula, the positive sequence alpha and beta signals U in the two-phase stationary coordinate system are calculated αp 、U βp and negative sequence alpha and beta signals U αn 、U βn .

[0040] The positive and negative sequence voltages of the αβ axes are constructed using the following formulas:

[0041]

[0042] Among them, U αp 、U βp are the positive sequence voltages of the α-axis and β-axis respectively; U αn 、U βnare the negative sequence voltages of the α-axis and β-axis respectively; U α 、U β are the voltage components of the α-axis and β-axis respectively; U′ α , U′ β are the virtual voltage components of the α-axis and β-axis respectively.

[0043] Step S2: using the phase of the positive sequence voltage to obtain the DQ axis negative sequence voltage, and judging whether an unbalanced fault occurs in the power grid according to the DQ axis negative sequence voltage.

[0044] Specifically, based on the positive-sequence voltage phase obtained in step S1, the voltage signal in the three-phase stationary coordinate system is converted to the two-phase stationary αβ coordinate system through the Clark transformation, and then converted to the synchronously rotating DQ coordinate system through the Park transformation. In an ideal three-phase balanced power grid, the negative-sequence voltage should be zero; however, when an unbalanced fault occurs in the power grid, such as single-phase grounding, two-phase short circuit, etc., a negative-sequence voltage component will be generated. By calculating the negative-sequence voltage component on the DQ axis, a reasonable threshold judgment standard is set. If the calculated DQ axis negative-sequence voltage amplitude exceeds the preset threshold, it is determined that an unbalanced fault has occurred in the power grid; otherwise, it is considered that the power grid is operating in a balanced state. This judgment process provides a key basis for subsequent fault handling.

[0045] Optionally, the process of obtaining the phase of the positive-sequence voltage includes: converting the αβ-axis positive-sequence voltage and negative-sequence voltage into a DQ coordinate system with the same rotation direction as the voltage vector of the three-phase sampling voltage to obtain the DQ-axis positive-sequence voltage and negative-sequence voltage; using a proportional-integral controller and an integral controller to phase-lock the Q-axis positive-sequence voltage; when the Q-axis positive-sequence voltage is close to 0, the phase locking is completed and the phase of the positive-sequence voltage is obtained, and the phase of the positive-sequence voltage is applied to the DQ transformation.

[0046] Specifically, if Figure 3 As shown, the voltage vector is regarded as a two-phase rotating coordinate axis with the same rotation frequency as the voltage vector to obtain two components D and Q signals U d and U q , then the U obtained from the above formula can be αp 、U βp and U αn 、U βn The phase θ obtained by the phase lock and the signal is transformed into the DQ coordinate system with the same rotation direction as the voltage vector through Park transformation, and the U dp 、U qp and U dn 、U qn . Then as Figure 4 As shown, for the positive sequence Q axis voltage U qp Use proportional integral controller and integral controller to lock the grid phase. qp When it is close to 0, U dpIt basically coincides with the voltage vector, and the phase lock is considered to be completed.

[0047] Step S3: When an unbalanced fault occurs in the power grid, a given value of the negative sequence current of the DQ axis is obtained according to the negative sequence voltage of the DQ axis.

[0048] Specifically, once an unbalanced fault is determined in the power grid, the compensation target for the negative-sequence current must be quickly determined. Based on the compensation capabilities of the power electronic devices and the system's stable operation requirements, combined with the amplitude and phase information of the negative-sequence voltage on the DQ axis, a control algorithm is used to calculate the required negative-sequence current compensation, thereby obtaining the negative-sequence current setpoint for the DQ axis. For example, a proportional-integral (PI) controller can be used to dynamically adjust the negative-sequence current setpoint based on the deviation between the negative-sequence voltage and the system's allowable imbalance, ensuring that the compensated grid imbalance meets operating standards and maintains stable system operation.

[0049] Optionally, the process of determining whether a power grid unbalance fault has occurred based on the DQ axis negative-sequence voltage includes: calculating the amplitude of the negative-sequence voltage based on the DQ axis negative-sequence voltage; and determining that a power grid unbalance fault has occurred based on the amplitude of the negative-sequence voltage. Exemplarily, when the amplitude of the negative-sequence voltage is non-zero, a power grid unbalance fault has occurred.

[0050] Specifically, after the phase locking in step 1 is completed, the negative sequence DQ voltage U dn 、U qn That is, the component of the negative sequence voltage vector in the positive sequence DQ coordinate system. Since the power grid fault will not suddenly change into other faults, the negative sequence DQ voltage U dn 、U qn It can also be considered to be stable, and then the negative sequence DQ voltage U dn 、U qn The amplitude of the negative sequence voltage can be obtained by taking the square root of the sum of the squares.

[0051] Specifically, when an unbalanced fault occurs, according to the national standard, it is necessary to calculate the negative sequence voltage and rated current I n A specific amount of negative sequence reactive current is generated to support the power grid. According to the following power formula:

[0052]

[0053] According to the national standard, the negative sequence active current is 0, then the negative sequence active power P n The negative sequence reactive power can be calculated based on the reactive current given and the negative sequence voltage amplitude to obtain Q n =-U d I q , then since the negative sequence voltage vector is the negative sequence DQ component obtained in the positive sequence DQ coordinate system, the Q obtained according to the theoretical calculation n、P n and U dn 、U qn , we can get I in the positive sequence coordinate system as shown in the following formula dn and I qn The reactive current coefficient is adjusted according to the negative sequence reactive power that the inverter needs to generate for unbalanced fault ride-through in different countries.

[0054] The negative sequence current reference value of the DQ axis is obtained by the following formula:

[0055]

[0056] Among them, I dn , I qn are the given values of negative sequence current of axis D and axis Q respectively; U dn 、U qn D-axis and Q-axis negative sequence voltage respectively; I n is the rated current.

[0057] Step S4: applying the negative sequence current given value of the DQ axis to the current loop control to obtain a modulation wave of the grid-connected inverter, which is used to generate a switching sequence signal of the grid-connected inverter.

[0058] Optionally, the process of obtaining the modulation wave of the grid-connected inverter includes: taking the sum of the DQ axis positive-sequence current given value and the negative-sequence current given value as the DQ axis current given value; based on the DQ axis current given value, using a resonant controller to obtain a DQ axis voltage given adjustment value; taking the sum of the DQ axis voltage given adjustment value and the DQ axis positive-sequence voltage given value as the DQ axis voltage given value; using the phase of the positive-sequence voltage to perform inverse Park and inverse Clark transformation on the DQ axis voltage given value to obtain the modulation wave of the grid-connected inverter.

[0059] Specifically, the negative sequence DQ current in the positive sequence two-phase rotating coordinate system is given as I dn and I qn Use the resonant controller for control. After the output signal and the proportional resonant controller output signal are superimposed, the positive sequence voltage phase is transformed by inverse Park and inverse Clark to obtain the modulation wave to achieve negative sequence control, such as Figure 5 shown.

[0060] For example, Figure 6 This is a flow chart of the negative sequence current control method for grid-connected inverter fault ride-through. The specific process is as follows:

[0061] (1) A second-order generalized integrator is used to separate the positive and negative sequences of the three-phase sampling voltage, and a phase-locked operation is performed on the positive sequence voltage.

[0062] (2) Determine whether the phase lock is completed. If not, continue waiting; if completed, proceed to the next step.

[0063] (3) The negative sequence voltage in the two-phase stationary coordinate system is converted to the positive sequence two-phase rotating coordinate system using the phase change of the positive sequence voltage.

[0064] (4) Determine whether an unbalanced fault occurs in the power grid. If not, return to the "coordinate transformation" step; if so, proceed to the next step.

[0065] (5) According to the national standard requirements, substitute the mathematical calculation formula to calculate the negative sequence DQ axis current (negative sequence DQ axis current = current coefficient * rated current * negative sequence DQ axis voltage).

[0066] (6) The calculated negative sequence DQ axis current given value is used as the given value of the PR (proportional-resonant) controller for control.

[0067] This embodiment also provides a negative-sequence current control device for a grid-connected inverter during fault ride-through. This device is used to implement the above-mentioned embodiments and preferred implementations, and details already described will not be repeated. As used below, the term "module" may refer to a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0068] This embodiment provides a negative-sequence current control device for a grid-connected inverter during fault ride-through, comprising:

[0069] The phase-locking module is used to phase-lock the positive-sequence voltage of the three-phase sampled voltage to obtain the phase of the positive-sequence voltage;

[0070] A judgment module is used to obtain the DQ axis negative sequence voltage by using the phase of the positive sequence voltage, and to judge whether an unbalanced fault occurs in the power grid according to the DQ axis negative sequence voltage;

[0071] A calculation module is used to obtain a given value of the negative sequence current of the DQ axis according to the negative sequence voltage of the DQ axis when an unbalanced fault occurs in the power grid;

[0072] The control module is used to apply the negative sequence current given value of the DQ axis to the current loop control to obtain the modulation wave of the grid-connected inverter, and the modulation wave is used to generate the switching sequence signal of the grid-connected inverter.

[0073] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0074] The grid-connected inverter fault ride-through negative sequence current control device in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0075] An embodiment of the present invention further provides a computer device having the above-mentioned grid-connected inverter fault ride-through negative sequence current control device.

[0076] See also Figure 7 , Figure 7 is a structural diagram of a computer device provided by an optional embodiment of the present invention, such as Figure 7 As shown, the computer device includes: one or more processors 10, memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components utilize different buses to communicate with each other and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in the memory or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Equally, multiple computer devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 7 A processor 10 is taken as an example.

[0077] The processor 10 may be a central processing unit, a network processor, or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.

[0078] The memory 20 stores instructions that can be executed by at least one processor 10, so as to enable at least one processor 10 to execute the method shown in the above embodiment.

[0079] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0080] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0081] The computer device further includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Figure 7 The bus connection is taken as an example.

[0082] The input device 30 can receive input digital or character information and generate key signal input related to user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a trackpad, a touch pad, an indicator stick, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 can include a display device, an auxiliary lighting device (e.g., an LED), and a tactile feedback device (e.g., a vibration motor). The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display, and a plasma display. In some optional embodiments, the display device can be a touch screen.

[0083] The embodiment of the present invention also provides a computer-readable storage medium. The above-mentioned method according to the embodiment of the present invention can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.

[0084] A portion of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the form in which the computer program instruction exists in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc. Accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium that can be accessed by the computer.

[0085] Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention. Such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A method for controlling negative sequence current during fault ride-through of a grid-connected inverter, characterized in that: include: Phase-lock the positive sequence voltage of the three-phase sampling voltage to obtain the phase of the positive sequence voltage; Using the phase of the positive sequence voltage to obtain the DQ axis negative sequence voltage, and judging whether an unbalanced fault occurs in the power grid according to the DQ axis negative sequence voltage; When an unbalanced fault occurs in the power grid, the negative sequence current given value of the DQ axis is obtained according to the negative sequence voltage of the DQ axis; The negative sequence current given value of the DQ axis is applied to the current loop control to obtain the modulation wave of the grid-connected inverter, and the modulation wave is used to generate the switching sequence signal of the grid-connected inverter.

2. The method for controlling negative sequence current of a grid-connected inverter during fault ride-through according to claim 1, characterized in that: The process of obtaining the positive sequence voltage includes: After Clark equal amplitude transformation of the three-phase sampled voltage, the αβ axis voltage components in the two-phase stationary coordinate system are obtained; Based on the αβ axis voltage components, a second-order generalized integrator is used to virtually obtain αβ axis virtual voltage components; Based on the αβ axis voltage components and the virtual voltage components, the αβ axis positive sequence voltage and negative sequence voltage are constructed.

3. The method for controlling negative sequence current of a grid-connected inverter during fault ride-through according to claim 2, characterized in that: The positive and negative sequence voltages of the αβ axes are constructed using the following formulas: Among them, U αp 、U βp are the positive sequence voltages of the α-axis and β-axis respectively; U αn 、U βn are the negative sequence voltages of the α-axis and β-axis respectively; U α 、U β are the voltage components of the α-axis and β-axis respectively; U′ α , U′ β are the virtual voltage components of the α-axis and β-axis respectively.

4. The method for controlling negative sequence current of a grid-connected inverter during fault ride-through according to claim 2, wherein: The process of obtaining the phase of the positive sequence voltage includes: The positive-sequence voltage and negative-sequence voltage of the αβ axes are converted to the DQ coordinate system with the same rotation direction as the voltage vector of the three-phase sampling voltage to obtain the positive-sequence voltage and negative-sequence voltage of the DQ axis; The Q-axis positive sequence voltage is phase-locked using a proportional-integral controller and an integral controller; When the Q-axis positive-sequence voltage is close to 0, phase locking is completed and the phase of the positive-sequence voltage is obtained, and the phase of the positive-sequence voltage is applied to the DQ transformation.

5. The method for controlling negative sequence current of a grid-connected inverter during fault ride-through according to claim 1, characterized in that: The process of determining whether an unbalanced fault has occurred in the power grid based on the negative sequence voltage of the DQ axis includes: Calculate the amplitude of the negative sequence voltage based on the DQ axis negative sequence voltage; Based on the magnitude of the negative sequence voltage, it is determined that an unbalanced fault has occurred in the power grid.

6. The method for controlling negative sequence current of a grid-connected inverter during fault ride-through according to claim 1, characterized in that: The negative sequence current reference value of the DQ axis is obtained by the following formula: Among them, I dn , I qn are the given values of negative sequence current of D axis and Q axis respectively; U dn 、U qn D-axis and Q-axis negative sequence voltage respectively; I n is the rated current.

7. The method for controlling negative sequence current of a grid-connected inverter during fault ride-through according to claim 1, wherein: The process of obtaining the modulation wave of the grid-connected inverter includes: The sum of the DQ axis positive sequence current given value and the negative sequence current given value is used as the DQ axis current given value; Based on the DQ axis current given value, a DQ axis voltage given adjustment value is obtained by using a resonant controller; The sum of the DQ axis voltage setting adjustment value and the DQ axis positive sequence voltage setting value is used as the DQ axis voltage setting value; The phase of the positive sequence voltage is used to perform inverse Park and inverse Clark transformations on the given values of the DQ axis voltage to obtain the modulation wave of the grid-connected inverter.

8. A negative sequence current control device for a grid-connected inverter fault ride-through, characterized in that: include: The phase-locking module is used to phase-lock the positive-sequence voltage of the three-phase sampled voltage to obtain the phase of the positive-sequence voltage; a judgment module, configured to obtain a DQ axis negative sequence voltage by using the phase of the positive sequence voltage, and to judge whether an unbalanced fault occurs in the power grid according to the DQ axis negative sequence voltage; A calculation module is used to obtain a given value of the negative sequence current of the DQ axis according to the negative sequence voltage of the DQ axis when an unbalanced fault occurs in the power grid; A control module is used to apply the negative sequence current given value of the DQ axis to the current loop control to obtain the modulation wave of the grid-connected inverter, and the modulation wave is used to generate the switching sequence signal of the grid-connected inverter.

9. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the negative sequence current control method for grid-connected inverter fault ride-through according to any one of claims 1 to 7 by executing the computer instructions.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the method for controlling negative-sequence current of a grid-connected inverter during fault ride-through according to any one of claims 1 to 7.

11. A computer program product, characterized in that The method comprises computer instructions, wherein the computer instructions are used to enable a computer to execute the method for controlling the negative sequence current of a grid-connected inverter during fault ride-through according to any one of claims 1 to 7.

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