Narrowband Internet of Things uplink single carrier symbol correction method and system based on Costas ring

Abstract

The invention discloses a Costas ring-based narrow-band Internet of Things uplink single carrier symbol correction method and a Costas ring-based narrow-band Internet of Things uplink single carrier symbol correction system, which support a narrow-band Internet of Things protocol specification specified in 3GPP (3rd Generation Partnership Project) Release 13. According to the invention, the Costas loop is combined with the uplink characteristics of the narrowband Internet of Things, the software radio equipment is used for collecting uplink single-carrier signals, the Costas loop structure is reconstructed, a nonlinear phase discriminator and a low-pass filter are designed in a combined manner, and a loop filter with combined gain is formed. A digital frequency synthesis module is adopted to replace a traditional voltage-controlled oscillator, symbol frequency offset and phase distortion are dynamically compensated based on error signals output by a Costas loop, and therefore demodulation of real narrowband radio frequency signals is completed. According to the method, the problem of symbol distortion caused by frequency offset, multipath effect and hardware nonlinearity in a narrowband Internet of Things scene is solved, and compared with a traditional channel estimation scheme, the communication error rate can be remarkably reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of low-power wide-area Internet of Things (IoT), and more specifically, to a method and system for uplink single-carrier symbol correction in a narrowband IoT based on a Costas loop. Background Art

[0002] Narrowband Internet of Things (NB-IoT), as a core technology for low-power, wide-area IoT, has been widely adopted in fields such as smart cities and industrial monitoring. Its uplink typically uses a single-carrier transmission mode to meet the low power and low-cost requirements of terminal devices. However, in complex wireless environments, uplink signals are susceptible to frequency deviation, phase noise, and multipath interference, resulting in symbol timing deviation and phase distortion, severely degrading demodulation performance. Especially in edge coverage scenarios, the accuracy of the crystal oscillator in terminal devices is limited, and frequency deviation can reach hundreds of hertz to several kHz. Traditional synchronization algorithms struggle to achieve high-precision compensation, becoming a key bottleneck restricting system reliability.

[0003] In existing technologies, symbol synchronization and correction for narrowband IoT uplinks primarily rely on schemes such as cyclic prefix matching, phase-locked loop (PLL) tracking, or blind equalization. For example, cyclic prefix-based time-domain synchronization methods determine symbol boundaries by matching the correlation between the received signal and the cyclic prefix. However, the short cyclic prefix length of narrowband IoT significantly reduces synchronization accuracy under multipath interference, and the coupling effects of frequency offset and phase noise cannot be distinguished. While a combined PLL and Kalman filter can track phase variations, it is prone to loss of lock in low signal-to-noise ratio environments, and its computational complexity makes it difficult to meet real-time requirements. Blind equalization and iterative compensation techniques require multiple convergence iterations, increasing processing latency and failing to meet the real-time communication requirements of narrowband IoT. These schemes generally suffer from deficiencies such as insufficient dynamic adaptability, a conflict between resource consumption and performance, and poor multi-protocol compatibility. For example, traditional algorithms struggle to cope with signal distortion caused by rapid terminal movement or sudden interference. The complex computation required for high-precision synchronization conflicts with the low power consumption requirements of terminals. Furthermore, single-protocol optimization design increases hardware redundancy in multi-mode base stations.

[0004] Costas loop technology, a classic carrier synchronization scheme, was initially used for coherent demodulation of frequency- and phase-modulated signals. It extracts phase errors through orthogonal mixing and low-pass filtering, enabling pilot-free frequency offset tracking. In recent years, improved digital Costas loops have been explored for use in orthogonal frequency division multiplexing (OFDM) systems, but their application in narrowband single-carrier scenarios has yet to be fully explored. Summary of the Invention

[0005] The purpose of the present invention is to address the shortcomings of the existing technology and provide a narrowband Internet of Things uplink single-carrier symbol correction method and system based on the Costas loop. Through the efficient adaptation of the closed-loop feedback mechanism of the Costas loop and the software-defined radio (SDR) hardware platform, the symbol distortion problem caused by frequency deviation, multipath effect and hardware nonlinearity in NB-IoT scenarios is solved.

[0006] According to a first aspect of this specification, a narrowband Internet of Things uplink single-carrier symbol correction method based on a Costas loop is provided, the method comprising:

[0007] S1, receives the NB-IoT uplink single-carrier signal through software radio equipment, extracts the time domain symbol sequence and divides it into several symbol blocks, performs initial frequency offset estimation and compensation on the symbol blocks, and then performs downsampling processing to obtain a downsampled sequence;

[0008] S2, constructing a Costas loop correction structure, inputting the down-sampling sequence of the symbol block into the Costas loop correction structure, and completing frequency offset estimation of the down-sampling sequence;

[0009] The Costas loop correction structure is a closed-loop feedback structure consisting of a nonlinear phase detector, a low-pass filter, and a digital frequency synthesis module. The phase detector extracts a phase difference sequence through a sliding window and uses an I / Q path separation symbol phase detection method to send the output signal to the low-pass filter. The phase detector and the low-pass filter are jointly designed, and the parameters in the system function of the low-pass filter are integrated to form a loop filter with a joint gain. The output signal of the loop filter is sent to the digital frequency synthesis module to generate an oscillation signal with a phase equal to its input value. The oscillation signal is multiplied by the down-sampled sequence of the input symbol block to obtain a loop output signal.

[0010] S3 uses the demodulation result of the NB-IoT uplink demodulation reference signal to rotate the phase of the symbol constellation diagram, completes the phase correction, and outputs the symbol sequence after frequency and phase correction.

[0011] Furthermore, the extraction of the time domain symbol sequence is specifically as follows: the NB-IoT uplink single-carrier signal is received, down-converted and analog-to-digital converted, and then the out-of-band interference is suppressed by a bandpass filter to extract the time domain symbol sequence; the initial frequency offset estimation adopts an autocorrelation algorithm based on a cyclic prefix and a cross-correlation algorithm of the pilot symbols.

[0012] Furthermore, the extraction of the phase difference sequence in the phase detector is specifically as follows: a sliding window difference algorithm is used to perform complex conjugate multiplication operations on adjacent sampling points in the window to extract the phase difference sequence, and the window length is dynamically adjusted in the range of 8-32 sampling points, and adaptively selected according to the SNR detection result: when SNR>10dB, a short window is enabled; when SNR<5dB, it is switched to a long window.

[0013] Furthermore, the expression of the I / Q path separation type symbol phase detection method adopted by the phase detector is:

[0014]

[0015] Among them, V D (t) represents the output of the phase detector and the input of the low-pass filter, s I (t) and s Q (t) denotes the real and imaginary parts of the downsampled sequence s(t) of the symbol block at time t, respectively, and Sign(·) denotes the sign function;

[0016] The system function F(z) of the low-pass filter is expressed as follows:

[0017]

[0018] Where z is a complex variable on the complex plane, C1 and C2 are constants;

[0019] The phase detector and the low-pass filter are designed together to form a loop filter, and the combined gain G lf Instead of selecting constants C1 and C2, the expression is as follows:

[0020] O lf (t+1)=0 lf (t)+G lf V D (t)

[0021] Among them, O lf (t),O lf (t+1) are the outputs of the loop filter at time t and time t+1 respectively.

[0022] Furthermore, after the Costas loop completes processing of each symbol block, the demodulation loop output signal is subjected to correlation analysis with the locally reconstructed constellation diagram, and the error is calculated as a feedback amount to dynamically adjust the joint gain value.

[0023] Furthermore, the Costas loop performs iterative verification on a symbol-by-symbol basis. Specifically, the time-domain sampling points of each symbol are phase-aligned to eliminate residual frequency offset errors. Cyclic redundancy checks are continuously performed during each retransmission by the NB-IoT terminal to determine the reliability of the current data packet. When the cyclic redundancy check passes, the final frequency- and phase-corrected symbol sequence is output.

[0024] Furthermore, the corrected symbols are input into the NB-IoT narrowband channel estimation module to extract the channel impulse response, and the compensation parameters of the Costas loop, namely the joint gain and sliding window length, are dynamically adjusted according to the delay spread and multipath strength.

[0025] Furthermore, hardware-level optimization is performed on the resource constraints of software-defined radio devices. This includes: for USRP, the floating-point calculations of the Costas loop are converted to 8-bit fixed-point operations, and CUDA acceleration is used to implement parallel pipeline processing of phase detection and compensation; for USRP, the hardware acceleration module of the Costas loop is deployed through the FPGA programmable interface to match the peak rate requirements of NB-IoT; and a symbol block-level sleep mechanism is implemented on the software-defined radio device to disable the calculation function of the Costas loop when there is no data input.

[0026] Furthermore, the symbol correction method is compatible with at least one of the following narrowband Internet of Things protocols: the 3.75kHz single-carrier uplink mode in the NB-IoT protocol, and the situation where only a single carrier is used in the 15kHz uplink mode in the NB-IoT protocol; the symbol correction method supports joint correction with the downlink, including: using the downlink reference signal to pre-calibrate the initial frequency offset of the Costas loop, optimizing the joint gain and sliding window length through the reciprocity of the uplink and downlink channels, and multiplexing the Costas loop hardware resources in the time division duplex (TDD) mode.

[0027] According to a second aspect of this specification, a narrowband Internet of Things uplink single-carrier symbol correction system based on a Costas loop is provided, the system comprising:

[0028] The signal receiving and preprocessing module is used to receive the NB-IoT uplink single-carrier signal through the software radio equipment, extract the time domain symbol sequence and split it into several symbol blocks, perform initial frequency offset estimation and compensation on the symbol blocks, and then perform downsampling processing to obtain a downsampled sequence;

[0029] A frequency correction module, configured to construct a Costas loop correction structure, input the down-sampling sequence of the symbol block into the Costas loop correction structure, and complete frequency offset estimation of the down-sampling sequence;

[0030] The phase correction module is used to perform phase rotation on the symbol constellation diagram using the demodulation result of the NB-IoT uplink demodulation reference signal to complete phase correction;

[0031] The signal output module is used to output the symbol sequence after frequency and phase correction to the demodulation module.

[0032] According to a third aspect of this specification, an electronic device is provided, comprising a memory and a processor, wherein the memory is coupled to the processor; wherein the memory is used to store program data, and the processor is used to execute the program data to implement the narrowband Internet of Things uplink single-carrier symbol correction method based on Costas loop as described in the first aspect.

[0033] According to a fourth aspect of this specification, a computer-readable storage medium is provided, on which a computer program is stored. When the program is executed by a processor, the narrowband Internet of Things uplink single-carrier symbol correction method based on Costas loop as described in the first aspect is implemented.

[0034] According to a fifth aspect of this specification, a computer program product is provided, comprising a computer program / instruction, which, when executed by a processor, implements the narrowband Internet of Things uplink single-carrier symbol correction method based on Costas loop as described in the first aspect.

[0035] The beneficial effects of the present invention are as follows: the symbol correction method and system of the present invention support the narrowband Internet of Things protocol specifications specified in 3GPP Release 13. The present invention innovatively combines the Costas loop with the narrowband Internet of Things uplink characteristics, uses software radio equipment to collect NB-IoT uplink single-carrier signals, reconstructs the Costas loop correction structure, jointly designs the nonlinear phase detector and the low-pass filter, and fuses the parameters in the system function of the low-pass filter to form a loop filter with joint gain. The DDS module is used to replace the VCO in the traditional Costas loop design. Based on the error signal output by the Costas loop, the symbol frequency offset and phase distortion are dynamically compensated, thereby completing the demodulation of the real narrowband RF signal. In single-carrier mode, field signal collection and testing were carried out for common narrowband Internet of Things usage environments such as indoors, corridors, playgrounds, roads and factories, verifying the feasibility of the present invention. Compared with existing hardware implementation strategies, the present invention has made a special design for the single-carrier mode, which can significantly reduce the communication bit error rate compared with traditional channel estimation schemes. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0037] Figure 1 This is a flowchart of a narrowband Internet of Things uplink single-carrier symbol correction method based on a Costas loop, illustrating an exemplary embodiment;

[0038] Figure 2 Schematic diagram of the structure of a Costas ring shown in an exemplary embodiment;

[0039] Figure 3 FIG1 is a symbol constellation diagram before Costas ring shown in an exemplary embodiment;

[0040] Figure 4 FIG1 is a symbol constellation diagram after Costas ring, shown in an exemplary embodiment;

[0041] Figure 5 The figure is a schematic structural diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0042] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0043] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0044] The terms used in the embodiments of the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0045] This invention deeply integrates Costas loop closed-loop control theory with innovative software-defined radio hardware architectures to address symbol distortion issues caused by Doppler shift, crystal oscillator drift, and multipath interference in the NB-IoT uplink. It proposes an adaptive correction method and system based on dynamic compensation. Within the 3GPP Release 13 standard framework, this solution focuses on overcoming the frequency offset tracking bottleneck of traditional phase-locked loops (PLLs) in low signal-to-noise ratio (SNR) narrowband scenarios. By introducing a nonlinear phase compensation mechanism for the Costas loop, this solution achieves symbol-level distortion correction and optimizes energy efficiency for resource-constrained devices.

[0046] like Figure 1 As shown, the present invention provides a narrowband Internet of Things uplink single-carrier symbol correction method based on Costas loop, and the specific implementation steps are as follows:

[0047] S1: Uplink single-carrier signal reception and preprocessing, specifically including the following sub-steps:

[0048] Step S1.1: Receive the NB-IoT uplink single-carrier signal sent by the NB-IoT terminal through the RF front-end of a software-defined radio device such as the USRP N210 or HackRF One. After down-conversion and analog-to-digital conversion, the signal is filtered through a bandpass filter to suppress out-of-band interference and extract the time domain symbol sequence.

[0049] Step S1.2: Initially locate the data packet using an envelope detection algorithm. Leveraging the high-precision clock synchronization capabilities of the software-defined radio (SDR) equipment, the time-domain symbol sequence is segmented into fixed-length symbol blocks (e.g., 128 samples per block), each corresponding to a single symbol. Initial frequency offset estimation and compensation are performed for each symbol block. This initial frequency offset estimation utilizes a cyclic prefix-based autocorrelation algorithm combined with a pilot symbol cross-correlation algorithm to keep the frequency offset error within ±50 Hz.

[0050] Step S1.3: Downsampling is performed on the compensated symbol block, for example, the sampling rate is reduced to 1 / 2 of the original sampling rate to adapt it to the symbol rate detection range of the Costas loop, and a downsampling sequence of each symbol block is obtained.

[0051] S2: Costas ring construction and distortion analysis, including the following sub-steps:

[0052] Step S2.1: Construct a Costas loop correction structure based on the down-sampling sequence of the symbol block. The Costas loop correction structure is a closed-loop feedback structure composed of a nonlinear phase detector, a low-pass filter, and a digital frequency synthesis (DDS) module.

[0053] In the nonlinear phase detector, a sliding window (for example, the window length is set to 1 / 8 of the symbol block length) is used to extract the phase difference sequence of adjacent sampling points and identify the local distortion characteristics of the symbol waveform. In this design, the phase detector used is an I / Q path separation type symbol phase detection method, and its specific expression is:

[0054] V D (t) = s Q (t)Sing(s I (t))-s I (t)Sign(s Q (t))

[0055] Among them, V D (t) represents the output of the phase detector and the input of the low-pass filter, s I (t) and s Q (t) denotes the real part and imaginary part of the down-sampled sequence s(t) of the symbol block at time t, and Sign(·) denotes the sign function.

[0056] The output signal of the nonlinear phase detector is sent to a low-pass filter for processing. The system function F(z) designed for the low-pass filter is expressed as follows:

[0057]

[0058] Among them, z is a complex variable on the complex plane, C1 and C2 are constants, which can be flexibly set according to the actual use scenario. The most important influencing factor involved is the modulation mode of the signal. From the perspective of digital signal processing algorithm design, it is advisable to jointly design the phase detector and the low-pass filter, and integrate some parameters to reduce the experimental cost of parameter determination. Based on this, the present invention combines the low-pass filter and the phase detector expression into a loop filter, and uses the joint gain G lf Instead of selecting constants C1 and C2, the expression is as follows:

[0059] O lf (t+1)=0 lf (t)+G lf V D (t)

[0060] Among them, O lf The corresponding output of the loop filter is the output of the original low-pass filter. This signal is actually the frequency error signal of the down-sampled sequence of the symbol block, which is sent to the DDS module as an excitation signal for subsequent iterative processing of the signal. Considering the simplicity of the digital signal processing algorithm, the present invention uses a DDS module to replace the voltage-controlled oscillator (VCO) in the traditional Costas loop design, which can directly generate a phase as its input value. lf oscillation signal.

[0061] Step S2.2: Input the down-sampling sequence s(t) of the symbol block into the Costas loop, start the closed-loop feedback frequency offset correction process, and complete the frequency offset estimation of the down-sampling sequence. The specific structure of the Costas loop is as follows: Figure 2 As shown. The final loop output signal s o (t) = s I (t)+js Q (t), where j is the imaginary unit.

[0062] After iterative distortion analysis, the NB-IoT uplink single-carrier signal has completed frequency offset correction, and its symbol constellation has the obvious four-block cluster characteristics of QPSK modulation symbols. However, since the initial phase offset cannot be corrected using the Costas loop, it is necessary to use the demodulation result of the NB-IoT uplink demodulation reference signal (DMRS) to perform complex multiplication phase rotation on the symbol constellation phase.

[0063] An iterative check is performed on a symbol-by-symbol basis within the Costas loop. Specifically, the phase of each symbol's time-domain sampling point is aligned to eliminate residual frequency offset errors, further eliminating constellation ambiguity caused by frequency offset and noise during communication. Given the low power consumption of NB-IoT terminals, the signal-to-noise ratio (SNR) is often low. Therefore, a cyclic redundancy check (CRC) is performed continuously during each retransmission to ensure the reliability of the current data packet. If the CRC passes, the final frequency- and phase-corrected symbol sequence is output.

[0064] Experiments show that when the HackRF One platform is used as a RF receiver, the correction delay of a single symbol block is less than 200μs, and after three iterations, the error is reduced from 22% to below 3.5%.

[0065] S3: Narrowband channel adaptation and resource optimization, including the following sub-steps:

[0066] Step S3.1: Input the corrected symbols into the NB-IoT narrowband channel estimation module (MMSE), extract the channel impulse response (CIR), and dynamically adjust the Costas loop compensation parameters, namely the joint gain and sliding window length, according to the delay spread and multipath strength.

[0067] Step S3.2: Perform hardware-level optimization based on the resource limitations of the SDR device, specifically:

[0068] The concept of fixed-point arithmetic and parallelization: For the software-defined radio device USRP N210, the floating-point calculations of the Costas loop are converted to 8-bit fixed-point arithmetic, and CUDA is used to accelerate the parallel pipeline processing of phase detection and compensation, reducing the FPGA resource utilization of the USRPN210 to 35%.

[0069] Power consumption control: Implementing a symbol-block-level sleep mechanism on software-defined radio devices such as the HackRF One or USRP N210 reduces power consumption by disabling the Costas loop calculation function when no data is input.

[0070] Step S3.3: Targeting the software-defined radio device USRP N210, deploy the Costas Ring hardware acceleration module through its FPGA programmable interface to achieve a processing throughput of 150,000 symbols per second, fully matching the peak rate requirements of NB-IoT.

[0071] S4: SDR experimental verification and performance evaluation, including the following sub-steps:

[0072] Step S4.1: Build a dual-node closed-loop test platform, use the USRP N210 to simulate the base station receiver and the HackRFOne to simulate the terminal transmitter, and verify the performance of the solution in a real channel scenario.

[0073] Step S4.2: Under the extreme conditions of a frequency deviation of ±7kHz and a signal-to-noise ratio (SNR) of 3dB, the method of the present invention reduces the symbol error rate (SER) from 14% of the traditional LMS equalizer to 0.7%, and the end-to-end delay is less than 1.5ms.

[0074] Step S4.3: The Costas loop iteration process is monitored in real time through HackRF’s visual debugging interface, enabling engineers to quickly locate distortion sources and optimize parameters, improving debugging efficiency by 60%.

[0075] The adaptive parameter configuration of the Costas loop in the present invention includes: 1) dynamically adjusting the joint gain of the loop filter according to the signal-to-noise ratio; 2) dynamically adjusting the sliding window length of the phase detector based on the current signal quality.

[0076] The symbol correction method of the present invention is compatible with at least one of the following narrowband Internet of Things protocols: ① 3.75kHz single-carrier uplink mode in the NB-IoT protocol; ② 15kHz uplink mode in the NB-IoT protocol using only a single carrier;

[0077] The symbol correction method of the present invention supports joint correction with the downlink, including: 1) pre-calibrating the initial frequency offset of the Costas loop using a downlink reference signal (NRS); 2) optimizing the joint gain and sliding window length through uplink and downlink channel reciprocity; and 3) multiplexing Costas loop hardware resources in time division duplex (TDD) mode.

[0078] The above-mentioned narrowband IoT uplink single-carrier symbol correction method based on Costas loop can achieve the following technical effects:

[0079] ① High Precision and Low Complexity: The local feedback mechanism of the Costas loop reduces the computational complexity to 25% of traditional equalization algorithms, achieving 99.5% symbol recovery accuracy on the USRP N210.

[0080] ② Anti-interference capability: In a multipath environment with ±7kHz frequency deviation and 15μs delay spread, the bit error rate (BER) is stably lower than 10 -5 , which is two orders of magnitude higher than the existing solution.

[0081] ③SDR platform adaptability: supports mixed deployment of HackRF and USRP, and does not require additional development compared to Raspberry Pi or FPGA solutions.

[0082] ④ Narrowband optimization: The compensation frequency domain range is limited to the 180kHz narrowband characteristic to avoid out-of-band noise interference, and the downsampling technology reduces the calculation amount by 50%.

[0083] In the following example, the hardware layer utilizes a dual-platform collaborative architecture, combining the USRP N210 Universal Software Radio (SDR) and the HackRF One. The software layer deploys a real-time signal processing pipeline and FPGA hardware acceleration modules, forming an end-to-end correction link from the RF front-end to baseband processing. This full link was verified on both the HackRF One and the USRP N210, significantly improving symbol demodulation accuracy and end-to-end communication system energy efficiency. The following describes the detailed implementation of this example.

[0084] (1) Hardware platform construction, signal reception and preprocessing

[0085] At the RF receiver, a USRP N210 is used as the main processing node, configured for single-antenna reception. The center frequency is set to the 800MHz band, in compliance with the 3GPP Band 20 specification. The default sampling rate is 1.92MHz, matching the minimum resolution requirements for different NB-IoT bandwidth modes. During hardware preprocessing, the received uplink single-carrier signal undergoes a two-stage downconversion operation. The first stage uses the ADL5375 RF chip (UBX-40 RF daughterboard) to perform analog mixing, shifting the signal to a 70MHz intermediate frequency (IF). The second stage implements orthogonal demodulation in the digital domain to generate I / Q baseband signals. To address the phase continuity requirements unique to narrowband signals, the analog-to-digital conversion stage uses a 12-bit ADC, coupled with an anti-aliasing filter bank (cutoff frequency ±100kHz, roll-off factor 0.25) to ensure greater than 40dB of out-of-band interference suppression, allowing the extraction of the time-series symbol sequence.

[0086] After preprocessing, the time domain symbol sequence enters the symbol segmentation module. Based on the NB-IoT single-carrier frequency division multiple access (SC-FDMA) frame structure, the time domain symbol sequence is divided into blocks of a fixed length of 128 sampling points. A 10 / 9-point cyclic prefix is extracted from the head of each symbol block (based on the position of the current symbol block in the time slot). In the initial frequency offset estimation stage, a composite estimation algorithm combining the cyclic prefix and pilot symbols is designed: first, the coarse frequency offset estimate is calculated using the cyclic prefix correlation, and the frequency offset error is converged to a range of ±200Hz through complex rotation compensation; then, the Zadoff-Chu sequence pilot symbols preset in the frame are extracted, and the least squares frequency offset fine estimation is performed, ultimately controlling the frequency offset error to within ±50Hz.

[0087] The downsampling stage uses a polyphase filter bank to achieve 2x extraction, compressing the data processing volume to 50% of the original signal while maintaining a symbol rate of 7.5ksps, providing computing power redundancy for subsequent real-time processing.

[0088] (2) Costas ring correction core structure design

[0089] A Costas loop correction structure is constructed, which is a closed-loop feedback structure consisting of a nonlinear phase detector, a low-pass filter, and a DDS module.

[0090] Nonlinear phase detector: Utilizing a sliding window differencing algorithm, the window length is dynamically adjusted between 8 and 32 sampling points, adaptively selected based on the signal-to-noise ratio (SNR) detection result: when the SNR is greater than 10dB, a short window (8 points) is activated to improve response speed; when the SNR is less than 5dB, a long window (32 points) is switched to enhance noise immunity. In its implementation, complex conjugate multiplication is performed on adjacent sampling points within the window to extract the phase difference sequence.

[0091] Low-pass filter: A nonlinear phase detector and low-pass filter are jointly designed, and the parameters of the low-pass filter's system function are integrated to form a loop filter with joint gain and dynamically adjustable loop bandwidth. After processing each symbol block, the demodulation loop output signal is correlated with the locally reconstructed QPSK constellation. The calculated error is used as feedback to dynamically adjust the joint gain.

[0092] DDS module: Based on the output signal of the loop filter, an oscillation signal with a specific phase is generated and multiplied with the down-sampled sequence of the input symbol block to obtain the loop output signal s o (t).

[0093] (3) Resource constraint optimization and energy efficiency improvement

[0094] To address the stringent power consumption constraints of narrowband IoT terminals, a low-power adaptive architecture was implemented on the HackRF One platform. A symbol-block-level sleep mechanism was deployed at the hardware level. When the FPGA detects that the error for three consecutive symbol blocks is less than 5%, the Costas loop calculation function is automatically disabled, maintaining only the basic frequency deviation tracking loop, reducing overall power consumption from 2.8W to 0.7W. When the error fluctuation exceeds the threshold, an interrupt wake-up mechanism restores full functionality within 200μs. Fixed-point conversion was implemented at the algorithm level, converting the Costas loop's floating-point calculations to 8-bit fixed-point operations, thereby reducing computational overhead.

[0095] (4) Multi-scenario verification and performance analysis

[0096] A closed-loop test platform consisting of USRP N210, HackRF One, and commercial NB-IoT terminals was built, and comprehensive testing was conducted in practical NB-IoT application scenarios such as teaching buildings, playgrounds, and roads and factories. Under extreme test conditions (factory environment, where the calculated frequency deviation can reach over 8kHz), the system demonstrated excellent robustness: after 5 iterations of the Costas loop, the constellation diagram clearly converged (the constellation diagrams before and after the Costas loop are as follows: Figure 3 、 Figure 4As shown in the figure, the symbol error rate (SER) is stabilized in the range of 0.7%-1.2%, which is 98.5% lower than when correction is not enabled; the end-to-end processing delay is controlled within 1.2ms, meeting the 1ms delay requirement of 3GPP for URLLC services. After actual deployment tests, during uplink transmission in the 800MHz frequency band, the average bit error events dropped sharply from 950 times before correction to 12 times, and the additional power consumption of the terminal due to retransmission dropped by 76%. Through the visual debugging interface, the symbol constellation convergence process and EVM heat map can be observed in real time to quickly locate crystal oscillator anomalies caused by equipment aging. It is worth mentioning that this strategy has strong generalization for the uplink side of various low-power IoT terminals that use frequency shift keying as the modulation scheme, and can be well migrated and applied.

[0097] The technical value of the solution of the present invention lies in overcoming the symbol correction problem of the narrowband Internet of Things uplink in a high-dynamic, low signal-to-noise ratio environment. For example, in extreme scenarios with a frequency deviation of up to ±2.5kHz, its symbol error rate can be lower than 10-3, which is more than three times higher than that of traditional solutions. Through the lightweight Costas loop algorithm, the computational complexity is reduced by 60%, adapting to the low power consumption constraints of the terminal equipment. The dynamic parameter loading mechanism makes a single hardware platform compatible with multiple protocols, reducing the cost of base station upgrades. As 5G-A and 6G evolve towards an integrated air-space-ground network, narrowband Internet of Things will be widely used in non-terrestrial network scenarios. The present invention provides key technical support for reliable transmission in high-dynamic, large frequency deviation environments, and has significant industrialization prospects.

[0098] On the other hand, an embodiment of the present invention provides a narrowband Internet of Things uplink single-carrier symbol correction system based on a Costas loop, which is used to implement the above-mentioned narrowband Internet of Things uplink single-carrier symbol correction method based on a Costas loop. The system includes:

[0099] The signal receiving and preprocessing module is used to receive the NB-IoT uplink single-carrier signal through the software radio equipment, extract the time domain symbol sequence and split it into several symbol blocks, perform initial frequency offset estimation and compensation on the symbol blocks, and then perform downsampling processing to obtain a downsampled sequence;

[0100] A frequency correction module, configured to construct a Costas loop correction structure, input the down-sampling sequence of the symbol block into the Costas loop correction structure, and complete frequency offset estimation of the down-sampling sequence;

[0101] The phase correction module is used to perform phase rotation on the symbol constellation diagram using the demodulation result of the NB-IoT uplink demodulation reference signal to complete phase correction;

[0102] The signal output module is used to output the symbol sequence after frequency and phase correction to the demodulation module.

[0103] Regarding the system in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0104] For the system embodiment, since it basically corresponds to the method embodiment, the relevant parts can be referred to the partial description of the method embodiment. The system embodiment described above is only illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this application. A person of ordinary skill in the art can understand and implement it without paying any creative work.

[0105] Accordingly, the present application also provides an electronic device, comprising: one or more processors; a memory for storing one or more programs; when the one or more programs are executed by the one or more processors, the one or more processors implement the above-mentioned narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop. Figure 5 As shown, a hardware structure diagram of any device with data processing capability for the narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop provided by an embodiment of the present invention is shown. Figure 5 In addition to the processor, memory, and network interface shown, any device with data processing capabilities in which the apparatus in the embodiment is located may also include other hardware, generally based on the actual functions of the device with data processing capabilities, which will not be described in detail.

[0106] Accordingly, the present application also provides a computer-readable storage medium having computer instructions stored thereon, which, when executed by a processor, implement the narrowband Internet of Things uplink single-carrier symbol correction method based on Costas loop as described above. The computer-readable storage medium may be an internal storage unit of any device with data processing capabilities described in any of the aforementioned embodiments, such as a hard disk or memory. The computer-readable storage medium may also be an external storage device, such as a plug-in hard disk, a smart memory card (Smart Media Card, SMC), an SD card, a flash card (FlashCard), etc. equipped on the device. Furthermore, the computer-readable storage medium may also include both an internal storage unit and an external storage device of any device with data processing capabilities. The computer-readable storage medium is used to store the computer program and other programs and data required by any device with data processing capabilities, and may also be used to temporarily store data that has been output or is to be output.

[0107] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the contents disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only.

[0108] It will be understood that the present application is not limited to the exact construction that has been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof.

[0109] The above description is only a preferred embodiment of the present invention. Although the present invention has been disclosed as a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can use the above disclosed methods and technical contents to make many possible changes and modifications to the technical solution of the present invention without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment with equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiment based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A narrowband Internet of Things uplink single-carrier symbol correction method based on Costas loop, characterized in that: include: S1, receives the NB-IoT uplink single-carrier signal through software radio equipment, extracts the time domain symbol sequence and divides it into several symbol blocks, performs initial frequency offset estimation and compensation on the symbol blocks, and then performs downsampling processing to obtain a downsampled sequence; S2, constructing a Costas loop correction structure, inputting the down-sampling sequence of the symbol block into the Costas loop correction structure, and completing frequency offset estimation of the down-sampling sequence; The Costas loop correction structure is a closed-loop feedback structure consisting of a nonlinear phase detector, a low-pass filter, and a digital frequency synthesis module. The phase detector extracts a phase difference sequence through a sliding window, adopts an I / Q path separation type symbol phase detection method, and sends the output signal to the low-pass filter. The phase detector and the low-pass filter are jointly designed, and the parameters in the system function of the low-pass filter are integrated to form a loop filter with a joint gain. The output signal of the loop filter is sent to a digital frequency synthesis module to generate an oscillation signal with a phase equal to the input value, and the oscillation signal is multiplied by the down-sampled sequence of the input symbol block to obtain a loop output signal. S3 uses the demodulation result of the NB-IoT uplink demodulation reference signal to rotate the phase of the symbol constellation diagram, completes the phase correction, and outputs the symbol sequence after frequency and phase correction.

2. The narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop according to claim 1, characterized in that: The extraction of the time domain symbol sequence is specifically as follows: the NB-IoT uplink single-carrier signal is received, down-converted and analog-to-digital converted, and then the out-of-band interference is suppressed through a bandpass filter to extract the time domain symbol sequence; the initial frequency offset estimation adopts an autocorrelation algorithm based on a cyclic prefix and a cross-correlation algorithm combined with pilot symbols.

3. The narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop according to claim 1, characterized in that: The extraction of the phase difference sequence in the phase detector is specifically as follows: a sliding window difference algorithm is used to perform complex conjugate multiplication operations on adjacent sampling points in the window to extract the phase difference sequence. The window length is dynamically adjusted between 8 and 32 sampling points, and adaptively selected based on the SNR detection result: when the SNR is greater than 10dB, a short window is enabled; when the SNR is less than 5dB, a long window is switched.

4. The narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop according to claim 1, characterized in that: The expression of the I / Q path separation type symbol phase detection method adopted by the phase detector is: V D (t)=s Q (t)Sing(s I (t))-s I (t)Sign(s Q (t)) Among them, V D (t) represents the output of the phase detector and the input of the low-pass filter, s I (t) and s Q (t) denotes the real and imaginary parts of the downsampled sequence s(t) of the symbol block at time t, respectively, and Sign(·) denotes the sign function; The system function F(z) of the low-pass filter is expressed as follows: Where z is a complex variable on the complex plane, C1 and C2 are constants; The phase detector and the low-pass filter are designed together to form a loop filter, and the combined gain G lf Instead of selecting constants C1 and C2, the expression is as follows: O lf (t+1)=O lf (t)+G lf V D (t) Among them, O lf (t),O lf (t+1) are the outputs of the loop filter at time t and time t+1 respectively.

5. The narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop according to claim 1, characterized in that: After the Costas loop completes processing of each symbol block, the demodulation loop output signal is subjected to correlation analysis with the locally reconstructed constellation diagram, and the error is calculated as feedback to dynamically adjust the joint gain value.

6. The narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop according to claim 1, characterized in that: The Costas loop performs iterative verification on a symbol-by-symbol basis. Specifically, the time-domain sampling points of each symbol are phase-aligned to eliminate residual frequency offset errors. A cyclic redundancy check is continuously performed during each retransmission by the NB-IoT terminal to determine the reliability of the current data packet. When the cyclic redundancy check passes, the final frequency- and phase-corrected symbol sequence is output.

7. The narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop according to claim 1, characterized in that: The corrected symbols are input into the NB-IoT narrowband channel estimation module to extract the channel impulse response and dynamically adjust the Costas loop compensation parameters, namely the joint gain and sliding window length, based on the delay spread and multipath strength.

8. The narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop according to claim 1, characterized in that: Hardware-level optimization of the resource constraints of software-defined radio devices is performed. This includes: for USRP, converting the floating-point calculations of the Costas loop into 8-bit fixed-point operations, and implementing parallel pipeline processing of phase detection and compensation through CUDA acceleration; deploying a hardware acceleration module for the Costas loop through the FPGA programmable interface for the USRP to match the peak rate requirements of NB-IoT; and implementing a symbol block-level sleep mechanism on the software-defined radio device to disable the Costas loop calculation function when there is no data input.

9. The narrowband Internet of Things uplink single carrier symbol correction method based on Costas loop according to claim 1, characterized in that: The symbol correction method is compatible with at least one of the following narrowband Internet of Things protocols: the 3.75kHz single-carrier uplink mode in the NB-IoT protocol, and the 15kHz uplink mode in the NB-IoT protocol using only a single carrier; The symbol correction method supports joint correction with the downlink, including: using a downlink reference signal to pre-calibrate the initial frequency offset of the Costas loop, optimizing the joint gain and sliding window length through uplink and downlink channel reciprocity, and multiplexing Costas loop hardware resources in time division duplex (TDD) mode.

10. A narrowband Internet of Things uplink single-carrier symbol correction system based on Costas loop, characterized in that: For implementing the method according to any one of claims 1 to 9, the system comprises: The signal receiving and preprocessing module is used to receive the NB-IoT uplink single-carrier signal through the software radio equipment, extract the time domain symbol sequence and split it into several symbol blocks, perform initial frequency offset estimation and compensation on the symbol blocks, and then perform downsampling processing to obtain a downsampled sequence; A frequency correction module, configured to construct a Costas loop correction structure, input the down-sampling sequence of the symbol block into the Costas loop correction structure, and complete frequency offset estimation of the down-sampling sequence; The phase correction module is used to perform phase rotation on the symbol constellation diagram using the demodulation result of the NB-IoT uplink demodulation reference signal to complete phase correction; The signal output module is used to output the symbol sequence after frequency and phase correction to the demodulation module.

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