Display panel

Abstract

The invention provides a display panel which comprises a first substrate, a second substrate, a plurality of pixel structures and a liquid crystal layer. The first substrate and the second substrate are overlapped with each other. The plurality of pixel structures are arranged on the first substrate and are respectively provided with a plurality of reflection patterns. Each of the reflection patterns is divided into a plurality of reflection parts by a plurality of micro-gaps, and the reflection parts are connected with each other. The liquid crystal layer is arranged between the first substrate and the second substrate.

Description

Technical Field

[0001] The present invention relates to a display technology, and in particular to a display panel. Background Art

[0002] Because reflective display panels utilize a reflective layer to reflect ambient light, they offer the advantage of low energy consumption. To increase reflection efficiency, the reflective layer is typically made of a high-reflectivity metal material, and its distribution within the display pixel area is maximized. However, this approach also increases the risk of dark-state light leakage, which can occur due to manufacturing process factors, leading to poor display contrast. Summary of the Invention

[0003] The present invention is directed to a display panel having better dark state performance and display contrast.

[0004] According to an embodiment of the present invention, a display panel includes a first substrate, a second substrate, a plurality of pixel structures, and a liquid crystal layer. The first substrate and the second substrate are arranged to overlap each other. The plurality of pixel structures are arranged on the first substrate, and each pixel structure is provided with a plurality of reflective patterns. Each of the reflective patterns is divided into a plurality of reflective portions by a plurality of micro-slits, and the reflective portions are interconnected. The liquid crystal layer is arranged between the first substrate and the second substrate.

[0005] In a display panel according to an embodiment of the present invention, a plurality of reflective patterns are arranged in a first direction and a second direction, respectively, with intervals therebetween. The first direction intersects the second direction. Each reflective pattern has a first side edge and a second side edge arranged along the first direction. The plurality of micro-slits include a plurality of first micro-slits extending in a direction parallel to the first direction, and the first micro-slits extend from the first side edge.

[0006] In the display panel according to the embodiment of the present invention, each reflective pattern further has a third side edge and a fourth side edge arranged along the second direction, and a plurality of first micro slits are arranged at equal intervals between the third side edge and the fourth side edge along the second direction.

[0007] In the display panel according to an embodiment of the present invention, the plurality of micro slits further includes a plurality of second micro slits extending from the second side edge and extending in a direction parallel to the first direction. The second micro slits are arranged at equal intervals between the third side edge and the fourth side edge along the second direction, and the second micro slits are aligned with the plurality of first micro slits along the first direction.

[0008] In the display panel according to the embodiment of the present invention, the plurality of micro slits further include a plurality of third micro slits extending from the first side edge, and an extending direction of each of the third micro slits intersects the first direction and the second direction.

[0009] In the display panel according to the embodiment of the present invention, the plurality of micro slits further include a plurality of fourth micro slits extending from the second side edge, and an extending direction of each of the fourth micro slits intersects the first direction and the second direction.

[0010] In the display panel according to the embodiment of the present invention, the included angle between the extension direction of each third micro slit and the first side edge is 45 degrees, and the included angle between the extension direction of each fourth micro slit and the second side edge is 45 degrees.

[0011] In the display panel according to an embodiment of the present invention, a first plurality of third micro slits and a second plurality of third micro slits are provided between any two adjacent ones of the first plurality of micro slits, the third side edge, and the fourth side edge, and the extension direction of the first plurality of third micro slits intersects the extension direction of the second plurality of third micro slits.

[0012] In the display panel according to an embodiment of the present invention, a first plurality of fourth micro slits and a second plurality of fourth micro slits are provided between any two adjacent ones of the second plurality of second micro slits, the third side edge, and the fourth side edge, and the extension direction of the first plurality of fourth micro slits intersects the extension direction of the second plurality of fourth micro slits.

[0013] In the display panel according to the embodiment of the present invention, the plurality of first micro slits and the plurality of third micro slits are alternately arranged along the second direction, and the plurality of second micro slits and the plurality of fourth micro slits are alternately arranged along the second direction.

[0014] In the display panel according to an embodiment of the present invention, the plurality of micro slits further include a plurality of third micro slits extending in a direction parallel to the second direction, and at least some of the third micro slits do not extend from the first side edge, the second side edge, the third side edge, and the fourth side edge.

[0015] In a display panel according to an embodiment of the present invention, the plurality of pixel structures include a plurality of edge pixel structures adjacent to an edge of a display area and arranged along a first direction. The reflective pattern of each edge pixel structure has a first side edge and a second side edge arranged along the first direction. The plurality of microslits in the reflective pattern of each edge pixel structure include a plurality of first microslits extending from the first side edge and spaced apart along a second direction. The second direction intersects the first direction. The extension direction of the first microslits is parallel to the first direction. The spacing between any two adjacent first microslits along the second direction decreases as they approach the edge of the display area.

[0016] In the display panel according to the embodiment of the present invention, each of the plurality of pixel structures has an active device, and the plurality of reflective patterns are electrically connected to the plurality of active devices of the pixel structures, respectively.

[0017] In the display panel according to the embodiment of the present invention, each of the plurality of pixel structures has an active device and a pixel electrode electrically connected to each other, and each of the plurality of reflective patterns overlaps with the plurality of pixel electrodes of the pixel structures.

[0018] Based on the foregoing, in a display panel according to one embodiment of the present invention, the reflective pattern of the pixel structure is divided into a plurality of interconnected reflective portions by a plurality of micro-slits. The micro-slits between these reflective portions effectively reduce the dark-state brightness of the display panel, thereby improving its display contrast. Furthermore, the provision of these micro-slits can also improve the uniformity of the display brightness of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a front view schematic diagram of a display panel according to a first embodiment of the present invention;

[0020] Figure 2 is a schematic cross-sectional view of a display panel according to a first embodiment of the present invention;

[0021] Figure 3 yes Figure 1 An enlarged schematic diagram of a reflection pattern of a pixel structure;

[0022] Figures 4A to 4D yes Figure 3 Schematic front views of other modified embodiments of the reflection pattern;

[0023] Figure 5 is a schematic front view of a display panel according to a second embodiment of the present invention;

[0024] Figures 6A to 6C for Figure 5 An enlarged schematic diagram of multiple local areas of a display panel;

[0025] Figure 7 is a schematic cross-sectional view of a display panel according to a third embodiment of the present invention.

[0026] Description of Reference Numerals

[0027] 10, 20, 30: display panel;

[0028] 101: first substrate;

[0029] 101s: substrate surface;

[0030] 102: second substrate;

[0031] 110: gate insulating layer;

[0032] 120, 130: insulation layer;

[0033] A1a, A1b, A2a, A2b: angle;

[0034] CPX: central pixel structure;

[0035] D1, D2, D3: direction;

[0036] DA: display area;

[0037] DAe1, DAe2: display area edges;

[0038] DE: drain;

[0039] EPX1, EPX2: edge pixel structure;

[0040] GE: gate;

[0041] LCL: liquid crystal layer;

[0042] OP: Opening;

[0043] PE, PE-A: pixel electrodes;

[0044] PX, PX-A, PX-B: pixel structure;

[0045] RA: reflex area;

[0046] RP, RP”, RP-A, RP-B, RP-C, RP-D, RP-E, RP-F: reflection pattern;

[0047] RPe1~RPe4: first lateral edge~fourth lateral edge;

[0048] RPp: reflective part;

[0049] S1, S2, S1”, S2”, S3: spacing;

[0050] SC: semiconductor pattern;

[0051] SE: source;

[0052] SLT1, SLT1-A: first micro gap;

[0053] SLT2, SLT2-A: second micro gap;

[0054] SLT3a, SLT3b, SLT3c, SLT3c″: third micro gap;

[0055] SLT4a, SLT4b: fourth microslit;

[0056] T: active element;

[0057] TA: translucent area;

[0058] TH: contact hole;

[0059] Z1, Z2, Z3: zones. DETAILED DESCRIPTION

[0060] The foregoing and other technical aspects, features, and benefits of the present invention will be more clearly understood in the following detailed description of a preferred embodiment with reference to the accompanying drawings. Directional terms such as up, down, left, right, front, and back, used in the following embodiments, are merely references to the accompanying drawings. Therefore, the directional terms used are for illustrative purposes only and are not intended to limit the present invention.

[0061] The use of ordinal numbers such as "first" and "second" in the specification and claims to modify an element does not, by itself, imply or indicate any prior ordinal number of the element (or elements), nor does it indicate the order of one element relative to another or the order of manufacturing methods. The use of multiple ordinal numbers is solely to distinguish one element with a certain name from another element with the same name. The specification and claims do not necessarily use the same terminology; accordingly, the first element in the specification may be the second element in the claims.

[0062] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0063] Figure 1 is a schematic front view of a display panel according to a first embodiment of the present invention. Figure 2 is a schematic cross-sectional view of a display panel according to a first embodiment of the present invention. Figure 3 yes Figure 1 An enlarged schematic diagram of the reflection pattern of the pixel structure. Figures 4A to 4D yes Figure 3 Schematic front views of other modified embodiments of the reflection pattern. Figure 3 Corresponding to Figure 1 For clarity of presentation, Figure 1 Only shown Figure 2 Part of the membrane layer, Figure 3 Only shown Figure 2 The reflection pattern RP.

[0064] Please refer to Figure 1 and Figure 2 The display panel 10 includes a first substrate 101, a second substrate 102, and a liquid crystal layer LCL. The first substrate 101 and the second substrate 102 are arranged to overlap, for example, along direction D3. The liquid crystal layer LCL is disposed between the first substrate 101 and the second substrate 102. It should be noted that unless otherwise specified below, the overlapping relationship between the two components is defined along direction D3, and the overlapping direction will not be further described.

[0065] For example, the first substrate 101 may be provided with a plurality of scan lines (not shown), a plurality of data lines (not shown), and a plurality of pixel structures PX. The data lines may be arranged along a direction D1 and extend in a direction D2, while the scan lines may be arranged along a direction D2 and extend in a direction D1, wherein the directions D1 and D2 intersect each other. The plurality of pixel structures PX may be arranged in a plurality of rows and a plurality of columns along the directions D1 and D2, respectively. In other words, the pixel structures PX may be arranged in an array on the substrate 101, and each may be electrically connected to a scan line and a data line, but this is not limited to the embodiment.

[0066] The pixel structure PX may include an active device T and a pixel electrode PE electrically connected to each other. In this embodiment, a method for forming the active device T may include the following steps: sequentially forming a gate electrode GE, a gate insulating layer 110, a semiconductor pattern SC, a source electrode SE, and a drain electrode DE on a substrate 101. The semiconductor pattern SC is arranged to overlap the gate electrode GE. The source electrode SE and the drain electrode DE overlap the semiconductor pattern SC and are in electrical contact with the semiconductor pattern SC. In this embodiment, the gate electrode GE of the active device T may optionally be disposed below the semiconductor pattern SC to form a bottom-gate thin-film transistor (TFT), but is not limited to this. In other embodiments, the gate electrode of the active device may also be optionally disposed above the semiconductor pattern to form a top-gate thin-film transistor (TFT).

[0067] Furthermore, the active device T may be sequentially covered with an insulating layer 120 and an insulating layer 130. The insulating layer 130 has an opening OP that exposes a portion of the insulating layer 120. The insulating layer 120 has a contact hole TH that overlaps with the opening OP and exposes a portion of the surface of the drain electrode DE. The pixel electrode PE is disposed on the insulating layer 130 and is electrically connected to the drain electrode DE of the active device T via the opening OP in the insulating layer 130 and the contact hole TH in the insulating layer 120.

[0068] In this embodiment, the insulating layer 120 is, for example, a passivation layer, and the insulating layer 130 is, for example, a planarization layer. It should be noted that the gate electrode GE, the source electrode SE, the drain electrode DE, the semiconductor pattern SC, the gate insulating layer 110, the passivation layer (i.e., the insulating layer 120), and the planarization layer (i.e., the insulating layer 130) can be implemented by any gate electrode, any source electrode, any drain electrode, any semiconductor pattern, any gate insulating layer, any passivation layer, and any planarization layer used in a display panel, which are well known to those skilled in the art. The gate electrode GE, the source electrode SE, the drain electrode DE, the semiconductor pattern SC, the gate insulating layer 110, the passivation layer, and the planarization layer can be formed by any method well known to those skilled in the art, and therefore will not be described in detail herein.

[0069] In this embodiment, the material of the pixel electrode PE includes, for example, a metal, an alloy, a nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, or other suitable materials, or a stacked layer of a metal material and other conductive materials. Specifically, in this embodiment, the pixel electrode PE can also serve as the reflective pattern RP of the pixel structure PX and define the reflective area RA. That is, the pixel electrode PE of this embodiment can be a reflective electrode, and the display panel 10 can be a fully reflective liquid crystal display panel, but the present invention is not limited thereto.

[0070] On the other hand, the second substrate 102 may be provided with a plurality of filter patterns (not shown). These filter patterns overlap with the plurality of pixel electrodes PE of the plurality of pixel structures PX and have a filtering function. For example, each of these filter patterns is suitable for allowing red light, green light, or blue light to pass through, but this is not limited to this. In addition, a common electrode layer (not shown) may be provided on the second substrate 102. The electric field generated between the common electrode layer and the pixel electrodes PE is suitable for driving the plurality of liquid crystal molecules (not shown) of the liquid crystal layer LCL to rotate and form an arrangement corresponding to the direction and intensity of the electric field. For example, in this embodiment, the liquid crystal layer LCL can be driven in a twisted-nematic (TN) mode or an electrically controlled birefringence (ECB) mode. However, the present invention is not limited to this. In other embodiments, the common electrode layer may also be provided on the first substrate 101 to implement an in-plane switching (IPS) type or a fringe-field switching (FFS) type liquid crystal driving mode.

[0071] Furthermore, in this embodiment, the reflective pattern RP (i.e., the pixel electrode PE) of the pixel structure PX is provided with a plurality of first micro-slits SLT1 and a plurality of second micro-slits SLT2. More specifically, the provision of these micro-slits can divide the reflective pattern RP into a plurality of reflective portions RPp, and these reflective portions RPp are still connected to each other, such as Figure 3 Due to manufacturing process factors, dark-state light leakage is easily generated at the interface between adjacent pixel structures PX. With this design, the reflective area of the reflective pattern RP can be limitedly reduced without significantly affecting the overall reflectivity, thereby reducing the dark-state brightness of the display panel 10 and improving its display contrast.

[0072] In detail, the multiple reflective patterns RP of the multiple pixel structures PX are arranged at intervals along the direction D1 and the direction D2. Each reflective pattern RP has a first side edge RPe1 and a second side edge RPe2 arranged along the direction D1, and a third side edge RPe3 and a fourth side edge RPe4 arranged along the direction D2. A plurality of first micro slits SLT1 extend from the first side edge RPe1 and are arranged at equal intervals (e.g., intervals S1) between the third side edge RPe3 and the fourth side edge RPe4 along the direction D2. A plurality of second micro slits SLT2 extend from the second side edge RPe2 and are arranged at equal intervals (e.g., intervals S2) between the third side edge RPe3 and the fourth side edge RPe4 along the direction D2.

[0073] In this embodiment, the extending directions of the plurality of first micro slits SLT1 and the plurality of second micro slits SLT2 are respectively parallel to the direction D1 , and the first micro slits SLT1 are respectively aligned with the second micro slits SLT2 along the direction D1 .

[0074] The following will show some other variations of the reflective pattern RP of this embodiment. Figure 4A In a modified embodiment, the reflective pattern RP-A may further include a plurality of third micro slits SLT3a and a plurality of third micro slits SLT3b extending from the first side edge RPe1, and the extension directions of these third micro slits intersect with directions D1 and D2. Similarly, the reflective pattern RP-A may further include a plurality of fourth micro slits SLT4a and a plurality of fourth micro slits SLT4b extending from the second side edge RPe2, and the extension directions of these fourth micro slits intersect with directions D1 and D2.

[0075] For example, the angles A1a or A1b between the extension directions of each of these third micro slits and the first side edge RPe1, and the angles A2a or A2b between the extension directions of each of these fourth micro slits and the second side edge RPe2, can all be 45 degrees, but are not limited thereto. It is particularly noteworthy that the extension direction of the third micro slit SLT3a (i.e., the first one) between any two adjacent ones of the first micro slit SLT1, the third side edge RPe3, and the fourth side edge RPe4 intersects with (e.g., is perpendicular to) the extension direction of the third micro slit SLT3b (i.e., the second one). The extension direction of the fourth micro slit SLT4a (i.e., the first one) between any two adjacent ones of the second micro slit SLT2, the third side edge RPe3, and the fourth side edge RPe4 intersects with (e.g., is perpendicular to) the extension direction of the fourth micro slit SLT4b (i.e., the second one).

[0076] Please refer to Figure 4BIn another variant embodiment, the reflective pattern RP-B may further include a plurality of third micro slits SLT3c extending parallel to the direction D2. Some of the third micro slits SLT3c extend from the third side edge RPe3 or the fourth side edge RPe4, while other portions of the third micro slits SLT3c do not extend from the first side edge RPe1, the second side edge RPe2, the third side edge RPe3, and the fourth side edge RPe4. The plurality of third micro slits SLT3c and the plurality of first micro slits SLT1 or the plurality of second micro slits SLT2 are alternately arranged along the direction D2.

[0077] Please refer to Figure 4C In another variant embodiment, the reflective pattern RP-C is provided with Figure 4A In addition to the plurality of third micro slits SLT3a, the plurality of third micro slits SLT3b, the plurality of fourth micro slits SLT4a and the plurality of fourth micro slits SLT4b, there is also provided Figure 4B It is particularly noted that two third micro slits SLT3c may be provided between any two adjacent ones of the first micro slit SLT1 (or the second micro slit SLT2), the third side edge RPe3 and the fourth side edge RPe4.

[0078] However, the present invention is not limited thereto. Figure 4D As shown, in another variant embodiment, a third micro slit SLT3c may be provided between any two adjacent ones of the first micro slit SLT1 (or the second micro slit SLT2), the third side edge RPe3, and the fourth side edge RPe4 of the reflective pattern RP-D. That is, a plurality of first micro slits SLT1 (or the second micro slit SLT2) and a plurality of third micro slits SLT3c may be arranged alternately along the direction D2. From another point of view, in Figure 4D In the reflective pattern RP-D, the plurality of first micro slits SLT1 and the plurality of third micro slits SLT3a and SLT3b may be alternately arranged along the direction D2, and the plurality of second micro slits SLT2 and the plurality of fourth micro slits SLT4a and SLT4b may be alternately arranged along the direction D2.

[0079] By designing the aforementioned multiple reflective patterns, the reflective area of the reflective patterns can be reduced to a limited extent without significantly affecting the overall reflectivity, thereby reducing the dark state brightness of the display panel and improving its display contrast.

[0080] Some other embodiments will be listed below to illustrate the present disclosure in detail, wherein the same components will be marked with the same symbols, and the description of the same technical content will be omitted. For the omitted parts, please refer to the aforementioned embodiments and will not be repeated below.

[0081] Figure 5 is a schematic front view of a display panel according to a second embodiment of the present invention. Figures 6A to 6C for Figure 5 Schematic diagram of multiple enlarged local areas of a display panel. Figures 6A to 6C Corresponding to Figure 5 Please refer to the area Z1, area Z2 and area Z3. Figures 5 to 6C , compared to Figure 1 Compared with the display panel 10 of the embodiment, the reflection pattern of the pixel structure PX-A of the display panel 20 of this embodiment is more diverse.

[0082] For example, in this embodiment, a display area DA having a plurality of pixel structures PX-A disposed on the first substrate 101 has a display area edge DAe1 extending along a direction D1 and a display area edge DAe2 extending along a direction D2. The plurality of pixel structures PX-A include a plurality of edge pixel structures EPX1 adjacent to the display area edge DAe1 and arranged along the direction D1, a plurality of edge pixel structures EPX2 adjacent to the display area edge DAe2 and arranged along the directions D1 and D2, and a plurality of center pixel structures CPX located away from the display area edge DAe1 and the display area edge DAe2. It should be noted that in this embodiment, the plurality of edge pixel structures EPX2 are, for example, arranged in three pixel structure rows along the direction D2, and the three pixel structure rows are arranged adjacent to each other along the direction D1. In other words, the edge pixel structures EPX2 are distributed in an area adjacent to the display area edge DAe2 and having a width along the direction D1 sufficient to accommodate the three pixel structures PX-A.

[0083] Since the reflection pattern RP (such as Figure 6A shown) similar to Figure 3 The reflection pattern RP of the pixel structure PX is described in detail in the relevant paragraphs of the above embodiment, which will not be repeated here. Figure 1 The differences between the display panels 10 are described below.

[0084] Please refer to Figure 5 and Figure 6B , the reflective pattern RP-E of the edge pixel structure EPX1 adjacent to the edge of the display area DAe1 may be provided with a plurality of first micro slits SLT1-A extending from the first side edge RPe1 and a plurality of second micro slits SLT2-A extending from the second side edge RPe2. Figure 6A In the reflection pattern RP of the central pixel structure CPX, in the edge pixel structure EPX1, the multiple first micro gaps SLT1-A (or multiple second micro gaps SLT2-A) of the reflection pattern RP-E are not arranged at equal intervals between the third side edge RPe3 and the fourth side edge RPe4 along the direction D2.

[0085] More specifically, the spacing S1" between any two adjacent ones of the plurality of first micro slits SLT1-A along the direction D2 decreases as they approach the display area edge DAe1, while the spacing S2" between any two adjacent ones of the plurality of second micro slits SLT2-A along the direction D2 decreases as they approach the display area edge DAe1. Accordingly, the display brightness difference of the display panel 20 caused by the different light reflection angles at the display area edge DAe1 and the display area center can be reduced, thereby improving the display brightness uniformity of the display panel 20.

[0086] On the other hand, please refer to Figure 5 and Figure 6C , the reflective pattern RP-F of the edge pixel structure EPX2 adjacent to the display area edge DAe2 may be provided with a plurality of third micro gaps SLT3c" extending from the third side edge RPe3 and the fourth side edge RPe4, and these third micro gaps SLT3c" are arranged at intervals along the direction D1 between the first side edge RPe1 and the second side edge RPe2. It is particularly noteworthy that in the edge pixel structure EPX2, the plurality of third micro gaps SLT3c" of the reflective pattern RP-F are not arranged at equal intervals along the direction D1 between the first side edge RPe1 and the second side edge RPe2. More specifically, the spacing S3 between any two adjacent third micro gaps SLT3c" arranged along the direction D1 decreases as they approach the display area edge DAe2.

[0087] It is particularly noted that the width of each pixel structure PX-A along the direction D1 is significantly smaller than its length along the direction D2. For example, the width of the pixel structure PX-A is one-third of the length. Therefore, in order to make the width of the brightness adjustment region on the side of the display area edge DAe2 equal to the width of the brightness adjustment region on the side of the display area edge DAe1, the unequal spacing arrangement design of the third micro-slits SLT3c" can be applied to the three edge pixel structures EPX2 adjacent to the display area edge DAe2 and arranged along the direction D1 (such as Figure 6C ). That is, the spacing S3 between any two adjacent edge pixel structures EPX2 arranged along direction D1 decreases as they approach the display area edge DAe2. This reduces the difference in display brightness between the display area edge DAe2 and the center of the display area due to different light reflection angles, thereby improving the display brightness uniformity of the display panel 20.

[0088] Figure 7 is a cross-sectional view of a display panel according to a third embodiment of the present invention. Figure 3 The display panel 30 of this embodiment is Figure 2The display panel 10 differs only in the design of the pixel structure. Specifically, in the display panel 30 of this embodiment, the pixel electrode PE-A of the pixel structure PX-B is a light-transmitting electrode, and the pixel structure PX-B also has an additional reflective pattern RP. The material of the light-transmitting electrode includes, for example, a metal oxide, such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, or other suitable oxides, or a stacked layer of at least two of the foregoing.

[0089] In this embodiment, the reflection pattern RP" completely overlaps with the pixel electrode PE-A, that is, the orthographic projection of the reflection pattern RP" on the substrate surface 101s of the first substrate 101 is located within the orthographic projection of the pixel electrode PE-A on the substrate surface 101s. It should be noted that the reflection pattern RP" can define the reflection area RA of the pixel structure PX-B, and the portion of the pixel electrode PE-A not covered by the reflection pattern RP" can define the light-transmitting area TA of the pixel structure PX-B. More specifically, the display panel 30 of this embodiment can be a transflective liquid crystal display panel or a micro-transflective liquid crystal display panel.

[0090] Since the micro-gap design of the reflective pattern of the aforementioned embodiments can be applied to the reflective pattern RP″ of this embodiment, detailed description of the reflective pattern RP″ can be found in the relevant paragraphs of the aforementioned embodiments and will not be repeated here.

[0091] In summary, in a display panel according to one embodiment of the present invention, the reflective pattern of the pixel structure is divided into a plurality of interconnected reflective portions by a plurality of micro-slits. The micro-slits between these reflective portions effectively reduce the dark-state brightness of the display panel, thereby improving its display contrast. Furthermore, the provision of these micro-slits can also improve the uniformity of the display brightness of the display panel.

[0092] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that: include: The first substrate and the second substrate are arranged to overlap each other; a plurality of pixel structures disposed on the first substrate and each having a plurality of reflective patterns, wherein each of the plurality of reflective patterns is divided into a plurality of reflective portions by a plurality of micro-slits, and the plurality of reflective portions are interconnected; as well as The liquid crystal layer is disposed between the first substrate and the second substrate.

2. The display panel according to claim 1, wherein: The multiple reflective patterns are arranged at intervals along a first direction and a second direction, respectively, the first direction intersects with the second direction, each of the multiple reflective patterns has a first side edge and a second side edge arranged along the first direction, the multiple micro gaps include a plurality of first micro gaps whose extension direction is parallel to the first direction, and the plurality of first micro gaps extend from the first side edge.

3. The display panel according to claim 2, wherein: Each of the plurality of reflective patterns further has a third side edge and a fourth side edge arranged along the second direction, and the plurality of first micro slits are arranged between the third side edge and the fourth side edge at equal intervals along the second direction.

4. The display panel according to claim 3, wherein: The multiple micro gaps also include a plurality of second micro gaps extending from the second side edge and extending in a direction parallel to the first direction. The multiple second micro gaps are arranged at equal intervals between the third side edge and the fourth side edge along the second direction, and the multiple second micro gaps are respectively aligned with the multiple first micro gaps along the first direction.

5. The display panel according to claim 4, wherein: The plurality of micro slits further include a plurality of third micro slits extending from the first side edge, and an extending direction of each of the plurality of third micro slits intersects the first direction and the second direction.

6. The display panel according to claim 5, wherein: The plurality of micro slits further include a plurality of fourth micro slits extending from the second side edge, and an extending direction of each of the fourth micro slits intersects the first direction and the second direction.

7. The display panel according to claim 6, wherein: An included angle between the extension direction of each of the third micro slits and the first side edge is 45 degrees, and an included angle between the extension direction of each of the fourth micro slits and the second side edge is 45 degrees.

8. The display panel according to claim 6, wherein: A first and a second of the plurality of third micro gaps are provided between any two adjacent ones of the plurality of first micro gaps, the third side edge and the fourth side edge, and an extension direction of the first of the plurality of third micro gaps intersects with an extension direction of the second of the plurality of third micro gaps.

9. The display panel according to claim 8, wherein: A first and a second of the plurality of fourth micro gaps are provided between any two adjacent ones of the plurality of second micro gaps, the third side edge and the fourth side edge, and an extension direction of the first of the plurality of fourth micro gaps intersects with an extension direction of the second of the plurality of fourth micro gaps.

10. The display panel according to claim 6, wherein: The plurality of first micro slits and the plurality of third micro slits are alternately arranged along the second direction, and the plurality of second micro slits and the plurality of fourth micro slits are alternately arranged along the second direction.

11. The display panel according to claim 4, wherein: The plurality of micro slits further include a plurality of third micro slits extending in a direction parallel to the second direction, and at least some of the third micro slits do not extend from the first side edge, the second side edge, the third side edge, and the fourth side edge.

12. The display panel according to claim 1, wherein The multiple pixel structures include multiple edge pixel structures adjacent to the edge of the display area and arranged along a first direction, the reflective pattern of each of the multiple edge pixel structures has a first side edge and a second side edge arranged along the first direction, the multiple micro-gaps of the reflective pattern of each of the multiple edge pixel structures include multiple first micro-gaps extending from the first side edge and arranged at intervals along a second direction, the second direction intersects with the first direction, the extension direction of the multiple first micro-gaps is parallel to the first direction, and the spacing between any two adjacent ones of the multiple first micro-gaps along the second direction decreases as they approach the edge of the display area.

13. The display panel according to claim 1, wherein Each of the plurality of pixel structures has an active element, and the plurality of reflective patterns are electrically connected to the active elements of the plurality of pixel structures respectively.

14. The display panel according to claim 1, wherein The plurality of pixel structures each have an active element and a pixel electrode electrically connected to each other, and the plurality of reflective patterns respectively overlap the plurality of pixel electrodes of the plurality of pixel structures.

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