Method and system for optimally calculating photoetching loop calculation convergence, terminal and medium

Abstract

The invention provides a method, a system, a terminal and a medium for optimally calculating the calculation convergence of a photoetching loop, the behavior of a photomask graph in the photoetching process is simulated through a model to obtain a simulated photomask graph, and then the feedback weight value of the current loop is dynamically determined based on the difference value between the simulated photomask graph and a simulated target, so that the calculation convergence of the photoetching loop is optimized. And calculating the edge movement value of the photomask pattern, adjusting the pattern, taking the formed new photomask pattern as the next simulation input, and circulating until a result meeting a target is output. Compared with the prior art that the feedback weight value can only be set according to the fixed number of turns, the scheme sets the differentiated feedback weight value according to different EPE intervals, the dynamic adjustment mechanism remarkably improves the calculation efficiency and the convergence stability, and the method is particularly suitable for the high-precision optimization requirement of a complex photomask graph in an advanced manufacturing process.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method, system, terminal and medium for optimizing computational convergence of a photolithography loop. Background Art

[0002] In the photolithography process, optical proximity correction (OPC) optimizes the mask pattern through iterative calculations so that its imaging on the wafer is as close to the design target as possible. The existing technology uses a method where a fixed number of turns corresponds to a fixed feedback weight value (e.g., the first five turns are -0.4, -0.4, -0.8, -0.3, -0.3, and the subsequent turns are all -0.3). This method has significant limitations. First, the weight is dynamically adjusted based only on the number of turns rather than the real-time edge placement error (EPE). This may lead to slow convergence due to insufficient weight when the EPE is large, or oscillation due to heavy weight when the EPE is small, and even lead to computational divergence. Second, the fixed weight sequence cannot adapt to the differences in convergence characteristics of different regions in complex graphic structures. For example, dense line areas and isolated graphic areas have different feedback sensitivities, and unified weights are difficult to take into account global optimization.

[0003] This static weight setting method also leads to an imbalance between computational efficiency and accuracy. When the graphic approaches the target, the continued use of large weights can easily cause overshoot, requiring additional iterations to correct. If the weights are too small in the initial stage, the convergence time will be significantly prolonged. In addition, the existing preset weight sequence lacks adaptability for different process nodes or design rules, requiring engineers to repeatedly adjust parameters through trial and error, increasing process development costs. Therefore, existing technologies have difficulty meeting the dual requirements of high precision and high efficiency when processing complex mask graphics in advanced processes. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a method, system, terminal and medium for optimizing the convergence of computational lithography loops, so as to address the technical problems that the existing lithography OPC technology adopts a method of corresponding a fixed number of loops to a fixed feedback weight value, which cannot dynamically adjust the feedback strength according to the real-time edge placement error (EPE), resulting in low convergence efficiency, easy oscillation and divergence, and difficulty in adapting to the high-precision requirements of complex graphic structures and advanced processes.

[0005] To achieve the above-mentioned purpose and other related purposes, the present invention provides a method for optimizing the convergence of calculation of lithography loops, the method comprising: using a model to simulate the behavior of an input mask pattern during the lithography process to obtain a corresponding simulated mask pattern, and determining a feedback weight value of the current loop based on the simulated mask pattern and a simulation target, and calculating a corresponding mask pattern edge shift value; moving the simulated mask pattern according to the calculated mask pattern edge shift value, and using the mask pattern of the current loop formed as the mask pattern input for the next simulation to perform the next loop calculation, and repeating the operation until a mask pattern that meets the simulation target is finally output.

[0006] In one embodiment of the present invention, determining the feedback weight value of the corresponding loop based on the simulated mask pattern and the simulation target includes: calculating the difference between the simulated mask pattern and the simulation target; and determining the feedback weight value of the corresponding loop according to the difference between the simulated mask pattern and the simulation target.

[0007] In one embodiment of the present invention, different feedback weight values ​​are set according to different difference ranges between the simulated mask pattern and the simulated target.

[0008] In one embodiment of the present invention, determining the feedback weight value of the corresponding loop based on the difference between the simulated mask pattern and the simulated target includes: determining the difference interval in which the difference lies based on the calculated difference between the simulated mask pattern and the simulated target; and using the feedback weight value corresponding to the determined difference interval as the feedback weight value of the corresponding loop.

[0009] In one embodiment of the present invention, when the difference interval between the simulated mask pattern and the simulation target is a larger value interval, a larger feedback weight value is set accordingly to effectively accelerate convergence; when the difference interval between the simulated mask pattern and the simulation target is a smaller value interval, a smaller feedback weight value is set accordingly to avoid the situation where convergence cannot be achieved due to numerical oscillation.

[0010] In one embodiment of the present invention, calculating the corresponding mask pattern edge shift value includes: multiplying the difference between the calculated simulated mask pattern and the simulated target by a determined feedback weight value to calculate the mask pattern edge shift value of the corresponding loop.

[0011] In one embodiment of the present invention, if the difference between the calculated simulated mask pattern and the simulation target is less than a preset target deviation threshold, the current calculation is considered to be the last cycle, and the mask pattern of the current cycle is output as the mask pattern that meets the simulation target.

[0012] To achieve the above-mentioned and other related objectives, the present invention provides a system for optimizing the computational convergence of lithography loops. The system comprises: a mask pattern simulation and shift value calculation module for simulating the behavior of an input mask pattern during the lithography process using a model to obtain a corresponding simulated mask pattern, determining a feedback weight value for the current loop based on the simulated mask pattern and a simulation target, and calculating a corresponding mask pattern edge shift value;

[0013] The mask pattern generation module is connected to the mask pattern simulation and movement value calculation module, and is used to move the simulated mask pattern according to the calculated mask pattern edge movement value, and use the mask pattern formed in the current loop as the mask pattern input for the next simulation to perform the next loop calculation, and the operation is repeated until the mask pattern that meets the simulation target is finally output.

[0014] To achieve the above-mentioned objectives and other related objectives, the present invention provides an electronic terminal comprising: one or more memories and one or more processors; the one or more memories are used to store computer programs; the one or more processors are connected to the memories and are used to run the computer programs to execute the method for optimizing the computational convergence of lithography loops.

[0015] To achieve the above-mentioned object and other related objects, the present invention provides a computer storage medium storing a computer program, which implements the method described when the computer program is executed.

[0016] As described above, the present invention is a method, system, terminal, and medium for optimizing the computational convergence of lithography loops, and has the following beneficial effects: the present invention simulates the behavior of the mask pattern during the lithography process through a model to obtain a simulated mask pattern, and then dynamically determines the feedback weight value of the current loop based on the difference between the simulated mask pattern and the simulation target, calculates the edge movement value of the mask pattern and adjusts the pattern, and the resulting new mask pattern is used as the input for the next simulation, and the cycle continues until the output meets the target result. Unlike the prior art, which can only set feedback weight values ​​according to a fixed number of loops, the present invention sets differentiated feedback weight values ​​according to different EPE intervals. This dynamic adjustment mechanism significantly improves computational efficiency and convergence stability, and is particularly suitable for the high-precision optimization requirements of complex mask patterns in advanced processes. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 FIG. 1 is a flow chart of a method for optimizing computational convergence of a lithography loop according to an embodiment of the present invention.

[0018] Figure 2 It is a schematic diagram showing the convergence comparison between the traditional method and the present solution in one embodiment of the present invention.

[0019] Figure 3FIG. 1 is a flow chart of a method for optimizing computational convergence of a lithography loop according to an embodiment of the present invention.

[0020] Figure 4 It is a schematic diagram showing the structure of a system for optimizing the computational convergence of a lithography loop according to an embodiment of the present invention.

[0021] Figure 5 Shown is a schematic structural diagram of an electronic terminal in an embodiment of the present invention. DETAILED DESCRIPTION

[0022] The following describes the embodiments of the present invention through specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. The details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other unless they conflict.

[0023] It should be noted that in the following description, reference is made to the accompanying drawings, which describe several embodiments of the present invention. It should be understood that other embodiments may be used and that mechanical, structural, electrical and operational changes may be made without departing from the spirit and scope of the present invention. The following detailed description should not be considered restrictive, and the scope of the embodiments of the present invention is limited only by the claims of the published patents. The terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention. Spatially related terms, such as "upper", "lower", "left", "right", "below", "below", "lower", "above", "upper", etc., may be used in the text to facilitate the description of the relationship between one element or feature shown in the figure and another element or feature.

[0024] Throughout this specification, when a part is said to be "connected" to another part, this includes not only "direct connection" but also "indirect connection" with other elements interposed therebetween. Furthermore, when a part is said to "include" a certain component, unless otherwise stated, this does not exclude the other component but rather implies that the other component may be included.

[0025] The terms "first," "second," and "third" are used to describe various parts, components, regions, layers, and / or segments, but are not intended to be limiting. These terms are used solely to distinguish one part, component, region, layer, or segment from another. Therefore, a reference to a first part, component, region, layer, or segment below may also refer to a second part, component, region, layer, or segment without departing from the scope of the present invention.

[0026] Furthermore, as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context indicates otherwise. It should be further understood that the terms "comprise", "include" indicate the presence of the described features, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, operations, elements, components, items, kinds, and / or groups. The terms "or" and "and / or" used herein are interpreted as inclusive, or mean any one or any combination. Thus, "A, B, or C" or "A, B, and / or C" means "any of the following: A; B; C; A and B; A and C; B and C; A, B, and C". Exceptions to this definition occur only when the combination of elements, functions, or operations is inherently mutually exclusive in some way.

[0027] The present invention provides a method for optimizing the computational convergence of lithography loops. This method simulates the behavior of a mask pattern during the lithography process through a model, obtaining a simulated mask pattern. The simulated mask pattern is then dynamically determined based on the difference between the simulated mask pattern and the target. The edge shift value of the mask pattern is calculated and the pattern is adjusted. The resulting new mask pattern serves as the input for the next simulation, and the process continues until the output meets the target. Unlike existing technologies that only set feedback weights for a fixed number of loops, this method sets differentiated feedback weights based on different EPE intervals. This dynamic adjustment mechanism significantly improves computational efficiency and convergence stability, making it particularly suitable for the high-precision optimization requirements of complex mask patterns in advanced processes.

[0028] The following is a detailed description of the embodiments of the present invention with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. The present invention can be embodied in many different forms and is not limited to the embodiments described herein.

[0029] like Figure 1 A flow chart showing a method for optimizing the convergence of computational lithography loops in an embodiment of the present invention is provided.

[0030] The method comprises:

[0031] Step S1: Utilize the model to simulate the behavior of the input mask pattern during the lithography process to obtain a corresponding simulated mask pattern, determine the feedback weight value of the current loop based on the simulated mask pattern and the simulation target, and calculate the corresponding mask pattern edge movement value.

[0032] Specifically, a model is introduced to simulate the behavior of the current mask pattern during the lithography process. It includes a mathematical description of various physical phenomena in the lithography process, such as light propagation and chemical reactions. The simulation target represents the desired ideal state of the final mask pattern and serves as a reference for the entire calculation process. Based on the simulated mask pattern and the simulation target, the feedback weight value of the current loop is determined, and the corresponding mask pattern edge shift value is calculated.

[0033] In one embodiment, determining the feedback weight value of the corresponding loop based on the simulated mask pattern and the simulation target includes:

[0034] Calculate the difference between the simulated mask pattern and the simulated target (EPE);

[0035] The feedback weight value of the corresponding loop is determined according to the difference (EPE) between the simulated mask pattern and the simulated target.

[0036] In one embodiment, the value range of the edge placement error (EPE) is divided into a plurality of continuous intervals, for example:

[0037] Range 1: EPE < 5nm; (low error range)

[0038] Range 2: 5nm≤EPE<10nm; (Medium error range)

[0039] Range 3: 10nm≤EPE; (high error range)

[0040] Among them, the interval boundaries can be dynamically adjusted according to the convergence speed, for example, a wider interval is used in the early stage of iteration and the interval accuracy is refined in the later stage.

[0041] According to the convergence characteristics of different intervals, a corresponding feedback weight value is set for each interval (a negative number indicates adjustment in the direction of reducing EPE), for example:

[0042] Interval 1: EPE < 5nm, feedback weight value feedback = -0.2;

[0043] Interval 2: 5nm≤EPE<10nm, feedback weight value feedback=-0.5;

[0044] Interval 3: 10nm≤EPE, feedback weight value feedback=-0.7;

[0045] In one embodiment, when the difference interval between the simulated mask pattern and the simulation target is a larger value interval, a larger feedback weight value is set accordingly to effectively accelerate convergence; when the difference interval between the simulated mask pattern and the simulation target is a smaller value interval, a smaller feedback weight value is set accordingly to avoid the situation where convergence cannot be achieved due to numerical oscillation.

[0046] First, the edge placement error (EPE) is divided into different ranges. For example, an EPE greater than 10nm is classified as the "high error range," 5-10nm as the "medium error range," and less than 5nm as the "low error range." These ranges correspond to the degree of deviation between the mask pattern and the target pattern, providing a basis for subsequent weighting settings.

[0047] Feedback weights are set based on the characteristics of each range. In the high error range, where the pattern differs significantly from the target, a larger feedback weight, such as -0.7, is set. A larger weight causes the edge of the reticle pattern to move more significantly with each adjustment, accelerating the pattern's approach to the target and rapidly closing the gap. In the medium error range, a moderate weight of -0.5 is used, balancing adjustment efficiency and stability. In the low to medium error range, where the pattern is already close to the target, a smaller weight of -0.2 is used for finer adjustments, preventing the pattern from oscillating near the target due to over-adjustment, ensuring stable convergence of the calculation to a reticle pattern that meets the requirements.

[0048] During each calculation cycle, the EPE of the simulated mask pattern and the target pattern is first calculated, the interval to which they belong is determined, and the feedback weight value is selected according to the corresponding rule. It is multiplied by the EPE to obtain the mask pattern edge movement value Mask_bias = EPE*Feedback. After the pattern adjustment is completed, the next cycle is entered until the mask pattern meets the accuracy requirements.

[0049] In one embodiment, determining the feedback weight value of the corresponding loop according to the difference between the simulated mask pattern and the simulated target includes:

[0050] Determine the difference interval of the difference value according to the calculated difference value EPE between the simulated mask pattern and the simulated target;

[0051] Each difference interval is preset with a unique corresponding feedback weight value. Once the interval to which the EPE belongs is determined, the preset weight value of the interval will be immediately called as the feedback weight value of the current cycle.

[0052] In one embodiment, if Figure 2 In the process of calculating the final mask pattern in optical photolithography (OPC), the calculation of the mask pattern edge shift value is a key step. The specific process is as follows:

[0053] First, the simulated mask pattern is compared with the simulated target to accurately calculate the difference (EPE) between the two. This difference, measured in nanometers, clearly reflects the degree of deviation in edge position between the current simulated mask pattern and the ideal target pattern. The EPE intervals of the simulated mask pattern and the target pattern are then determined, and the corresponding feedback weight values ​​are found. Finally, the calculated EPE is multiplied by the corresponding feedback weight value to obtain the mask pattern edge shift value for subsequent simulated mask pattern shifts. The mask pattern for the current cycle is calculated and used as the mask pattern for the next simulation input and calculation cycle.

[0054] Step S2: according to the calculated edge movement value of the mask pattern, the simulated mask pattern is moved, and the mask pattern of the current cycle formed is used as the mask pattern of the next simulation input for the next cycle calculation, and the operation is repeated until the mask pattern that meets the simulation target is finally output.

[0055] In detail, the current simulated mask pattern is adjusted point by point based on the calculated mask pattern edge movement value (mask_bias). The sign of the movement value determines the adjustment direction (negative value indicates inward contraction, positive value indicates outward expansion), and the absolute value determines the movement distance (such as -5nm means moving 5 nanometers inward). After all edge points are adjusted, the mask pattern of the current loop is formed. The mask pattern of the current loop formed is used as the mask pattern for the next simulation input for the next loop calculation, and this cycle continues until the termination condition is met. In each iteration, the system first uses the lithography model to simulate the newly input mask pattern to predict its imaging effect on the wafer; then compares the simulation results with the target pattern, calculates the edge placement error (EPE), and dynamically selects the corresponding feedback weight value according to the interval in which the EPE is located; the new edge movement value is obtained by multiplying the EPE with the feedback weight value, and then updates the mask pattern. The dynamic weight mechanism plays a key role in this process: when the initial error is large, a larger weight (such as -0.8) is used to achieve rapid convergence; when the error is smaller in the later stage, it switches to a smaller weight (such as -0.1) for fine adjustment to avoid overshoot oscillation, ensuring that the system efficiently and stably outputs mask graphics that meet process requirements.

[0056] like Figure 3 When a large EPE occurs during OPC loop calculation, the traditional method uses a fixed feedback value, resulting in slower convergence and requiring more loops. Compared to the traditional method, this optimized solution allows the feedback value to be adjusted based on the EPE value, accelerating convergence.

[0057] In one embodiment, a very small preset target deviation threshold (such as ±1nm) is pre-set as a criterion for judging convergence. The threshold defines the allowable deviation range between the simulated mask pattern and the ideal target. It should be noted that the preset target deviation threshold is within the minimum difference interval. In each loop calculation, the system calculates the error (EPE) between the current simulated mask pattern and the target pattern, and evaluates whether it is less than the preset target deviation threshold. If the error between the current simulated mask pattern and the target pattern is less than the preset target deviation threshold, it is determined that the current is the last loop. When the termination condition is met, the system outputs the mask pattern generated by the current loop as the final result. The pattern has been adjusted multiple times by the dynamic feedback weight mechanism, and the deviation between its lithography imaging effect and the design target is within the process allowable range.

[0058] Similar in principle to the above-mentioned embodiment, the present invention provides a system for optimizing the computational convergence of a lithography loop.

[0059] The following provides specific embodiments in conjunction with the accompanying drawings:

[0060] like Figure 4 A schematic diagram showing the structure of a system for optimizing the convergence of computational lithography loops according to an embodiment of the present invention is shown.

[0061] The system comprises:

[0062] The mask pattern simulation and shift value calculation module 1 is used to use the model to simulate the behavior of the input mask pattern during the lithography process to obtain a corresponding simulated mask pattern, determine the feedback weight value of the current loop based on the simulated mask pattern and the simulation target, and calculate the corresponding mask pattern edge shift value;

[0063] The mask pattern generation module 2 is connected to the mask pattern simulation and movement value calculation module 1, and is used to move the simulated mask pattern according to the calculated edge movement value of the mask pattern, and use the mask pattern formed in the current loop as the mask pattern input for the next simulation to perform the next loop calculation, and repeat the operation until the mask pattern that meets the simulation target is finally output.

[0064] Since the implementation principle of the system for optimizing the computational convergence of the lithography loop has been described in the aforementioned embodiment, it will not be repeated here.

[0065] In one embodiment, determining the feedback weight value of the corresponding loop based on the simulated mask pattern and the simulation target includes: calculating the difference between the simulated mask pattern and the simulation target; and determining the feedback weight value of the corresponding loop according to the difference between the simulated mask pattern and the simulation target.

[0066] In one embodiment, different feedback weight values ​​are set according to different difference ranges between the simulated mask pattern and the simulation target.

[0067] In one embodiment, determining the feedback weight value of the corresponding loop based on the difference between the simulated mask pattern and the simulated target includes: determining the difference interval in which the difference lies based on the calculated difference between the simulated mask pattern and the simulated target; and using the feedback weight value corresponding to the determined difference interval as the feedback weight value of the corresponding loop.

[0068] In one embodiment, when the difference interval between the simulated mask pattern and the simulation target is a larger value interval, a larger feedback weight value is set accordingly to effectively accelerate convergence; when the difference interval between the simulated mask pattern and the simulation target is a smaller value interval, a smaller feedback weight value is set accordingly to avoid the situation where convergence cannot be achieved due to numerical oscillation.

[0069] In one embodiment, calculating the corresponding mask pattern edge shift value includes: multiplying the difference between the calculated simulated mask pattern and the simulated target by a determined feedback weight value to calculate the mask pattern edge shift value of the corresponding loop.

[0070] In one embodiment, if the difference between the calculated simulated mask pattern and the simulated target is less than a preset target deviation threshold, the current calculation is considered to be the last cycle, and the mask pattern of the current cycle is output as a mask pattern that meets the simulation target.

[0071] The method for optimizing the computational convergence of the lithography loop provided by the embodiment of the present invention can be implemented on the terminal side or the server side. As for the hardware structure of the electronic terminal, please refer to Figure 5 , is an optional hardware structure diagram of the electronic terminal 1000 provided in an embodiment of the present invention. The terminal 1000 can be a mobile phone, a computer device, a tablet device, a personal digital processing device, a factory background processing device, etc. The terminal 1000 includes: at least one processor 1001, a memory 1002, at least one network interface 10010 and a user interface 1009. The various components in the device are coupled together through a bus system 1005. It can be understood that the bus system 1005 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 1005 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, Figure 5 In the text, various buses are labeled as bus systems.

[0072] The user interface 1009 may include a display, a keyboard, a mouse, a trackball, a click gun, keys, buttons, a touch pad or a touch screen.

[0073] It will be appreciated that the memory 1002 may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM) or a programmable read-only memory (PROM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM) and synchronous static random access memory (SSRAM). The memory described in the embodiments of the present invention is intended to include, but is not limited to, these and any other suitable types of memory.

[0074] The memory 1002 in the embodiment of the present invention is used to store various categories of data to support the operation of the terminal 1000. Examples of such data include: any executable program for operating on the terminal 1000, such as an operating system 10021 and an application 10022; the operating system 10021 includes various system programs, such as a framework layer, a core library layer, a driver layer, etc., for implementing various basic services and processing hardware-based tasks. The application 10022 may include various applications, such as a media player (MediaPlayer), a browser (Browser), etc., for implementing various application services. The method for optimizing the computational convergence of the computational lithography loop provided in the embodiment of the present invention may be included in the application 10022.

[0075] The methods disclosed in the above embodiments of the present invention can be applied to or implemented by processor 1001. Processor 1001 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by hardware integrated logic circuits in processor 1001 or by software instructions. The above processor 1001 may be a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 1001 can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present invention. The general-purpose processor 1001 may be a microprocessor or any conventional processor. The steps of the accessory optimization method provided in the embodiments of the present invention can be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium located in a memory. The processor reads the information in the memory and, in conjunction with its hardware, completes the steps of the above method.

[0076] In an exemplary embodiment, the terminal 1000 may be used by one or more application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), and complex programmable logic devices (CPLDs) to execute the aforementioned method.

[0077] Those skilled in the art will appreciate that all or part of the steps in the above-described method embodiments can be implemented using hardware associated with a computer program. The aforementioned computer program can be stored in a computer-readable storage medium. When executed, the program performs the steps in the above-described method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0078] In the embodiments provided herein, the computer readable and writable storage medium may include a read-only memory, a random access memory, an EEPROM, a CD-ROM or other optical disk storage device, a magnetic disk storage device or other magnetic storage device, a flash memory, a USB flash drive, a mobile hard disk, or any other medium that can be used to store desired program code in the form of instructions or data structures and can be accessed by a computer. In addition, any connection can be appropriately referred to as a computer readable medium. For example, if the instruction is sent from a website, a server or other remote source using a coaxial cable, a fiber optic cable, a twisted pair, a digital subscriber line (DSL) or wireless technologies such as infrared, radio and microwaves, the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technologies such as infrared, radio and microwaves are included in the definition of the medium. However, it should be understood that computer readable and writable storage media and data storage media do not include connections, carriers, signals or other temporary media, but are intended to be non-temporary, tangible storage media. Disk and disc, as used in this application, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers.

[0079] In summary, the method, system, terminal and medium for optimizing the calculation convergence of lithography loops of the present invention simulate the behavior of the mask pattern in the lithography process through a model to obtain a simulated mask pattern, and then dynamically determine the feedback weight value of the current loop based on the difference between the mask pattern and the simulation target, calculate the edge movement value of the mask pattern and adjust the pattern, and the formed new mask pattern is used as the input for the next simulation, and the cycle is repeated until the output meets the target result. The present invention is different from the existing technology that can only set the feedback weight value according to a fixed number of cycles. Differentiated feedback weight values ​​are set according to different EPE intervals. This dynamic adjustment mechanism significantly improves the calculation efficiency and convergence stability, and is particularly suitable for the high-precision optimization requirements of complex mask patterns in advanced processes. Therefore, the present invention effectively overcomes the various shortcomings of the existing technology and has a high industrial utilization value.

[0080] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, any equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed herein are intended to be covered by the claims of the present invention.

Claims

1. A method for optimizing the convergence of computational lithography loops, characterized in that: The method comprises: The model is used to simulate the behavior of the input mask pattern during the lithography process to obtain the corresponding simulated mask pattern. Based on the simulated mask pattern and the simulation target, the feedback weight value of the current loop is determined, and the corresponding mask pattern edge movement value is calculated. The simulated mask pattern is moved according to the calculated edge movement value of the mask pattern, and the mask pattern of the current cycle formed is used as the mask pattern of the next simulation input for the next cycle calculation, and the operation is repeated until a mask pattern that meets the simulation target is finally output.

2. The method for optimizing the convergence of computational lithography loops according to claim 1, characterized in that: The step of determining the feedback weight value of the corresponding loop based on the simulated mask pattern and the simulated target includes: Calculate the difference between the simulated mask pattern and the simulated target; The feedback weight value of the corresponding loop is determined according to the difference between the simulated mask pattern and the simulated target.

3. The method for optimizing the convergence of computational lithography loops according to claim 2, characterized in that: Different feedback weight values ​​are set according to different difference ranges between the simulated mask pattern and the simulated target.

4. The method for optimizing the convergence of computational lithography loops according to claim 3, wherein: The step of determining the feedback weight value of the corresponding loop according to the difference between the simulated mask pattern and the simulated target includes: Determining a difference interval according to a difference between the calculated simulated mask pattern and the simulated target; The feedback weight value set corresponding to the determined difference interval is used as the feedback weight value of the corresponding loop.

5. The method for optimizing the convergence of computational lithography loops according to claim 4, characterized in that: When the difference interval between the simulated mask pattern and the simulation target is a larger value interval, a larger feedback weight value is set to effectively accelerate convergence; when the difference interval between the simulated mask pattern and the simulation target is a smaller value interval, a smaller feedback weight value is set to avoid the situation where convergence cannot be achieved due to numerical oscillation.

6. The method for optimizing the convergence of lithography loop calculations according to claim 1, characterized in that: The calculating of the corresponding mask pattern edge shift value includes: multiplying the difference between the calculated simulation mask pattern and the simulation target by a determined feedback weight value to calculate the mask pattern edge shift value of the corresponding loop.

7. The method for optimizing the convergence of computational lithography loops according to claim 4, characterized in that: If the difference between the calculated simulated mask pattern and the simulated target is less than the preset target deviation threshold, it is considered that the current calculation is the last cycle, and the mask pattern of the current cycle is output as the mask pattern that meets the simulation target.

8. A system for optimizing the convergence of computational lithography loops, characterized in that: The system comprises: The mask pattern simulation and shift value calculation module is used to use the model to simulate the behavior of the input mask pattern during the lithography process to obtain the corresponding simulated mask pattern, determine the feedback weight value of the current loop based on the simulated mask pattern and the simulation target, and calculate the corresponding mask pattern edge shift value; The mask pattern generation module is connected to the mask pattern simulation and movement value calculation module, and is used to move the simulated mask pattern according to the calculated mask pattern edge movement value, and use the mask pattern formed in the current loop as the mask pattern input for the next simulation to perform the next loop calculation, and the operation is repeated until the mask pattern that meets the simulation target is finally output.

9. An electronic terminal, characterized in that: include: one or more memories and one or more processors; The one or more memories are used to store computer programs; The one or more processors, connected to the memory, are configured to run the computer program to perform the method as claimed in any one of claims 1 to 7.

10. A computer storage medium, characterized in that A computer program is stored, and when the computer program is executed, the method according to any one of claims 1 to 7 is implemented.

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