Wafer back shield cleaning method
By forming a dielectric and gate material layer on the front of the wafer to protect the back of the wafer, the problem of contamination on the back of the wafer during diffusion doping is solved, and efficient purification and equipment stability are achieved.
Patent Information
- Application Number
- CN202510707768.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-29
- Publication Date
- 2025-08-29
AI Technical Summary
During the diffusion doping process, the back of the wafer is easily contaminated by impurities such as phosphorus sources, resulting in equipment contamination and reduced yield, affecting device performance and reliability.
The dielectric layer and gate material layer are formed on the front of the wafer, and these layers are used to protect the back of the wafer, and the impurities on the back are removed by wet cleaning to avoid contamination.
Effectively prevent the back of the wafer from being contaminated by the diffusion doping process, improve product quality and equipment stability, and keep device performance unchanged.
Smart Images
Figure CN120565404A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor device design and manufacturing, in particular to a wafer back shield cleaning method. Background Art
[0002] The condition of the back side of the wafer (crystal back) has a significant impact on multiple links in chip manufacturing. It is crucial in the integrated circuit manufacturing process and requires strict control to ensure efficient and orderly production and manufacturing.
[0003] In micron-scale device manufacturing, diffusion doping (such as phosphorus doping) is generally used to adjust the conductivity and threshold voltage of the gate material. However, during the diffusion doping process, the phosphorus source can also chemically diffuse to the backside of the wafer. This phosphorus source, doped onto the backside of the wafer, can reprecipitate during subsequent processing under unusual conditions, potentially contaminating the process equipment. (For example, in an annealing machine, contamination often occurs in the process chamber, and yellow foreign matter is wiped off the reflective plate. Analysis of its composition revealed phosphorus.) This can significantly reduce the operating efficiency and yield of the associated equipment, potentially impacting other products and ultimately affecting device performance and reliability. Summary of the Invention
[0004] The technical problem to be solved by the present invention is to provide a wafer back cleaning shield method to solve the problem that the back side of the wafer is easily contaminated.
[0005] To solve the above problems, the present invention provides a back-shield cleaning method, comprising: forming a dielectric layer and a gate material layer on the front side of the wafer; Performing front diffusion doping on the gate material layer; Performing a wet cleaning process on the wafer; Remove the gate material layer and dielectric layer on the back of the wafer.
[0006] Furthermore, when the dielectric layer and the gate material layer are formed on the front side of the wafer, a dielectric layer and a gate material layer are parasitically formed on the back side of the wafer simultaneously.
[0007] Furthermore, when the gate polysilicon layer is diffusely doped on the front side, the surface of the back side of the wafer is protected by the dielectric layer and the gate material layer formed by synchronous parasitism, and the diffusely doped impurities will not contaminate the actual back side of the wafer due to the protection of the film layer.
[0008] Furthermore, the dielectric layer and gate material layer protecting the back side of the wafer can be replaced with other materials, and the film thickness thereof can be variable, depending on the properties of the dielectric layer and gate material.
[0009] Furthermore, the gate material layer is a polysilicon layer, and the dielectric layer is a silicon oxide layer.
[0010] Furthermore, the impurity particles include but are not limited to various doping particles of phosphorus, arsenic, and boron.
[0011] The wafer back shield cleaning method described in this invention utilizes the corresponding wafer back film layer (shield) formed during the growth of the dielectric layer and gate material to simply and effectively prevent contamination (clean) of the wafer back during the diffusion doping process. This cleans the wafer back while preventing contamination of subsequent equipment, without adding additional processes or compromising device performance. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 It is a schematic diagram of the wafer.
[0013] Figure 2 It is a schematic diagram of forming a dielectric layer and a gate material layer on the back side of the wafer.
[0014] Figure 3 This is a schematic diagram of the back side of the wafer being contaminated when the gate material layer on the front side of the wafer is diffused and doped.
[0015] Figure 4 Schematic diagram of wet cleaning of the front side of the wafer.
[0016] Figure 5 This is a schematic diagram of the cleaning and removal of the dielectric layer and gate material layer on the back side of the wafer.
[0017] Figure 6 It is a schematic diagram of subsequent processing on the wafer.
[0018] Figure 7 It is a flow chart of the method of the present invention. Description of Reference Numerals 1 is the dielectric layer, and 2 is the gate material layer. DETAILED DESCRIPTION
[0019] The following is a specific embodiment of the present invention in conjunction with the accompanying drawings, which clearly and completely describes the technical solutions in the present invention, but the present invention is not limited to the following embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. According to the following description and claims, the advantages and features of the present invention will be clearer. It should be noted that the drawings are all in a very simplified form and use non-precise ratios, which are only used to conveniently and clearly assist in explaining the embodiments of the present invention. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0020] It should be understood that the present invention can be implemented in different forms and should not be interpreted as being limited to the embodiments proposed herein. On the contrary, providing these embodiments will make disclosure thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, for clarity, the sizes and relative sizes of layers and regions may be exaggerated, and the same reference numerals represent the same elements throughout. It should be understood that when an element or layer is referred to as "on ... ", "adjacent to ... ", "connected to " or "coupled to" other elements or layers, it can be directly on other elements or layers, adjacent to them, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ... ", "directly adjacent to ... ", "directly connected to " or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, without departing from the teachings of the present invention, a first element, component, region, layer or section discussed below may be represented as a second element, component, region, layer or section.
[0021] This invention provides a backside shielding technology solution. By utilizing a corresponding backside film layer (shield) formed simultaneously on the backside of the wafer during the growth of the dielectric and gate material layers, this solution can simply and efficiently prevent backside contamination during the diffusion doping process. This cleans the backside while preventing contamination of subsequent equipment and tools, without adding additional processes or compromising device performance.
[0022] The present invention provides a crystal back shield cleaning method, comprising: First, a dielectric layer and a gate material layer are formed on the front side of the wafer. The dielectric layer is generally a silicon oxide layer, and the gate material layer can be a polysilicon layer or other metallic materials. This embodiment uses a common polysilicon layer.
[0023] When depositing the dielectric layer and polysilicon layer on the front side of the wafer, the deposition reaction will also occur on the back side of the wafer, that is, a dielectric layer and polysilicon layer will also be formed on the back side of the wafer. Figure 1 and Figure 2 As shown (it should be noted that all the figures in this specification only show the state of the back side of the wafer, and the state of the front side of the wafer is ignored because it is not strongly related to the technology of the present invention).
[0024] Then, the gate material layer is diffused and doped on the front side, such as Figure 3As shown in Figure 2, diffusion doping of the polysilicon layer can adjust its conductivity and thus the device's threshold voltage. The polysilicon layer can be doped with any of a variety of impurities, including phosphorus, arsenic, and boron. When doping the front side of the wafer, impurity particles can also fall onto the polysilicon layer on the back side. Without the protective covering of the polysilicon layer and dielectric layer, these impurity particles would directly contaminate the actual back side of the wafer.
[0025] After the diffusion doping process is completed, the wafer is subjected to a wet cleaning process, such as Figure 4 As shown, impurities on the wafer surface are removed.
[0026] Remove the gate material layer and dielectric layer on the back of the wafer, such as Figure 5 As shown in Figure 2, a backside wet cleaning process removes the polysilicon layer and dielectric layer from the backside of the wafer, exposing the original wafer backside. Protected by the dielectric and polysilicon layers, the backside of the wafer remains uncontaminated.
[0027] like Figure 6 As shown, the subsequent conventional process is carried out.
[0028] In the above process, the thickness and quality of the protective film layer formed on the back of the wafer vary according to the changes in the dielectric layer and gate material formed on the front of the wafer, and the choice of film thickness depends on the properties of the front film material.
[0029] In certain cases, an additional protective film layer can be deposited on the back of the wafer to prevent dopant ions from contaminating the back of the wafer during doping diffusion on the front side of the wafer.
[0030] The present invention retains the parasitic back-end film layer formed during the growth of the dielectric layer and the gate polysilicon layer until the front gate material layer is diffused and doped, which has the following technical effects: 1. The back of the crystal is protected and will not be contaminated by particles during the diffusion and doping process, thus improving product strength.
[0031] 2. The related No. machines in the subsequent process will not be contaminated by the back of the wafer, which improves the operation stability and production efficiency of the No. machines.
[0032] 3. The implementation method is simple and efficient, and no additional process is required.
[0033] The present invention protects the back side of the wafer by utilizing the corresponding film layers formed when growing the dielectric layer and the gate material without adding other processes, thereby preventing the back side of the wafer from being contaminated by particles in the diffusion and doping process.
[0034] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Those skilled in the art will appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.
Claims
1. A method for cleaning the back of a crystal, characterized by: Include: forming a dielectric layer and a gate material layer on the front side of the wafer; Performing front diffusion doping on the gate material layer; Performing a wet cleaning process on the wafer; Remove the gate material layer and dielectric layer on the back of the wafer.
2. The wafer back shield cleaning method according to claim 1, wherein: When the dielectric layer and the gate material layer are formed on the front side of the wafer, a dielectric layer and a gate material layer are parasitically formed on the back side of the wafer simultaneously.
3. The wafer back shield cleaning method according to claim 1, wherein: When the gate polysilicon layer is diffusely doped on the front side, the surface of the back side of the wafer is protected by the dielectric layer and the gate material layer formed by synchronous parasitism, and the diffusely doped impurities will not contaminate the actual back side of the wafer due to the protection of the film layer.
4. The back-shield cleaning method according to claim 1, wherein: The dielectric layer and gate material layer protecting the back of the wafer can be replaced with other materials, and their film thickness can be variable, depending on the properties of the dielectric layer and gate material.
5. The back-shield cleaning method according to any one of claims 1 to 4, characterized in that: The gate material layer is a polysilicon layer, and the dielectric layer is a silicon oxide layer.
6. The wafer back shield cleaning method according to claim 3, wherein: The impurity particles include but are not limited to various doping particles of phosphorus, arsenic, and boron.
7. The wafer back shield cleaning method according to claim 1, wherein: The gate material layer is frontally diffused and doped to adjust the conductivity of the gate material layer and the threshold voltage of the device.