A digital-analog hybrid chip simulation method, system, device and storage medium

Abstract

The application relates to a digital-analog mixed chip simulation method, system, device and storage medium, and relates to the field of mixed simulation. The method is based on a DUT and a Testbench including a digital module and an analog module, wherein the method comprises the following steps: receiving interface information of the DUT, the interface information comprising digital interface information of the digital module and analog interface information of the analog module; constructing an external excitation response module in the Testbench according to the interface information; generating a first digital excitation of the digital module according to the digital interface information by using the external excitation response module; introducing an RTL digital modularization method to configure the analog module; generating a second digital excitation of the analog module according to the analog interface information by using the external excitation response module; driving the digital module to perform simulation by using the first digital excitation to obtain a digital simulation result; and calling an RTL digital model to drive the analog module by using the second digital excitation to obtain an analog simulation result. The technical effect of the application is that the digital-analog mixed chip simulation is efficiently performed.

Description

Technical Field

[0001] The present application relates to the field of hybrid simulation, and in particular to a method, system, device and storage medium for simulating a digital-analog hybrid chip. Background Art

[0002] Automotive-grade chips often contain many mixed-signal chips. These chips involve interactive communication between digital modules (such as Verilog / VHDL) and analog modules. Therefore, to more accurately verify the functional correctness of these chips, it is necessary to fully verify that the communication function and timing of the digital-analog interface meet the requirements. To achieve this, it is necessary to build a hybrid verification environment based on a digital simulation platform to perform mixed-signal simulation of the chips.

[0003] In traditional hybrid environments, the stimulus provided to analog modules includes not only internal digital signals output by the DUT's internal digital modules, but also analog signals (voltage, current, and other signals) input from top-level ports. These analog signals are often generated using conventional voltage and current generation methods based on hspice syntax, meaning the analog stimulus is provided in the analog netlist file (usually a .sp file in hspice format). When building a traditional hybrid simulation verification platform, the stimulus for digital modules and the stimulus for analog modules are generated using different patterns. The stimulus for digital modules is generated by the Digital Pattern (implemented through external models and tasks built into the simulation platform), while the stimulus for analog modules is generated by the Analog Pattern (injected through ports in the analog netlist based on hspice syntax).

[0004] When conducting hybrid simulation, if the traditional digital-analog hybrid simulation excitation method is used, the hybrid simulation environment is often redundant and less flexible, and it is easy to have excitation errors in the construction, which affects the efficient progress of the hybrid simulation. Summary of the Invention

[0005] In order to efficiently carry out digital-analog hybrid chip simulation, the present application provides a digital-analog hybrid chip simulation method, system, device and storage medium.

[0006] In a first aspect, the present application provides a method for simulating a hybrid digital-analog chip, which adopts the following technical solution:

[0007] receiving interface information of the DUT, wherein the interface information includes digital interface information of the digital module and analog interface information of the analog module;

[0008] Constructing an external stimulus response module in the Testbench according to the interface information;

[0009] generating a first digital stimulus for the digital module according to the digital interface information using an external stimulus response module;

[0010] Introducing an RTL digital modularization method to configure the analog module to obtain an RTL digital model, and using an external stimulus response module to generate a second digital stimulus for the analog module according to analog interface information;

[0011] The first digital stimulus is used to simulate the driving digital module to obtain a digital simulation result, and the second digital stimulus is used to call the driving analog module of the RTL digital model to obtain an analog simulation result.

[0012] Through the above technical solution, the RTL modularization method does not need to directly stimulate the analog stimulus in the analog netlist file. Instead, the stimulus module RTL is modularized, and then the digital stimulus is converted into an analog signal through the instantiation call method of the external module, omitting the Analog pattern part, and the digital-analog mixed chip simulation is carried out efficiently.

[0013] In a specific implementation scheme, generating the first digital stimulus of the digital module according to the digital interface information by using the external stimulus response module includes:

[0014] The external stimulus response module is encapsulated according to the digital interface information to generate a first digital stimulus for the digital module.

[0015] The above technical solutions improve the flexibility, maintainability, and verification efficiency of the Testbench, while also supporting multi-protocol expansion and complex test scenario coverage. Through modular design and parameterized configuration, verification engineers can focus on test case design rather than underlying protocol implementation, ultimately shortening verification cycles and improving design reliability.

[0016] In a specific possible implementation scheme, the method is also based on hspice syntax, the introduction of the RTL digital modularization method to configure the analog module to obtain the RTL digital model, and the use of the external stimulus response module to generate the second digital stimulus of the analog module according to the analog interface information includes:

[0017] Utilizing the hspice grammar to simulate the circuit of the analog module and record the analog interface signal of the analog module;

[0018] Constructing an RTL digital model according to the analog interface signal;

[0019] The external stimulus response module is encapsulated according to the analog interface information to generate a second digital stimulus for the analog module.

[0020] Through the above technical solution, the analog module RTL is modularized, and then the digital stimulus is converted into an analog signal through the instantiation call method of the external module, the Analog pattern part is omitted, and the digital-analog hybrid chip simulation is carried out efficiently.

[0021] In a specific implementation scheme, using the first digital stimulus to simulate the driving digital module to obtain a digital simulation result, and using the second digital stimulus to call the RTL digital model to drive the analog module to obtain an analog simulation result includes:

[0022] Constructing a conversion circuit, the conversion circuit including the RTL digital model, and converting the second digital stimulus into an analog stimulus using the RTL digital model in the conversion circuit;

[0023] The digital module is driven according to the first digital stimulus to obtain a digital module simulation result, and the analog module is driven according to the analog stimulus to obtain an analog module simulation result.

[0024] Through the above technical solution, the RTL digital model is configured when building the conversion circuit, which makes the input stimulation of the analog module more flexible, reduces the possibility of stimulation errors, and makes the simulation of the digital-analog hybrid chip efficient.

[0025] In a specific implementation scheme, driving the analog module according to the analog stimulus to obtain an analog module simulation result includes:

[0026] Reading the internal digital signal output by the digital module;

[0027] The analog module is driven according to the internal digital signal and the analog stimulus to obtain an analog module simulation result.

[0028] Through the above technical solution, in addition to the input analog signals (voltage / current and other signals), the excitation given to the analog module also includes the internal digital signal output from the digital module inside the DUT. Reading the internal digital signal output by the digital module makes the simulation of the digital-analog hybrid chip more comprehensive.

[0029] In a specific embodiment, the analog port signal information includes an analog port type signal, and constructing the conversion circuit includes:

[0030] Selecting a voltage-controlled device according to the analog port type signal, wherein the voltage-controlled device includes a voltage-controlled voltage source and a voltage-controlled current source using the hspice syntax;

[0031] A conversion circuit is constructed according to the voltage-controlled device.

[0032] Through the above technical solution, the RTL digital model is configured when building the conversion circuit, which makes the input stimulation of the analog module more flexible, reduces the possibility of stimulation errors, and makes the simulation of the digital-analog hybrid chip efficient.

[0033] In a specific implementation manner, after driving the digital module and the analog module according to the first digital stimulus and the second digital stimulus to obtain a simulation result, the method further includes:

[0034] Analyze whether the simulation results meet expectations;

[0035] If the simulation results meet expectations, the chip simulation verification is determined to be qualified;

[0036] If the simulation result does not meet expectations, the chip simulation verification is determined to be unqualified, and the digital-analog hybrid chip is adjusted according to the simulation result.

[0037] Through the above technical solution, through this debugging and simulation, designers can verify the functions of digital-analog hybrid chips with lower cost and higher performance.

[0038] In a second aspect, the present application provides a digital-analog hybrid chip simulation system, which adopts the following technical solution: the system includes:

[0039] An interface information acquisition module, configured to receive interface information of the DUT, wherein the interface information includes digital interface information of the digital module and analog interface information of the analog module;

[0040] External stimulus response module for constructing an external stimulus response module in the Testbench according to the interface information;

[0041] A digital stimulus generating module, configured to generate a first digital stimulus for the digital module according to the digital interface information using an external stimulus responding module;

[0042] An analog stimulus generation module is used to introduce an RTL digital modularization method to configure the analog module to obtain an RTL digital model, and use an external stimulus response module to generate a second digital stimulus for the analog module according to analog interface information;

[0043] The simulation module is used to use the first digital stimulus to simulate the driving digital module to obtain a digital simulation result, and use the second digital stimulus to call the RTL digital model to drive the analog module to obtain an analog simulation result.

[0044] In a third aspect, the present application provides a computer device that adopts the following technical solution: it includes a memory and a processor, and the memory stores a computer program that can be loaded and executed by the processor such as the above-mentioned digital-analog hybrid chip simulation method.

[0045] In a fourth aspect, the present application provides a computer-readable storage medium, which adopts the following technical solution: storing a computer program that can be loaded by a processor and execute the above-mentioned digital-analog hybrid chip simulation method.

[0046] In summary, this application has the following beneficial technical effects:

[0047] (1) The RTL modularization method does not require direct stimulation of analog stimuli in the analog netlist file. By modularizing the analog module RTL, the digital stimuli are converted into analog signals through the instantiation call method of the external module, omitting the Analog pattern part, and the digital-analog mixed chip simulation is carried out efficiently.

[0048] (2) When building the conversion circuit, the RTL digital model is configured to make the input stimulus of the analog module more flexible, reduce the possibility of stimulus errors, and make the simulation of the digital-analog hybrid chip efficient. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 This is a schematic diagram of the RTL digital modular hybrid simulation verification platform.

[0050] Figure 2 It is a flow chart in an embodiment of the present application.

[0051] Figure 3 It is a structural block diagram in an embodiment of the present application.

[0052] Reference numerals: 301, interface information acquisition module; 302, external stimulus response module; 303, digital stimulus generation module; 304, analog stimulus generation module; 305, simulation module. DETAILED DESCRIPTION

[0053] The following is combined with Figure 1-Figure 3 This application is described in further detail.

[0054] The embodiment of the present application discloses a method for simulating a mixed-signal chip, which is used to promote efficient simulation of the mixed-signal chip.

[0055] Automotive-grade chips often contain many mixed-signal chips. These chips involve interactive communication between digital modules (such as Verilog / VHDL) and analog modules. Therefore, to more accurately verify the functional correctness of these chips, it is necessary to fully verify that the communication function and timing of the digital-analog interface meet the requirements. To achieve this, it is necessary to build a hybrid verification environment based on a digital simulation platform to perform mixed-signal simulation of the chips.

[0056] In a traditional hybrid environment, the stimulus given to the analog module includes not only the internal digital signals output from the digital modules inside the DUT, but also the analog signals (voltage / current and other signals) input from the top-level ports. The analog signals input from the top-level ports are often based on the conventional voltage and current generation method of the hspice syntax, that is, the analog stimulus is given in the analog netlist file (usually the hspice format file .sp).

[0057] When building a traditional hybrid simulation verification platform, the stimulus for digital modules and the stimulus for analog modules are generated by different patterns respectively, that is, the stimulus for digital modules is generated by Digital Pattern (implemented through external models and external tasks built in the simulation platform) and the stimulus for analog modules is generated by Analog Pattern (stimulus is injected through the ports of the analog netlist based on hspice syntax).

[0058] When conducting hybrid simulation, if the excitation method is based on the traditional digital-analog hybrid simulation, the hybrid simulation environment is often redundant and less flexible, and it is easy to have excitation errors in the construction, affecting the efficient progress of the hybrid simulation.

[0059] Therefore, the present application proposes a mixed-signal chip simulation method, which is used to promote efficient mixed-signal chip simulation.

[0060] Schematic diagram of RTL digital modular hybrid simulation verification platform Figure 1 As shown below:

[0061] Among them, DUT (design under test): includes digital modules (Digital Cell) and analog modules (Analog Cell);

[0062] Interface (INTERFACE): responsible for the communication between the external environment and DUT;

[0063] Digital Pattern: generated by external modules (EXT_MODULE) and external tasks (EXT_TASK) and used to drive digital modules;

[0064] Testbench is a simulation environment used to verify the functional correctness of digital circuit designs.

[0065] like Figure 2 As shown, the method includes:

[0066] S10, receiving interface information of the DUT, where the interface information includes digital interface information of the digital module and analog interface information of the analog module.

[0067] Specifically, the DUT is the core object in the verification process, representing the overall analog and digital circuit design of a hybrid chip. The DUT is used to obtain interface information between the digital and analog modules in the hybrid chip. This information includes both the digital interface information of the digital modules and the analog interface information of the analog modules. This information includes the chip's bus protocol, timing parameters, and interface signal types.

[0068] S20, constructing an external stimulus response module in the Testbench according to the interface information.

[0069] Specifically, Testbench is a simulation environment used to verify the functional correctness of digital circuit designs. In Testbench, an external stimulus response module (i.e., Digital Pattern) is constructed based on interface information. The external stimulus response module includes an external module (EXT_MODULE) and an external task (EXT_TASK). External modules and external tasks are used to generate stimulus and transmit it to the DUT.

[0070] S30: Generate a first digital stimulus for the digital module according to the digital interface information using the external stimulus response module.

[0071] Specifically, an external model is defined in the external stimulus response module according to the digital interface information, and by integrating external tasks, such as setting specific goals (such as performance indicators and behavioral requirements), the tasks are converted into stimulus parameters to generate the first digital stimulus of the digital module.

[0072] S40 , introducing an RTL digital modularization method to configure the analog module to obtain an RTL digital model, and using an external stimulus response module to generate a second digital stimulus for the analog module according to the analog interface information.

[0073] Specifically, the corresponding RTL digital model is constructed for the interface signal generation of the analog module. By integrating external tasks, such as setting specific goals (such as performance indicators and behavioral requirements), the tasks are converted into stimulus parameters to generate the second digital stimulus of the analog module.

[0074] S50 , using the first digital stimulus to drive the digital module to perform simulation to obtain a digital simulation result, and using the second digital stimulus to call the RTL digital model to drive the analog module to obtain an analog simulation result.

[0075] Specifically, the first digital stimulus is used to drive the digital module to perform simulation to obtain a digital simulation result, and the second digital stimulus is used to drive the analog module to obtain an analog simulation result.

[0076] The RTL modularization method does not require direct stimulation of analog stimuli in the analog netlist file. Instead, the stimulus module RTL is modularized, and then the digital stimulus is converted into an analog signal through the instantiation call of the external module, omitting the Analog pattern part, and the simulation of the digital-analog mixed chip is carried out efficiently.

[0077] In one embodiment, in order to efficiently simulate the digital-analog hybrid chip, the step of using the external stimulus response module to generate the first digital stimulus of the digital module according to the digital interface information can be specifically performed as follows:

[0078] The external stimulus response module is encapsulated according to the digital interface information to generate the first digital stimulus of the digital module. Specifically, the corresponding external model is selected according to the interface signal type. The digital interface information includes interface parameters (such as clock frequency, register default value, analog circuit equivalent resistance), and the external model is configured according to the interface parameters; external tasks are integrated, such as setting specific goals (such as performance indicators, behavioral requirements), and the tasks are converted into stimulus parameters to generate the first digital stimulus of the digital module. The first digital stimulus is encapsulated into a format that complies with the interface protocol and transmitted through the interface.

[0079] Improve the flexibility, maintainability, and verification efficiency of the Testbench, while supporting multi-protocol expansion and complex test scenario coverage. Through modular design and parameterized configuration, verification engineers can focus on test case design rather than underlying protocol implementation, ultimately shortening verification cycles and improving design reliability.

[0080] In one embodiment, in order to efficiently simulate a mixed-analog chip, an RTL digital modularization method is introduced to configure the analog module to obtain an RTL digital model. The external stimulus response module is used to generate a second digital stimulus for the analog module according to the analog interface information. This step can be specifically performed as follows:

[0081] First, the hspice syntax is used to simulate the circuit of the analog module and record the analog interface signal of the analog module. Specifically, the analog module in the digital-analog hybrid chip builds the peripheral circuit required by the analog excitation port according to the requirements, and the hspice syntax is used to simulate the circuit of the analog module and record the analog interface signal of the analog module.

[0082] Then, an RTL digital model is constructed based on the analog interface signals. Specifically, the logic of the analog module is not important, only the port signals of the analog module are needed, and the RTL digital model is constructed based on the analog interface signals.

[0083] Next, the external stimulus response module is encapsulated according to the analog interface information to generate the second digital stimulus of the analog module. Specifically, external tasks are integrated, such as setting specific goals (such as performance indicators and behavioral requirements), and the tasks are converted into stimulus parameters to generate the second digital stimulus of the analog module. The second digital stimulus is encapsulated into a format that conforms to the interface protocol, output by the digital task, and transmitted to the analog module through the interface.

[0084] Configuring the RTL digital model when building the conversion circuit makes the input stimulus to the analog module more flexible, reduces the possibility of stimulus errors, and enables efficient simulation of mixed-analog chips.

[0085] In one embodiment, in order to efficiently simulate a mixed-analog chip, the steps of using a first digital stimulus to drive a digital module to simulate and obtain a digital simulation result, and using a second digital stimulus to call an RTL digital model to drive an analog module to obtain an analog simulation result can be specifically performed as follows:

[0086] First, construct a conversion circuit, which includes an RTL digital model. In the conversion circuit, the RTL digital model is used to convert the second digital excitation into an analog excitation. Specifically, the second digital excitation cannot directly drive the analog module, and the digital excitation signal needs to be converted into an analog signal. This requires the application of voltage-controlled devices such as the voltage-controlled voltage source (VCVS) and voltage-controlled current source (VCCS) of hspice to construct a conversion circuit to convert the corresponding digital signal into the analog signal required by the analog port. The conversion circuit also needs to construct an RTL digital model containing the port signal for easy calling.

[0087] Then, the digital module is driven according to the first digital excitation to obtain the digital module simulation result, and the analog module is driven according to the analog excitation to obtain the analog module simulation result. Specifically, the digital module is driven by the first digital excitation to obtain the digital simulation result, and the analog module is driven by the second digital excitation to obtain the analog simulation result.

[0088] In one embodiment, in order to efficiently simulate a digital-analog hybrid chip, the step of driving an analog module according to an analog stimulus to obtain an analog module simulation result can be specifically performed as follows:

[0089] Read the internal digital signal output by the digital module, and drive the analog module according to the internal digital signal and analog stimulus to obtain the simulation result of the analog module. Specifically, in addition to the input analog signal (voltage / current and other signals), the stimulus given to the analog module also includes the internal digital signal output from the digital module inside the DUT. Read the internal digital signal output by the digital module, and use the internal digital signal and analog stimulus to drive the analog module to obtain the simulation result of the analog module.

[0090] In one embodiment, in order to efficiently perform simulation of a mixed-analog chip, the step of constructing a conversion circuit can be specifically performed as follows:

[0091] First, select a voltage-controlled device based on the analog port type signal. Voltage-controlled devices include voltage-controlled voltage sources and voltage-controlled current sources using Hspice syntax. Specifically, the analog port signal information also includes the analog port type signal, which can be a voltage signal, a power signal, or both. First, determine the analog port type signal and select a voltage-controlled device based on the analog port type signal.

[0092] Then, a conversion circuit is constructed according to the voltage-controlled device. Specifically, when the analog port signal is a voltage signal, the conversion circuit is constructed according to a voltage-controlled voltage source using the hspice syntax.

[0093] Configuring the RTL digital model when building the conversion circuit makes the input stimulus to the analog module more flexible, reduces the possibility of stimulus errors, and enables efficient simulation of mixed-analog chips.

[0094] The following example illustrates the use of RTL digitization for mixed analog-digital chip simulation:

[0095] First, the analog module in the digital-analog chip is CAN PHY.

[0096] The traditional method is:

[0097] The analog module receives control signals from the digital module, switches operating modes, and implements normal transmit and receive communication via the CANH / CANL bus ports. Transmit function: txd_lv -> CANH / CANL -> rxd_lv . Receive function: CANH / CANL -> rxd_lv . The txd_lv and rxd_lv ports are the interface between the digital module and the analog module, while CANH / CANL are analog bus ports.

[0098] For transmission function verification, after setting up the hybrid simulation verification environment, directly input the stimulus to txd_lv through the digital end, and observe the waveform of the CAN FD PHY bus CANH / CANL signal characteristics and the signal rxd_lv output to the digital module to confirm the correctness of the transmission function. For the reception function, it is necessary to stimulate the corresponding "dominant" and "recessive" voltage signals at the CAN FD PHY bus CANH / CANL end, and then observe the output signal of the rxd_lv end to confirm the correctness of the reception function.

[0099] The excitation methods are all based on hspice syntax. The voltage signal is directly used to stimulate the "explicit" and "implicit" voltage signals of the analog bus port CANH / CANL through the excitation functions pulse and pwl in the form of Vxxx. The pulse function is a periodic voltage excitation function, and pwl is a piecewise linear voltage excitation function. These two methods can simply give voltage excitation. When the bus voltage signal that needs to be input has a specific frame format requirement, the above method will be relatively "clumsy" and inflexible. Moreover, when the voltage sequence that needs to be input to the bus terminal CANH / CANL is long enough, the excitation will appear very lengthy.

[0100] After the introduction of RTL digitization:

[0101] Define a voltage-controlled voltage source simulation module based on hspice syntax. This module outputs the differential / common-mode voltage signal required by the CAN bus and converts it into an RTL digital model that only contains the port information of its analog module. Subsequently, you only need to use use_spice to replace the corresponding RTL digital model in the hybrid simulation configuration file. During hybrid simulation, the final output signal of this module is a voltage signal, which is given to the CANH / CANL bus of the CAN FD PHY.

[0102] Second, the analog module in the digital-analog chip is PSI5 PHY.

[0103] The traditional method is:

[0104] The chip contains an analog module of PSI5 PHY, which is used to communicate with the digital end through the PSI interface. Similarly, the analog PSI PHY receives control signals from the digital end. In the synchronous transmission mode, the ECU first controls the digital module to transmit the digital syncpulse signal to the analog port VCE, and outputs it to the sensor end. Then, the sensor transmits the current modulation signal back to the VCE end according to the timing requirements, enters the PSI PHY for Manchester code decoding, and outputs it to the output port psi_dataout_lv for decoding by the digital module. The traditional excitation method in the figure not only requires the construction of a peripheral circuit for the VCE port, but also requires the input of a Manchester current signal at the VCE port at a given time. The current signal is given by the pwl function through the Ixxx method. Similarly, when the Manchester code is long, the corresponding current excitation will appear very lengthy, and it needs to be modified at each excitation moment. It has poor flexibility and is prone to errors when constructing the excitation.

[0105] After the introduction of RTL digitization:

[0106] For the Manchester-coded analog current excitation of the PSI5 PHY, an hspice-based voltage-controlled current source simulation module is defined. This module is a unit module with a 1mA output. i1m is the RTL digital model corresponding to the analog module. i1m_m calls the i1m module to generate analog signals of different current sizes. This is configured through ports, and i1m_m also has the function of generating current signals with different slopes. This shows that after the analog model is constructed as an RTL model, the construction of the analog excitation signal is highly flexible and portable. Then, in the hybrid simulation configuration file, use_spice is used to replace the corresponding RTL digital model.

[0107] In one embodiment, in order to efficiently simulate a digital-analog hybrid chip, the following steps may be performed to obtain simulation results by driving a digital module and an analog module according to the first digital stimulus and the second digital stimulus:

[0108] Analyze whether the simulation results meet expectations; if the simulation results meet expectations, the chip simulation verification is determined to be qualified; if the simulation results do not meet expectations, the chip simulation verification is determined to be unqualified, and the digital-analog hybrid chip is adjusted according to the simulation results. Specifically, the simulation results may be in the form of a waveform file or an echo state signal. The chip function is verified by analyzing the simulation results; if the simulation results meet expectations, the chip simulation verification is determined to be qualified; if the simulation results do not meet expectations, the chip simulation verification is determined to be unqualified, and the digital-analog hybrid chip is adjusted according to the simulation results.

[0109] Through hybrid debugging and simulation, designers can verify the functions of mixed-analog chips with lower cost and higher performance.

[0110] Based on the above method, the embodiment of the present application also discloses a digital-analog hybrid chip simulation system. Figure 3 , the system includes the following modules:

[0111] The interface information acquisition module 301 is used to receive the interface information of the DUT, the interface information including the digital interface information of the digital module and the analog interface information of the analog module;

[0112] External stimulus response module 302, for constructing an external stimulus response module in Testbench according to the interface information;

[0113] A digital stimulus generating module 303 is configured to generate a first digital stimulus for a digital module according to the digital interface information using an external stimulus response module;

[0114] The analog stimulus generation module 304 is configured to configure the analog module to obtain an RTL digital model by introducing an RTL digital modularization method, and to generate a second digital stimulus for the analog module according to the analog interface information using an external stimulus response module;

[0115] The simulation module 305 is used to use the first digital stimulus to drive the digital module to perform simulation to obtain a digital simulation result, and use the second digital stimulus to call the RTL digital model to drive the analog module to obtain an analog simulation result.

[0116] In one embodiment, the digital stimulus generating module 303 is specifically configured to encapsulate the external stimulus response module according to the digital interface information to generate the first digital stimulus for the digital module.

[0117] In one embodiment, the analog stimulus generation module 304 is specifically used to simulate the circuit of the analog module using hspice syntax and record the analog interface signals of the analog module; build an RTL digital model according to the analog interface signals; and encapsulate the external stimulus response module according to the analog interface information to generate a second digital stimulus for the analog module.

[0118] In one embodiment, the simulation module 305 is specifically used to construct a conversion circuit, which includes an RTL digital model. The RTL digital model is used in the conversion circuit to convert the second digital stimulus into an analog stimulus; the digital module is driven according to the first digital stimulus to obtain a digital module simulation result, and the analog module is driven according to the analog stimulus to obtain an analog module simulation result.

[0119] In one embodiment, the simulation module 305 is specifically configured to read the internal digital signal output by the digital module; and drive the analog module according to the internal digital signal and the analog stimulus to obtain the simulation result of the analog module.

[0120] In one embodiment, the simulation module 305 is specifically configured to select a voltage-controlled device according to the analog port type signal, the voltage-controlled device including a voltage-controlled voltage source and a voltage-controlled current source using hspice syntax; and construct a conversion circuit according to the voltage-controlled device.

[0121] The embodiment of the present application also discloses a computer device.

[0122] Specifically, the computer device includes a memory and a processor, and the memory stores a computer program that can be loaded by the processor and execute the above-mentioned digital-analog hybrid chip simulation method.

[0123] The embodiment of the present application also discloses a computer-readable storage medium.

[0124] Specifically, the computer-readable storage medium stores a computer program that can be loaded by a processor and executed such as the above-mentioned digital-analog hybrid chip simulation method. The computer-readable storage medium includes, for example: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.

[0125] This specific embodiment is merely an explanation of the present invention and is not intended to limit the present invention. After reading this specification, those skilled in the art may make non-creative modifications to this embodiment as needed. However, as long as such modifications are within the scope of the claims of the present invention, they are protected by patent law.

Claims

1. A method for simulating a mixed-analog chip, characterized in that: The method is based on a DUT including digital modules and analog modules, a testbench, and hspice syntax, and includes: receiving interface information of the DUT, wherein the interface information includes digital interface information of the digital module and analog interface information of the analog module; Constructing an external stimulus response module in the Testbench according to the interface information; generating a first digital stimulus for the digital module according to the digital interface information using an external stimulus response module; Simulating the analog module using the hspice syntax to construct an RTL digital model, and generating a second digital stimulus for the analog module according to analog interface information using an external stimulus response module; Construct a conversion circuit including the RTL digital model, convert the second digital stimulus into an analog stimulus in the conversion circuit using the RTL digital model, drive the analog module according to the analog stimulus to obtain an analog module simulation result, and use the first digital stimulus to drive the digital module for simulation to obtain a digital simulation result.

2. The method according to claim 1, characterized in that The generating the first digital stimulus of the digital module according to the digital interface information by using the external stimulus response module includes: The external stimulus response module is encapsulated according to the digital interface information to generate a first digital stimulus for the digital module.

3. The method according to claim 1, characterized in that The method of simulating the analog module by using the hspice syntax to construct an RTL digital model and generating a second digital stimulus for the analog module according to analog interface information by using an external stimulus response module comprises: Utilizing the hspice grammar to simulate the circuit of the analog module and record the analog interface signal of the analog module; Constructing an RTL digital model according to the analog interface signal; The external stimulus response module is encapsulated according to the analog interface information to generate a second digital stimulus for the analog module.

4. The method according to claim 1, characterized in that Driving the analog module according to the analog stimulus to obtain an analog module simulation result includes: Reading the internal digital signal output by the digital module; The analog module is driven according to the internal digital signal and the analog stimulus to obtain an analog module simulation result.

5. The method according to claim 3, characterized in that: The analog port signal information includes an analog port type signal, and the constructing of the conversion circuit includes: Selecting a voltage-controlled device according to the analog port type signal, wherein the voltage-controlled device includes a voltage-controlled voltage source and a voltage-controlled current source using the hspice syntax; A conversion circuit is constructed according to the voltage-controlled device.

6. The method according to claim 1, characterized in that After driving the digital module and the analog module according to the first digital stimulus and the second digital stimulus to obtain a simulation result, the method further includes: Analyze whether the simulation results meet expectations; If the simulation results meet expectations, the chip simulation verification is determined to be qualified; If the simulation result does not meet expectations, the chip simulation verification is determined to be unqualified, and the digital-analog hybrid chip is adjusted according to the simulation result.

7. A digital-analog hybrid chip simulation system, characterized in that: The system is based on a DUT including digital modules and analog modules, a testbench, and hspice syntax, and includes: An interface information acquisition module (301) is used to receive interface information of the DUT, wherein the interface information includes digital interface information of the digital module and analog interface information of the analog module; External stimulus response module (302), for constructing an external stimulus response module in the Testbench according to the interface information; A digital stimulus generation module (303) is used to generate a first digital stimulus for the digital module according to the digital interface information using an external stimulus response module; An analog stimulus generation module (304) is used to simulate the analog module using the hspice syntax to construct an RTL digital model, and to generate a second digital stimulus for the analog module according to analog interface information using an external stimulus response module; A simulation module (305) is used to construct a conversion circuit including the RTL digital model, convert the second digital stimulus into an analog stimulus using the RTL digital model in the conversion circuit, drive the analog module according to the analog stimulus to obtain an analog module simulation result, and drive the digital module to perform simulation using the first digital stimulus to obtain a digital simulation result.

8. A computer device, characterized in that: The method comprises a memory and a processor, wherein the memory stores a computer program that can be loaded by the processor and execute the method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that A computer program is stored which can be loaded by a processor and execute the method according to any one of claims 1 to 6.

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