Isolation driver and isolation driving method for driving power switching device

Abstract

The invention discloses an isolation driver and an isolation driving method. The isolation driver comprises a transformer, a primary side circuit, a secondary side circuit and a driving circuit. In response to an input control signal, the primary circuit provides primary pulse signals at a primary winding of the transformer, including a first set of primary pulse signals corresponding to a first state of the input control signal and a second set of primary pulse signals corresponding to a second state of the input control signal. The secondary circuit is coupled to the secondary winding of the transformer to receive a secondary pulse signal on the secondary winding and provide an output control signal and an output voltage. The secondary circuit switches the output control signal between a first state and a second state in response to the secondary pulse signal. The drive circuit provides a drive signal according to the output control signal to drive the power switch device, and the output voltage provided by the secondary circuit supplies power to the drive circuit. Therefore, no extra power supply circuit is needed, and isolated driving of the power switch device is realized.

Description

Technical Field

[0001] The present invention relates to an electronic circuit, and more particularly, to an isolation driver and an isolation driving method. Background Art

[0002] In high-power applications, power switching devices typically need to withstand significant power (e.g., several kilowatts to hundreds of kilowatts). However, the control circuit's power level is very low, and its voltage must be kept below a safe voltage level. Therefore, the control signal output by the control circuit must be electrically isolated before being transmitted to the control terminal of the power switching device. Prior art power switching devices require a driver circuit with a certain power rating to control their on and off states. Therefore, a reliable isolated driver circuit is needed to achieve isolated drive for the power switching device. Summary of the Invention

[0003] Therefore, the purpose of the present invention is to solve the above technical problems in the prior art and to provide an isolation driver and an isolation driving method for a power switching device.

[0004] According to an embodiment of the present invention, an isolated driver for driving a power switching device is proposed, comprising: a voltage input terminal, configurable to receive an input voltage; a control input terminal, configurable to receive an input control signal; a transformer, comprising a primary winding and a secondary winding; a primary circuit, coupled to the voltage input terminal and the primary winding, and providing a primary pulse signal at the primary winding, wherein the primary pulse signal comprises a first group of primary pulse signals and a second group of primary pulse signals, wherein in response to an input control signal of a first state, the primary circuit provides the first group of primary pulse signals at the primary winding, and in response to an input control signal of a second state, the primary circuit provides the second group of primary pulse signals at the primary winding, wherein the second group of primary pulse signals and the first group of primary pulse signals have different pulse widths or pulse durations. The transformer provides a secondary pulse signal in the secondary winding according to the primary pulse signal, and the secondary pulse signal includes a first group of secondary pulse signals corresponding to the first group of primary pulse signals, and a second group of secondary pulse signals corresponding to the second group of primary pulse signals; a secondary circuit is coupled to the secondary winding to receive the secondary pulse signal and provide an output control signal and an output voltage, and the secondary circuit switches the output control signal between a first state and a second state in response to the secondary pulse signal; and a driving circuit includes an input end and an output end, wherein the input end of the driving circuit receives the output control signal, and the output end of the driving circuit provides a driving signal according to the output control signal to drive the power switching device, and the driving circuit is powered by the output voltage provided by the secondary circuit.

[0005] According to an embodiment of the present invention, an isolated driver for driving a power switching device is also proposed, comprising: a voltage input terminal, which can be configured to receive an input voltage; a control input terminal, which can be configured to receive an input control signal; a transformer, which includes a primary winding and a secondary winding; a primary switching circuit, which includes an upper switch tube and a lower switch tube, wherein the first end of the upper switch tube is coupled to the voltage input terminal, the second end of the upper switch tube and the first end of the lower switch tube are commonly coupled to the first end of the primary winding, and the second end of the lower switch tube is coupled to the primary reference ground; an encoding circuit, which provides a second switching circuit according to the input control signal. A switch control signal and a second switch control signal, the first switch control signal is used to control the conduction and shutdown of the upper side switch tube, and the second switch control signal is used to control the conduction and shutdown of the lower side switch tube, so as to provide a primary pulse signal at the first end of the primary winding, wherein the transformer provides a secondary pulse signal at the secondary winding according to the primary pulse signal; a secondary switch circuit, coupled to the secondary winding, can be configured to rectify the secondary pulse signal and provide an output voltage; and a decoding circuit, can be configured to provide an output control signal according to the secondary pulse signal, for controlling the conduction and shutdown of the power switching device.

[0006] According to an embodiment of the present invention, an isolated driving method for driving a power switching device is also proposed, comprising: receiving an input voltage and an input control signal; controlling the on and off of at least one switch tube in a primary switching circuit according to the input control signal, wherein the primary switching circuit is coupled to a primary winding of a transformer, the primary switching circuit receives the input voltage and provides a primary pulse signal in the primary winding, and the secondary winding of the transformer is induced by the primary pulse signal to provide a secondary pulse signal; providing an output voltage after rectification according to the secondary pulse signal, wherein the output voltage is used to provide power for driving the power switching device; and providing an output control signal according to the secondary pulse signal, wherein the output control signal is used to control the on and off of the power switching device; wherein in response to a first state of the input control signal, the at least one switch tube in the primary switching circuit is controlled to be on and off in a first sequence to provide a primary pulse signal having a first characteristic, and in response to a second state of the input control signal, the at least one switch tube in the primary switching circuit is controlled to be on and off in a second sequence to provide a primary pulse signal having a second characteristic.

[0007] The embodiments of the present invention achieve isolated power transmission while electrically isolating the output control signal from the input control signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to better understand the present invention, the present invention will be described in detail with reference to the following drawings:

[0009] Figure 1 Schematic diagram of the circuit structure of the isolation driver 100 according to an embodiment of the present invention;

[0010] Figure 2 According to an embodiment of the present invention Figure 1 A timing diagram 200 of the isolation driver 100 is shown;

[0011] Figure 3 According to another embodiment of the present invention Figure 1 The waveform diagram 300 of the isolation driver 100 is shown;

[0012] Figure 4 According to another embodiment of the present invention Figure 1 The waveform diagram 400 of the isolation driver 100 is shown;

[0013] Figure 5 Schematic diagram of the circuit structure of the isolation driver 500 according to an embodiment of the present invention;

[0014] Figure 6 is a schematic diagram of the circuit structure of the encoding circuit 113 according to an embodiment of the present invention;

[0015] Figure 7 is a schematic diagram of the circuit structure of the decoding circuit 123 according to an embodiment of the present invention;

[0016] Figure 8A According to an embodiment of the present invention Figure 5 Waveform diagram 800A of the isolation driver 500 is shown;

[0017] Figure 8B According to another embodiment of the present invention Figure 5 Waveform diagram 800B of the isolation driver 500 is shown;

[0018] Figure 8C According to another embodiment of the present invention Figure 5 Waveform diagram 800C of the isolation driver 500 is shown;

[0019] Figure 9 FIG. 9 is a flowchart of an isolation driving method 900 according to an embodiment of the present invention.

[0020] In the drawings, the same or corresponding reference numerals are used to designate the same or corresponding elements. DETAILED DESCRIPTION

[0021] Specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the present invention. In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that these specific details are not necessarily required to practice the present invention. In other instances, well-known circuits, materials, or methods are not described in detail to avoid obscuring the present invention.

[0022] Throughout this specification, references to "one embodiment," "an embodiment," "an example," or "an example" mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment," "in an embodiment," "an example," or "an example" that appear in various places throughout this specification do not necessarily refer to the same embodiment or example. Furthermore, particular features, structures, or characteristics may be combined in one or more embodiments or examples in any suitable combinations and / or subcombinations. Furthermore, those skilled in the art will appreciate that the figures provided herein are for illustrative purposes only and are not necessarily drawn to scale. It should be understood that when an element is referred to as being "coupled to" or "connected to" another element, it can be directly coupled or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly coupled to" or "directly connected to" another element, there are no intervening elements. Identical reference numerals indicate identical elements. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0023] Figure 1 Figure 1 is a schematic diagram of the circuit structure of an isolation driver 100 according to an embodiment of the present invention. The isolation driver 100 receives an input voltage VIN at a voltage input terminal 101, an input control signal PWMIN at a control input terminal 102, and provides a drive signal Vg at an output terminal 103 to drive a power switch device S1. The isolation driver 100 includes a transformer T1, a primary circuit 11, a secondary circuit 12, and a drive circuit 13. The power switch device S1 includes, but is not limited to, a metal oxide semiconductor field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), a junction field effect transistor (JFET), a high electron mobility transistor (HEMT), and the like.

[0024] Transformer T1 includes a primary winding W1 on the primary side and a secondary winding W2 on the secondary side. A primary circuit 11 is coupled to a voltage input terminal 101 to receive an input voltage VIN and is coupled to the primary winding W1. In response to an input control signal PWMIN, the primary circuit 11 generates a periodic primary pulse signal Pul1 on the primary winding W1. For example, the primary circuit 11 generates a first set of primary pulse signals in response to a first state (e.g., a high level) of the input control signal PWMIN, and generates a second set of primary pulse signals in response to a second state (e.g., a low level) of the input control signal PWMIN. In one embodiment, the first set of primary pulse signals and the second set of primary pulse signals have different duty cycles or pulse widths. Transformer T1 provides a periodic secondary pulse signal Pul2 on the secondary winding W2 based on the primary pulse signal Pul1. The period of the secondary pulse signal Pul2 is the same as that of the primary pulse signal Pul1. In one embodiment, the secondary pulse signal Pul2 includes a first group of secondary pulse signals corresponding to the first group of primary pulse signals, and a second group of secondary pulse signals corresponding to the second group of primary pulse signals. The first group of primary pulse signals and the second group of primary pulse signals have different characteristics, and the corresponding first group of secondary pulse signals and second group of secondary pulse signals have different characteristics, so that the first state and the second state of the input control signal PWMIN are identified based on the first group of secondary pulse signals and the second group of secondary pulse signals, thereby controlling the output control signal PWMO to switch between the first state and the second state.

[0025] In one embodiment, the isolation driver 100 controls the power switch S1 to turn on based on a first state of the input control signal PWMIN and to turn off based on a second state of the input control signal PWMIN. The secondary circuit 12 is coupled to the secondary winding W2, receives a secondary pulse signal Pul2 provided by the secondary winding W2, and provides an output control signal PWMO and an output voltage VO. The driver circuit 13 receives the output control signal PWMO at its input and provides a drive signal Vg at its output based on the output control signal PWMO to drive the power switch S1. The driver circuit 13 is powered by the output voltage VO provided by the secondary circuit 12. In response to the secondary pulse signal Pul2, the secondary circuit 12 switches the output signal PWMO between a first state and a second state.

[0026] In an embodiment of the present invention, corresponding to different states of the input control signal PWMIN, different primary pulse signals Pul1 are provided on the primary side of the transformer T1, and a secondary pulse signal Pul2 is provided on the secondary side of the transformer T1. By identifying the characteristics of the secondary pulse signal Pul2, the corresponding output control signal PWMO is obtained. While the output control signal PWMO and the input control signal PWMIN are electrically isolated, isolated power transmission is achieved to power the drive circuit 13 located on the secondary side of the transformer T1 without the need for an additional power supply circuit, thereby simplifying the circuit and saving the area of ​​the circuit board while achieving isolated drive of the power switching device S1.

[0027] exist Figure 1 In the illustrated embodiment, the primary circuit 11 further includes a primary switching circuit 104 and an encoding circuit 105. The primary switching circuit 104 is coupled between the voltage input terminal 101 and the primary winding W1. The encoding circuit 105 provides a switching control signal Ctrl based on the input control signal PWMIN to control the on and off operation of at least one switch in the primary switching circuit 104, thereby generating a primary pulse signal Pul1 in the primary winding W1. In one embodiment, when the input control signal PWMIN changes to a first state, the switching control signal Ctrl controls the at least one switch in the primary switching circuit 104 to be turned on with a first duty cycle. When the input control signal PWMIN changes to a second state, the switching control signal Ctrl controls the at least one switch in the primary switching circuit 104 to be turned on with a second duty cycle, where the second duty cycle is different from the first duty cycle.

[0028] exist Figure 1 In the illustrated embodiment, the secondary circuit 12 further includes a secondary switching circuit 106 and a decoding circuit 107. The secondary switching circuit 106 is coupled to the secondary winding W2 and rectifies the secondary pulse signal Pul2 to provide an output voltage VO. The decoding circuit 107 provides an output control signal PWMO based on the secondary pulse signal Pul2. The decoding circuit 107 controls the output control signal PWMO to switch between a first state and a second state based on different characteristics of the secondary pulse signal Pul2. In one embodiment, when the decoding circuit 107 identifies a first set of secondary pulse signals, the output control signal PWMO changes to the first state, and when the decoding circuit 107 identifies a second set of secondary pulse signals, the output control signal changes to the second state. In one embodiment, the decoding circuit 107 controls the output control signal PWMO to switch between the first state and the second state based on the duty cycle of the secondary pulse signal Pul2.

[0029] Figure 2 FIG. 2 is a timing diagram 200 of the isolation driver 100 according to an embodiment of the present invention. Figure 2The timing diagram shown shows, from top to bottom, the input control signal PWMIN, the primary pulse signal Pul1 , the secondary pulse signal Pul2 , and the output control signal PWMO.

[0030] At time t1, the input control signal PWMIN becomes high level, and the primary switch circuit 104 provides the first set of primary pulse signals Pul1_1. Figure 2 In the illustrated embodiment, characteristics of the first set of primary pulse signals Pul1_1 include, for example, comprising multiple periodic pulses having a first duty cycle. In one embodiment, the first duty cycle is greater than 0.5. The duty cycle of a pulse is the ratio of the high level within a pulse period Tpul to the pulse period. The duty cycle of the primary pulse signal Pul1 represents the ratio between the on-time of at least one switch in the primary switching circuit 104 and the switching period. In one embodiment, a level between a high threshold voltage (e.g., 2V) and a power supply voltage (e.g., 3.3V) is a high level, and a level between zero voltage (0V) and a low threshold voltage (e.g., 1V) is a low level. Accordingly, the secondary side of the transformer T1 provides a first set of secondary pulse signals Pul2_1 having the same duty cycle as the first set of primary pulse signals Pul1_1. At time t2, after one pulse period Tpul, the decoding circuit 107 switches the output control signal PWM0 to a high level based on the characteristics of the first set of secondary pulse signals Pul2_1, such as the duty cycle of the secondary pulse signal Pul2. The turn-on delay time Ton_delay from when the input control signal PWMIN changes to a high level to when the output control signal PWMO changes to a high level to turn on the power switch device S1 may be equal to, for example, one pulse period Tpul.

[0031] At time t3, the input control signal PWMIN changes to a low level, and the primary switch circuit 104 provides a second set of primary pulse signals Pul1_2. Figure 2 In the embodiment shown, the characteristics of the second group of primary pulse signals Pul1_2 include, for example: including multiple periodic pulses, having a second duty cycle different from the first duty cycle. In one embodiment, the second duty cycle is less than 0.5. Accordingly, the secondary side of the transformer T1 provides a second group of secondary pulse signals Pul2_2, having the same duty cycle as the second group of primary pulse signals Pul1_2. At time t4, after a pulse period Tpul, the decoding circuit 107 switches the output control signal PWMO to a low level according to the characteristics of the second group of secondary pulse signals Pul2_2, for example, according to the duty cycle of the secondary pulse signal Pul2. The turn-off delay time Toff_delay from the input control signal PWMIN becoming a low level to the output control signal PWMO becoming a low level to turn off the power switching device S1 can be equal to, for example, one pulse period Tpul.

[0032] In another embodiment, the different characteristics of the first group of primary pulse signals Pul1_1 and the second group of primary pulse signals Pul1_2 may also include different pulse widths, so that the first group of secondary pulse signals Pul2_1 and the second group of secondary pulse signals Pul2_2 have different pulse widths. The decoding circuit 107 restores the state of the input control signal PWMIN by identifying the different pulse widths of the secondary pulse signal Pul2 to obtain the output control signal PWMO.

[0033] In one embodiment, when the input control signal PWMIN switches to a high level, the primary switching circuit 104 controls the primary pulse signal Pul1 to switch to a high level and begins outputting a first set of primary pulse signals Pul1_1 having a first characteristic. Furthermore, when the input control signal PWMIN switches to a low level, the primary switching circuit 104 controls the primary pulse signal Pul1 to switch to a low level and begins outputting a second set of primary pulse signals Pul1_2 having a second characteristic. Upon detecting a secondary pulse signal Pul2 having the first characteristic, the decoding circuit 107 switches the output control signal PWMO to a high level at the rising edge of the secondary pulse signal Pul2. Upon detecting a secondary pulse signal Pul2 having the second characteristic, the decoding circuit 107 switches the output control signal PWMO to a low level at the falling edge of the secondary pulse signal Pul2.

[0034] exist Figure 2 In the illustrated embodiment, the first set of primary pulse signals Pul1_1 has a first duty cycle, for example, equal to 0.75, and the second set of primary pulse signals Pul1_2 has a second duty cycle, for example, both equal to 0.25. However, those skilled in the art will appreciate that after the decoding circuit 107 switches the state of the output control signal PWM0 according to the duty cycle of the secondary pulse signal Pul2, the duty cycle of the primary pulse signal Pul1 may be changed. For example, the duty cycle of the first set of primary pulse signals Pul1_1 may not be limited to the first duty cycle, and the duty cycle of the second set of primary pulse signals Pul1_2 may not be limited to the second duty cycle.

[0035] Figure 3 FIG. 3 is a waveform diagram 300 of the isolation driver 100 according to another embodiment of the present invention. Figure 3The waveforms shown are, from top to bottom, the input control signal PWMIN, the primary pulse signal Pul1, the secondary pulse signal Pul2, and the output control signal PWMO. In one embodiment, when the input control signal PWMIN becomes high, at least within one pulse period Tpul, the primary pulse signal Pul1 and the secondary pulse signal Pul2 have a first duty cycle, and when the input control signal PWMO becomes low, at least within one pulse period Tpul, the primary pulse signal Pul1 and the secondary pulse signal Pul2 have a second duty cycle different from the first duty cycle. Figure 3 In the illustrated embodiment, at time t11, the input control signal PWMIN becomes high, and the primary switching circuit 104 provides a first set of primary pulse signals Pul1_1 having a first duty cycle. At time t12, the decoding circuit 107 switches the output control signal PWM0 to a high level based on the duty cycle of the first set of secondary pulse signals Pul2_1. After time t12, the duty cycles of the first set of primary pulse signals Pul1_1 and the first set of secondary pulse signals Pul2_1 are not limited to the first duty cycle; for example, their duty cycles can be equal to 0.5. At time t13, the input control signal PWMIN becomes low, and the primary switching circuit 104 provides a second set of primary pulse signals Pul1_2 having a second duty cycle. At time t14, the decoding circuit 107 switches the output control signal PWM0 to a low level based on the duty cycle of the second set of secondary pulse signals Pul2_2. After time t14 , the duty ratios of the second group of primary pulse signals Pul1_2 and the second group of secondary pulse signals Pul2_2 are not limited to the second duty ratio, for example, the duty ratios thereof may be equal to 0.5.

[0036] Figure 4 FIG. 4 is a waveform diagram 400 of the isolation driver 100 according to another embodiment of the present invention. Figure 4 The waveforms shown are, from top to bottom, the input control signal PWMIN, the primary pulse signal Pul1, the secondary pulse signal Pul2, and the output control signal PWMO. Figure 4In the illustrated embodiment, at time t21, the input control signal PWMIN goes high, and the primary switching circuit 104 outputs a first set of primary pulse signals Pul1_1 having a first duty cycle. At time t22, the decoding circuit 107 switches the output control signal PWM0 to a high level based on the duty cycle of the first set of secondary pulse signals Pul2_1. After time t22, the first set of primary pulse signals Pul1_1 continues to provide a pulse, after which the primary switching circuit 104 ceases switching, that is, stops outputting pulses of the first set of primary pulse signals Pul1_1. At time t23, the input control signal PWMIN goes low, and the primary switching circuit 104 outputs a second set of primary pulse signals Pul1_2 having a second duty cycle. At time t24, the decoding circuit 107 switches the output control signal PWM0 to a low level based on the duty cycle of the second set of secondary pulse signals Pul2_2. After time t24 , the second set of primary pulse signals Pul1_2 continues to provide a pulse, and then the primary switch circuit 104 stops the switching action, that is, stops outputting the pulses on the second set of primary pulse signals Pul1_2 .

[0037] Figure 5 FIG. 5 is a schematic diagram of the circuit structure of the isolation driver 500 according to an embodiment of the present invention. Figure 5 In the illustrated embodiment, the primary circuit 11B of the isolated driver 500 includes a primary switching circuit 112. The primary switching circuit 112 includes a high-side switching transistor HS and a low-side switching transistor LS. One end (e.g., the drain) of the high-side switching transistor HS is coupled to the voltage input terminal 101 to receive the input voltage VIN. The other end (e.g., the source) of the high-side switching transistor HS and one end (e.g., the drain) of the low-side switching transistor LS are coupled together to form a common terminal N1, which is coupled to one end of the primary winding W1 to provide a primary pulse signal Pul1. The other end (e.g., the source) of the low-side switching transistor LS is coupled to the primary reference ground GND. An input capacitor Cin is coupled between the voltage input terminal 101 and the primary reference ground GND. In one embodiment, the other end of the primary winding W1 is coupled to the primary reference ground GND via a capacitor C1. In one embodiment, capacitor C1 is used to eliminate the DC component of the transformer T1 to prevent transformer saturation.

[0038] exist Figure 5In the illustrated embodiment, the primary switching circuit 112 is described using a half-bridge circuit as an example. Those skilled in the art will appreciate that the primary switching circuit 112 may also employ other suitable circuit topologies, such as a full-bridge circuit, a flyback circuit, or a forward circuit. The upper switch S1 and the lower switch S2 may be, for example, metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), junction field effect transistors (JFETs), or the like. In response to a first state of the input control signal PWMIN, the isolation driver 500 controls the upper switch HS and the lower switch LS to alternately turn on and off in a first sequence, thereby generating a first set of primary pulse signals Pul1_1 having a first characteristic at one end of the primary winding W1. In response to a second state of the input control signal PWMIN, the isolation driver 500 controls the upper switch HS and the lower switch LS to alternately turn on and off in a second sequence, different from the first sequence, thereby generating a second set of primary pulse signals Pul1_2 having a second characteristic at one end of the primary winding W1. Interleaving the upper switch HS and the lower switch LS on and off in a first sequence, for example, includes: controlling the upper switch HS to conduct at a first duty cycle during at least one switching cycle, and controlling the lower switch LS and the upper switch HS to conduct in a complementary manner during the at least one switching cycle. Interleaving the upper switch HS and the lower switch LS on and off in a second sequence, for example, includes: controlling the upper switch HS to conduct at a second duty cycle during at least one switching cycle, and controlling the lower switch LS and the upper switch HS to conduct in a complementary manner during the at least one switching cycle. In one embodiment, the primary circuit 11B further includes an encoding circuit 113. The encoding circuit 113 receives an input control signal PWMIN and provides a switching control signal Ctrl1 and a switching control signal Ctrl2 based on the input control signal PWMIN. The switching control signal Ctrl1 is used to control the upper switch HS, and the switching control signal Ctrl2 is used to control the lower switch LS.

[0039] The secondary circuit 12B is coupled to the secondary winding W2 and provides an output voltage VO. The output capacitor Co is coupled between the output voltage VO and the secondary reference ground VEE. The secondary winding W2 senses the primary pulse signal Pul1 on the primary winding W1 and provides a secondary pulse signal Pul2. The secondary circuit 12B further provides an output control signal PWMO based on the secondary pulse signal Pul2 to control the on and off of the power switching device. The output voltage VO is used to provide power for driving the power switching device. In one embodiment, the secondary circuit 12B includes a secondary switching circuit 122 and a decoding circuit 123. The secondary switching circuit 122 rectifies the secondary pulse signal Pul2 on the secondary winding W2 to provide an output voltage VO. Figure 5In the embodiment shown, the secondary switch circuit 122 includes a switch tube SR1 and a switch tube SR2. The switch tube SR1 and the switch tube SR2 include, for example, diodes, wherein the cathode end of the switch tube SR1 is coupled to the output capacitor Co to provide the output voltage, the anode end of the switch tube SR1 and the cathode end of the switch tube SR2 are coupled together to form a common end N2, and coupled to one end of the secondary winding W2 to receive the secondary pulse signal Pul2, and the anode end of the switch tube SR2 is coupled to the secondary reference ground VEE. The switches SR1 and SR2 are not limited to Figure 5 The diode shown may also be, for example, a field effect transistor or a transistor. The other end of the secondary winding W2 is coupled to the secondary reference ground VEE via a capacitor C2. In one embodiment, the capacitor C2 is used to eliminate the DC component of the transformer T1 to prevent the transformer from saturating. The decoding circuit 123 restores the input control signal PWMIN at the secondary side of the transformer T1 according to the secondary pulse signal Pul2 to provide a corresponding output control signal PWMO. For example, when the secondary pulse signal Pul2 has a first characteristic, the decoding circuit 123 switches the output control signal PWMO to a first state, and when the secondary pulse signal Pul2 has a second characteristic, the decoding circuit 123 switches the output control signal PWMO to a second state.

[0040] In one embodiment, the isolated driver 500 further includes a voltage regulator 14. The voltage regulator 14 receives the output voltage VO and converts the output voltage VO into a supply voltage VSS to power the driver circuit 13. For example, a power supply terminal of the driver circuit 13 is coupled to the voltage regulator 14 to receive the supply voltage VSS. A reference terminal of the driver circuit 13 is coupled to the secondary side reference ground VEE. In one embodiment, the voltage regulator 14 may be, for example, a buck circuit, a buck-boost circuit, or a boost circuit.

[0041] Figure 6 FIG. 1 is a schematic diagram of the circuit structure of the encoding circuit 113 according to an embodiment of the present invention. Figure 6 In the embodiment shown, the encoding circuit 113 includes a signal generating circuit 61 and an output circuit 62. The signal generating circuit 61 receives an input control signal PWMIN and provides a periodic signal Tclk and a duty cycle signal Vduty according to the input control signal PWMIN. The periodic signal Tclk is used to control the switching period of the primary switching circuit 112, and the duty cycle signal Vduty is used to control the duty cycle of the primary pulse signal Pul1 provided by the primary switching circuit 112. The output circuit 62 provides switching control signals Ctrl1 and Ctrl2 according to the periodic signal Tclk and the duty cycle signal Vduty. It will be understood by those skilled in the art that the specific structure of the encoding circuit 113 is not limited to Figure 6 The embodiment shown.

[0042] Figure 7FIG. 1 is a schematic diagram of the circuit structure of the decoding circuit 123 according to an embodiment of the present invention. Figure 7 In the illustrated embodiment, the decoding circuit 123 includes a detection circuit 71 and an RS trigger 72. The detection circuit 71 receives the secondary pulse signal Pul2, detects the first state and the second state of the input control signal PWMIN according to the secondary pulse signal Pul2, and provides a set signal Set and a reset signal Reset according to the detection result. The RS trigger 72 provides an output control signal PWMO according to the set signal Set and the reset signal Reset. In one embodiment, when the detection circuit 71 detects that the secondary pulse signal Pul2 has a first characteristic, the set signal Set controls the output control signal PWMO to be set to a high level, and when the detection circuit 71 detects that the secondary pulse signal Pul2 has a second characteristic, the reset signal Reset controls the output control signal PWMO to be reset to a low level. It will be understood by those skilled in the art that the specific structure of the encoding circuit 123 is not limited to Figure 7 The embodiment shown.

[0043] Figure 8A According to an embodiment of the present invention Figure 5 A waveform diagram 800A of the isolation driver 500 is shown. Figure 8A The waveforms shown are, from top to bottom, the input control signal PWMIN, the switch control signal Ctrl1, the switch control signal Ctrl2, the primary pulse signal Pul1, the secondary pulse signal Pul2, the set signal Set, the reset signal Reset, and the output control signal PWMO.

[0044] like Figure 8AAs shown, at time t31, the input control signal PWMIN goes high, the switch control signal Ctrl1 goes high to turn on the upper switch HS, and the switch control signal Ctrl2 remains low to keep the lower switch LS off. The switch control signal Ctrl1 controls the upper switch HS to periodically turn on and off at a first duty cycle, while the switch control signal Ctrl2 controls the lower switch LS to complement the upper switch HS. At time t32, after one switching cycle, i.e., one pulse period Tpul, the decoding circuit 123 detects that the duty cycle of the secondary pulse signal Pul2 meets the first characteristic. The set signal Set goes high, controlling the output control signal PWM0 to go high. At time t33, the input control signal PWMIN goes low, the switch control signal Ctrl1 remains low to keep the upper switch HS off, and the switch control signal Ctrl2 goes high to turn on the lower switch LS. Switching control signal Ctrl1 controls the upper switch HS to periodically turn on and off at a second duty cycle. Switching control signal Ctrl2 controls the lower switch LS and upper switch HS to complement each other. At time t34, after one switching cycle, or pulse period Tpul, decoding circuit 123 detects that the duty cycle of secondary pulse signal Pul2 meets the second characteristic. Reset signal Reset goes high, causing output control signal PWM0 to go low.

[0045] Figure 8B According to another embodiment of the present invention Figure 5 A waveform diagram 800B of the isolation driver 500 is shown. Figure 8B The waveforms shown are, from top to bottom, the input control signal PWMIN, the switch control signal Ctrl1, the switch control signal Ctrl2, the primary pulse signal Pul1, the secondary pulse signal Pul2, the set signal Set, the reset signal Reset, and the output control signal PWMO. Figure 8BIn the illustrated embodiment, at time t41, the input control signal PWMIN goes high, and the switch control signal Ctrl1 controls the duty cycle of the high-side switch HS to be greater than 0.5 for at least one switching cycle. At time t42, the decoding circuit 123 recognizes the high input control signal PWMIN based on the secondary pulse signal Pul2, and the set signal Set goes high to control the output control signal PWMO to be high. Subsequently, the duty cycle of the high-side switch HS is not limited to greater than 0.5 and can be, for example, equal to 0.5. At time t43, the input control signal PWMIN goes low, and the switch control signal Ctrl1 controls the duty cycle of the high-side switch HS to be less than 0.5 for at least one switching cycle. At time t44, the decoding circuit 123 recognizes the low input control signal PWMIN based on the secondary pulse signal Pul2, and the reset signal Reset controls the output control signal PWMO to be low. Subsequently, the duty cycle of the high-side switch HS is not limited to less than 0.5 and can be, for example, equal to 0.5.

[0046] Figure 8C According to another embodiment of the present invention Figure 5 A waveform diagram 800C of the isolation driver 500 is shown. Figure 8C The waveforms shown are, from top to bottom, the input control signal PWMIN, the switch control signal Ctrl1, the switch control signal Ctrl2, the primary pulse signal Pul1, the secondary pulse signal Pul2, the set signal Set, the reset signal Reset, and the output control signal PWMO. Figure 8CIn the illustrated embodiment, at time t51, the input control signal PWMIN goes high, and the switch control signal Ctrl1 controls the duty cycle of the high-side switch HS to be greater than 0.5 for at least one switching cycle. At time t52, the decoding circuit 123 recognizes the high input control signal PWMIN based on the secondary pulse signal Pul2, and the set signal Set goes high, controlling the output control signal PWMO to be high. Subsequently, after the first set of primary pulse signals Pul1_1 continues to provide a pulse, the primary switching circuit 112 ceases switching, and both the high-side switch HS and the low-side switch remain off, that is, the output of the pulses of the first set of primary pulse signals Pul1_1 is stopped. At time t53, the input control signal PWMIN goes low, and the switch control signal Ctrl1 controls the duty cycle of the high-side switch HS to be less than 0.5 for at least one switching cycle. At time t54, the decoding circuit 107 recognizes the low input control signal PWMIN based on the secondary pulse signal Pul2, and the reset signal Reset goes high, controlling the output control signal PWMO to be low. Subsequently, after the second set of primary pulse signals Pul1_2 continues to provide one pulse, the primary switch circuit 112 stops switching, and both the upper switch tube HS and the lower switch tube remain off, that is, stops outputting the pulses on the second set of primary pulse signals Pul1_2.

[0047] Figure 9 This is a flowchart of an isolated driving method 900 according to an embodiment of the present invention. It includes steps S11 to S14. In step S11, an input voltage and a control input signal are received. In step S12, the on and off of at least one switch tube in the primary switching circuit is controlled according to the control input signal, wherein the primary switching circuit is coupled to the primary winding of the transformer, the primary switching circuit receives the input voltage, and provides a periodic primary pulse signal in the primary winding, and the secondary winding of the transformer is induced by the primary pulse signal to provide a secondary pulse signal. In step S13, an output voltage is provided after rectification according to the secondary pulse signal, and the output voltage is used to provide power for driving the power switching device. In step S14, an output control signal is provided according to the secondary pulse signal, and the output control signal is used to control the on and off of the power switching device.

[0048] In one embodiment, in response to a first state of an input control signal, at least one switch tube in the primary switching circuit is controlled to be turned on and off in a first sequence, for example, the at least one switch tube is controlled to be turned on with a first duty cycle in at least one switching cycle to provide a primary pulse signal with a first characteristic, and in response to a second state of the input control signal, the at least one switch tube in the primary switching circuit is controlled to be turned on and off in a second sequence, for example, the at least one switch tube is controlled to be turned on with a second duty cycle in at least one switching cycle to provide a primary pulse signal with a second characteristic.

[0049] In one embodiment, in response to the input control signal changing to a first state, the output control signal controls the power switch device to turn on, and in response to the input control signal changing to a second state, the output control signal controls the power switch device to turn off, and the switching cycle is the switching cycle of the primary switching circuit.

[0050] In one embodiment, providing an output control signal based on a secondary pulse signal includes: controlling the output control signal to switch to a first state in response to a first characteristic of the secondary pulse signal to control the power switching device to turn on, and controlling the output control signal to switch to a second state in response to a second characteristic of the secondary pulse signal to control the power switching device to turn off.

[0051] While the present invention has been described with reference to several exemplary embodiments, it should be understood that the terms used are descriptive and illustrative, rather than restrictive. Since the present invention can be embodied in many forms without departing from the spirit or essence of the invention, it should be understood that the above-described embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope of the appended claims. All changes and modifications that fall within the scope of the claims or their equivalents are intended to be covered by the appended claims.

Claims

1. An isolated driver for driving a power switching device, comprising: A voltage input terminal, configurable to receive an input voltage; A control input terminal, configurable to receive an input control signal; a transformer, including a primary winding and a secondary winding; a primary circuit coupled to the voltage input terminal and the primary winding, and providing a primary pulse signal at the primary winding, the primary pulse signal including a first group of primary pulse signals and a second group of primary pulse signals, wherein in response to an input control signal of a first state, the primary circuit provides the first group of primary pulse signals at the primary winding, and in response to an input control signal of a second state, the primary circuit provides the second group of primary pulse signals at the primary winding, the second group of primary pulse signals and the first group of primary pulse signals having different pulse widths or duty cycles, wherein the transformer provides a secondary pulse signal at the secondary winding according to the primary pulse signal, the secondary pulse signal including a first group of secondary pulse signals corresponding to the first group of primary pulse signals, and a second group of secondary pulse signals corresponding to the second group of primary pulse signals; a secondary circuit coupled to the secondary winding to receive a secondary pulse signal and provide an output control signal and an output voltage, wherein the secondary circuit switches the output control signal between a first state and a second state in response to the secondary pulse signal; as well as The drive circuit includes an input end and an output end, wherein the input end of the drive circuit receives an output control signal, and the output end of the drive circuit provides a drive signal according to the output control signal to drive the power switching device, and the drive circuit is powered by the output voltage provided by the secondary circuit.

2. The isolated driver according to claim 1, wherein the primary circuit comprises: A primary switching circuit is coupled between the voltage input terminal and the primary winding, wherein the primary switching circuit includes at least one switching tube; as well as The encoding circuit provides a switch control signal according to the input control signal to control the on and off of at least one switch tube in the primary switch circuit, thereby generating a primary pulse signal in the primary winding.

3. The isolated driver of claim 2 , wherein when the input control signal changes to a first state, the switch control signal controls the at least one switch in the primary switch circuit to be turned on with a first duty cycle, and when the input control signal changes to a second state, the switch control signal controls the at least one switch in the primary switch circuit to be turned on with a second duty cycle, wherein the first duty cycle is not equal to the second duty cycle.

4. The isolated driver according to claim 1 , wherein the secondary circuit comprises: The secondary switching circuit is coupled to the secondary winding and rectifies the secondary pulse signal to provide an output voltage; as well as The decoding circuit provides an output control signal according to the secondary pulse signal, wherein when the decoding circuit recognizes a first set of secondary pulse signals, the output control signal changes to a first state, and when the decoding circuit recognizes a second set of secondary pulse signals, the output control signal changes to a second state.

5. The isolated driver according to claim 1 , wherein the secondary circuit comprises: The secondary switching circuit is coupled between the secondary winding and the output voltage, and rectifies the secondary pulse signal to provide the output voltage; as well as The decoding circuit provides an output control signal according to the secondary pulse signal, wherein the decoding circuit controls the output control signal to switch between a first state and a second state according to the duty cycle of the secondary pulse signal.

6. The isolated driver according to claim 1 , wherein the primary circuit comprises: A primary-side switching circuit includes an upper switching tube and a lower switching tube, wherein a first terminal of the upper switching tube is coupled to the voltage input terminal, a second terminal of the upper switching tube and a first terminal of the lower switching tube are commonly coupled to a first terminal of the primary winding, and a second terminal of the lower switching tube is coupled to a primary-side reference ground; as well as The encoding circuit provides a first switch control signal and a second switch control signal according to the input control signal. The first switch control signal is used to control the upper side switch tube, and the second switch control signal is used to control the lower side switch tube to provide a primary pulse signal at the first end of the primary winding. 7 . The isolated driver as claimed in claim 6 , wherein the second end of the primary winding is coupled to the primary reference ground via a first capacitor.

8. The isolated driver of claim 6 , wherein when the input control signal changes to a first state, the upper switch is turned on with a first duty cycle for at least one switching cycle, and when the input control signal changes to a second state, the upper switch is turned on with a second duty cycle for at least one switching cycle, and the second duty cycle is not equal to the first duty cycle.

9. The isolated driver according to claim 1 , wherein the secondary circuit comprises: The secondary-side switching circuit includes a first switching tube and a second switching tube, wherein a first terminal of the first switching tube is coupled to an output capacitor to provide an output voltage, a second terminal of the first switching tube and a first terminal of the second switching tube are commonly coupled to a first terminal of a secondary winding, and a second terminal of the second switching tube is coupled to a secondary-side reference ground; as well as The decoding circuit provides an output control signal according to the secondary side pulse signal. 10 . The isolated driver as claimed in claim 9 , wherein the second end of the secondary winding is coupled to the secondary reference ground via a second capacitor.

11. An isolation driver for driving a power switching device, comprising: A voltage input terminal, configurable to receive an input voltage; A control input terminal, configurable to receive an input control signal; a transformer, including a primary winding and a secondary winding; A primary-side switching circuit includes an upper switching tube and a lower switching tube, wherein a first terminal of the upper switching tube is coupled to the voltage input terminal, a second terminal of the upper switching tube and a first terminal of the lower switching tube are commonly coupled to a first terminal of the primary winding, and a second terminal of the lower switching tube is coupled to a primary-side reference ground; an encoding circuit, providing a first switch control signal and a second switch control signal according to an input control signal, wherein the first switch control signal is used to control the on / off of the upper switch tube, and the second switch control signal is used to control the on / off of the lower switch tube, so as to provide a primary pulse signal at the first end of the primary winding, wherein the transformer provides a secondary pulse signal at the secondary winding according to the primary pulse signal; A secondary switching circuit is coupled to the secondary winding and can be configured to rectify the secondary pulse signal to provide an output voltage; as well as The decoding circuit can be configured to provide an output control signal according to the secondary side pulse signal, so as to control the on and off of the power switching device. 12 . The isolated driver as claimed in claim 11 , wherein the second end of the primary winding is coupled to the primary reference ground via a first capacitor.

13. The isolated driver as claimed in claim 11, wherein the secondary side switching circuit includes a first switching tube and a second switching tube, the first end of the first switching tube is coupled to the output capacitor to provide the output voltage, the second end of the first switching tube and the first end of the second switching tube are commonly coupled to the first end of the secondary winding, and the second end of the second switching tube is coupled to the secondary side reference ground. 14 . The isolated driver as claimed in claim 13 , wherein the second end of the secondary winding is coupled to the secondary reference ground via a second capacitor.

15. The isolated driver of claim 11 , wherein when the input control signal changes to a first state, the upper switch is turned on with a first duty cycle for at least one switching cycle, and when the input control signal changes to a second state, the upper switch is turned on with a second duty cycle for at least one switching cycle, and the second duty cycle is not equal to the first duty cycle. 16 . The isolation driver of claim 15 , wherein the output control signal controls the power switch device to be turned on or off in response to a state of the input control signal. 17 . The isolation driver of claim 11 , wherein the decoding circuit controls the output control signal to switch between the first state and the second state according to a duty cycle of the secondary-side pulse signal.

18. An isolated driving method for driving a power switching device, comprising: receiving an input voltage and an input control signal; According to the input control signal, the primary switching circuit is controlled to turn on and off at least one switch tube, wherein the primary switching circuit is coupled to the primary winding of the transformer, receives the input voltage, and provides a primary pulse signal to the primary winding, and the secondary winding of the transformer senses the primary pulse signal and provides a secondary pulse signal; Providing an output voltage after rectification according to the secondary side pulse signal, the output voltage is used to provide power for driving the power switching device; as well as Providing an output control signal according to the secondary side pulse signal, wherein the output control signal is used to control the on and off of the power switch device; in In response to a first state of an input control signal, at least one switch tube in the primary switching circuit is controlled to be turned on and off in a first sequence to provide a primary pulse signal having a first characteristic, and in response to a second state of the input control signal, at least one switch tube in the primary switching circuit is controlled to be turned on and off in a second sequence to provide a primary pulse signal having a second characteristic.

19. The isolated driving method according to claim 18, wherein in response to the input control signal changing to a first state, the output control signal controls the power switch device to be turned on, and in response to the input control signal changing to a second state, the output control signal controls the power switch device to be turned off, and the switching cycle is the switching cycle of the primary switching circuit.

20. The isolation driving method according to claim 18, wherein providing the output control signal according to the secondary side pulse signal comprises: In response to a first feature of the secondary-side pulse signal, controlling the output control signal to switch to a first state to control the power switch device to be turned on; as well as In response to the second characteristic of the secondary-side pulse signal, the output control signal is controlled to switch to a second state to control the power switch device to be turned off.

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