Pwm motor drive system

Abstract

The PWM motor driving system comprises a PWM mode gating module, a PWM signal configuration module and an output driving module, which are electrically connected in sequence, a first input end of the PWM mode gating module is in communication connection with an upper computer, a second input end of the PWM mode gating module is in electric connection with a clock source, and an output end of the output driving module is in electric connection with a motor to be driven to output a PWM control signal matched with the motor to be driven. In the PWM motor driving system, the PWM mode gating module generates an initial PWM signal based on a control signal sent by the upper computer and a reference clock signal sent by the clock source, the initial PWM signal is configured into two or more than two pre-driving signals of different phases through the PWM signal configuration module, and the output driving module converts the two or more than two pre-driving signals of different phases into two or more than two driving signals of different phases, so that adaptive driving of multiple types of motors is realized.

Description

Technical Field

[0001] This disclosure relates to the field of motor drive technology, and in particular to a PWM motor drive system. Background Technology

[0002] Pulse Width Modulation (PWM) is a common motor control method. By precisely adjusting the duty cycle and frequency parameters of the input signal, key performance indicators such as motor speed and torque can be controlled. Single-phase, two-phase, and three-phase motors are common motor types, suitable for different application scenarios and meeting different usage requirements, and require corresponding single-phase, two-phase, and three-phase PWM signals for driving.

[0003] Currently, traditional PWM motor drive systems can only generate PWM signals with a fixed phase, which cannot meet the driving requirements of various types of motors. Therefore, how to build an intelligent drive system that can dynamically configure multi-mode PWM signals and realize adaptive driving of multiple types of motors on a single controller platform has become a technical problem that technical personnel urgently need to solve. Summary of the Invention

[0004] In view of this, this disclosure proposes a PWM motor drive system that can realize adaptive drive of multiple types of motors.

[0005] This disclosure provides a PWM motor drive system, including:

[0006] PWM mode selection module, PWM signal configuration module, and output drive module;

[0007] The PWM mode selection module, the PWM signal configuration module, and the output drive module are electrically connected in sequence. The first input terminal of the PWM mode selection module is connected to the host computer for communication. The second input terminal of the PWM mode selection module is electrically connected to the clock source. The output terminal of the output drive module is electrically connected to the motor to be driven, so as to output a matching PWM control signal to the motor to be driven.

[0008] The PWM mode selection module is configured to receive a control signal sent by the host computer and a reference clock signal sent by the clock source, parse the control signal to obtain PWM signal configuration information, generate an initial PWM signal according to the configuration information and the reference clock signal, and send the initial PWM signal to the PWM signal configuration module.

[0009] The PWM signal configuration module is configured to receive an initial PWM signal, configure the initial PWM signal as two or more pre-drive signals with different phases, and then send it to the output drive module.

[0010] The output drive module is configured to receive the pre-drive signal, generate a corresponding drive signal based on the pre-drive signal, and send it to the motor to be driven.

[0011] In one possible implementation, the PWM signal configuration module includes: a single-phase configuration module, a two-phase configuration module, and a three-phase configuration module;

[0012] The PWM mode selection module is further configured to parse the control signal to obtain output mode information, and send the initial PWM signal to at least one of the single-phase configuration module, the two-phase configuration module, and the three-phase configuration module according to the output mode information.

[0013] The single-phase configuration module is configured to receive the initial PWM signal and send it as a single-phase PWM pre-drive signal to the output drive module;

[0014] The two-phase configuration module is configured to receive the initial PWM signal, configure it as a two-phase PWM pre-drive signal, and send it to the output drive module.

[0015] The three-phase configuration module is configured to receive the initial PWM signal, configure it as a three-phase PWM pre-drive signal, and send it to the output drive module.

[0016] In one possible implementation, the PWM mode gating module includes: a control signal decoder, an initial PWM signal configuration module, and a channel selection module;

[0017] The input terminal of the control signal decoder serves as the first input terminal of the PWM mode selection module 110 and is communicatively connected to the host computer to receive control signals sent by the host computer and parse the control signals to obtain the configuration information and the output mode information. The first output terminal of the control signal decoder is electrically connected to the first input terminal of the initial PWM signal configuration module to send the configuration information to the initial PWM signal configuration module. The second output terminal of the control signal decoder is electrically connected to the first input terminal of the channel selection module to send the output mode information to the channel selection module.

[0018] The second input terminal of the initial PWM signal configuration module is electrically connected to the clock source as the second input terminal of the PWM mode selection module to receive the reference clock signal sent by the clock source, and generate an initial PWM signal according to the configuration information and the reference clock signal. The output terminal of the initial PWM signal configuration module is electrically connected to the second input terminal of the channel selection module to send the initial PWM signal to the channel selection module.

[0019] The output terminal of the channel selection module is electrically connected to the input terminal of the PWM mode gating module as the output terminal of the PWM signal configuration module, so as to send the initial PWM signal to at least one of the single-phase configuration module, the two-phase configuration module and the three-phase configuration module according to the received output mode information.

[0020] In one possible implementation, the configuration information includes frequency configuration information and duty cycle configuration information;

[0021] The initial PWM signal configuration module includes: a frequency adjustment module and a duty cycle adjustment module;

[0022] The first input terminal of the frequency adjustment module is electrically connected to a first output terminal of the control signal decoder as a first input terminal of the initial PWM signal configuration module to receive frequency configuration information sent by the control signal decoder. The second input terminal of the frequency adjustment module is electrically connected to a clock source as a second input terminal of the initial PWM signal configuration module to receive the reference clock signal sent by the clock source and adjust the frequency of the reference clock signal according to the frequency configuration information to generate a PWM signal with a specified frequency. The output terminal of the frequency adjustment module is electrically connected to the second input terminal of the duty cycle adjustment module to send the PWM signal with the specified frequency to the duty cycle adjustment module.

[0023] The first input terminal of the duty cycle adjustment module is electrically connected to the other first input terminal of the initial PWM signal configuration module and the other first output terminal of the control signal decoder to receive the duty cycle configuration information sent by the control signal decoder. According to the duty cycle information, the duty cycle of the PWM signal with a specified frequency is adjusted to generate an initial PWM signal with a specified frequency and a specified duty cycle. The output terminal of the duty cycle adjustment module is electrically connected to the second input terminal of the channel selection module as the output terminal of the initial PWM signal configuration module to send the initial PWM signal to the channel selection module.

[0024] In one possible implementation, the frequency adjustment module includes a frequency and phase detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a frequency divider.

[0025] The second input terminal of the frequency and phase detector is electrically connected to the clock source as the second input terminal of the frequency adjustment module to receive the reference clock signal sent by the clock source. The output terminal of the frequency and phase detector is connected to the second input terminal of the frequency divider in sequence through the charge pump, the loop filter and the voltage-controlled oscillator. The output terminal of the frequency divider is connected to the first input terminal of the frequency and phase detector.

[0026] The output terminal of the voltage-controlled oscillator is electrically connected to the second input terminal of the duty cycle adjustment module, serving as the input terminal of the frequency adjustment module.

[0027] The first input terminal of the frequency divider is electrically connected to a first output terminal of the control signal decoder as the first input terminal of the frequency adjustment module, so as to receive the frequency configuration information sent by the control signal decoder. The output terminal of the frequency divider is electrically connected to the first input terminal of the frequency and phase detector.

[0028] In one possible implementation, the duty cycle adjustment module includes a digital-to-analog converter, an integrator, and a comparator;

[0029] The input terminal of the digital-to-analog converter is electrically connected to the other first output terminal of the control signal decoder as the first input terminal of the duty cycle adjustment module, so as to receive the duty cycle configuration information sent by the control signal decoder and convert the duty cycle configuration information into an analog signal. The output terminal of the digital-to-analog converter is electrically connected to the first input terminal of the comparator so as to send the analog signal to the comparator.

[0030] The input terminal of the integrator is electrically connected to the output terminal of the frequency adjustment module as the second input terminal of the duty cycle adjustment module to receive the PWM signal with a specified frequency output by the frequency adjustment module. The output terminal of the integrator is electrically connected to the second input terminal of the comparator to send the PWM signal with a specified frequency to the comparator after integration processing, so that the comparator adjusts the duty cycle of the integrated PWM signal with a specified frequency according to the analog signal to generate an initial PWM signal with a specified frequency and a specified duty cycle.

[0031] The output terminal of the comparator is electrically connected to the second input terminal of the channel selection module as the output terminal of the duty cycle adjustment module, so as to send the initial PWM signal to the channel selection module.

[0032] In one possible implementation, the channel selection module includes: a first control switch, a second control switch, and a third control switch;

[0033] The control terminals of the first control switch, the second control switch, and the third control switch are respectively connected to the second output terminal of the control signal decoder as a first input terminal of the channel selection module, so as to receive the output mode information sent by the control signal decoder and control its on / off operation according to the output mode information;

[0034] The input terminals of the first control switch, the second control switch, and the third control switch are electrically connected and then used as the second input terminal of the channel selection module, which is electrically connected to the output terminal of the initial PWM signal configuration module to receive the initial PWM signal sent by the initial PWM signal configuration module.

[0035] The output terminal of the first control switch is electrically connected to the first input terminal of the single-phase configuration module as the first sub-output terminal of the channel selection module, so as to send the initial PWM signal to the single-phase configuration module;

[0036] The output terminal of the second control switch is electrically connected to the first input terminal of the two-phase configuration module as the second sub-output terminal of the channel selection module, so as to send the initial PWM signal to the two-phase configuration module;

[0037] The output terminal of the third control switch is electrically connected to the first input terminal of the three-phase configuration module as the third sub-output terminal of the channel selection module, so as to send the initial PWM signal to the three-phase configuration module.

[0038] In one possible implementation, the output driving module includes a dead time generation module, a pre-driving module, and an output stage;

[0039] The dead time generation module, the pre-drive module, and the output stage are electrically connected in sequence. The input terminal of the dead time generation module is electrically connected to the PWM signal configuration module as the input terminal of the output drive module. The output stage is electrically connected to the motor to be driven as the output terminal of the output drive module.

[0040] In one possible implementation, the dead time generation module includes at least one of a delay circuit, an inverter, and an NOR gate.

[0041] In one possible implementation, the pre-drive module includes an upper arm drive circuit and a lower arm drive circuit.

[0042] This disclosure provides a PWM motor drive system, including: a PWM mode selection module, a PWM signal configuration module, and an output drive module. The PWM mode selection module, PWM signal configuration module, and output drive module are electrically connected sequentially. The first input terminal of the PWM mode selection module is communicatively connected to a host computer, and the second input terminal of the PWM mode selection module is electrically connected to a clock source. The output terminal of the output drive module is electrically connected to the motor to be driven, so as to output a matching PWM control signal to the motor. In this disclosure, the PWM mode selection module receives and generates an initial PWM signal based on the control signal sent by the host computer and the reference clock signal sent by the clock source. The initial PWM signal is configured into two or more pre-drive signals with different phases by the PWM signal configuration module. The output drive module converts the two or more pre-drive signals with different phases into two or more drive signals with different phases, thereby realizing adaptive drive for multiple types of motors.

[0043] Other features and aspects of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0044] The accompanying drawings, which are included in and form part of this specification, illustrate exemplary embodiments, features, and aspects of this disclosure together with the specification and serve to explain the principles of this disclosure.

[0045] Figure 1 A schematic block diagram of a PWM motor drive system according to an embodiment of the present disclosure is shown;

[0046] Figure 2 A schematic block diagram of a PWM motor drive system according to another embodiment of the present disclosure is shown;

[0047] Figure 3 A schematic diagram showing multiple output modes of a PWM motor drive system according to an embodiment of the present disclosure is provided.

[0048] Figure 4 A schematic block diagram of a PWM mode gating module according to an embodiment of the present disclosure is shown;

[0049] Figure 5 A schematic block diagram of an initial PWM signal configuration module according to an embodiment of the present disclosure is shown;

[0050] Figure 6 A schematic block diagram of a PWM motor drive system according to yet another embodiment of the present disclosure is shown;

[0051] Figure 7 A circuit diagram of a charge pump according to an embodiment of the present disclosure is shown;

[0052] Figure 8A schematic block diagram of a PWM signal configuration module according to an embodiment of the present disclosure is shown;

[0053] Figure 9 A schematic block diagram of an output driving module according to an embodiment of the present disclosure is shown;

[0054] Figure 10 A schematic block diagram of a dead-time generation module according to an embodiment of the present disclosure is shown;

[0055] Figure 11 A schematic block diagram of a pre-drive module according to an embodiment of the present disclosure is shown. Detailed Implementation

[0056] Various exemplary embodiments, features, and aspects of this disclosure will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0057] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0058] Furthermore, to better illustrate this disclosure, numerous specific details are set forth in the following detailed description. Those skilled in the art will understand that this disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of this disclosure.

[0059] <Method Implementation>

[0060] Figure 1 A schematic block diagram of a PWM motor drive system according to an embodiment of the present disclosure is shown. Figure 1 As shown, the PWM motor drive system 100 includes: a PWM mode selection module 110, a PWM signal configuration module 120, and an output drive module 130.

[0061] The PWM mode selection module 110, the PWM signal configuration module 120, and the output drive module 130 are electrically connected in sequence. The first input terminal of the PWM mode selection module 110 is connected to the host computer for communication. The second input terminal of the PWM mode selection module 110 is electrically connected to the clock source. The output terminal of the output drive module 130 is electrically connected to the motor to be driven, so as to output a PWM control signal that matches the motor to be driven.

[0062] The PWM mode selection module 110 is configured to receive control signals sent by the host computer and reference clock signals sent by the clock source. The control signals are multi-bit codes that contain configuration information of the PWM signals. After receiving the control signals sent by the host computer, the PWM mode selection module 110 can parse the configuration information of the PWM signals from the control signals, generate an initial PWM signal based on the configuration information and the reference clock signal, and send the initial PWM signal to the PWM signal configuration module 120.

[0063] The output drive module 130 is configured to receive a pre-drive signal, generate a corresponding drive signal based on the pre-drive signal, and send it to the motor to be driven.

[0064] In one possible implementation, the PWM signal configuration module 120 is as follows: Figure 2 As shown, it includes: a single-phase configuration module 121, a two-phase configuration module 122, and a three-phase configuration module 123.

[0065] In this embodiment, the control signal includes not only PWM signal configuration information but also output mode information. Thus, after receiving the control signal from the host computer, the PWM mode selection module 110 simultaneously parses the PWM signal configuration information and output mode information. After generating an initial PWM signal based on the PWM signal configuration information and the reference clock signal, it sends the initial PWM signal to at least one of the following PWM signal configuration modules: single-phase configuration module 121, two-phase configuration module 122, and three-phase configuration module 123, based on the parsed output mode information. Specifically, the single-phase configuration module 121 is configured to receive and send the initial PWM signal as a single-phase PWM pre-drive signal to the output drive module 130. The two-phase configuration module 122 is configured to receive and configure the initial PWM signal as a two-phase PWM pre-drive signal to the output drive module 130. The three-phase configuration module 123 is configured to receive and configure the initial PWM signal as a three-phase PWM pre-drive signal to the output drive module 130.

[0066] In this embodiment, the output drive module 130 is specifically configured to receive and generate at least one PWM drive signal among the single-phase PWM pre-drive signal, two-phase PWM pre-drive signal, and three-phase PWM pre-drive signal, and send it to the motor to be driven to achieve the driving of the motor.

[0067] In one possible implementation, the output mode information may include seven types, denoted as: first output mode information, second output mode information, third output mode information, fourth output mode information, fifth output mode information, sixth output mode information, and seventh output mode information. Among them, such as... Figure 3 As shown, the first output mode information controls the initial PWM signal to be sent separately to the single-phase configuration module for configuration, so that the system outputs only a single-phase PWM drive signal, thereby meeting the drive requirements of a single-phase motor. The second output mode information controls the initial PWM signal to be sent separately to the two-phase configuration module for configuration, so that the system outputs only a two-phase PWM drive signal, thereby meeting the drive requirements of a two-phase motor. The third output mode information controls the initial PWM signal to be sent separately to the three-phase configuration module for configuration, so that the system outputs only a three-phase PWM drive signal, thereby meeting the drive requirements of a three-phase motor. The fourth output mode information controls the initial PWM signal to be sent simultaneously to both the single-phase and two-phase configuration modules for configuration, so that the system can simultaneously output both single-phase and two-phase PWM drive signals, thereby meeting the drive requirements of both single-phase and two-phase motors. The fifth output mode information controls the initial PWM signal to be sent simultaneously to both the two-phase and three-phase configuration modules for configuration, so that the system can simultaneously output both two-phase and three-phase PWM drive signals, thereby meeting the drive requirements of both two-phase and three-phase motors. The sixth output mode information is used to control the initial PWM signal to be simultaneously sent to the single-phase configuration module and the three-phase configuration module for configuration. This allows the system to simultaneously output single-phase and three-phase PWM drive signals, thus meeting the drive requirements of both single-phase and three-phase motors. The seventh output mode information is used to control the initial PWM signal to be simultaneously sent to the single-phase, two-phase, and three-phase configuration modules for configuration. This allows the system to simultaneously output single-phase, two-phase, and three-phase PWM drive signals, thus meeting the drive requirements of single-phase, two-phase, and three-phase motors. Therefore, by flexibly configuring the output mode information in the control signals, the system can achieve adaptive switching between multiple modes, thereby meeting the adaptive drive requirements of various types of motors.

[0068] In one possible implementation, the PWM mode gating module 110 is as follows: Figure 4 The system includes: a control signal decoder 111, an initial PWM signal configuration module 112, and a channel selection module 113.

[0069] The input terminal of the control signal decoder 111 is connected to the host computer as the first input terminal of the PWM mode gating module 110 to receive control signals sent by the host computer and parse the control signals to obtain configuration information and output mode information. The first output terminal of the control signal decoder 111 is electrically connected to the first input terminal of the initial PWM signal configuration module 112 to send the configuration information to the initial PWM signal configuration module 112. The second output terminal of the control signal decoder 111 is electrically connected to the first input terminal of the channel selection module 113 to send the output mode information to the channel selection module 113.

[0070] The second input terminal of the initial PWM signal configuration module 112 is electrically connected to the clock source as the second input terminal of the PWM mode gating module 110 to receive the reference clock signal sent by the clock source, and generate the initial PWM signal according to the configuration information and the reference clock signal. The output terminal of the initial PWM signal configuration module 112 is electrically connected to the second input terminal of the channel selection module 113 to send the initial PWM signal to the channel selection module 113.

[0071] The output terminal of the channel selection module 113 is electrically connected to the input terminal of the PWM signal configuration module 120 as the output terminal of the PWM mode gating module 110, so as to send the generated initial PWM signal to at least one of the single-phase configuration module 121, the two-phase configuration module 122 and the three-phase configuration module 123 according to the received output mode information.

[0072] In one possible implementation, the configuration information in the control signal includes frequency configuration information and duty cycle configuration information. In this embodiment, the initial PWM signal configuration module 112 includes, as shown below: Figure 5 The frequency adjustment module and duty cycle adjustment module are shown.

[0073] The first input terminal of the frequency adjustment module is electrically connected to a first output terminal of the control signal decoder 111 as a first input terminal of the initial PWM signal configuration module 112, so as to receive the frequency configuration information sent by the control signal decoder 111. The second input terminal of the frequency adjustment module is electrically connected to a clock source as a second input terminal of the initial PWM signal configuration module 112, so as to receive the reference clock signal sent by the clock source, and adjust the frequency of the reference clock signal according to the frequency configuration information to generate a PWM signal with a specified frequency. The output terminal of the frequency adjustment module is electrically connected to the second input terminal of the duty cycle adjustment module to send the PWM signal with the specified frequency to the duty cycle adjustment module.

[0074] The first input terminal of the duty cycle adjustment module is electrically connected to the other first input terminal of the initial PWM signal configuration module 112 and the other first output terminal of the control signal decoder 111 to receive the duty cycle configuration information sent by the control signal decoder 111. The duty cycle of the PWM signal with a specified frequency is adjusted according to the duty cycle information to generate an initial PWM signal with a specified frequency and a specified duty cycle. The output terminal of the duty cycle adjustment module is electrically connected to the second input terminal of the channel selection module 113 as the output terminal of the initial PWM signal configuration module 112 to send the initial PWM signal to the channel selection module 113.

[0075] In one possible implementation, the frequency adjustment module is as follows: Figure 6 The circuit includes a frequency and phase detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a frequency divider.

[0076] The second input terminal of the frequency and phase detector serves as the second input terminal of the frequency adjustment module and is electrically connected to the clock source to receive the reference clock signal sent by the clock source. The output terminal of the frequency and phase detector is connected to the second input terminal of the frequency divider via a charge pump, a loop filter, and a voltage-controlled oscillator (VCO). The output terminal of the frequency divider is connected to the first input terminal of the frequency and phase detector. The output terminal of the VCO serves as the input terminal of the frequency adjustment module and is electrically connected to the second input terminal of the duty cycle adjustment module. The first input terminal of the frequency divider serves as the first input terminal of the frequency adjustment module and is electrically connected to a first output terminal of the control signal decoder 111 to receive frequency configuration information sent by the control signal decoder 111. The frequency divider's division coefficient is adjusted according to the received frequency configuration information. The output terminal of the frequency divider is electrically connected to the first input terminal of the frequency and phase detector.

[0077] In this embodiment, the frequency adjustment module operates as follows: The frequency and phase detector receives the reference clock signal from the clock source and the feedback signal output by the frequency divider, compares the phase difference between the reference clock signal and the feedback signal, and inputs the phase difference to the charge pump. The charge pump calculates the error voltage between the reference clock signal and the feedback signal based on the received phase difference and inputs the error voltage to the loop filter. The loop filter filters the high-frequency noise in the error voltage, generates a smooth control voltage, and inputs the control voltage to the voltage-controlled oscillator (VCO). The VCO adjusts the output signal frequency according to the control voltage, gradually approaching the input reference clock signal. Simultaneously, the VCO also inputs the output signal to the frequency divider. The frequency divider calculates the division ratio based on the received frequency configuration information, adjusts the output signal according to the division ratio, and inputs the adjusted signal as a feedback signal to the frequency and phase detector, forming a closed loop. This frequency adjustment module can continuously and dynamically adjust the output signal until the phase difference between the input reference clock signal and the generated feedback signal is zero, thereby locking the output signal frequency and outputting a PWM signal with a specified frequency.

[0078] In one possible implementation, the circuit diagram of the charge pump is as follows: Figure 7 As shown, the circuit includes: a clamping operational amplifier (OP), current mirror bias circuits M2, M3, M4, M5, M6, M8, M9, and M10, and switching transistors M1, Mn, Mp, and M7. The high and low levels input to the UP and DW ports control the on / off state of M1 and M7. When M1 is on and M7 is off, current flows out of the IOUT port, and the charge pump circuit pumps out charge. When M1 is off and M7 is on, current flows into the IOUT port, and the charge pump circuit absorbs charge. Specifically, the gate of M2 is connected to a low level, ensuring that M1 and M2 are matched when the UP input is low. The gates of M8 and M10 are connected to a high level, ensuring that M7 is matched with M8 and M10 when the DW input is high. Together, they form the replica bias circuit, ensuring the accuracy of the current mirror copy. The OP clamps the drain voltages of M6 and M5 to the same potential, ensuring that the current flowing through M5 matches that through M6, further guaranteeing the accuracy of the current mirror copy. Transistors Mn and Mp are used to reduce current spikes during switching. Their working principle is as follows: When the UP port input is low, Mn is off and M1 is on, connecting point A to the power supply VDD and accumulating a certain amount of charge at point A. When the UP port input is high, M1 is off and Mn is on. Without Mn, the charge accumulated at point A can only be discharged through M3, generating a large current spike at the IOUT output. With Mn, the excess charge can be discharged through Mn and M3, reducing the amplitude of the current spike. The working principle of Mp and M7 is similar.

[0079] In one possible implementation, the duty cycle adjustment module is as follows: Figure 6As shown, the system includes a digital-to-analog converter, an integrator, and a comparator. The input terminal of the digital-to-analog converter, serving as the first input terminal of the duty cycle adjustment module, is electrically connected to the other first output terminal of the control signal decoder 111 to receive duty cycle configuration information sent by the control signal decoder 111 and convert the duty cycle configuration information into an analog signal. The output terminal of the digital-to-analog converter is electrically connected to the first input terminal of the comparator to send the converted analog signal as a reference signal to the comparator. The input terminal of the integrator, serving as the second input terminal of the duty cycle adjustment module, is electrically connected to the output terminal of the frequency adjustment module to receive a PWM signal with a specified frequency output by the frequency adjustment module. The output terminal of the integrator is electrically connected to the second input terminal of the comparator to integrate the PWM signal with the specified frequency and send it to the comparator. The comparator then adjusts the duty cycle of the integrated PWM signal with the specified frequency according to the analog signal to generate an initial PWM signal with the specified frequency and duty cycle. The output terminal of the comparator, serving as the output terminal of the duty cycle adjustment module, is electrically connected to the second input terminal of the channel selection module 113 to send the initial PWM signal to the channel selection module 113.

[0080] In this embodiment, the reference signal of the input comparator can be adjusted through the duty cycle configuration information, and the duty cycle of the output signal can be adjusted by adjusting the reference signal, thereby obtaining an initial PWM signal with a specified frequency and duty cycle.

[0081] It's important to note that the frequency configuration, duty cycle configuration, and output mode information in the control signal are all set according to the specific characteristics of the motor to be connected. In other words, before using this system, you need to determine the type of motor to be connected, the frequency of the required drive signal, and the duty cycle. Then, based on these parameters, you set the frequency configuration, duty cycle configuration, and output mode information. Finally, you generate the control signal based on these settings. After generating the control signal, it can adaptively generate a PWM control signal that matches the motor to be connected, driven by the control signal.

[0082] In one possible implementation, the channel selection module 113 is as follows: Figure 6The diagram includes a first control switch, a second control switch, and a third control switch. The control terminals of the first, second, and third control switches are each electrically connected to the second output terminal of the control signal decoder 111 as a first input terminal of the channel selection module 113, to receive output mode information sent by the control signal decoder 111 and control its on / off operation according to the output mode information. The input terminals of the first, second, and third control switches, after being electrically connected, are also electrically connected to the output terminal of the initial PWM signal configuration module 112 as the second input terminal of the channel selection module 113, to receive the initial PWM signal sent by the initial PWM signal configuration module 112. The output terminal of the first control switch is electrically connected to the first input terminal of the single-phase configuration module 121 as the first sub-output terminal of the channel selection module 113, so as to send the initial PWM signal to the single-phase configuration module 121; the output terminal of the second control switch is electrically connected to the first input terminal of the two-phase configuration module 122 as the second sub-output terminal of the channel selection module 113, so as to send the initial PWM signal to the two-phase configuration module 122; the output terminal of the third control switch is electrically connected to the first input terminal of the three-phase configuration module 123 as the third sub-output terminal of the channel selection module 113, so as to send the initial PWM signal to the three-phase configuration module 123.

[0083] In one possible implementation, the PWM signal configuration module 120 is as follows: Figure 8 As shown in the example, the input terminal of the single-phase configuration module 121 is electrically connected to the first sub-output terminal of the channel selection module 113 to receive the initial PWM signal sent by the channel selection module 113 and then directly send the initial PWM signal as a single-phase PWM pre-drive signal to the output drive module 130.

[0084] In this example, the two-phase configuration module 122 includes two phase shifters, a phase detection and calibration module, and a two-phase reference clock generation module. The input of the two-phase reference clock generation module is electrically connected to a clock source to receive a reference clock signal sent by the clock source and convert the received reference clock signal into a two-phase reference clock signal. The output of the two-phase reference clock generation module is electrically connected to the first input of the phase detection and calibration module to send the two-phase reference clock signal to the phase detection and calibration module. The inputs of the two phase shifters are electrically connected and then used as the input of the two-phase configuration module 122, and are electrically connected to the second sub-output of the channel selection module 113 to receive the initial PWM signal sent by the channel selection module 113. The initial PWM signal is split into two paths and input to the two phase shifters respectively. After phase shifting by the two phase shifters, a two-phase PWM pre-drive signal with a phase difference of 90° is generated. The first outputs of the two phase shifters are electrically connected to the output drive module 130 respectively to input the two-phase PWM pre-drive signal to the drive module 130. Simultaneously, the second output terminals of the two phase shifters are electrically connected to the phase detection and calibration module to input the two-phase PWM pre-drive signals. After receiving the two-phase PWM pre-drive signals and the two-phase reference clock signals, the phase calibration module generates compensation control signals for the two-phase PWM pre-drive signals. The output terminals of the phase calibration module are electrically connected to the two phase shifters to feed back the compensation control signals to the corresponding phase shifters. Finally, the feedback loop converges, achieving precise phase locking of the two-phase PWM pre-drive signals.

[0085] In this example, the three-phase configuration module 123 includes three phase shifters, a phase detection and calibration module, and a three-phase reference clock generation module. The input of the three-phase reference clock generation module is electrically connected to a clock source to receive a reference clock signal sent by the clock source and convert the received reference clock signal into a three-phase reference clock signal. The output of the three-phase reference clock generation module is electrically connected to the first input of the phase detection and calibration module to send the three-phase reference clock signal to the phase detection and calibration module. The inputs of the three phase shifters are electrically connected and then used as the inputs of the three-phase configuration module 123, and are electrically connected to the third sub-output of the channel selection module 113 to receive the initial PWM signal sent by the channel selection module 113. The initial PWM signal is divided into three paths and input to the three phase shifters respectively. After phase shifting by 0°, 120°, and 240° by the three phase shifters respectively, a three-phase PWM pre-drive signal is generated. The first outputs of the three phase shifters are electrically connected to the output drive module 130 to input the three-phase PWM pre-drive signal to the drive module 130. Simultaneously, the second output terminals of the three phase shifters are electrically connected to the phase detection and calibration module to input the three-phase PWM pre-drive signal. Upon receiving the three-phase PWM pre-drive signal and the three-phase reference clock signal, the phase calibration module generates a compensation control signal for the three-phase PWM pre-drive signal. The output terminals of the phase calibration module are electrically connected to the three phase shifters to feed back the compensation control signal to the corresponding phase shifters. Finally, the feedback loop converges, achieving precise phase locking of the three-phase PWM pre-drive signal.

[0086] In one possible implementation, the output driver module 130 is as follows: Figure 9 The system includes a dead-time generation module 131, a pre-drive module 132, and an output stage 133. The dead-time generation module 131, pre-drive module 132, and output stage 133 are electrically connected sequentially. The input terminal of the dead-time generation module 131 serves as the input terminal of the output drive module 130 and is electrically connected to the PWM signal configuration module 120. The output stage 133 serves as the output terminal of the output drive module 130 and is electrically connected to the motor to be driven. The workflow of the output drive module 130 is as follows: After the pre-drive signal enters the output drive module 130, it first generates a pre-drive signal with a non-overlapping dead-time window through the dead-time generation module 131 to ensure the stability and reliability of the subsequent motor drive. Then, the pre-drive module 132 and output stage 133 convert the pre-drive signal into a drive signal adapted to the motor to be connected.

[0087] In one possible implementation, the dead time generation module 131 is as follows: Figure 10The circuit includes at least one of the following: a delay circuit, an inverter, and a NOR gate. The EN port receives an enable signal; a low input enables the signal, while a high input keeps the HON and LON ports outputting a constant low level. The overall circuit structure of the dead-time generation module is similar to the cross-coupled structure of an SR latch. The DELAY module consists of an even number of inverters, generating a certain delay. The delay time is determined by the number of cascaded inverters within the DELAY module, and this delay determines the "dead time." The dead-time generation module applies a delay to the input signals of the HIN and LIN ports, resulting in a non-overlapping "dead window" in the signals generated by the HON and LON ports.

[0088] In one possible implementation, the pre-driven module is as follows: Figure 11 The circuit includes an upper bridge arm drive circuit and a lower bridge arm drive circuit. The VDD port provides power. The output signal from the HON port passes through the upper bridge arm drive circuit and is output as the upper bridge arm power switch drive signal from the BH port. The output signal from the LON port passes through the lower bridge arm drive circuit and is output as the lower bridge arm power switch drive signal from the LH port. The MP1 transistor in the upper bridge arm drive circuit and the MN1 transistor in the lower bridge arm drive circuit form two dual source followers, achieving a level shifting effect. Specifically, the MN1 transistor lowers the highest potential of the lower bridge arm drive signal output from the BL port, while the MP1 transistor raises the lowest potential of the upper bridge arm drive signal output from the BH port. By reducing the range of output drive signal variation without decreasing the highest value of the BH port output signal or increasing the lowest value of the BL port output signal, the dynamic power consumption of the upper and lower bridge arm drive switches is reduced while maintaining the circuit's driving capability. The transistors MN1, MN2, and MN3 form a negative feedback loop, stabilizing the maximum value of the output signal at port BL; similarly, the transistors MP1, MP2, and MP3 form a negative feedback loop, stabilizing the minimum value of the output signal at port BH.

[0089] It should be noted that the PWM motor drive system can support the simultaneous output of single-phase, two-phase, and three-phase signals. The system requires one output channel for outputting a single-phase signal, two output channels for outputting a two-phase signal, and three output channels for outputting a three-phase signal. That is, the system is configured with 1+2+3=6 output channels to support the simultaneous output of single-phase, two-phase, and three-phase signals, and each output channel is equipped with an output drive module 130 with the same structure.

[0090] This disclosure provides a PWM motor drive system, including: a PWM mode selection module, a PWM signal configuration module, and an output drive module. The PWM mode selection module, PWM signal configuration module, and output drive module are electrically connected in sequence. The first input terminal of the PWM mode selection module is communicatively connected to a host computer, and the second input terminal of the PWM mode selection module is electrically connected to a clock source. The output terminal of the output drive module is electrically connected to the motor to be driven, so as to output a PWM control signal matching the motor to be driven. The PWM mode selection module is configured to receive the control signal sent by the host computer and the reference clock signal sent by the clock source, parse the control signal to obtain the configuration information of the PWM signal, generate an initial PWM signal according to the configuration information and the reference clock signal, and send the initial PWM signal to the PWM signal configuration module. The PWM signal configuration module is configured to receive the initial PWM signal, configure the initial PWM signal into two or more pre-drive signals with different phases, and then send it to the output drive module. The output drive module is configured to receive the pre-drive signal, generate a corresponding drive signal according to the pre-drive signal, and send it to the motor to be driven. In this disclosure, the PWM signal configuration module can generate two or more pre-drive signals with different phases, and then the output drive module can convert the two or more pre-drive signals with different phases into two or more drive signals with different phases to achieve adaptive drive of multiple types of motors.

[0091] The various embodiments of this disclosure have been described above. These descriptions are exemplary and not exhaustive, and are not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical applications, or technical improvements to the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A PWM motor drive system, characterized in that, include: PWM mode selection module, PWM signal configuration module, and output drive module; The PWM mode selection module, the PWM signal configuration module, and the output drive module are electrically connected in sequence. The first input terminal of the PWM mode selection module is connected to the host computer for communication. The second input terminal of the PWM mode selection module is electrically connected to the clock source. The output terminal of the output drive module is electrically connected to the motor to be driven, so as to output a matching PWM control signal to the motor to be driven. The PWM mode selection module is configured to receive a control signal sent by the host computer and a reference clock signal sent by the clock source, parse the control signal to obtain PWM signal configuration information, generate an initial PWM signal according to the configuration information and the reference clock signal, and send the initial PWM signal to the PWM signal configuration module. The PWM signal configuration module is configured to receive an initial PWM signal, configure the initial PWM signal as two or more pre-drive signals with different phases, and then send it to the output drive module. The output drive module is configured to receive the pre-drive signal, generate a corresponding drive signal based on the pre-drive signal, and send it to the motor to be driven. The PWM signal configuration module includes: a single-phase configuration module, a two-phase configuration module, and a three-phase configuration module; The PWM mode selection module is further configured to parse the control signal to obtain output mode information, and send the initial PWM signal to at least one of the single-phase configuration module, the two-phase configuration module, and the three-phase configuration module according to the output mode information. The single-phase configuration module is configured to receive the initial PWM signal and send it as a single-phase PWM pre-drive signal to the output drive module; The two-phase configuration module is configured to receive the initial PWM signal, configure it as a two-phase PWM pre-drive signal, and send it to the output drive module. The three-phase configuration module is configured to receive the initial PWM signal, configure it as a three-phase PWM pre-drive signal, and send it to the output drive module.

2. The system according to claim 1, characterized in that, The PWM mode selection module includes: a control signal decoder, an initial PWM signal configuration module, and a channel selection module; The input terminal of the control signal decoder serves as the first input terminal of the PWM mode selection module 110 and is communicatively connected to the host computer to receive control signals sent by the host computer and parse the control signals to obtain the configuration information and the output mode information. The first output terminal of the control signal decoder is electrically connected to the first input terminal of the initial PWM signal configuration module to send the configuration information to the initial PWM signal configuration module. The second output terminal of the control signal decoder is electrically connected to the first input terminal of the channel selection module to send the output mode information to the channel selection module. The second input terminal of the initial PWM signal configuration module is electrically connected to the clock source as the second input terminal of the PWM mode selection module to receive the reference clock signal sent by the clock source, and generate an initial PWM signal according to the configuration information and the reference clock signal. The output terminal of the initial PWM signal configuration module is electrically connected to the second input terminal of the channel selection module to send the initial PWM signal to the channel selection module. The output terminal of the channel selection module is electrically connected to the input terminal of the PWM mode gating module as the output terminal of the PWM signal configuration module, so as to send the initial PWM signal to at least one of the single-phase configuration module, the two-phase configuration module and the three-phase configuration module according to the received output mode information.

3. The system according to claim 2, characterized in that, The configuration information includes frequency configuration information and duty cycle configuration information; The initial PWM signal configuration module includes: a frequency adjustment module and a duty cycle adjustment module; The first input terminal of the frequency adjustment module is electrically connected to a first output terminal of the control signal decoder as a first input terminal of the initial PWM signal configuration module to receive frequency configuration information sent by the control signal decoder. The second input terminal of the frequency adjustment module is electrically connected to a clock source as a second input terminal of the initial PWM signal configuration module to receive the reference clock signal sent by the clock source and adjust the frequency of the reference clock signal according to the frequency configuration information to generate a PWM signal with a specified frequency. The output terminal of the frequency adjustment module is electrically connected to the second input terminal of the duty cycle adjustment module to send the PWM signal with the specified frequency to the duty cycle adjustment module. The first input terminal of the duty cycle adjustment module is electrically connected to the other first input terminal of the initial PWM signal configuration module and the other first output terminal of the control signal decoder to receive the duty cycle configuration information sent by the control signal decoder. According to the duty cycle information, the duty cycle of the PWM signal with a specified frequency is adjusted to generate an initial PWM signal with a specified frequency and a specified duty cycle. The output terminal of the duty cycle adjustment module is electrically connected to the second input terminal of the channel selection module as the output terminal of the initial PWM signal configuration module to send the initial PWM signal to the channel selection module.

4. The system according to claim 3, characterized in that, The frequency adjustment module includes a frequency and phase detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a frequency divider. The second input terminal of the frequency and phase detector is electrically connected to the clock source as the second input terminal of the frequency adjustment module to receive the reference clock signal sent by the clock source. The output terminal of the frequency and phase detector is connected to the second input terminal of the frequency divider in sequence through the charge pump, the loop filter and the voltage-controlled oscillator. The output terminal of the frequency divider is connected to the first input terminal of the frequency and phase detector. The output terminal of the voltage-controlled oscillator is electrically connected to the second input terminal of the duty cycle adjustment module, serving as the output terminal of the frequency adjustment module. The first input terminal of the frequency divider is electrically connected to a first output terminal of the control signal decoder as the first input terminal of the frequency adjustment module, so as to receive the frequency configuration information sent by the control signal decoder. The output terminal of the frequency divider is electrically connected to the first input terminal of the frequency and phase detector.

5. The system according to claim 3, characterized in that, The duty cycle adjustment module includes a digital-to-analog converter, an integrator, and a comparator; The input terminal of the digital-to-analog converter is electrically connected to the other first output terminal of the control signal decoder as the first input terminal of the duty cycle adjustment module, so as to receive the duty cycle configuration information sent by the control signal decoder and convert the duty cycle configuration information into an analog signal. The output terminal of the digital-to-analog converter is electrically connected to the first input terminal of the comparator so as to send the analog signal to the comparator. The input terminal of the integrator is electrically connected to the output terminal of the frequency adjustment module as the second input terminal of the duty cycle adjustment module to receive the PWM signal with a specified frequency output by the frequency adjustment module. The output terminal of the integrator is electrically connected to the second input terminal of the comparator to send the PWM signal with a specified frequency to the comparator after integration processing, so that the comparator adjusts the duty cycle of the integrated PWM signal with a specified frequency according to the analog signal to generate an initial PWM signal with a specified frequency and a specified duty cycle. The output terminal of the comparator is electrically connected to the second input terminal of the channel selection module as the output terminal of the duty cycle adjustment module, so as to send the initial PWM signal to the channel selection module.

6. The system according to claim 2, characterized in that, The channel selection module includes: a first control switch, a second control switch, and a third control switch; The control terminals of the first control switch, the second control switch, and the third control switch are respectively connected to the second output terminal of the control signal decoder as a first input terminal of the channel selection module, so as to receive the output mode information sent by the control signal decoder and control its on / off operation according to the output mode information; The input terminals of the first control switch, the second control switch, and the third control switch are electrically connected and then used as the second input terminal of the channel selection module, which is electrically connected to the output terminal of the initial PWM signal configuration module to receive the initial PWM signal sent by the initial PWM signal configuration module. The output terminal of the first control switch is electrically connected to the first input terminal of the single-phase configuration module as the first sub-output terminal of the channel selection module, so as to send the initial PWM signal to the single-phase configuration module; The output terminal of the second control switch is electrically connected to the first input terminal of the two-phase configuration module as the second sub-output terminal of the channel selection module, so as to send the initial PWM signal to the two-phase configuration module; The output terminal of the third control switch is electrically connected to the first input terminal of the three-phase configuration module as the third sub-output terminal of the channel selection module, so as to send the initial PWM signal to the three-phase configuration module.

7. The system according to claim 1, characterized in that, The output driving module includes a dead time generation module, a pre-driving module, and an output stage; The dead time generation module, the pre-drive module, and the output stage are electrically connected in sequence. The input terminal of the dead time generation module is electrically connected to the PWM signal configuration module as the input terminal of the output drive module. The output stage is electrically connected to the motor to be driven as the output terminal of the output drive module.

8. The system according to claim 7, characterized in that, The dead time generation module includes at least one of a delay circuit, an inverter, and an NOR gate.

9. The system according to claim 7, characterized in that, The pre-drive module includes an upper arm drive circuit and a lower arm drive circuit.

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