Voltage to current conversion

Abstract

An apparatus for voltage to current conversion is disclosed. In an example aspect, the apparatus has a voltage-to-current converter including a positive input transistor, a negative input transistor, a positive current source transistor, a negative current source transistor, a positive resistor, and a negative resistor. The positive current source transistor is coupled between the positive input transistor and a power distribution node. The negative current source transistor is coupled between the negative input transistor and the power distribution node. The positive resistor is coupled between the positive input transistor and the positive current source transistor. The negative resistor is coupled between the negative input transistor and the negative current source transistor.

Description

Technical Field

[0001] The present disclosure relates generally to signal communication or signal processing using electronic devices, and more particularly to voltage to current conversion. Background Art

[0002] Electronic devices include traditional computing devices such as desktop computers, laptops, smartphones, wearable devices like smartwatches, and internet servers. They also include other types of computing devices, such as personal voice assistants (e.g., smart speakers), wireless access points or routers, thermostats and other automation controllers, robotics, automotive electronics, devices embedded in other machines such as refrigerators and industrial tools, Internet of Things (IoT) devices, and medical devices. These diverse electronic devices provide services related to productivity, communication, social interaction, security, health and safety, remote management, entertainment, transportation, and information dissemination. Therefore, electronic devices play a vital role in modern society.

[0003] In today's connected world, many services provided by electronic devices rely at least in part on electronic communications. Electronic communications may include, for example, the use of computers connected to one or more networks (such as the Internet, Wi-Fi, ® Communications between two or more electronic devices involve the exchange of wireless signals or wired signals transmitted over a wireless or cellular network. Thus, electronic communications may include wireless transmission and reception or wired transmission and reception. To send and receive communications, electronic devices may use transceivers, such as wireless transceivers designed for wireless communication.

[0004] Thus, some electronic communications can be achieved by propagating signals between two wireless transceivers located in two different electronic devices. For example, using a wireless transmitter, a smartphone can send wireless signals over the air to a base station (as part of uplink communications) to support mobile services. Using a wireless receiver, the smartphone can receive wireless signals sent from the base station over the air (as part of downlink communications) to enable mobile services. In this case, the base station may also have a wireless transceiver, including a wireless transmitter and a wireless receiver, that engage in wireless communications. In the case of smartphones, for example, mobile services may include making voice and video calls, engaging in social media interactions, sending messages, watching movies, sharing videos, performing searches, using map information or navigation instructions, finding friends, engaging in generally location-based services, transferring money, obtaining another service such as a car ride, and so on.

[0005] Many mobile services and other communication-based services rely, at least in part, on the transmission or reception of wireless signals between two or more electronic devices. Consequently, researchers, electrical engineers, and other designers of electronic devices strive to develop wireless transceivers that can efficiently use wireless signals to provide these and other mobile services. Summary of the Invention

[0006] In electrical or electronic signaling, information can be transmitted using voltage in voltage mode or current in current mode. A voltage-to-current (V2I) converter or conversion process can convert from voltage-mode signaling to current-mode signaling. This voltage-to-current conversion component or process can inject nonlinearity or noise (potentially both nonlinearity and noise) into the current-mode output signal. In an example noise-related aspect, at least one degeneration resistor can be strategically positioned between the input transistor and the current source transistor of the voltage-to-current converter. The input transistor can operate as a transconductance device that converts the voltage-mode input signal into a current-mode output signal. The degeneration resistor can redirect at least a portion of the noise-causing signal away from the input transistor. In a differential circuit, the degeneration resistor can be used to distribute the noise-causing signal between the positive input transistor and the negative input transistor to eliminate at least a portion of the noise from the current-mode output signal. In an example linearity-related aspect, the current source transistor of the voltage-to-current converter can be biased in the triode region rather than the saturation region. In the triode region, the current source transistor can dynamically respond to changes in voltage by changing (e.g., increasing) the current. The increased current can at least partially balance the clipped current output at the input transistor to increase the linearity of the current-mode output signal.These and other implementations are described herein.

[0007] In an example aspect, a device for voltage-to-current conversion is disclosed. The device includes a voltage-to-current converter including a positive input transistor and a negative input transistor. The voltage-to-current converter also includes a positive current source transistor coupled between the positive input transistor and a power distribution node; and a negative current source transistor coupled between the negative input transistor and the power distribution node. The voltage-to-current converter also includes a positive resistor coupled between the positive input transistor and the positive current source transistor; and a negative resistor coupled between the negative input transistor and the negative current source transistor.

[0008] In an example aspect, a device for voltage-to-current conversion is disclosed. The device includes a voltage-to-current converter, the voltage-to-current converter including a positive input transistor and a negative input transistor. The voltage-to-current converter also includes a positive current source transistor coupled between the positive input transistor and a power distribution node; and a negative current source transistor coupled between the negative input transistor and the power distribution node. The voltage-to-current converter also includes components for reducing noise generated by the positive current source transistor in an output signal of the voltage-to-current converter, and components for reducing noise generated by the negative current source transistor in an output signal of the voltage-to-current converter.

[0009] In an example aspect, a method for voltage-to-current conversion or operating a voltage-to-current converter is disclosed. The method includes receiving a voltage-mode input signal at an input transistor. The method also includes generating a current-mode output signal using the input transistor. The method additionally includes providing current to the input transistor using a current source transistor. The method also includes separating noise generated by the current source transistor between a first path including at least the input transistor and a resistor and a second path including another resistor.

[0010] In an example aspect, a device is disclosed. The device includes a voltage-to-current converter including a positive input transistor and a negative input transistor. The voltage-to-current converter further includes a positive current source transistor coupled between the positive input transistor and a power distribution node, wherein the positive current source transistor is configured to be biased in a triode region of transistor operation during a voltage-to-current conversion process. The voltage-to-current converter additionally includes a negative current source transistor coupled between the negative input transistor and the power distribution node, wherein the negative current source transistor is configured to be biased in a triode region of transistor operation during a voltage-to-current conversion process. The voltage-to-current converter further includes a conductive path coupled between the positive input transistor and the negative input transistor and between the positive current source transistor and the negative current source transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 An environment with an example electronic device having a wireless interface device including an example voltage-to-current converter is illustrated.

[0012] Figure 2 is a schematic diagram illustrating an example radio frequency (RF) front end and an example transceiver that may each include at least one voltage-to-current converter.

[0013] Figure 3 is a schematic diagram of an example transmission chain including a voltage-to-current converter.

[0014] Figure 4-1 is a circuit diagram of an example voltage-to-current converter illustrating an example first aspect that may reduce noise in an output signal and an example second aspect that may reduce nonlinearity in an output signal.

[0015] Figure 4-2 is a circuit diagram of an example voltage-to-current converter illustrating an example signal-noise routing paradigm based on at least one positioning of at least one degeneration resistor of the depicted voltage-to-current converter.

[0016] Figure 4-3 is a circuit diagram of another example voltage-to-current converter illustrating another example signal-noise routing paradigm based on at least one different positioning of at least one degeneration resistor of the depicted voltage-to-current converter to facilitate understanding of the example first aspect described herein.

[0017] Figure 5-1 to Figure 5-3 are circuit diagrams illustrating a number of example implementations of a voltage-to-current converter according to at least the example first aspect.

[0018] Figure 6-1 to Figure 6-4 are diagrams illustrating a number of example implementations of a voltage-to-current converter according to at least the example second aspect.

[0019] Figure 7-1 and Figure 7-2 are circuit diagrams illustrating a number of example implementations of a voltage-to-current converter according to the example first aspect and the example second aspect for a single-ended environment.

[0020] Figure 8 is a flow chart illustrating an example process for performing a voltage-to-current conversion process or operating a voltage-to-current converter. DETAILED DESCRIPTION

[0021] Introduction and Overview

[0022] To facilitate the transmission and reception of wireless signals, electronic devices may utilize wireless interface devices including wireless transceivers and / or radio frequency (RF) front ends. Electronic devices communicate using wireless signals using EM signaling at various frequencies present in a portion of the electromagnetic (EM) spectrum. These wireless signals can travel between two electronic devices while oscillating at specific frequencies, such as kilohertz (kHz), megahertz (MHz), or gigahertz (GHz). However, the EM spectrum is a finite resource, limiting how many signals can be communicated simultaneously in any given spatial region. Billions of electronic devices already utilize this finite resource. To enable a greater number of simultaneous communications using EM signaling, the limited EM spectrum is shared between electronic devices. Frequency division multiplexing (FDM) and / or time division multiplexing (TDM) techniques, for example, can be used to share the EM spectrum within a given spatial region.

[0023] FDM or TDM techniques may require dividing the EM spectrum into different frequency bands and restricting communications to specific frequency bands within a specified timeframe. EM signals in different frequency bands can be transmitted simultaneously in the same area without significantly interfering with each other. Consequently, devices can communicate using wireless signals within a selected or assigned frequency range (which may be referred to as a target frequency band). To recover the information carried by signals received within the target frequency band, the wireless interface device's receive chain may apply a mixer to the received signal to downconvert it from the target frequency band to a lower frequency for further processing. To transmit signals within the target frequency band, the wireless interface device's transmit chain may apply a mixer to the signal to upconvert the relatively lower frequency to the target frequency band.

[0024] Therefore, mixers are used to perform upconversion or downconversion. In some transmit chains, a voltage-to-current converter (V2I converter) is coupled between a digital-to-analog converter (DAC) and the mixer. The DAC provides a voltage-mode signal to the V2I converter, which converts the voltage-mode signal into a current-mode signal. In the case of a voltage-mode signal, the information in the signal is carried by the voltage level. In contrast, in the case of a current-mode signal, the information in the signal is carried by the current magnitude. The mixer operates on the current-mode signal from the V2I converter by increasing its oscillation frequency. The transmit chain may further condition the upconverted current-mode signal output by the mixer before transmission.

[0025] In some environments, voltage-to-current converters can be a performance bottleneck for the operation of active mixers in the transmit chain. Voltage-to-current converters can degrade transmit emissions by increasing distortion or noise (or, in some cases, both). There are various approaches to constructing voltage-to-current converters. However, each approach presents tradeoffs between various issues, such as linearity, noise, power consumption, and process variability. Process variability reflects how the same circuit design can operate differently depending on random fluctuations in the manufacturing process.

[0026] This document describes example embodiments that provide simple, low-risk, and relatively compact voltage-to-current conversion circuits and techniques. Some of these techniques exploit resistor degeneration to provide enhanced noise performance. Others implement biasing schemes for current source transistors that can provide enhanced linearity. Furthermore, these circuit components and techniques can be used together in the same voltage-to-current converter to enhance noise and linearity performance, for example, by reducing noise and increasing linearity.

[0027] Some implementations are described in the context of a transmit chain, including implementations for base stations in cellular wireless systems. Base station chips, such as those used in 5th generation (5G) cellular systems, are typically specified to meet higher performance levels than those used for user equipment (UE), including with respect to transmit linearity and noise. However, the described voltage-to-current converter can be implemented in the transmit chain of electronic devices other than base stations. The described voltage-to-current converter can also be implemented in the receive chain of electronic devices. Furthermore, this document describes voltage-to-current conversion techniques and apparatus that can be implemented in circuits that typically utilize voltage-to-current conversion. For example, the described voltage-to-current conversion techniques and apparatus can be used in systems on chips (SoCs), application processors, modem processors, and the like.

[0028] Typically, voltage-to-current (V2I) conversion components or processes can inject nonlinearity or noise (potentially both) into the current-mode output signal. In an example noise-related aspect, at least one degeneration resistor can be strategically positioned between the input transistor of the voltage-to-current converter and the current source transistor. The degeneration resistor can redirect at least a portion of the noise-causing signal away from the input transistor in a manner that reduces the impact of noise on the output signal of the voltage-to-current converter. In a differential circuit, the degeneration resistor can be used to distribute the noise-causing signal between the positive and negative input transistors, thereby eliminating at least a portion of the noise from the current-mode output signal by better balancing the noise between the positive and negative components of the output signal.

[0029] In an example linearity-related aspect, a current source transistor of a voltage-to-current converter can be biased in a triode region rather than a saturation region. In the triode region, the current source transistor can dynamically respond to changes in voltage by changing (e.g., increasing) the current. This increased current can at least partially offset the clipped current output at the input transistor, thereby increasing the linearity of the current-mode output signal. This document also describes the use of noise-related aspects in conjunction with linearity-related aspects, and vice versa. These and other implementations are described herein.

[0030] Description Example

[0031] Figure 1 An example environment 100 is illustrated, including an electronic device 102 having a wireless interface device 120 including at least one example voltage-to-current converter 130 (V2I converter 130). This document describes an example implementation of voltage-to-current converter 130, which can be part of a device's radio frequency front end (RFFE), transceiver, communications processor, etc. Two examples of electronic devices 102 include a mobile device 106 and a base station 104. In environment 100, mobile device 106 communicates with base station 104 and vice versa via a wireless link 140.

[0032] exist Figure 1 , electronic device 102 is depicted as a smartphone or base station tower. However, electronic device 102 may be implemented as any suitable computing device or other electronic device. Examples of devices that may be implemented as electronic device 102 include a cellular base station, a broadband router, an access point, a cellular or mobile phone, a gaming device, a navigation device, a media device, a laptop computer, a desktop computer, a tablet computer, and a server computer. Other examples of devices that may be implemented as electronic device 102 include a network attached storage (NAS) device, a smart appliance, a vehicle-based communication system, an Internet of Things (IoT) device, a sensor or security device, an asset tracker, a fitness management device, a wearable device (such as smart glasses or a smart watch), a wireless power device (transmitter or receiver), a medical device, and the like. Electronic device 102 may be referred to by different terms, such as base station (BS), user equipment (UE), or customer premises equipment (CPE).

[0033] Without loss of generality, base station 104 communicates with mobile device 106 via wireless link 140, which can be implemented as any suitable type of wireless link that carries communication signals. Although depicted as a base station tower of a cellular radio network, base station 104 can represent or be implemented as another device, such as a satellite, a terrestrial broadcast tower, an access point, customer premises equipment (CPE), a peer device, a mesh network node, a fiber optic line interface, another electronic device generally as described above, etc. Thus, wireless link 140 can extend between mobile device 106 and base station 104 in any of a variety of ways.

[0034] Wireless link 140 may include a downlink of data or control information communicated from base station 104 to mobile device 106. Wireless link 140 may also include an uplink of other data or control information communicated from mobile device 106 to base station 104. Wireless link 140 may be implemented using any suitable wireless communication protocol or standard. Examples of such protocols and standards include 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) standards, such as 4th generation (4G), 5th generation (5G), or 6th generation (6G) cellular standards; IEEE 802.11 standards, such as 802.11g, ac, ax, ad, aj, or ay standards (e.g., Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0, Wi-Fi 1.0 ® 6 or WiGig ® ); IEEE 802.16 standards (e.g., WiMAX ® );Bluetooth ® Ultra-Wideband (UWB) standards (eg, IEEE 802.15.4); etc. In some implementations, the wireless link 140 can provide power wirelessly, and the mobile device 106 or base station 104 can include a power source or a power sink.

[0035] As shown for some implementations, the electronic device 102 may include at least one application processor 108 and at least one computer-readable storage medium 110 (CRM 110). The application processor 108 may include any type of processor, such as a central processing unit (CPU) or a multi-core processor, configured to execute processor-executable instructions (e.g., code) stored by the CRM 110. The CRM 110 may include any suitable type of data storage medium, such as volatile memory (e.g., random-access memory (RAM)), non-volatile memory (e.g., flash memory), optical media (e.g., optical disks), magnetic media (e.g., magnetic disks or tapes), etc. In the context of the present disclosure, the CRM 110 is implemented to store instructions 112, data 114, and other information for the electronic device 102, and therefore, the CRM 110 does not include transient propagating signals or carrier waves.

[0036] The electronic device 102 may also include one or more input / output ports 116 (I / O ports 116) and at least one display 118. The I / O ports 116 enable data exchange or interaction with other devices, networks, or users. The I / O ports 116 may include a serial port (e.g., a Universal Serial Bus (USB) ® ) port), Ethernet port, parallel port, audio port, infrared (IR) port, camera or other sensor port, etc. The display 118 can be implemented as a display screen or projection that presents graphical images provided by other components of the electronic device 102, such as a user interface (UI) associated with an operating system, program, or application. Alternatively or additionally, the display 118 can be implemented as a display port or virtual interface through which the graphical content of the electronic device 102 is communicated or presented.

[0037] The electronic device 102 also includes at least one wireless interface device 120 and at least one antenna 122. The example wireless interface device 120 provides connectivity to corresponding networks and peer devices via a wireless link, which may be configured similarly or differently than the wireless link 140. The wireless interface device 120 may facilitate communications over any suitable type of wireless network, such as a wireless local area network (LAN) (WLAN), a wireless personal area network (PAN) (WPAN), a peer-to-peer (P2P) network, a mesh network, a cellular network, a wireless wide area network (WAN) (WWAN), and / or a navigation network (e.g., the Global Positioning System (GPS) or another satellite positioning system (SPS) or a global navigation satellite system (GNSS) in North America). In the context of the example environment 100, the electronic device 102 may communicate various data and control information bidirectionally with another device via the wireless interface device 120 (e.g., participating in communications between the base station 104 and the mobile device 106). However, the electronic device 102 may communicate directly with other peer devices, alternative wireless networks, and the like. Additionally, as described above, the electronic device 102 may alternatively be implemented as another apparatus as set forth herein.

[0038] like Figure 1As shown in FIG, the wireless interface device 120 may include at least one communication processor 124, at least one transceiver 126, and at least one radio frequency front end 128 (RFFE 128). These components process data information, control information, and signals associated with transmitting information for the electronic device 102 via the antenna 122. The communication processor 124 may be implemented as at least a portion of a system-on-chip (SoC), a modem processor, or a baseband radio processor (BBP) that implements a digital communication interface for data, voice, messaging, or other applications for the electronic device 102. The communication processor 124 may include a digital signal processor (DSP) or one or more signal processing blocks (not shown) for encoding and modulating data for transmission and for demodulating and decoding received data. Additionally, the communication processor 124 may manage (e.g., control or configure) various aspects or operations of the transceiver 126, the RF front end 128, and other components of the wireless interface device 120 to implement various communication protocols or communication technologies.

[0039] In some cases, the application processor 108 and the communication processor 124 may be combined into a module or integrated circuit (IC), such as a SoC. Regardless, the application processor 108, the communication processor 124, or processors generally, may be operatively coupled to one or more other components (such as the CRM 110 or the display 118) to enable control of, or other interaction with, the various components of the electronic device 102. For example, at least one processor 108 or 124 may render one or more graphical images on a display screen implementation of the display 118 based on one or more wireless signals communicated (e.g., transmitted or received) via at least one antenna 122 using components of the wireless interface device 120. Furthermore, the application processor 108 or the communication processor 124 (including combinations thereof) may be implemented using digital circuitry implementing the logic or functionality described herein. Additionally, the communication processor 124 may also include or be associated with memory (not separately depicted) for storing data and processor-executable instructions (e.g., code), such as the same CRM 110 or another CRM.

[0040] As shown, the wireless interface device 120 may include at least one voltage-to-current converter 130, described below. More specifically, the transceiver 126 may include at least one voltage-to-current converter 130-1, or the RF front end 128 may include at least one voltage-to-current converter 130-2 (according to the optional but permitted "inclusive or" interpretation of the word "or," both components may have at least one voltage-to-current converter 130). The transceiver 126 may also include circuits and logic for filtering, switching, amplification, channelization, frequency conversion, and the like.

[0041] Frequency conversion functionality may include up-conversion or down-conversion of frequency performed by a single conversion operation (e.g., using a direct conversion architecture) or by multiple conversion operations (e.g., using a superheterodyne architecture). The transceiver 126 may perform the following operations: Figure 1 Generally speaking, the transceiver 126 may include filters, switches, amplifiers, mixers, etc. for routing and conditioning signals transmitted or received via the antenna 122.

[0042] In addition to the voltage-to-current converter 130 - 1 , the transceiver 126 may also include an analog-to-digital converter (ADC) or a digital-to-analog converter (DAC) ( Figure 1 (not shown). In operation, the ADC may convert an analog signal into a digital signal, and the DAC may convert a digital signal into an analog signal. Generally speaking, the ADC or DAC may be implemented as part of the communications processor 124, as part of the transceiver 126, or separately from both (e.g., as another part of the SoC or as part of the application processor 108).

[0043] The components or circuits of the transceiver 126 may be implemented in any suitable manner, such as using combined transceiver logic or separately as respective transmitter and receiver entities. In some cases, the transceiver 126 or RF front end 128 may be implemented using multiple or different parts to perform the respective transmit and receive operations (e.g., using a plurality of different components such as a transmitter and a receiver). Figure 2 separate transmit and receive chains as depicted). Although Figure 1 Not shown, transceiver 126 may include logic for performing in-phase / quadrature (I / Q) operations such as synthesis, phase correction, modulation, demodulation, etc.

[0044] The RF front end 128 may also include one or more voltage-to-current converters (such as voltage-to-current converter 130-2), one or more filters, one or more switches, or one or more amplifiers for conditioning signals received via antenna 122 or for conditioning signals to be transmitted via antenna 122. The RF front end 128 may also include a local oscillator, a phase shifter (PS), a peak detector, a power meter, a gain control block, an antenna tuning circuit, an N-way multiplexer, a balun, and the like. Configurable components of the RF front end 128 (such as some phase shifters, an automatic gain controller (AGC), or a reconfigurable version of the voltage-to-current converter 130-2) may be controlled by the communication processor 124 to enable communication in various modes, using different frequency bands, and using beamforming to reduce noise or nonlinearity, or to trade off noise and nonlinearity. The communication processor 124 may similarly control the operation of one or more components of the transceiver 126 (such as the voltage-to-current converter 130-1).

[0045] In some implementations, antenna 122 is implemented as at least one antenna array including a plurality of antenna elements. Thus, as used herein, "antenna" can refer to at least one discrete or independent antenna, at least one antenna array including a plurality of antenna elements, or a portion of an antenna array (e.g., an antenna element), depending on the context or implementation.

[0046] In an example implementation, the wireless interface device 120 includes at least one voltage-to-current converter 130. The voltage-to-current converter 130 may be located at the communication processor 124, the transceiver 126, the RF front end 128, or a combination thereof, including being distributed across two or more sections or portions of the wireless interface device 120. Figure 1 , the example voltage-to-current converter 130 is depicted as having voltage-to-current converter 130-1 as part of the transceiver 126, voltage-to-current converter 130-2 as part of the RF front end 128, etc. However, the described implementations of the voltage-to-current converter 130 may additionally or alternatively be employed in other portions of the wireless interface device 120 or in other portions of the electronic device 102 generally.

[0047] As explained above, the voltage-to-current converter 130 can be included in electronic devices other than cellular telephones, such as the base station 104 or a wireless access point. Furthermore, with a base station (or with another electronic device utilizing a superheterodyne architecture), for example, a mixer for the intermediate frequency (IF) section of the wireless interface device 120 can be coupled to the voltage-to-current converter 130 as described herein. However, the voltage-to-current converter 130 can be deployed separately from the mixer in another portion of the wireless interface device 120 (e.g., in the RF section or baseband section), etc. Other electronic devices that can employ the voltage-to-current converter 130 include laptops, as described herein, communication hardware for vehicles, wireless access points, wearable devices, and the like.

[0048] In an example implementation, the voltage-to-current converter 130 may include at least one input transistor 132, at least one degeneration resistor 134, and at least one current source transistor 136. In some cases, the voltage-to-current converter 130 may be coupled to the input of a mixer, as described below with reference to Figure 2 and Figure 3 Although some components are shown as Figure 1 1 , but a given voltage-to-current converter may have more, fewer, or different components. Figure 4-1 to Figure 8 Examples of voltage-to-current converters (including their operation) are described. As used herein, unless the context dictates otherwise, a voltage-to-current converter may be implemented as a circuit, for example, as a voltage-to-current conversion circuit.

[0049] As described herein with respect to the first aspect of the examples, the at least one degeneration resistor 134 can be positioned so as to distribute the noise carrying signal in a manner that reduces the amount of noise that reaches or adversely affects the output signal of the voltage to current converter 130. As described herein with respect to the second aspect of the examples, during operation of the voltage to current converter 130, the current source transistor 136 can be biased in a triode region so as to compensate for compression in the input transistor 132 in a manner that increases the linearity of the output signal of the voltage to current converter 130. These techniques can also be used together to improve noise and linearity. Thus, the described embodiments can reduce noise in some cases, reduce nonlinearity in other cases, and reduce both nonlinearity and noise in certain other cases. Figure 4-1 to Figure 8 Describes example methods for improving voltage to current conversion processes and apparatus. However, in the following, this document refers to Figure 2 Example implementations of a transceiver and RF front end are described that may include at least one voltage-to-current converter 130 .

[0050] Figure 2is a schematic diagram illustrating circuitry 200 of an example RF front end 128 and an example transceiver 126 , which may each include at least one mixer circuit that may precede a respective voltage-to-current converter 130 . Figure 2 Also depicted are an antenna 122 and a communication processor 124. The communication processor 124 communicates one or more data signals to other components such as Figure 1 For receive operations, the communication processor 124 communicates one or more data signals from the other components to the transceiver 126.

[0051] As shown, circuit 200 may include mixer circuit 208, mixer circuit 258, mixer circuit 208*, or mixer circuit 258*, including from one to four of such mixer circuits. Although voltage-to-current converters 130-1 and 130-3 are shown as preceding only mixer circuits 258 and 208, respectively, any of the mixer circuits may precede voltage-to-current converter 130. Furthermore, circuit 200 may include a different number of mixers or voltage-to-current converters (e.g., more or fewer), may include mixers or voltage-to-current converters coupled together differently, may include mixers or voltage-to-current converters in different locations, and so on.

[0052] As illustrated from left to right, in an example implementation, the antenna 122 is coupled to the RF front end 128, and the RF front end 128 is coupled to the transceiver 126. The transceiver 126 is coupled to the communication processor 124. The example RF front end 128 includes at least one signal propagation path 222. The at least one signal propagation path 222 may include at least one mixer circuit, such as mixer circuit 208* for down-conversion operations for reception and mixer circuit 258* for up-conversion operations for transmission. The example transceiver 126 includes at least one receive chain 202 (or receive path 202) and at least one transmit chain 252 (or transmit path 252). Although only one RF front end 128, one transceiver 126, and one communication processor 124 are shown at circuit 200, the electronic device 102 or the wireless interface device 120 of the electronic device may include multiple instances of any or all of such components. Additionally, although Figure 2 Only certain components are explicitly depicted and shown coupled together in a particular manner, but the transceiver 126 or RF front end 128 may include other components not illustrated (e.g., switches or diplexers), more or fewer components, arrangements of components coupled in a different manner, etc.

[0053] In some implementations, the RF front end 128 couples the antenna 122 to the transceiver 126 via a signal propagation path 222. In operation, the signal propagation path 222 carries a signal between the antenna 122 and the transceiver 126. During or as part of the signal propagation, the signal propagation path 222 conditions the propagated signal, such as using mixer circuit 208* or mixer circuit 258*. This enables the RF front end 128 to couple the wireless signal 220 from the antenna 122 to the transceiver 126 as part of a receive operation. The RF front end 128 also enables transmit signals to be coupled from the transceiver 126 to the antenna 122 as part of a transmit operation to send out the wireless signal 220. Although in Figure 2 Although not explicitly shown, the RF front end 128 or its signal propagation path 222 may include one or more other components, such as another mixer, a filter, an amplifier (e.g., a power amplifier (PA) or a low noise amplifier (LNA)), an N-way multiplexer, a phase shifter, a transformer, a diplexer, at least one voltage-to-current converter 130, one or more switches, etc.

[0054] In some implementations, the transceiver 126 may include at least one receive chain 202, at least one transmit chain 252, or both. From left to right, the receive chain 202 may include a low noise amplifier 204 (LNA 204), a filter circuit 206, a voltage-to-current converter 130-3 (V2IC 130-3), a mixer circuit 208 for downconversion, and an ADC 210. The transmit chain 252 may include a power amplifier 254 (PA 254), a filter circuit 256, a mixer circuit 258 for upconversion, a voltage-to-current converter 130-1 (V2IC 130-1), and a DAC 260. However, either the receive chain 202 or the transmit chain 252 may include other components (e.g., additional mixers or voltage-to-current converters, multiple filters, at least one transformer, one or more buffers, or at least one phase-locked loop) that are electrically or electromagnetically coupled anywhere along the depicted receive and transmit chains.

[0055] The receive chain 202 is coupled between the signal propagation path 222 of the RF front end 128 and the communication processor 124, for example, via a low noise amplifier 204 and an ADC 210, respectively. The transmit chain 252 is coupled between the signal propagation path 222 and the communication processor 124, for example, via a power amplifier 254 and a DAC 260, respectively. The transceiver 126 may also include at least one local oscillator 230 (LO 230) coupled to the mixer circuit 208 or the mixer circuit 258, including coupling to both mixer circuits. For example, the transceiver 126 may include one local oscillator 230 for each transmit / receive chain pair, one local oscillator 230 per transmit chain and one local oscillator 230 per receive chain, multiple local oscillators 230 per transmit chain or receive chain, etc. Each of the mixer circuit 208* and the mixer circuit 258* of the RF front end 128 may also be coupled to the same local oscillator 230 or different local oscillators (LOs). Figure 2 not shown).

[0056] As depicted along the signal propagation direction for certain example implementations of receive chain 202, antenna 122 is coupled to low-noise amplifier 204 via signal propagation path 222 and its mixer circuit 208*, and low-noise amplifier 204 is coupled to filter circuit 206. Filter circuit 206 is coupled to voltage-to-current converter 130-3. Voltage-to-current converter 130-3 is coupled to mixer circuit 208, and mixer circuit 208 is coupled to ADC 210. ADC 210, in turn, is coupled to communications processor 124. As depicted along the signal propagation direction for certain example implementations of transmit chain 252, communications processor 124 is coupled to DAC 260, and DAC 260 is coupled to mixer circuit 258 via voltage-to-current converter 130-1. As shown, voltage-to-current converter 130-1 is coupled between DAC 260 and mixer circuit 258. Thus, DAC 260 is coupled to voltage-to-current converter 130-1, and voltage-to-current converter 130-1 is coupled to mixer circuit 258. Mixer circuit 258 is coupled to filter circuit 256, and filter circuit 256 is coupled to power amplifier 254. Power amplifier 254 is coupled to antenna 122 via mixer circuit 258* using signal propagation path 222. Although only one receive chain 202 and one transmit chain 252 are explicitly shown, electronic device 102 or its transceiver 126 may include multiple instances of either or both components. Although ADC 210 and DAC 260 are illustrated as being separately coupled to communication processor 124, they may share a bus or other means for communicating with processor 124.

[0057] As part of the example signal reception operation, the mixer circuit 208* (if present) of the signal propagation path 222 downconverts the received signal (e.g., to an intermediate frequency (IF)) and forwards the downconverted signal to the low noise amplifier 204. The low noise amplifier 204 receives the downconverted signal from the RF front end 128 and provides an amplified signal based on the received signal to the filter circuit 206. The filter circuit 206 filters the amplified signal and provides the filtered signal to the voltage-to-current converter 130-3. The voltage-to-current converter 130-3 converts the filtered voltage-based signal into a current-based signal and provides the current-based signal to the mixer circuit 208.

[0058] Mixer circuit 208 performs a downconversion operation on the filtered current-mode signal to downconvert from one frequency to a lower frequency (e.g., from an IF to a baseband frequency (BBF) in the presence of mixer circuit 208*, or from a radio frequency (RF) to an IF or BBF in the absence of mixer circuit 208*). Mixer circuit 208 or multiple mixer circuits may perform the downconversion in a single conversion step or over multiple conversion steps using at least one local oscillator 230. Mixer circuit 208 may provide the downconverted analog signal to ADC 210 for analog-to-digital conversion and subsequently forwarded by ADC 210 to communication processor 124 as a digital signal.

[0059] As part of the example signal transmission operation, DAC 260 converts the digital signal received from communication processor 124 into an analog signal. DAC 260 forwards the analog signal to voltage-to-current converter 130-1, and voltage-to-current converter 130-1 accepts the analog signal from DAC 260. In some cases, the analog signal is in voltage mode. Voltage-to-current converter 130-1 converts the voltage-mode analog signal into a current-mode analog signal. Voltage-to-current converter 130-1 provides the current-mode analog signal to mixer circuit 258.

[0060] Mixer circuit 258 receives an analog signal at BBF or IF from voltage-to-current converter 130-1. Mixer circuit 258 upconverts the analog signal to a higher frequency (such as IF or RF) to produce a higher frequency signal having a target synthesized frequency using the signal generated by local oscillator 230. Mixer circuit 258 provides an RF or other upconverted signal to filter circuit 256. Filter circuit 256 filters the upconverted IF or RF signal and provides the filtered signal to power amplifier 254. Thus, after filtering by filter circuit 256, power amplifier 254 amplifies the filtered signal and provides the amplified signal to signal propagation path 222 for signal conditioning. For example, if the amplified signal is at IF, RF front end 128 can use mixer circuit 258* of signal propagation path 222 to provide the RF signal to antenna 122 for transmission as wireless signal 220.

[0061] As described herein, example implementations of the voltage-to-current converter 130 may be deployed before any one or more of the example mixer circuits 208, 258, 208*, or 258* in the transceiver 126 or RF front end 128 (from a signal propagation perspective), or at other mixer circuits in the electronic device 102. Figure 2 ). However, one or more voltage-to-current converters may be deployed: in alternative locations along the transmit chain 252 or receive chain 202, as part of the RF front end 128, coupled or not coupled to the input or output of a mixer circuit or DAC, in discrete or integrated form, in other parts of the electronic device, etc.

[0062] Circuit 200 illustrates only a few examples for transceiver 126 and RF front end 128. In some cases, various components illustrated in the figures using separate schematic blocks or circuit elements may be manufactured or packaged in different discrete manners. For example, one physical module may include components of RF front end 128 and some components of transceiver 126, while another physical module may combine communication processor 124 with the remaining components of transceiver 126.

[0063] Furthermore, in some cases, the antenna 122 may be co-packaged with at least some components of the RF front end 128 or transceiver 126 into a module. For example, in a non-limiting example corresponding to a mmW implementation, the transceiver 126 may provide an IF signal to the RF front end 128. In some such cases, the RF front end 128 may be co-packaged with an antenna array version of the antenna 122 into a module. Here, the RF front end 128 includes one or more mixer circuits configured to up-convert and down-convert the IF / RF signals. The RF front end 128 also provides further signal conditioning, such as phase shifting for beamforming. In another non-limiting example, such as for a 5G New Radio (NR) Frequency Range 1 (FR1) implementation, the RF front end 128 may not include mixers (e.g., having a direct conversion architecture where the frequency translation between BB and RF occurs within the transceiver 126). Even without a mixer, the RF front end 128 may still include other components such as a power amplifier, a low noise amplifier, filters, a voltage-to-current converter 130, or other conditioning circuitry for processing the signal after or before it is processed by the transceiver 126 (for transmit or receive operations, respectively).

[0064] In alternative implementations, one or more components may be physically or logically "shifted" to different portions of the wireless interface device 120 and / or incorporated into different modules compared to the illustrated circuit 200. For example, the low noise amplifier 204 or the power amplifier 254 may alternatively or additionally be disposed in the RF front end 128. Similarly, the ADC 210 or the DAC 260 may alternatively be disposed in the communication processor 124. Furthermore, the receive chain or the transmit chain may be present in the RF front end 128, and / or the depicted receive chain 202 or transmit chain 252 may be extended into the RF front end 128 such that the chains are at least partially distributed across the transceiver 126 and the RF front end 128.

[0065] Figure 3 Schematic diagram 300 illustrates an example transmit chain 252 including a voltage-to-current converter 130. As illustrated, transmit chain 252 includes a DAC 260, a baseband filter 302 (BBF 302), a voltage-to-current converter 130 (V2I converter 130), a mixer circuit 258, and a transformer 304. Baseband filter 302 is coupled between DAC 260 and voltage-to-current converter 130. Voltage-to-current converter 130 is coupled between baseband filter 302 and mixer circuit 258. Mixer circuit 258 is coupled between voltage-to-current converter 130 and transformer 304.

[0066] In some cases, mixer circuit 258 is implemented as an active mixer that feeds transformer 304 for further transmit signal processing before transmission. In schematic 300, the components are coupled together with two wires to represent a differential (or balanced) signaling environment. In this case, transmit chain 252 may employ two exemplary voltage-to-current converters: one for the differential in-phase (I) signal and another for the quadrature (Q) signal. Here, differential voltage-to-current converter 130 may process the two signal components. If 45° I and Q signals are also employed, transmit chain 252 may employ four voltage-to-current converters to process the resulting eight signal components.

[0067] although Figure 3 The transmit chain 252 in FIG. 1 depicts dual signaling lines for differential signaling, but the principles described herein can be employed in a single-ended (or unbalanced) signaling environment. Figure 7-1 and Figure 7-2 Furthermore, some of the illustrations depicting dual signal lines may be applicable to single-ended implementations, such as schematic 300. Conversely, some of the illustrations depicting single signal lines may be applicable to differential implementations, such as Figure 2 Schematic diagram 200.

[0068] Figure 4-1 FIG4 is a circuit diagram 400-1 of an example voltage-to-current converter 130, illustrating an example first aspect 402-1 that can reduce noise in an output signal 406 and an example second aspect 402-2 that can reduce nonlinearity in the output signal 406. Also shown is an input signal 404 for the voltage-to-current converter 130. In a differential environment, the input signal 404 includes a positive input signal 404+ and a negative input signal 404-. Similarly, the output signal 406 includes a positive output signal 406+ and a negative output signal 406-. In example operation, the voltage-to-current converter 130 receives the voltage-mode input signal 404 and generates a current-mode output signal 406.

[0069] In an example implementation, the voltage-to-current converter 130 includes at least one input transistor 412, at least one current source transistor 414, and one or more resistors. The input transistor 412 is ( Figure 1 ) input transistor 132, and the current source transistor 414 is ( Figure 1 The one or more resistors may be configured as ( Figure 1 The at least one degradation resistor 134 of the present invention may be operated or may be coupled into the circuit as the at least one degradation resistor. Figure 4-1As shown, voltage-to-current converter 130 includes a positive input transistor 412+, a negative input transistor 412−, a positive current source transistor 414+ (positive CS transistor 414+), and a negative current source transistor 414− (negative CS transistor 414−). Voltage-to-current converter 130 also includes a positive resistor 416+, a negative resistor 416−, and a resistor 418 (e.g., a first resistor 418-1 and a second resistor 418-2 in a center or middle degenerate resistor region). Positive current source transistor 414+ is coupled between positive input transistor 412+ and power distribution node 420. Negative current source transistor 414− is coupled between negative input transistor 412− and power distribution node 420.

[0070] Input transistor 412 can be configured to operate as a transconductance device that converts voltage-mode signaling to current-mode signaling (e.g., input transistor 412 can be implemented as at least one transconductance transistor). Additionally or alternatively, input transistor 412 can be configured to operate as an amplifier device (e.g., input transistor 412 can be implemented as at least one amplifier transistor). An amplifier transistor can have a gain that generally changes the voltage level, current magnitude, or amplitude of a signal. The gain ratio can be less than one, greater than one, or equal to one; thus, the amplifier transistor can have a unity gain in some cases.

[0071] In the illustrated circuit, power distribution node 420 is shown as ground; however, the power distribution node may alternatively be a supply voltage rail (not shown). Using an NMOS implementation of the depicted transistors, current source transistor 414 may be coupled to ground (e.g., via its source terminal), and input transistor 412 may be coupled to the supply voltage rail (e.g., via its drain terminal). Conversely, in a PMOS implementation of a V2I converter, power distribution node 420, as depicted, coupled to the current source transistor may be the supply voltage rail, and the input transistor may be coupled to ground via a channel terminal opposite to the channel terminal coupled to the degeneration resistor.

[0072] Furthermore, as shown with respect to example first aspect 402-1, positive resistor 416+ may be coupled between positive input transistor 412+ and positive current source transistor 414+ via respective channel terminals of each of the positive transistors. Negative resistor 416- may be coupled between negative input transistor 412- and negative current source transistor 414- via respective channel terminals of each of the negative transistors. Resistor 418 (e.g., which may be implemented as two or more resistors, such as resistor 418-1 and resistor 418-2) may be coupled between positive resistor 416+ and negative resistor 416-. Furthermore, positive resistor 416+, resistor 418, and negative resistor 416- may be coupled together in series between positive input transistor 412+ and negative input transistor 412- via respective channel terminals of each of the input transistors (such as via two respective source terminals as shown for an NMOS implementation).

[0073] like Figure 4-1 As illustrated, the voltage-to-current converter 130 may include at least one conductive path 424 coupled between the positive input transistor 412+ and the negative input transistor 412- (e.g., between their respective channel terminals, such as between their respective source terminals as shown). The conductive path 424 may also be coupled between the positive current source transistor 414+ and the negative current source transistor 414- (e.g., between their respective channel terminals, such as between their respective drain terminals as shown for the NMOS implementation). The conductive path 424 may include at least one conductive wire, metal trace, metal layer portion, etc. that can conduct current. The conductive path 424 may include one or more components, such as at least one resistor. As shown, by way of example only, the conductive path 424 may include at least one resistor 418, such as a first resistor 418-1 and a second resistor 418-2. However, the conductive path 424 may include more, fewer, and / or different components.

[0074] Resistor 418 may be coupled between the positive current source transistor 414+ and the negative current source transistor 414-, such as between their respective channel terminals. For example, for an exemplary NMOS implementation, resistor 418 may be coupled between the drain terminal of the positive current source transistor 414+ and the drain terminal of the negative current source transistor 414-. As shown, positive resistor 416+ may be coupled between the source terminal of the positive input transistor 412+ and the drain terminal of the positive current source transistor 414+. Negative resistor 416- may be coupled between the source terminal of the negative input transistor 412- and the drain terminal of the negative current source transistor 414-.

[0075] The current source (CS) transistor can be configured or operated as a current source. This is indicated at 422+ and 422-, where current source symbols and associated parasitic resistances are depicted to illustrate example operating states of the positive current source transistor 414+ and the negative current source transistor 414-, respectively. Thus, some implementations of the voltage-to-current converter 130 are depicted as having at least one current source 422, such as a positive current source 422+ and a negative current source 422-.

[0076] For clarity, Figure 4-1 Certain components are labeled with "additional" descriptive terms, but this is by way of example only. For example, a "positive input transistor" refers to a transistor that can correspond to the positive portion of the differential signal and can accept or receive the positive input signal 404+ as part of the operation of voltage-to-current converter 130. As described above, input transistor 412 can also be referred to as a transconductance transistor or an amplifier transistor. Similarly, a "negative current source transistor" refers to a transistor that can correspond to the negative portion of the differential signal and can function as a current source during at least a portion of the operation of voltage-to-current converter 130.

[0077] However, these terms are used only for the sake of clarity. The input transistors may alternatively be referred to as, for example, main transistors, amplifier transistors, or transconductance transistors. Thus, the input transistors may be implemented as transconductance devices that may include at least one transconductance transistor and may or may not apply a non-unity gain to the incoming signal. In some cases, the amplifier or transconductance transistor may not provide gain or may have unity gain. Often, the positive input transistor and the negative input transistor may alternatively be referred to as transistors that are distinguished or differentiated from other transistors using numerical identifiers, for example, as a first transistor and a second transistor, respectively. Similarly, the positive current source transistor and the negative current source transistor may alternatively be referred to as, for example, a third transistor and a fourth transistor, respectively, etc.

[0078] Figure 4-2 is a circuit diagram 400 - 2 of an example voltage-to-current converter 131 illustrating an example signal-noise routing paradigm based on at least one positioning of at least one degeneration resistor of the depicted voltage-to-current converter 131 . Figure 4-3 is a circuit diagram 400-3 of an example voltage-to-current converter 130 illustrating another example signal-to-noise routing paradigm based on at least one different positioning of at least one degeneration resistor of the depicted voltage-to-current converter 130 to facilitate understanding of the ( Figure 4-1 ) Example first aspect 402-1. Figure 4-2 and Figure 4-3 In the two illustrated voltage-to-current converters, the current sources are represented by noise sources for the purpose of noise-dependent signal analysis. Each voltage-to-current converter includes one or more degeneration resistors.

[0079] exist Figure 4-2 In the example voltage-to-current converter 131, two degenerate resistors are shown: resistor 451-1 and resistor 451-2. However, resistors 451-1 and 451-2 can be implemented as resistor 451, or vice versa. Two noise-correlated currents are shown. Each current 453 and 455 is injected into the output signal by noise caused by a current source, depicted as noise source 457, which corresponds to the "positive" side of the differential circuit in this example. Relative to the noise level of current 455, the current in current 453, and therefore the noise, is significantly larger. This is illustrated by the noise symbol 459 near each current. This occurs in part because the larger current 453 takes a leftward branch or path rather than a rightward branch or path (as depicted) because resistors 451-1 and 451-2 hinder the current from flowing to the negative side of the circuit in the rightward path. As a result, the noise is significantly uncorrelated between the positive and negative portions of the differential output signal. Therefore, at least when resolving the differential positive signal and the differential negative signal, a relatively large amount of noise is generated in the output signal.

[0080] exist Figure 4-3 In the example voltage-to-current converter 130 of FIG. , four degeneration resistors are shown: resistor 416+, resistor 416-, resistor 418-1, and resistor 418-2. However, resistor 418-1 and resistor 418-2 can be implemented as resistor 418, and vice versa. Two noise-related currents are shown. Each current 468 and 470 is injected into the output signal by noise caused by a current source depicted as noise source 472, which corresponds to the "positive" side of the differential circuit in this example. In the voltage-to-current converter 130, relative to FIG. Figure 4-2 Corresponding to the two noise values ​​indicated by the noise symbol 459 of the currents 453 and 455 of the voltage-to-current converter 131 in FIG. 1 , the current magnitude, and therefore the amplitude of the noise, as indicated by the noise symbol 474 , are significantly closer between the two currents 468 and 470 .

[0081] This occurs in part because the current originating from the noise source 472 on the left encounters resistance in both its path toward the positive input transistor 412+ and toward the negative input transistor 412-. Thus, as indicated by the noise symbol 474, the noise is significantly more correlated between the positive and negative portions of the differential output signal, as compared to the Figure 4-2 Compared with the noise symbols 459 in Figure 4-3, are depicted as being relatively closer in magnitude to one another. Thus, when the differential signal is resolved, the two noise levels in the positive and negative portions of the differential output signal of voltage-to-current converter 130 can cancel out a relatively large amount of noise. Noise symbols 459 and 474 are illustrated with specific relative amplitudes by way of example only and are not necessarily depicted to scale.

[0082] In other words, based on this article ( Figure 4-1 ) Example of the first aspect 402-1 described principles, using Figure 4-3 The voltage to current converter 130 in FIG. 1 , the noise is more evenly distributed or separated between the positive and negative portions of the input transistors. Due to common mode signaling, the noise is more evenly distributed or separated between the positive and negative portions of the input transistors. Figure 4-2 Compared to the noise flowing in the single transistor path of the voltage-to-current converter 130, Figure 4-3 The separate noise levels of voltage-to-current converter 131 in FIG. 4 can more effectively cancel each other out. In this way, including resistor 416+ between positive input transistor 412+ and the positive current source transistor or including resistor 416- between negative input transistor 412- and the negative current source transistor can reduce the amount of noise generated by voltage-to-current converter 130. Consequently, these techniques can reduce the amount of noise that can be injected into downstream components of the communication chain, such as mixer circuits.

[0083] Figure 5-1 to Figure 5-3 5 are circuit diagrams 500 - 1 to 500 - 3 illustrating several example implementations of the voltage-to-current converter 130 . Figure 5-1 In circuit diagram 500-1, each of the degradation resistors is implemented using at least one adjustable resistor, as indicated by the arrows through each corresponding resistor symbol. For example, positive resistor 416+ may include a positive adjustable resistor, and negative resistor 416- may include a negative adjustable resistor. Similarly, resistor 418 may include an adjustable resistor. Each adjustable resistor may be formed, for example, using multiple non-adjustable resistors coupled in series or in parallel with a switch. The switch may be placed in an open state for switches connected in parallel, or in a closed state for switches connected in series, to activate the corresponding resistor or include it in the total resistance of the adjustable resistor. In some cases, the adjustable resistor may be implemented using a resistor group with associated corresponding switches.

[0084] By using at least one adjustable resistor as the degeneration resistor of voltage-to-current converter 130, the voltage-to-current converter can be tuned to reduce noise to a greater extent, potentially at the expense of reduced linearity. Alternatively, voltage-to-current converter 130 can be tuned to increase linearity to a greater extent, potentially at the expense of increased noise. Generally, the higher the resistance value of positive resistor 416+ or negative resistor 416- relative to the resistance value of "center" resistor 418, the lower the linearity of voltage-to-current converter 130.

[0085] The adjustable resistance of the degradation resistor may be adjusted or established by the controller 502. The controller 502 may be, for example, Figure 1 and Figure 2 The controller 502 may be a portion of any portion of the wireless interface device 120, such as the portion where the communication processor 124 or the voltage-to-current converter 130 resides. In operation, the controller 502 issues at least one control signal 504 to adjust the resistance of at least one of the degradation resistors of the voltage-to-current converter 130 (e.g., by opening or closing at least one switch associated with the at least one resistor). The resistance may be adjusted depending on whether noise reduction or nonlinearity reduction is more important in a given operating environment. As illustrated, each of the degradation resistors may be implemented as an architectural resistor rather than a parasitic or unintended resistance. Although each of the depicted degradation resistors is shown as an adjustable resistor, fewer than all (including none) of the degradation resistors may be implemented as adjustable. Furthermore, the degradation resistors may include both adjustable and non-adjustable resistors.

[0086] exist Figure 5-2 In circuit diagram 500-2 , each of the degradation resistors is coupled in parallel with a corresponding switch. For example, positive resistor 416+ may be coupled in parallel with positive switch 516+, and negative resistor 416- may be coupled in parallel with negative switch 516-. Similarly, resistor 418 may be coupled in parallel with switch 518. In the open state, the corresponding switch has a relatively small impact on the functionality of the corresponding resistor coupled in parallel with it. However, in the closed state, the corresponding switch may, in response to the switch being in the closed state, at least one of: short-circuit the corresponding resistor or bypass the corresponding resistor. Although not shown, switch 518 may also be coupled in parallel with non-adjustable resistor 418. This configuration in which a non-adjustable resistor is coupled in parallel with a switch (e.g., positive switch 516+ or negative switch 516-) also applies to positive resistor 416+ and negative resistor 416-.

[0087] Thus, the parallel switch can be closed to "remove" a resistor, including an adjustable resistor or a non-adjustable resistor, from the functionality of the circuit. This can enable the controller 502 to quickly or more comprehensively (including quickly and more comprehensively) focus the operation of the voltage-to-current converter 130 on noise reduction or nonlinearity reduction depending on the current operating parameters. Although each of the depicted degradation resistors is shown as coupled in parallel with a corresponding switch, fewer than all (including none) of the degradation resistors may be coupled in parallel with the switch.

[0088] exist Figure 5-3 In the circuit diagram 500-3 of FIG. 5 , each of the degradation resistors is coupled in parallel with a corresponding switch, and each of the degradation resistors is implemented to provide an adjustable resistance. Various implementations of the degradation resistors are provided for the described implementations ( Figure 4-1 In the example first aspect 402-1 of the described specific implementation, the example second aspect 402-2 (also Figure 4-1 In the example second aspect of FIG, the current source transistors can be biased to increase the linearity of the voltage-to-current converter 130. To this end, a bias generator 572 can apply a bias signal 574 to the control input (e.g., gate terminal) of the positive current source transistor 414+ or the negative current source transistor 414−, including to the control inputs of both transistors.

[0089] In an example implementation, bias generator 572 biases positive current source transistor 414+ and negative current source transistor 414- into a triode region of operation rather than a saturation region. In the saturation region of operation, the current flowing through the transistor remains substantially constant as the voltage across the transistor changes. For example, when the transistor is in saturation, the current may deviate by no more than 10%, or even no more than 5%, as the voltage across the transistor's channel terminal fluctuates. In contrast, when in a triode mode of operation, the current of the transistor may deviate more significantly in response to changes in the voltage across the transistor.

[0090] In some cases, the drain-source voltage V DS The biasing technique (e.g., for a FET implementation) is maintained at a level that allows the tail current of voltage-to-current converter 130 to increase as the "main" or "amplified" current of the input transistor decreases. As a result, the current of voltage-to-current converter 130 can be more balanced to offset current clipping in the input transistor. This biasing technique can improve, for example, the adjacent channel leakage ratio (ACLR).

[0091] Figure 6-1 to Figure 6-4 They are respectively based on examples ( Figure 4-1 600 - 1 to 600 - 4 illustrate a plurality of example implementations of a voltage-to-current converter of at least example second aspect 402 - 2 . Figure 6-1 The circuit diagram 600 - 1 depicts a voltage-to-current converter including at least one degeneration resistor R coupled between two current source transistors 414 + and 414 −. dgen The two input transistors 412+ and 412- can provide amplification and can be referred to as amplifier or main transistors. Although Figure 6-1 Not shown, but the bias generator 572 may generate a bias signal 574 ( Figure 5-2 of both) as the mirror voltage (V mirror ) to bias the two current source transistors 414+ and 414-. The transconductance G of the voltage-to-current converter m Linearization can be performed using resistance degeneration. Here, resistance degeneration transconductance G m It can be given by the following formula:

[0092]

[0093] Among them, "g m ” is the transconductance of the input transistor 412. Therefore, the higher the loop gain (g m R dgen ) reduces transconductance (G m ) changes in the input signal.

[0094] The tail current expansion from the current source (of current source transistors 414+ and 414-) can contribute to the output current. Thus, in addition to providing a DC bias current, the tail current bias can also contribute to the signal current (e.g., due to V ds -I ds Non-linearity). In response to the g of input transistors 412+ and 412- m starts to compress near the full-scale signal, the tail current from the current source can expand to compensate for the g of the input transistor m compression. Figure 6-1 The voltage-to-current converter omits the coupling between the corresponding input transistor 412 and the corresponding current source transistor 414 (eg, between two positive transistors or two negative transistors, as shown in FIG. 4 ). Figure 5-3 The positive resistor 416+ and the negative resistor 416-) are degenerate resistors, but Figure 6-1 to Figure 6-4 The principles and techniques of this circuit also apply to this type of circuit, including Figure 4-1 、 Figure 4-3 and Figure 5-1 to Figure 5-3 Those circuits.

[0095] Figure 6-2 The circuit diagram 600-2 depicts (for example, Figure 6-1 ) portion of a voltage-to-current converter illustrating three example currents: g of input transistor 412 m Current (I gm), the tail current of the current source transistor 414 (I tail ) and the degeneration resistor R dgen The degradation resistor current (I rdgen ). These currents are used as reference Figure 6-3 Describe some principles.

[0096] Figure 6-3 FIG. 600 - 3 depicts Figure 6-2 Example graphs of currents. For each of the three currents, the graph on the left illustrates the derivative of the current in decibels (dBI) versus decibels relative to full scale (dBFs). The graph shows g m Current (I gm ) varies with decibels relative to full scale (dBFs). m Current (I gm ) begins to decrease, the tail current (I tail ) increases to compensate and thereby maintain the combined current over a wider signal input range. This is even clearer in the zoomed-in graph on the right. Due to the increased tail current (I tail ), g m Current (I gm ) is maintained at a ratio of the degradation resistor current (I rdgen ) "longer" essentially constant level.

[0097] Figure 6-4 FIG. 600-4 depicts I DS With V DS An example graph of the relationship between g DS With V DS Example graph of the relationship between V DS Increase from zero to approximately 0.10 to 0.16V DS , g DS The value decreases relatively quickly, and then decreases with V DS Increase, g DS The value becomes essentially constant. On the contrary, as V DS Increases from zero to approximately 0.10 to 0.18V DS , I DS The value increases relatively quickly, and then as V DS Increase, I DS The value becomes substantially constant.

[0098] For certain example implementations, a transistor operating region demarcation line 672 is depicted. An example saturation region 674 and an example triode region 676 are also depicted. Compared to the saturation region 674, the triode region 676 corresponds to a higher transistor current (I DS ) and g DSThe relatively faster change of V DS It should be noted that the transistor operating region boundary 672 can be established or positioned at a value slightly less than or greater than the indicated V DS Level V DS level, and / or when the transistor transitions between the two regions, the dividing line can be a small range of V DS Furthermore, for other circuits or other transistors, the dividing line may have a different value.

[0099] Under proper biasing, when the tail current is driven in the triode region 676, the tail current source can be DS Expand and expand. Usually, g DS The extension is for example g in a class B / C voltage mode amplifier m Extended duality. With the V GS (gate-source voltage) increases, then I DS In some cases, the tail current source can behave like a "Class B" amplifier. In the case of a Class B amplifier, when V GS When the gate-source voltage swings greatly, the transconductance g m expansion, but when V DS When the (drain-source voltage) swing is large, g DS Extension.

[0100] Using these properties, the Gm current of the voltage-to-current converter can be linearized. To do this, the g of the tail current source m The expansion can be related to the g of the input transistor m While this bias point or range may vary slightly with process or temperature, the bias value can be static relative to the voltage-to-current converter's input signal. In other words, enhancing or even optimizing the bias setting may involve testing due to process variability or may involve relatively slow or infrequent updates during operation due to temperature changes, but the voltage bias setting need not depend on or need to track rapidly fluctuating input signals.

[0101] Figure 7-1 and Figure 7-2 are circuit diagrams 700-1 and 700-2 illustrating a plurality of example implementations of a voltage-to-current converter according to the example first aspect and the example second aspect for a single-ended environment. Figure 7-1 , the voltage to current converter 130 includes a capacitor 702 coupled between a resistor 418 and a power distribution node 420 (or a power supply network node 420) such as ground. The resistor 418 may be implemented as described above with reference to Figure 5-1The adjustable resistor 418 is described. In addition, a switch 518 may be coupled in parallel with the adjustable resistor 418 (or the non-adjustable resistor 418), as described above with reference to Figure 5-2 The current source 422 may be implemented using the current source transistor 414. The current source transistor 414 may be biased in the triode region 676 as described above with reference to FIG. Figure 5-3 and Figure 6-1 to Figure 6-4 As described, the output current is linearized. However, capacitor 702 may be relatively large in some cases and therefore expensive or difficult to implement. To avoid using such a large capacitor, an operational amplifier (op amp) may be used instead in the circuit.

[0102] exist Figure 7-2 In FIG. 7 , the voltage-to-current converter 130 includes an op amp 742, as depicted on the left side of the circuit diagram 700 - 2 . The resistor 418 is coupled between the current source 422 and the output of the op amp 742 . The first input (eg, the negative input) of the op amp 742 is connected to a reference voltage (V REF ). A second input (e.g., a positive input) of op amp 742 is coupled to nodes corresponding to the terminals of resistor 416, resistor 418, and input transistor 412. As indicated on the right side of circuit diagram 700-2 of voltage-to-current converter 130*, the noise injected by current source 422 is split between input transistor 412 and resistor 418. The resistance value of resistor 418 can be adjusted to vary the amount of noise reduced. Thus, although not explicitly indicated, Figure 7-1 and Figure 7-2 Resistors 416 and 418 may be adjustable or may be coupled in parallel with at least one switch to adjust the resistance values ​​after the voltage-to-current converter circuit is manufactured or already in use.

[0103] Each transistor as described herein or depicted in the various figures may be implemented using any one or more of a variety of transistor types. Example transistor types include field effect transistors (FETs), junction FETs (JFETs), metal oxide semiconductor FETs (MOSFETs), bipolar junction transistors (BJTs), insulated gate bipolar transistors (IGBTs), and the like. Manufacturers may, for example, manufacture FETs as n-channel or p-channel transistor types and manufacture BJTs as NPN or PNP transistor types. Each illustrated or described transistor may also be implemented using two or more transistors connected in series or in parallel.

[0104] Each transistor may include at least one control terminal and one or more channel terminals. For FET transistors, the control terminal may correspond to the gate terminal, and the channel terminal may correspond to the source terminal or the drain terminal. For BJT transistors, the control terminal may correspond to the base terminal, and the channel terminal may correspond to the emitter terminal or the controller terminal.

[0105] Figure 8 FIG2 is a flow chart illustrating an example process 800 for performing a voltage-to-current conversion process or for operating a voltage-to-current converter. Process 800 includes four blocks 802-808 that specify operations that may be performed for the method. However, the operations are not necessarily limited to the order shown in the figures or described herein, as the operations may be performed in an alternative order or in a fully or partially overlapping manner. Additionally, more, fewer, and / or different operations may be performed to perform the respective process or an alternative process.

[0106] In an example implementation, the operations represented by the illustrated blocks of each process may be performed by an electronic device such as Figure 1 The electronic device 102 or the wireless interface device 120 of the electronic device may be used to perform the corresponding process. More specifically, the operations of the corresponding process may be performed by the voltage-to-current converter 130 of the transceiver 126 or the RF front end 128. Although some of the description herein focuses on voltage-to-current converters operating on differential signals, the described principles (e.g., corresponding devices, circuits, techniques, and processes) are not limited thereto. These principles are also applicable to single-ended signaling.

[0107] At block 802, a voltage-mode input signal is received at an input transistor. For example, the voltage-to-current converter 130 may receive the voltage-mode input signal 404 at the input transistor 412. For example, the positive input transistor 412+ may receive the positive input signal 404+ having voltage-mode signaling at the control terminal of the transistor (e.g., at the gate terminal of a FET).

[0108] At block 804, a current-mode output signal is generated using an input transistor. For example, the voltage-to-current converter 130 may generate the current-mode output signal 406 using the input transistor 412. To this end, the positive input transistor 412+ may generate the positive output signal 406+ having current-mode signaling at the channel terminal of the transistor (e.g., at the drain terminal of an n-type FET).

[0109] At block 806, current is provided to the input transistor using a current source transistor. For example, voltage-to-current converter 130 may use current source transistor 414 to provide current (e.g., corresponding to current 468) to input transistor 412. In some cases, positive current source transistor 414+ may provide a bias current to at least positive input transistor 412+. Additionally, positive current source transistor 414+ may also provide a bias current to negative input transistor 412−.

[0110] At block 808, noise generated by the current source transistor is separated between a first path comprising at least an input transistor and a resistor and a second path comprising another resistor. For example, voltage-to-current converter 130 may separate noise generated by current source transistor 414 between a first path comprising at least input transistor 412 and resistor 416 and a second path comprising another resistor. This may be performed at least in part by a node joining the first path, the second path, and positive current source transistor 414+. The first path may include positive input transistor 412+ and positive resistor 416+. The second path may include at least negative resistor 416-. The second path may also include resistor 418 (e.g., first resistor 418-1 and second resistor 418-2); thus, the second path may include conductive path 424. Any one or more of these resistors may be adjustable. Additionally or alternatively, any one or more of these resistors may be coupled in parallel with switches 516 or 518.

[0111] In some implementations, the current source transistor is biased in the triode region of transistor operation during at least a portion of the time that it provides current to the input transistor. For example, the voltage-to-current converter 130 can bias the current source transistor 414 in the triode region 676 of transistor operation during at least a portion of the time that it provides current to the input transistor 412. Here, the bias generator 572 can use the bias signal 574 to bias the positive current source transistor 414+ in the triode region 676 of transistor operation during at least a portion of the time that the positive current source transistor 414+ provides bias current to the positive input transistor 412+.

[0112] Specific implementation examples

[0113] This section describes some aspects of example implementations and / or example configurations related to the apparatus and / or processes presented above.

[0114] Example Aspect 1: An apparatus comprising:

[0115] A voltage-to-current converter, the voltage-to-current converter comprising:

[0116] Positive input transistor;

[0117] Negative input transistor;

[0118] a positive current source transistor coupled between the positive input transistor and a power distribution node;

[0119] a negative current source transistor coupled between the negative input transistor and the power distribution node;

[0120] a positive resistor coupled between the positive input transistor and the positive current source transistor; and

[0121] A negative resistor is coupled between the negative input transistor and the negative current source transistor.

[0122] Example aspect 2: The apparatus of example aspect 1, wherein the voltage-to-current converter comprises:

[0123] A positive switch is coupled in parallel with the positive resistor.

[0124] Example aspect 3: The apparatus of example aspect 2, wherein:

[0125] The positive switch is configured to at least one of short-circuit the positive resistor or bypass the positive resistor in response to being in a closed state.

[0126] Example aspect 4: The apparatus of any preceding example aspect, wherein:

[0127] The positive resistor comprises a positive adjustable resistor; and

[0128] The negative resistor includes a negative adjustable resistor.

[0129] Example Aspect 5: The apparatus of Example Aspect 4, wherein the voltage-to-current converter comprises:

[0130] a positive switch coupled in parallel with the positive adjustable resistor; and

[0131] A negative switch is coupled in parallel with the negative adjustable resistor.

[0132] Example Aspect 6: The apparatus of any preceding example aspect, wherein the voltage-to-current converter comprises:

[0133] A conductive path is coupled between the positive resistor and the negative resistor.

[0134] Example Aspect 7: The apparatus of Example Aspect 6, wherein the voltage-to-current converter comprises:

[0135] A resistor is coupled along the conductive path between the positive resistor and the negative resistor.

[0136] Example aspect 8: The apparatus of example aspect 7, wherein:

[0137] The positive resistor, the resistor, and the negative resistor are coupled together in series between the positive input transistor and the negative input transistor.

[0138] Example aspect 9: The apparatus of example aspect 7 or 8, wherein:

[0139] The resistor is coupled between the positive current source transistor and the negative current source transistor.

[0140] Example Aspect 10: The apparatus of any one of Example Aspects 7 to 9, wherein the voltage-to-current converter comprises:

[0141] A switch is coupled in parallel with the resistor.

[0142] Example Aspect 11: The apparatus of any one of Example Aspects 7 to 10, wherein the voltage-to-current converter comprises:

[0143] a positive switch coupled in parallel with the positive resistor; and

[0144] A negative switch is coupled in parallel with the negative resistor.

[0145] Example Aspect 12: The apparatus of any one of Example Aspects 7 to 11, wherein:

[0146] The positive resistor includes a positive adjustable resistor;

[0147] The negative resistor comprises a negative adjustable resistor; and

[0148] The resistor includes an adjustable resistor.

[0149] Example Aspect 13: The apparatus of Example Aspect 12, wherein the voltage-to-current converter comprises:

[0150] a positive switch coupled in parallel with the positive adjustable resistor;

[0151] a negative switch coupled in parallel with the negative adjustable resistor; and

[0152] A switch is coupled in parallel with the adjustable resistor.

[0153] Example Aspect 14: The apparatus of any preceding example aspect, wherein the voltage-to-current converter comprises:

[0154] A resistor is coupled between the positive current source transistor and the negative current source transistor.

[0155] Example aspect 15: The apparatus of example aspect 14, wherein:

[0156] The resistor is coupled between a channel terminal of the positive current source transistor and a channel terminal of the negative current source transistor.

[0157] Example Aspect 16: The apparatus of Example Aspect 15, wherein:

[0158] the positive resistor being coupled between a channel terminal of the positive input transistor and the channel terminal of the positive current source transistor; and

[0159] The negative resistor is coupled between a channel terminal of the negative input transistor and the channel terminal of the negative current source transistor.

[0160] Example Aspect 17: The apparatus of Example Aspect 16, wherein:

[0161] the channel terminal of the positive current source transistor comprising a drain terminal of the positive current source transistor;

[0162] the channel terminal of the negative current source transistor comprising a drain terminal of the negative current source transistor;

[0163] the channel terminal of the positive input transistor comprises a source terminal of the positive input transistor; and

[0164] The channel terminal of the negative input transistor includes a source terminal of the negative input transistor.

[0165] Example Aspect 18: The apparatus of any preceding example aspect, wherein:

[0166] The positive input transistor, the positive resistor, and the positive current source transistor are coupled together in series between the power distribution node and another power distribution node.

[0167] Example Aspect 19: The apparatus of Example Aspect 18, wherein:

[0168] The power distribution node comprises ground; and

[0169] The another power distribution node comprises a voltage supply rail.

[0170] Example Aspect 20: The apparatus of Example Aspect 1, wherein:

[0171] The positive input transistor is configured to convert a voltage-mode signal received at a control terminal of the positive input transistor to produce a current-mode signal at a channel terminal of the positive input transistor.

[0172] Example Aspect 21: The apparatus of any preceding example aspect, wherein:

[0173] The positive current source transistor is configured to be biased in a triode region of transistor operation.

[0174] Example Aspect 22: The apparatus of Example Aspect 21, further comprising:

[0175] A controller is coupled to the voltage-to-current converter, the controller being configured to bias the positive current source transistor in the triode region of transistor operation to reduce nonlinearity of an output signal of the voltage-to-current converter.

[0176] Example Aspect 23: The apparatus of any preceding example aspect, wherein:

[0177] The positive current source transistor is configured to operate as a current source with respect to at least the positive input transistor.

[0178] Example Aspect 24: The apparatus of Example Aspect 23, wherein the positive current source transistor is configured to:

[0179] generating an output current; and

[0180] The output current is dynamically adjusted in response to a voltage swing developed by the positive input transistor.

[0181] Example Aspect 25: The apparatus of Example Aspect 24, wherein the positive current source transistor is configured to:

[0182] The output current is dynamically adjusted to offset clipping experienced by the positive input transistor.

[0183] Example Aspect 26: The apparatus of any preceding example aspect, further comprising:

[0184] Digital-to-analog converters;

[0185] a baseband filter coupled between the digital-to-analog converter and the voltage-to-current converter; and

[0186] mixer,

[0187] The voltage-to-current converter is coupled between the baseband filter and the mixer.

[0188] Example Aspect 27: An apparatus, the apparatus comprising:

[0189] A voltage-to-current converter, the voltage-to-current converter comprising:

[0190] Positive input transistor;

[0191] Negative input transistor;

[0192] a positive current source transistor coupled between the positive input transistor and a power distribution node;

[0193] a negative current source transistor coupled between the negative input transistor and the power distribution node;

[0194] means for reducing noise generated by the positive current source transistor in an output signal of the voltage-to-current converter; and

[0195] Means for reducing noise generated by the negative current source transistor in the output signal of the voltage-to-current converter.

[0196] Example Aspect 28: A method for voltage-to-current conversion, the method comprising:

[0197] receiving a voltage mode input signal at an input transistor;

[0198] generating a current mode output signal using the input transistor;

[0199] providing current to the input transistor using a current source transistor; and

[0200] Noise generated by the current source transistor is separated between a first path including at least the input transistor and a resistor and a second path including another resistor.

[0201] Example aspect 29: The method of example aspect 28, further comprising:

[0202] The current source transistor is biased in a triode region of transistor operation during at least a portion of the time the current is provided to the input transistor.

[0203] Example Aspect 30: An apparatus, the apparatus comprising:

[0204] A voltage-to-current converter, the voltage-to-current converter comprising:

[0205] Positive input transistor;

[0206] Negative input transistor;

[0207] a positive current source transistor coupled between the positive input transistor and a power distribution node, the positive current source transistor configured to be biased in a triode region of transistor operation during a voltage-to-current conversion process;

[0208] a negative current source transistor coupled between the negative input transistor and the power distribution node, the negative current source transistor configured to be biased in the triode region of transistor operation during the voltage-to-current conversion process; and

[0209] A conductive path is coupled between the positive input transistor and the negative input transistor and between the positive current source transistor and the negative current source transistor.

[0210] Example Aspect 31: An apparatus, the apparatus comprising:

[0211] A voltage-to-current converter, the voltage-to-current converter comprising:

[0212] positive amplifier transistor;

[0213] Negative amplifier transistor;

[0214] a positive current source transistor coupled between the positive amplifier transistor and a power distribution node;

[0215] a negative current source transistor coupled between the negative amplifier transistor and the power distribution node;

[0216] a positive resistor coupled between the positive amplification transistor and the positive current source transistor; and

[0217] A negative resistor is coupled between the negative amplification transistor and the negative current source transistor.

[0218] Example Aspect 32: The apparatus of Example Aspect 31 or any other example aspect, wherein the voltage-to-current converter comprises:

[0219] A positive switch is coupled in parallel with the positive resistor.

[0220] Example Aspect 33: The apparatus of Example Aspect 32 or any other example aspect, wherein:

[0221] The positive switch is configured to at least one of short-circuit the positive resistor or bypass the positive resistor in response to being in a closed state.

[0222] Example aspect 34: The apparatus of example aspect 31 or any other example aspect, wherein:

[0223] The positive resistor includes a positive adjustable resistor.

[0224] Example aspect 35: The apparatus of example aspect 34 or any other example aspect, wherein:

[0225] The negative resistor includes a negative adjustable resistor.

[0226] Example Aspect 36: The apparatus of Example Aspect 35 or any other example aspect, wherein the voltage-to-current converter comprises:

[0227] a positive switch coupled in parallel with the positive adjustable resistor; and

[0228] A negative switch is coupled in parallel with the negative adjustable resistor.

[0229] Example Aspect 37: The apparatus of Example Aspect 31 or any other example aspect, wherein the voltage-to-current converter comprises:

[0230] A resistor is coupled between the positive resistor and the negative resistor.

[0231] Example Aspect 38: The apparatus of Example Aspect 37 or any other example aspect, wherein:

[0232] The positive resistor, the resistor, and the negative resistor are coupled together in series between the positive amplification transistor and the negative amplification transistor.

[0233] Example aspect 39: The apparatus of example aspect 37 or any other example aspect, wherein:

[0234] The resistor is coupled between the positive current source transistor and the negative current source transistor.

[0235] Example aspect 40: The apparatus of example aspect 37 or any other example aspect, wherein the voltage-to-current converter comprises:

[0236] A switch is coupled in parallel with the resistor.

[0237] Example Aspect 41: The apparatus of example aspect 40 or any other example aspect, wherein the voltage-to-current converter comprises:

[0238] a positive switch coupled in parallel with the positive resistor; and

[0239] A negative switch is coupled in parallel with the negative resistor.

[0240] Example aspect 42: The apparatus of example aspect 37 or any other example aspect, wherein:

[0241] The positive resistor includes a positive adjustable resistor;

[0242] The negative resistor comprises a negative adjustable resistor; and

[0243] The resistor includes an adjustable resistor.

[0244] Example Aspect 43: The apparatus of Example Aspect 42 or any other example aspect, wherein the voltage-to-current converter comprises:

[0245] a positive switch coupled in parallel with the positive adjustable resistor;

[0246] a negative switch coupled in parallel with the negative adjustable resistor; and

[0247] A switch is coupled in parallel with the adjustable resistor.

[0248] Example Aspect 44: The apparatus of Example Aspect 31 or any other example aspect, wherein the voltage-to-current converter comprises:

[0249] A resistor is coupled between the positive current source transistor and the negative current source transistor.

[0250] Example aspect 45: The apparatus of example aspect 44 or any other example aspect, wherein:

[0251] The resistor is coupled between a drain terminal of the positive current source transistor and a drain terminal of the negative current source transistor.

[0252] Example aspect 46: The apparatus of example aspect 45 or any other example aspect, wherein:

[0253] The positive resistor is coupled between a source terminal of the positive amplification transistor and the drain terminal of the positive current source transistor; and

[0254] The negative resistor is coupled between a source terminal of the negative amplification transistor and the drain terminal of the negative current source transistor.

[0255] Example aspect 47: The apparatus of example aspect 31 or any other example aspect, wherein:

[0256] The positive amplifier transistor, the positive resistor, and the positive current source transistor are coupled together in series between the power distribution node and another power distribution node.

[0257] Example aspect 48: The apparatus of example aspect 47 or any other example aspect, wherein:

[0258] The power distribution node comprises ground; and

[0259] The another power distribution node comprises a voltage supply rail.

[0260] Example aspect 49: The apparatus of example aspect 31 or any other example aspect, wherein:

[0261] The positive amplification transistor is configured to amplify a voltage-mode signal received at a gate terminal of the positive amplification transistor to produce a current-mode signal at a drain terminal of the positive amplification transistor.

[0262] Example aspect 50: The apparatus of example aspect 31 or any other example aspect, wherein:

[0263] The positive current source transistor is configured to be biased in a triode region of transistor operation.

[0264] Example aspect 51: The apparatus of example aspect 50 or any other example aspect, further comprising:

[0265] A controller is coupled to the voltage-to-current converter, the controller being configured to bias the positive current source transistor in the triode region of transistor operation to reduce nonlinearity in an output signal of the voltage-to-current converter.

[0266] Example aspect 52: The apparatus of example aspect 31 or any other example aspect, wherein:

[0267] The positive current source transistor is configured to operate as a current source at least with respect to the positive amplification transistor.

[0268] Example aspect 53: The apparatus of example aspect 52 or any other example aspect, wherein the positive current source transistor is configured to:

[0269] generating an output current; and

[0270] The output current is dynamically adjusted in response to a voltage swing developed by the forward amplifying transistor.

[0271] Example aspect 54: The apparatus of example aspect 53 or any other example aspect, wherein the positive current source transistor is configured to:

[0272] The output current is dynamically adjusted to counteract clipping experienced by the positive amplifier transistor.

[0273] Example aspect 55: The apparatus of example aspect 31 or any other example aspect, further comprising:

[0274] Digital-to-analog converters;

[0275] a baseband filter coupled between the digital-to-analog converter and the voltage-to-current converter; and

[0276] A mixer is provided, wherein the voltage-to-current converter is coupled between the mixer and the baseband filter.

[0277] in conclusion

[0278] As used herein, the term "coupling" refers to a relationship between two or more components that are in operable communication with each other to implement a feature or achieve a capability described herein. For example, coupling can be achieved using physical lines such as metal traces or wires, or electromagnetic coupling such as a transducer. Coupling can include direct coupling or indirect coupling. Direct coupling refers to connecting discrete circuit elements via the same node without the need for intermediate components. Indirect coupling refers to connecting discrete circuit elements via one or more other devices or other discrete circuit elements (including two or more different nodes).

[0279] The term "node" (including, for example, "first node" or "power distribution network node") refers to at least a point of electrical connection between two or more components (e.g., circuit elements). Although a node may sometimes be visually depicted as a single point in a diagram, the node can represent a connection portion of a physical circuit or network that has approximately the same voltage potential at or along the connection portion between two or more components. In other words, a node can represent at least one of a plurality of points along a conductive medium (e.g., a wire or trace) that exists between electrically connected components. Similarly, a "terminal" or "port" can refer to one or more points that have at least approximately the same voltage potential relative to an input or output of a component (e.g., a transistor).

[0280] The terms "first," "second," "third," and other numerically related designators are used herein to identify or distinguish items that are similar or analogous to one another in a given context (such as a particular implementation, a single figure, a given component, or a claim). Thus, a first item in one context may be different from a first item in another context. For example, an item identified as a "first amplifying transistor" in one context may be identified as a "second amplifying transistor" in another context. Similarly, a "first resistor" or a "first switch" in one claim may be recited as a "second resistor" or a "third switch," respectively, in a different claim (e.g., in a separate set of claims). Similar interpretations apply to differentially related terms, such as "positive transistor" and "negative transistor."

[0281] Unless the context dictates otherwise, the use of the word "or" herein may be considered an "inclusive or," or use permitting inclusion or application of a term that includes one or more items linked by the word "or" (e.g., the phrase "A or B" may be interpreted as permitting only "A," only "B," or both "A" and "B"). Additionally, as used herein, a phrase referring to "at least one of" a list of items refers to any combination of those items (including single members). For example, "at least one of a, b, or c" may cover a, b, c, ab, ac, bc, and abc, as well as any combination with multiple identical elements (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbc, cc, and ccc, or any other ordering of a, b, and c). Additionally, items shown in the drawings and terms discussed herein may indicate one or more items or terms, and thus, reference may be made interchangeably in this written description to the singular or plural forms of those items and terms.

[0282] Although implementations of voltage-to-current conversion have been described in language specific to certain features and / or methods, the subject matter of the appended claims is not necessarily limited to the specific features or methods described. Rather, these specific features and methods are disclosed as example implementations of voltage-to-current conversion.

Claims

1. A device, comprising: A voltage-to-current converter, the voltage-to-current converter comprising: Positive input transistor; Negative input transistor; a positive current source transistor coupled between the positive input transistor and a power distribution node; a negative current source transistor coupled between the negative input transistor and the power distribution node; a positive resistor coupled between the positive input transistor and the positive current source transistor; and A negative resistor is coupled between the negative input transistor and the negative current source transistor.

2. The apparatus of claim 1 , wherein the voltage-to-current converter comprises: A positive switch is coupled in parallel with the positive resistor.

3. The device according to claim 2, wherein: The positive switch is configured to at least one of short-circuit the positive resistor or bypass the positive resistor in response to being in a closed state.

4. The device according to claim 1, wherein: The positive resistor comprises a positive adjustable resistor; and The negative resistor includes a negative adjustable resistor.

5. The apparatus of claim 4 , wherein the voltage-to-current converter comprises: a positive switch coupled in parallel with the positive adjustable resistor; and A negative switch is coupled in parallel with the negative adjustable resistor.

6. The apparatus of claim 1 , wherein the voltage-to-current converter comprises: A conductive path is coupled between the positive resistor and the negative resistor.

7. The apparatus of claim 6, wherein the voltage-to-current converter comprises: A resistor is coupled along the conductive path between the positive resistor and the negative resistor.

8. The apparatus according to claim 7, wherein: The positive resistor, the resistor, and the negative resistor are coupled together in series between the positive input transistor and the negative input transistor.

9. The apparatus according to claim 7, wherein: The resistor is coupled between the positive current source transistor and the negative current source transistor.

10. The apparatus of claim 7, wherein the voltage-to-current converter comprises: A switch is coupled in parallel with the resistor.

11. The apparatus of claim 10, wherein the voltage-to-current converter comprises: a positive switch coupled in parallel with the positive resistor; and A negative switch is coupled in parallel with the negative resistor.

12. The apparatus according to claim 7, wherein: The positive resistor includes a positive adjustable resistor; The negative resistor comprises a negative adjustable resistor; and The resistor includes an adjustable resistor.

13. The apparatus of claim 12, wherein the voltage-to-current converter comprises: a positive switch coupled in parallel with the positive adjustable resistor; a negative switch coupled in parallel with the negative adjustable resistor; and A switch is coupled in parallel with the adjustable resistor.

14. The apparatus of claim 1 , wherein the voltage-to-current converter comprises: A resistor is coupled between the positive current source transistor and the negative current source transistor.

15. The apparatus according to claim 14, wherein: The resistor is coupled between a channel terminal of the positive current source transistor and a channel terminal of the negative current source transistor.

16. The apparatus according to claim 15, wherein: the positive resistor being coupled between a channel terminal of the positive input transistor and the channel terminal of the positive current source transistor; and The negative resistor is coupled between a channel terminal of the negative input transistor and the channel terminal of the negative current source transistor.

17. The apparatus according to claim 16, wherein: the channel terminal of the positive current source transistor comprising a drain terminal of the positive current source transistor; the channel terminal of the negative current source transistor comprising a drain terminal of the negative current source transistor; the channel terminal of the positive input transistor comprises a source terminal of the positive input transistor; and The channel terminal of the negative input transistor includes a source terminal of the negative input transistor.

18. The apparatus of claim 1, wherein: The positive input transistor, the positive resistor, and the positive current source transistor are coupled together in series between the power distribution node and another power distribution node.

19. The apparatus according to claim 18, wherein: The power distribution node comprises ground; and The another power distribution node comprises a voltage supply rail.

20. The apparatus of claim 1, wherein: The positive input transistor is configured to convert a voltage-mode signal received at a control terminal of the positive input transistor to produce a current-mode signal at a channel terminal of the positive input transistor.

21. The apparatus of claim 1, wherein: The positive current source transistor is configured to be biased in a triode region of transistor operation.

22. The apparatus according to claim 21, further comprising: A controller is coupled to the voltage-to-current converter, the controller being configured to bias the positive current source transistor in the triode region of transistor operation to reduce nonlinearity of an output signal of the voltage-to-current converter.

23. The apparatus of claim 1, wherein: The positive current source transistor is configured to operate as a current source with respect to at least the positive input transistor.

24. The apparatus of claim 23, wherein the positive current source transistor is configured to: generating an output current; and The output current is dynamically adjusted in response to a voltage swing developed by the positive input transistor.

25. The apparatus of claim 24, wherein the positive current source transistor is configured to: The output current is dynamically adjusted to offset clipping experienced by the positive input transistor.

26. The apparatus of claim 1, further comprising: Digital-to-analog converters; a baseband filter coupled between the digital-to-analog converter and the voltage-to-current converter; and mixer, The voltage-to-current converter is coupled between the baseband filter and the mixer.

27. A device comprising: A voltage-to-current converter, the voltage-to-current converter comprising: Positive input transistor; Negative input transistor; a positive current source transistor coupled between the positive input transistor and a power distribution node; a negative current source transistor coupled between the negative input transistor and the power distribution node; means for reducing noise generated by the positive current source transistor in an output signal of the voltage-to-current converter; and Means for reducing noise generated by the negative current source transistor in the output signal of the voltage-to-current converter.

28. A method for voltage-to-current conversion, the method comprising: receiving a voltage mode input signal at an input transistor; generating a current mode output signal using the input transistor; providing current to the input transistor using a current source transistor; as well as Noise generated by the current source transistor is split between a first path including at least the input transistor and a resistor and a second path including another resistor.

29. The method according to claim 28, further comprising: The current source transistor is biased in a triode region of transistor operation during at least a portion of the time the current is provided to the input transistor.

30. An apparatus comprising: A voltage-to-current converter, the voltage-to-current converter comprising: Positive input transistor; Negative input transistor; a positive current source transistor coupled between the positive input transistor and a power distribution node, the positive current source transistor configured to be biased in a triode region of transistor operation during a voltage-to-current conversion process; a negative current source transistor coupled between the negative input transistor and the power distribution node, the negative current source transistor configured to be biased in the triode region of transistor operation during the voltage-to-current conversion process; and A conductive path is coupled between the positive input transistor and the negative input transistor and between the positive current source transistor and the negative current source transistor.

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