Broadband high-precision simulation signal generation method and system and simulation signal generator

Abstract

The embodiment of the invention provides a broadband high-precision simulation signal generation method and system and a simulation signal generator, and the method comprises the steps: controlling a direct digital synthesis chip to generate a rotating speed simulation basic signal through a field programmable gate array, and enabling the rotating speed simulation basic signal to be a sine wave or square wave with an adjustable waveform; inputting the rotating speed simulation basic signal into an inverting amplifier, and controlling a digital potentiometer to carry out amplitude adjustment based on the field programmable gate array; a set bias voltage is generated through a digital-to-analog conversion chip; inputting the rotating speed simulation basic signal after amplitude adjustment and the bias voltage into an in-phase addition operational amplifier for superposition to form a composite signal with direct current bias; the composite signal is output after the driving capacity is improved through a power amplifier, and the output composite signal with the driving capacity improved serves as a target rotating speed simulation signal capable of directly driving a steam turbine monitoring instrument system load. The simulation signal generated by the invention can cover wider frequency and has high precision.

Description

Technical Field

[0001] The present application belongs to the technical field of signal generators, and specifically relates to a method and system for generating a wideband and high-precision simulation signal, and a simulation signal generator. Background Art

[0002] Turbine Supervisory Instrumentation (TSI) systems play a vital role in the monitoring and control of rotating machinery systems, such as steam turbines. TSI systems monitor key parameters such as speed, vibration, and displacement to ensure safe and efficient operation. To ensure TSI system measurement accuracy, the monitor instruments must be regularly calibrated and inspected. Traditional calibration methods rely on analog signal generators, which typically generate fixed-frequency signals but have significant limitations in accuracy and frequency range.

[0003] The speed signal generators currently used on the market are all analog signal generators. These devices typically rely on the analog characteristics of circuit components to generate frequency signals. Although these instruments can provide basic signal output, they have the following problems in practical applications: 1. Insufficient accuracy: The output frequency of the analog signal generator is easily affected by external factors such as temperature and time drift, making it difficult to ensure long-term frequency stability.

[0004] 2. Limited frequency range: Analog signal generators can usually only operate within a narrow frequency range, which makes it difficult to meet the signal input requirements of TSI systems, which require a wide frequency range (such as 0.01 Hz to 100 kHz).

[0005] 3. Discontinuous frequency adjustment: Most analog signal generators cannot generate continuously changing frequency signals, especially when simulating changes in mechanical rotation speed, and cannot truly reflect the smooth frequency change curve detected by the sensor.

[0006] Furthermore, the operating environments of modern machinery are becoming increasingly complex, requiring TSI systems to deliver higher response speeds and precision to meet the performance testing requirements of these new devices. For example, during the startup, operation, and shutdown of a steam turbine, the rotating machinery's speed dynamically changes. Speed ​​sensors (such as eddy current sensors, magnetoresistive sensors, and Hall effect sensors) must detect these changes and output corresponding frequency signals. Traditional signal generators are unable to simulate these continuously changing speed signals, compromising the accuracy of TSI system calibration and testing.

[0007] To solve these problems, there is an urgent need for a simulation signal generator that can cover a wider frequency range, has high precision, and can output continuously changing frequency signals, so as to more realistically and effectively simulate the dynamic speed changes of rotating mechanical equipment and calibrate the TSI system more accurately. Summary of the Invention

[0008] The present application proposes a broadband and high-precision simulation signal generation method, system and simulation signal generator to address the above-mentioned defects of the prior art.

[0009] According to a first aspect of an embodiment of the present application, a method for generating a broadband and high-precision simulation signal is provided, comprising: A field programmable gate array is used to control a direct digital synthesis chip to generate a rotational speed simulation basic signal, wherein the rotational speed simulation basic signal is a sine wave or a square wave with an adjustable waveform; Inputting the rotational speed simulation basic signal into an inverting amplifier, and controlling a digital potentiometer based on the field programmable gate array to adjust the amplitude; Generate a set bias voltage through a digital-to-analog conversion chip; Superimposing the amplitude-adjusted speed simulation basic signal and the bias voltage input to the in-phase summing operational amplifier to form a composite signal with a DC bias; The composite signal is output after its driving capability is enhanced by a power amplifier, and the output composite signal with enhanced driving capability is used as a target speed simulation signal that can directly drive the load of a steam turbine monitoring instrument system.

[0010] In some implementations, before inputting the rotational speed simulation basic signal into an inverting amplifier, the method further includes: According to the target frequency value, the direct digital synthesis chip switches the clock frequency based on the field programmable gate array.

[0011] In some embodiments, the method further comprises: When the clock frequency switches, calculating a current phase accumulation value based on the field programmable gate array; The phase accumulation value is written into the phase register of the direct digital synthesis chip.

[0012] In some embodiments, controlling the digital potentiometer to adjust the amplitude based on the field programmable gate array includes: Get the amplitude requirements and values ​​of the target sensor; Dynamically adjusting the resistance of a feedback resistor based on the field programmable gate array controlling the digital potentiometer and the amplitude requirement of the target sensor; The speed simulation basic signal is amplitude-adjusted based on the resistance of the feedback resistor and the speed simulation basic signal to change the signal gain.

[0013] In some embodiments, the target sensor includes an eddy current sensor, a magnetoresistive sensor, and / or a Hall sensor.

[0014] In some embodiments, controlling a direct digital synthesis chip through a field programmable gate array to generate a rotation speed simulation basic signal includes: The field programmable gate array sends a clock signal to the direct digital synthesis chip; Controlling and generating a minimum frequency step of the direct digital synthesis chip according to the clock signal; The speed simulation basic signal is calculated by the following formula: ; in, For the speed simulation basic signal, is the control word, is the clock frequency, is the number of bits in the phase accumulator.

[0015] In some embodiments, the frequency range of the rotation speed simulation basic signal is 0.01 Hz to 100 kHz. The value of is 28, and the controlling and generating of the minimum frequency step of the direct digital synthesis chip according to the clock signal comprises: When the frequency range of the generated speed simulation basic signal is a low-frequency signal greater than or equal to 0.01 Hz and less than 400 Hz, the frequency of the clock signal is 50 kHz, and the minimum frequency step is calculated by the following formula: ; When the frequency range of the generated speed simulation basic signal is a low-frequency signal greater than or equal to 400 Hz and less than or equal to 100 kHz, the frequency of the clock signal is 12 MHz, and the minimum frequency step is calculated by the following formula: ; in, is the minimum frequency step.

[0016] In some embodiments, the change in signal gain is calculated by the following formula: ; in, is the feedback resistor, is the input resistance in the speed simulation basic signal, is the gain coefficient.

[0017] According to a second aspect of an embodiment of the present application, a broadband and high-precision simulation signal generation system is provided, comprising: A basic signal generation module is used to control a direct digital synthesis chip through a field programmable gate array to generate a speed simulation basic signal, wherein the speed simulation basic signal is a sine wave or a square wave with an adjustable waveform; an amplitude adjustment module, configured to input the rotational speed simulation basic signal into an inverting amplifier and control a digital potentiometer to perform amplitude adjustment based on the field programmable gate array; A bias voltage generation module is used to generate a set bias voltage through a digital-to-analog conversion chip; A composite signal generating module, configured to superimpose the amplitude-adjusted speed simulation basic signal and the bias voltage input in-phase summing operational amplifier to form a composite signal with a DC bias; The target speed simulation signal generating module is used to output the composite signal after the driving capability is enhanced by the power amplifier, and use the output composite signal with enhanced driving capability as the target speed simulation signal that can directly drive the load of the steam turbine monitoring instrument system.

[0018] According to a third aspect of the embodiments of the present application, a simulation signal generator is provided, which is configured with the above-mentioned broadband and high-precision simulation signal generation system, including: a field programmable gate array, a direct digital synthesis chip, an inverting amplifier, a digital-to-analog conversion chip, a non-inverting summing operational amplifier, and a power amplifier. The field programmable gate array is used to dynamically switch the clock frequency of the direct digital synthesis chip and control phase continuity; The inverting amplifier is used to adjust the gain based on the field programmable gate array; The in-phase adding operational amplifier is used to superimpose the bias voltage generated by the digital-to-analog conversion chip and the simulation signal; The power amplifier is used to enhance the driving capability of the superimposed bias voltage and the simulation signal.

[0019] The advantageous effects of the broadband and high-precision simulation signal generation method, system, and simulation signal generator of the embodiments of the present application include at least: The embodiment of the present application controls the direct digital synthesis chip through a field programmable gate array to generate a speed simulation basic signal. The field programmable gate array dynamically controls the clock frequency of the direct digital synthesis chip, covering the full frequency band of 0.01Hz-100kHz, solving the problems of narrow frequency range and insufficient precision of traditional analog signal sources; the field programmable gate array calculates and writes the phase accumulator value in real time during frequency switching, eliminating waveform breakage and ensuring the smoothness of the speed simulation signal in dynamically changing scenarios (such as turbine start and stop); by inputting the speed simulation basic signal into the inverting amplifier and controlling the digital potentiometer for amplitude adjustment based on the field programmable gate array, the sensor characteristics are dynamically matched, and the inverting amplifier gain is adjusted in real time by the digital potentiometer, so that the signal amplitude is accurately adapted to the voltage requirement of the eddy current / magnetoresistive / Hall sensor, solving the calibration distortion caused by the fixed amplitude of traditional equipment; the response time is adjusted by the resistance value of the digital potentiometer to meet the requirements of fast switching of the signal amplitude in real-time calibration scenarios; the set bias voltage is generated by the digital-to-analog conversion chip to realize the simulation of the sensor DC characteristics, and the digital-to-analog conversion A programmable bias voltage is generated by replacing the chip to simulate the DC offset in the actual sensor output, resolving signal distortion caused by missing bias during TSI system calibration. The independently generated bias voltage avoids interference with the base signal, providing a clean input for subsequent addition operations and improving signal superposition compatibility. Composite signal synthesis is achieved by superimposing the amplitude-adjusted signal and the bias voltage input into a common-mode summing operational amplifier. The common-mode adder linearly superimposes the amplitude-optimized base signal and the bias voltage to form a composite simulated signal with a DC bias, which directly matches the electrical characteristics of the TSI system input. The low output impedance of the operational amplifier suppresses noise coupling during signal transmission, improving the signal-to-noise ratio of the calibration signal and enhancing anti-interference capabilities. By boosting the drive capability of the composite signal through a power amplifier before outputting it, the load driving capability is enhanced, ensuring that the composite signal can drive the high-impedance load of the TSI system, resolving calibration failures caused by insufficient drive from traditional signal sources. A power protection circuit design prevents overload damage, meeting the requirements for long-term stable operation in field turbine environments. The field-programmable gate array (FPGA) in this embodiment can also adjust the frequency control word and phase register of the direct digital synthesis chip in real time to ensure phase continuity of the output signal as the frequency changes. This device can simulate the output signals of various sensors, adapting to a frequency range of 0.01 Hz to 100 kHz, and providing highly accurate and stable simulated signals. It is particularly suitable for testing and calibrating sensor monitor modules using various types of sensors, such as eddy current sensors, magnetoresistive sensors, and Hall effect sensors. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 Schematic diagram of the flow of a method for generating a broadband and high-precision simulation signal according to an embodiment of the present application; Figure 2A schematic diagram of a variable gain amplifier according to an embodiment of the present application; Figure 3 A schematic diagram of the bias voltage and power amplifier according to an embodiment of the present application; Figure 4 Schematic diagram of the structure of a broadband and high-precision simulation signal generation system according to an embodiment of the present application; Figure 5 This is a principle block diagram of the simulation signal generator according to an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to enable those skilled in the art to better understand the technical solution of the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0022] The following detailed description of the embodiments of the present application is provided in conjunction with the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of the present application, but are not intended to limit the scope of the present application, that is, the present application is not limited to the described embodiments.

[0023] Refer to the attached Figure 1 As shown, the embodiment of the present application discloses specific implementation steps of a method for generating a wideband, high-precision simulated signal. The method is implemented based on a wideband, high-precision simulated signal generation system configured in a simulated signal generator. To ensure that those skilled in the art can implement the technical solution of the present application accordingly, the method specifically includes the following steps 110-150.

[0024] Step 110: Controlling a direct digital synthesis (DDS) chip via a field programmable gate array (FPGA) to generate a rotational speed simulation basic signal, wherein the rotational speed simulation basic signal is a sine wave or a square wave with an adjustable waveform.

[0025] In some embodiments, controlling a direct digital synthesis chip to generate a speed simulation basic signal through a field programmable gate array includes: the field programmable gate array sending a clock signal to the direct digital synthesis chip; and controlling generation of a minimum frequency step of the direct digital synthesis chip according to the clock signal.

[0026] In some implementations, the field programmable gate array adjusts the frequency control word and phase register value of the direct digital synthesis chip in real time to ensure phase continuity of the simulation signal when the frequency changes and to avoid signal jumps or distortion.

[0027] In an exemplary embodiment, the rotational speed simulation basic signal is calculated using the following formula: ; in, Simulate the basic signal for this speed, is the control word, is the clock frequency, is the number of bits in the phase accumulator.

[0028] In some embodiments, the frequency range of the speed simulation basic signal is 0.01 Hz to 100 kHz. The value is 28. In order to ensure that the signal generation in the entire frequency range has sufficient resolution and stability, the embodiment of the present application provides a clock signal through a field programmable gate array, and dynamically switches the clock frequencies of the high frequency band and the low frequency band according to the output frequency. The specific frequency separation point is set at 400 Hz, so that the best frequency resolution can be obtained in different frequency bands. For example, the present application preferably uses a programmable waveform generator chip, which generates a target signal through an internal phase accumulator, a waveform lookup table and a digital-to-analog converter. The phase accumulator generates a phase increment based on the input control word to control the frequency of the signal; the waveform lookup table stores the sampling points of various waveforms, such as sine waves or square waves; finally, the digital-to-analog converter converts these digital waveform data into analog signals to generate a target frequency signal.

[0029] Exemplarily, based on the clock signal provided by the field programmable gate array, the field programmable gate array switches clock signals of different frequencies according to the high / low frequency of the simulation signal to improve the resolution of the output frequency. The minimum frequency step generated by the direct digital synthesis chip includes the following two cases: 1) and 2) 1) When the frequency range of the generated speed simulation basic signal is a low-frequency signal greater than or equal to 0.01 Hz to less than 400 Hz, the frequency of the clock signal is 50 kHz to improve the resolution of the low-frequency signal. The minimum frequency step is calculated by the following formula: ; in, This minimum frequency step is sufficient to generate stable and high-precision signals in the high-frequency band, which is suitable for simulation scenarios of high-speed rotating machinery.

[0030] 2) When the frequency range of the generated speed simulation basic signal is a low-frequency signal greater than or equal to 400 Hz to less than or equal to 100 kHz, the frequency of the clock signal is 12 MHz to improve the resolution of the high-frequency signal. The minimum frequency step is calculated by the following formula: ; in, This frequency resolution ensures that extremely accurate low-frequency signals can be generated in the low-frequency band, especially in the frequency range of 0.01 Hz to 400 Hz, which is suitable for the simulation of low-speed rotating machinery and the accurate simulation of slowly changing signals.

[0031] The clock frequency switching mechanism provided by the embodiments of this application ensures optimal frequency resolution and signal stability across the entire frequency range. Through flexible clock control, the direct digital synthesis chip can achieve high-precision signal generation from 0.01 Hz to 100 kHz, meeting the application requirements of different frequency bands. When generating high-frequency signals, the FPGA provides a 12 MHz clock to ensure signal stability and interference immunity. At low frequencies, a 50 kHz clock frequency ensures sufficient frequency resolution, especially for ultra-low frequency ranges. Furthermore, the direct digital synthesis chip supports a variety of waveform outputs, including sine, square, and triangle waves. Depending on the specific application requirements, the embodiments of this application allow for flexible selection of the appropriate waveform type. For example, when simulating an eddy current sensor, a sine wave signal is typically superimposed on a negative DC voltage; when simulating a Hall effect sensor, a square wave signal may be superimposed on a positive DC voltage; and when simulating a magnetoresistive sensor, a sine wave signal is used directly. Users can flexibly configure various waveform types to ensure the accuracy of the simulated signal based on different test scenarios and requirements. In summary, by generating high-precision frequency signals through a direct digital synthesis chip and combining it with the flexible clock switching mechanism provided by a field-programmable gate array, the present embodiment can generate accurate simulated speed signals within a frequency range of 0.01 Hz to 100 kHz. The frequency cutoff point is set at 400 Hz, and by dynamically switching the clock frequency, optimal frequency resolution and signal stability are achieved in both high and low frequency bands, making it suitable for a variety of test application scenarios.

[0032] The development of digital signal generation technology, especially direct digital synthesis technology, provides new possibilities for solving the problems in the background technology. Direct digital synthesis technology has extremely high frequency resolution and can ensure accurate frequency control over the entire frequency range. The embodiment of the present application is based on a chip with direct digital synthesis technology and generates frequency signals by digital means, with high precision, wide frequency range and good stability. Compared with traditional analog signal generators, direct digital synthesis technology can control frequency, phase and waveform more flexibly, but in order to achieve smooth transition and dynamic adjustment of frequency, it is also necessary to use field programmable gate arrays to accurately control frequency and phase in real time. The introduction of field programmable gate arrays enables the system to generate continuously changing signal curves, perfectly simulating the frequency signals detected by the sensor during the change of mechanical rotation speed.

[0033] The field programmable gate array dynamically adjusts the frequency and phase of the direct digital synthesis chip to ensure that the output signal can maintain a smooth transition during the frequency change process. When the frequency changes, the field programmable gate array not only changes the frequency control word, but also adjusts the phase register of the direct digital synthesis chip in time according to the current phase state to ensure the continuity of the phase and avoid discontinuity or jumps in the waveform. The direct digital synthesis chip has a phase register function, which allows the user to directly set the phase value of the output signal at any time. When the output frequency needs to be changed, the field programmable gate array not only gradually adjusts the frequency control word, but also synchronously adjusts the value in the phase register. Specifically, when the field programmable gate array changes the frequency of the direct digital synthesis from the current output frequency Adjust to the new frequency , the smooth transition of the phase must be considered. In order to maintain the continuity of the phase, the field programmable gate array calculates the current phase accumulation while updating the frequency control word, and writes the accumulated phase into the phase register as the starting phase of the next cycle. In this way, even if the frequency is gradually changing, the phase register always ensures that the phase of the waveform will not change suddenly. In the TSI system, especially when simulating eddy current sensor signals, the phase and frequency of the signal must change synchronously to ensure the accuracy and continuity of the simulation results. Through the precise control of the field programmable gate array, the direct digital synthesis chip can adjust the phase register according to the current accumulated phase at the moment of each frequency switching to ensure that the output signal always transitions smoothly without phase jumps or irregular waveforms. In summary, the embodiment of the present application realizes smooth output of the signal during the frequency change process through the frequency and phase control of the field programmable gate array. When updating the frequency control word, the field programmable gate array adjusts the value of the phase register at the same time, ensuring the phase continuity of the waveform and avoiding signal mutations or discontinuities during the frequency switching process. This technology not only ensures the accuracy and stability of the signal, but also provides higher precision for the simulation system. It is particularly suitable for TSI system calibration and testing scenarios with high frequency and phase requirements.

[0034] This embodiment of the present application uses a field-programmable gate array (FPGA) to control the frequency and phase output of a direct digital synthesis (DDS) chip. The FPGA dynamically adjusts the frequency and phase values ​​output by the DDS chip based on the initial and final frequency values ​​and the rate of change, ensuring signal continuity and smoothness during frequency changes. This enables this embodiment of the present application to accurately simulate the signal response detected by a sensor as the rotating machinery's speed changes, generating a continuously changing frequency curve. The high-speed parallel processing capabilities of the FPGA enable real-time signal updates and adjustments, avoiding the sudden frequency changes that occur with traditional analog signal generators during frequency switching. This embodiment of the present application utilizes a DDS chip as the core signal generation module, utilizing it to generate precise sine and square wave signals. Direct digital synthesis technology achieves wide frequency coverage, enabling the generation of simulated speed signals from 0.01 Hz to 100 kHz. The DDS chip exhibits excellent frequency resolution and stability, enabling the generation of highly accurate simulated signals across a wide range of rotating machinery speeds, making it suitable for simulating the signal characteristics of eddy current sensors, magnetoresistive sensors, and Hall effect sensors.

[0035] Step 120: Input the rotational speed simulation basic signal into an inverting amplifier, and control the digital potentiometer based on the field programmable gate array to adjust the amplitude.

[0036] In some embodiments, referring to Figure 2 As shown, in order to adapt to the signal AC amplitude requirements of different sensors, the embodiment of the present application integrates a digital variable gain amplifier for adjusting the output amplitude of the simulation signal. For example, the digital variable gain amplifier of the present application uses an inverting operational amplifier as the core amplification circuit, combined with a digital potentiometer controlled by a field programmable gate array, to achieve precise adjustment of the signal amplitude. The gain of the inverting operational amplifier is determined by the feedback resistor, and the present invention dynamically changes the feedback resistor value through the field programmable gate array to adjust the gain of the operational amplifier and achieve control of the output signal amplitude.

[0037] In some embodiments, the gain of the inverting amplifier is adjusted by a digital potentiometer controlled by a field programmable gate array. The field programmable gate array adjusts the resistance of the feedback resistor according to set parameters to change the gain of the inverting amplifier.

[0038] In some embodiments, the amplitude adjustment based on the field programmable gate array controlling the digital potentiometer includes: obtaining the amplitude requirement of the target sensor; dynamically adjusting the resistance of the feedback resistor based on the field programmable gate array controlling the digital potentiometer and the amplitude requirement of the target sensor; and amplitude adjusting the speed simulation basic signal based on the feedback resistor resistance and the speed simulation basic signal to change the signal gain.

[0039] In an exemplary embodiment, the target sensor includes an eddy current sensor, a magnetoresistive sensor, and / or a Hall sensor.

[0040] In an exemplary embodiment, the change signal gain is calculated by the following formula: ; in, is the feedback resistor, The input resistance in the base signal for this speed simulation is, is the gain coefficient. The feedback resistor is adjusted by controlling the digital potentiometer through the field programmable gate array , which can directly change the gain factor of the amplifier . The field programmable gate array adjusts the resistance of the digital potentiometer according to the amplitude parameters set by the user, thereby changing the feedback resistance of the operational amplifier and realizing real-time control of the signal gain. When it is necessary to reduce the amplitude of the output signal, the field programmable gate array reduces the resistance of the digital potentiometer, reduces the feedback resistance, and reduces the gain; and when it is necessary to increase the signal amplitude, the field programmable gate array increases the resistance of the feedback resistor and increases the gain of the amplifier. This method can not only accurately control the amplitude of the output signal, but also quickly respond to different test requirements to ensure that the amplitude of the output signal is consistent with the set value. This control scheme based on the inverting operational amplifier and the digital potentiometer makes the amplitude adjustment of the output signal more flexible and accurate, while avoiding the errors and instabilities generated by the traditional analog circuit during the adjustment process. The embodiment of the present application can adjust the gain of the variable gain amplifier through the field programmable gate array control according to the user settings, so that the amplitude of the output signal matches the actual output characteristics of the sensor. This method not only ensures the linear output of the signal, but also can flexibly adjust the signal amplitude according to different test requirements to adapt to various loads and application scenarios.

[0041] Step 130: Generate a set bias voltage through a digital-to-analog converter (DAC) chip.

[0042] In some embodiments, the digital-to-analog conversion chip is controlled by a field programmable gate array to generate different bias voltages to meet different sensor simulation requirements. The bias voltage and the simulation signal are superimposed in a common-mode summing operational amplifier.

[0043] This embodiment of the present application generates a set bias voltage through a digital-to-analog conversion chip. This allows for the generation of DC bias signals tailored to various sensor requirements, particularly for applications such as eddy current sensors that require a specific bias voltage. This module provides a stable bias voltage, ensuring the reliability and accuracy of the output signal. Consequently, this embodiment of the present application can flexibly adapt to a variety of different application requirements, and thus to specialized sensor needs, without changing the overall architecture.

[0044] Step 140: superimpose the amplitude-adjusted speed simulation basic signal and the bias voltage input into the in-phase summing operational amplifier to form a composite signal with a DC bias.

[0045] In some embodiments, before inputting the rotational speed simulation basic signal into the inverting amplifier, the method further comprises: controlling the direct digital synthesis chip to switch the clock frequency based on the field programmable gate array according to the target frequency value.

[0046] In an exemplary embodiment, the method further includes: calculating a current phase accumulation value based on the field programmable gate array when the clock frequency is switched; and writing the phase accumulation value into a phase register of the direct digital synthesis chip.

[0047] Refer to the attached Figure 3 As shown, the field-programmable gate array generates a bias voltage by controlling the digital-to-analog converter chip. This voltage, along with the pure AC signal output by the digital variable gain amplifier, is then fed into a non-inverting summing operational amplifier (AMP). The amplifier then amplifies the signal to ensure sufficient load-driving capability. The summing operational amplifier uses a non-inverting configuration, superimposing the AC signal output by the inverting amplifier with the bias voltage generated by the DAC. This output signal, processed by the non-inverting summing operational amplifier, incorporates both the amplitude characteristics of the AC signal and the set DC bias, enabling complete simulation of the sensor signal. Finally, the signal processed by the summing operational amplifier is fed into the power amplifier. The primary function of the power amplifier is to provide sufficient drive capability to ensure the output signal can drive various loads. While the power amplifier does not alter the signal's amplitude or bias, it ensures that the signal is not distorted during transmission and provides sufficient current drive capability to meet the requirements of sensor calibration and test equipment.

[0048] Based on this, the embodiment of the present application can generate a simulation signal with a precise bias voltage and adjustable amplitude, and ensure that the signal output has sufficient load capacity through the power amplifier to meet the needs of various test scenarios.

[0049] Step 150: The composite signal is output after its driving capability is enhanced by a power amplifier, and the composite signal with the enhanced driving capability is used as a target speed simulation signal that can directly drive the load of the steam turbine monitoring instrument system.

[0050] In some embodiments, this application also provides a user interface, allowing users to control the operating state of the field-programmable gate array (FPGA) and other circuit modules by inputting set parameters (such as sensor type, signal frequency, AC amplitude, bias voltage, etc.). The FPGA dynamically adjusts the signal frequency, waveform, phase, and amplitude based on the input set parameters to generate the desired simulated speed signal. This human-machine interface design makes the system easy to operate and facilitates parameter adjustment and configuration based on different testing requirements.

[0051] The embodiment of the present application controls the direct digital synthesis chip through a field programmable gate array to generate a speed simulation basic signal. The field programmable gate array dynamically controls the clock frequency of the direct digital synthesis chip, covering the full frequency band of 0.01Hz-100kHz, solving the problems of narrow frequency range and insufficient precision of traditional analog signal sources; the field programmable gate array calculates and writes the phase accumulator value in real time during frequency switching, eliminating waveform breakage and ensuring the smoothness of the speed simulation signal in dynamically changing scenarios (such as turbine start and stop); by inputting the speed simulation basic signal into the inverting amplifier and controlling the digital potentiometer for amplitude adjustment based on the field programmable gate array, the sensor characteristics are dynamically matched, and the inverting amplifier gain is adjusted in real time by the digital potentiometer, so that the signal amplitude is accurately adapted to the voltage requirement of the eddy current / magnetoresistive / Hall sensor, solving the calibration distortion caused by the fixed amplitude of traditional equipment; the response time is adjusted by the resistance value of the digital potentiometer to meet the requirements of fast switching of the signal amplitude in real-time calibration scenarios; the set bias voltage is generated by the digital-to-analog conversion chip to realize the simulation of the sensor DC characteristics, and the digital-to-analog conversion A programmable bias voltage is generated by replacing the chip to simulate the DC offset in the actual sensor output, resolving signal distortion caused by missing bias during TSI system calibration. The independently generated bias voltage avoids interference with the base signal, providing a clean input for subsequent addition operations and improving signal superposition compatibility. Composite signal synthesis is achieved by superimposing the amplitude-adjusted signal and the bias voltage input into a common-mode summing operational amplifier. The common-mode adder linearly superimposes the amplitude-optimized base signal and the bias voltage to form a composite simulated signal with a DC bias, which directly matches the electrical characteristics of the TSI system input. The low output impedance of the operational amplifier suppresses noise coupling during signal transmission, improving the signal-to-noise ratio of the calibration signal and enhancing anti-interference capabilities. By boosting the drive capability of the composite signal through a power amplifier before outputting it, the load driving capability is enhanced, ensuring that the composite signal can drive the high-impedance load of the TSI system, resolving calibration failures caused by insufficient drive from traditional signal sources. A power protection circuit design prevents overload damage, meeting the requirements for long-term stable operation in field turbine environments. The field-programmable gate array (FPGA) in this embodiment can also adjust the frequency control word and phase register of the direct digital synthesis chip in real time to ensure phase continuity of the output signal as the frequency changes. This device can simulate the output signals of various sensors, adapting to a frequency range of 0.01 Hz to 100 kHz, and providing highly accurate and stable simulated signals. It is particularly suitable for testing and calibrating sensor monitor modules using various types of sensors, such as eddy current sensors, magnetoresistive sensors, and Hall effect sensors.

[0052] Refer to the attached Figure 4As shown, the embodiment of the present application also provides a broadband and high-precision simulation signal generation system, including: a basic signal generation module 410, an amplitude adjustment module 420, a bias voltage generation module 430, a composite signal generation module 440 and a target speed simulation signal generation module 450.

[0053] The basic signal generating module 410 is used to control the direct digital synthesis chip through the field programmable gate array to generate a rotation speed simulation basic signal, where the rotation speed simulation basic signal is a sine wave or a square wave with an adjustable waveform.

[0054] The basic signal generation module 410 of the embodiment of the present application achieves smooth frequency changes and continuous output. By dynamically controlling the frequency and phase of the direct digital synthesis chip in real time through a field programmable gate array, it can ensure that when the speed changes, the generated signal is a smooth, continuously changing curve, avoiding the occurrence of frequency jumps or mutations. This continuous output feature is very critical because it can perfectly simulate the frequency signal detected by the sensor when the mechanical rotation speed changes, ensuring a high degree of consistency between the simulated signal and the actual working conditions. For the speed monitor test and calibration in the TSI system, it can more realistically reflect the actual operating status of the equipment, improving the accuracy of the test and calibration.

[0055] The amplitude adjustment module 420 is used to input the speed simulation basic signal into the inverting amplifier and control the digital potentiometer to perform amplitude adjustment based on the field programmable gate array. The amplitude adjustment module 420 of the embodiment of the present application integrates a digital variable gain amplifier (i.e., an inverting amplifier), allowing the user to flexibly adjust the amplitude of the output signal to ensure the stability of the signal amplitude and linear output. By adjusting the gain, a suitable signal amplitude can be generated for different application requirements, suitable for different loads and test conditions. Compared with traditional fixed amplifiers, the embodiment of the present application provides better flexibility, especially when the test conditions change, it can be adjusted quickly to ensure stable and reliable signal output.

[0056] Bias voltage generation module 430 is used to generate a set bias voltage through the digital-to-analog conversion chip. The bias voltage generation module 430 in this embodiment of the present application meets the DC bias requirements of different sensors. This module can generate a corresponding DC bias voltage based on the sensor type. For example, when simulating the signal output of an eddy current sensor, the output signal range is a sinusoidal signal of -8V to -12V. Furthermore, bias voltage generation module 430 can be used in conjunction with a digital variable gain amplifier to ensure that the voltage range and waveform of the output signal meet the application requirements of different sensor types.

[0057] The composite signal generating module 440 is used to superimpose the amplitude-adjusted rotational speed simulation basic signal and the bias voltage input to the in-phase adding operational amplifier to form a composite signal with a DC bias.

[0058] This embodiment of the present application integrates a digital variable-gain amplifier and a bias voltage generation module to accommodate the signal amplitude and bias voltage requirements of different sensors. A power amplifier circuit ensures that the output signal has sufficient drive capability to meet the needs of sensor output signal simulation in various scenarios. This embodiment of the present application features high precision, a wide frequency range, and continuous, smooth output, meeting the stringent requirements of TSI systems for signal simulation equipment. It has broad application prospects in performance testing, fault diagnosis, and calibration of rotating machinery and rotating equipment.

[0059] The target speed simulation signal generating module 450 is used to output the composite signal after the driving capability is improved by the power amplifier, and the composite signal after the output driving capability is improved is used as the target speed simulation signal that can directly drive the load of the steam turbine monitoring instrument system. The embodiment of the present application is based on the composite signal generating module 440 and the target speed simulation signal generating module 450 of the field programmable gate array, which provides users with extremely high flexibility and scalability. The user can quickly adjust the frequency, phase and amplitude of the signal through simple parameter settings to adapt to different simulation requirements. The high flexibility of the field programmable gate array enables the system to quickly adapt to different test standards and requirements that may appear in the future, thereby enhancing the scope of application and service life of the embodiment of the present application.

[0060] By combining a direct digital synthesis chip with real-time field programmable gate array control, the embodiments of the present application generate a high-precision simulated speed signal over a wide frequency range and are capable of adjusting the frequency and phase of the output signal in real time based on speed changes. This embodiment of the present application significantly improves the performance of the simulated speed signal generator, resolving the shortcomings of traditional analog signal generators, such as insufficient accuracy, limited frequency range, and uneven frequency changes. The high-precision frequency output, continuous and smooth signal changes, flexible amplitude adjustment, bias voltage generation, and the powerful control capabilities of the field programmable gate array enable the embodiments of the present application to be widely used in the calibration and performance testing of speed monitors in TSI systems, ensuring the accuracy and stability of test data.

[0061] The embodiment of the present application also provides a simulation signal generator, which is equipped with the above-mentioned broadband high-precision simulation signal generation system. Figure 5 As shown, the simulation signal generator includes: a field programmable gate array, a direct digital synthesis chip, an inverting amplifier, a digital-to-analog conversion chip, a non-inverting adding operational amplifier and a power amplifier.

[0062] In some embodiments, the field programmable gate array is used to dynamically switch the clock frequency of the direct digital synthesis chip and control phase continuity.

[0063] In some embodiments, the inverting amplifier is configured to control gain based on the field programmable gate array.

[0064] In some implementations, the non-inverting adding operational amplifier is used to superimpose the bias voltage generated by the digital-to-analog conversion chip and the simulation signal.

[0065] In some implementations, the power amplifier is used to enhance the driving capability of the superimposed bias voltage and the simulation signal.

[0066] In some embodiments, the simulation signal generator further includes a central processing unit (CPU), which controls and adjusts the gain of the amplifier via a field programmable gate array (FPGA) according to user settings, so that the amplitude of the output signal matches the actual output characteristics of the sensor.

[0067] In some implementations, the simulation signal generator can be particularly applied to a speed simulation signal generator in a steam turbine technical instrument system.

[0068] By combining the control advantages of direct digital synthesis (DDS) chips and field-programmable gate arrays (FPGAs), this embodiment of the present application proposes a wide-range, high-precision speed simulation signal generator. This generator can generate continuously varying frequency signals in the range of 0.01 Hz to 100 kHz, making it suitable for testing and calibration in steam turbine monitoring instrumentation systems. In particular, it can simulate the signal output characteristics of common sensors and is suitable for simulating a variety of sensor signals (such as eddy current sensors, magnetoresistive sensors, and Hall effect sensors). This solves technical issues in the prior art, such as insufficient accuracy, narrow frequency range, and frequency discontinuity. The generator of this embodiment of the present application can generate high-precision simulated speed signals across a wide frequency range, making it suitable for calibration and performance verification of speed monitors in steam turbine instrumentation systems. This signal generator is particularly suitable for generating continuous, smooth frequency signals when the speed of rotating machinery changes, thereby enabling accurate simulation and testing of rotating machinery systems. The simulation signal generator of this embodiment of the present application utilizes DDS technology to generate signals. Compared to traditional analog signal generators, the signal output of this embodiment of the present application is more stable and less affected by external environmental factors (such as temperature and time drift), ensuring frequency stability, consistency, and repeatability over long-term use. Therefore, it can meet the application scenarios with high requirements for speed signal simulation accuracy, and is particularly suitable for speed monitor testing and calibration of TSI systems.

[0069] The simulation signal generator in the embodiments of the present application is based on the collaborative operation of a field programmable gate array (FPGA) and a direct digital synthesis (DDS) chip. The FPGA controls the frequency and phase of the DDS chip's output in real time, ensuring smooth signal transitions as the speed signal changes, simulating the frequency signal detected by the sensor during changes in mechanical rotational speed. Through the high-precision control of the FPGA, the present invention can generate continuously varying sine and square wave signals, perfectly simulating the speed signal characteristics of rotating machinery under different operating conditions, including the signal output modes of eddy current sensors, magnetoresistive sensors, and Hall effect sensors.

[0070] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present application, and the present application is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present application, and such modifications and improvements are also considered to be within the scope of protection of the present application.

Claims

1. A method for generating a broadband and high-precision simulation signal, characterized in that: include: A field programmable gate array is used to control a direct digital synthesis chip to generate a rotational speed simulation basic signal, wherein the rotational speed simulation basic signal is a sine wave or a square wave with an adjustable waveform; Inputting the rotational speed simulation basic signal into an inverting amplifier, and controlling a digital potentiometer based on the field programmable gate array to adjust the amplitude; Generate a set bias voltage through a digital-to-analog conversion chip; Superimposing the amplitude-adjusted speed simulation basic signal and the bias voltage input to the in-phase summing operational amplifier to form a composite signal with a DC bias; The composite signal is output after its driving capability is enhanced by a power amplifier, and the output composite signal with enhanced driving capability is used as a target speed simulation signal that can directly drive the load of a steam turbine monitoring instrument system.

2. The method according to claim 1, characterized in that Before inputting the rotation speed simulation basic signal into an inverting amplifier, the method further includes: According to the target frequency value, the direct digital synthesis chip switches the clock frequency based on the field programmable gate array.

3. The method according to claim 2, characterized in that The method further comprises: When the clock frequency switches, calculating a current phase accumulation value based on the field programmable gate array; The phase accumulation value is written into the phase register of the direct digital synthesis chip.

4. The method according to claim 1, wherein The amplitude adjustment based on the field programmable gate array controlling the digital potentiometer includes: Get the amplitude requirements and values ​​of the target sensor; Dynamically adjusting the resistance of a feedback resistor based on the field programmable gate array controlling the digital potentiometer and the amplitude requirement of the target sensor; The speed simulation basic signal is amplitude-adjusted based on the resistance of the feedback resistor and the speed simulation basic signal to change the signal gain.

5. The method according to claim 4, characterized in that: The target sensor includes an eddy current sensor, a magnetoresistive sensor and / or a Hall sensor.

6. The method according to claim 1, characterized in that The generating of the rotation speed simulation basic signal by controlling the direct digital synthesis chip through the field programmable gate array includes: The field programmable gate array sends a clock signal to the direct digital synthesis chip; Controlling and generating a minimum frequency step of the direct digital synthesis chip according to the clock signal; The speed simulation basic signal is calculated by the following formula: ； in, For the speed simulation basic signal, is the control word, is the clock frequency, is the number of bits in the phase accumulator.

7. The method according to claim 6, characterized in that The frequency range of the speed simulation basic signal is 0.01Hz to 100kHz. The value of is 28, and the controlling and generating of the minimum frequency step of the direct digital synthesis chip according to the clock signal comprises: When the frequency range of the generated speed simulation basic signal is a low-frequency signal greater than or equal to 0.01 Hz and less than 400 Hz, the frequency of the clock signal is 50 kHz, and the minimum frequency step is calculated by the following formula: ； When the frequency range of the generated speed simulation basic signal is a low-frequency signal greater than or equal to 400 Hz and less than or equal to 100 kHz, the frequency of the clock signal is 12 MHz, and the minimum frequency step is calculated by the following formula: ； in, is the minimum frequency step.

8. The method according to claim 4, characterized in that The change signal gain is calculated by the following formula: ； in, is the feedback resistor, is the input resistance in the speed simulation basic signal, is the gain coefficient.

9. A broadband and high-precision simulation signal generation system, characterized in that: include: A basic signal generation module is used to control a direct digital synthesis chip through a field programmable gate array to generate a speed simulation basic signal, wherein the speed simulation basic signal is a sine wave or a square wave with an adjustable waveform; an amplitude adjustment module, configured to input the rotational speed simulation basic signal into an inverting amplifier and control a digital potentiometer to perform amplitude adjustment based on the field programmable gate array; A bias voltage generation module is used to generate a set bias voltage through a digital-to-analog conversion chip; A composite signal generating module, configured to superimpose the amplitude-adjusted speed simulation basic signal and the bias voltage input in-phase summing operational amplifier to form a composite signal with a DC bias; The target speed simulation signal generating module is used to output the composite signal after the driving capability is enhanced by the power amplifier, and use the output composite signal with enhanced driving capability as the target speed simulation signal that can directly drive the load of the steam turbine monitoring instrument system.

10. A simulation signal generator, equipped with the broadband and high-precision simulation signal generation system according to claim 9, characterized in that: Including: field programmable gate array, direct digital synthesis chip, inverting amplifier, digital-to-analog conversion chip, in-phase adding operational amplifier and power amplifier, The field programmable gate array is used to dynamically switch the clock frequency of the direct digital synthesis chip and control phase continuity; The inverting amplifier is used to adjust the gain based on the field programmable gate array; The in-phase adding operational amplifier is used to superimpose the bias voltage generated by the digital-to-analog conversion chip and the simulation signal; The power amplifier is used to enhance the driving capability of the superimposed bias voltage and the simulation signal.

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