LCD low-power-consumption driving circuit, driving method, display and chip

Abstract

The invention provides an LCD low-power-consumption driving circuit, a driving method, a display and a chip, and relates to the technical field of display driving, the circuit comprises a level driving circuit, a charge sharing circuit, a plurality of pixel control circuits, a pre-charging switch control circuit and a voltage peak value control circuit; the output end of the level driving circuit is connected with the input end of the charge sharing circuit, the output end of the charge sharing circuit is connected with the input end of each pixel control circuit, and the output end of each pixel control circuit is connected with the input end of the pre-charging switch control circuit. The output end of the pre-charging switch control circuit is connected with the input end of the voltage peak value control circuit, and the output end of the voltage peak value control circuit outputs a voltage peak value. The charge utilization efficiency can be effectively improved, and the driving power consumption is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of display driving, and in particular to an LCD low-power driving circuit, a driving method, a display and a chip. Background Art

[0002] Display technology uses electronic signals to control optical changes to present dynamic images. To prevent the liquid crystal material from degrading due to DC voltage, the display panel needs to use a driving voltage with alternating positive and negative polarity to ensure stable operation of the liquid crystal molecules.

[0003] In current liquid crystal display (LCD) technology, the direction of rotation of liquid crystal molecules is determined by the polarity of the voltage difference between the display electrode and the common electrode: when the display electrode voltage is higher than the common electrode voltage, it is positive polarity, and vice versa. Since the polarity is relative to the common electrode voltage, whether it is positive or negative, there will be a set of grayscales with the same brightness. Therefore, when the absolute value of the voltage difference between the plates on both sides of the liquid crystal molecules is fixed, the displayed grayscale is the same. However, in these two cases, the direction of rotation of the liquid crystal molecules is opposite, and the signal voltage driving the pixel needs to reverse its positive and negative polarity at regular intervals. Therefore, during the level reversal process, the two sides of the liquid crystal molecules form the two plates of the capacitor, and the potential must constantly switch between positive and negative.

[0004] In traditional LCD driver circuits, liquid crystal molecules alternately reverse polarity between odd and even frames to avoid damage caused by the liquid crystal molecules' fixed orientation. This causes the driving charge on both ends of the liquid crystal molecules to change with each polarity reversal. The constant switching of the voltage level at each moment results in charge loss, increasing the energy consumption of the display driver. Furthermore, the current can cause the driver chip and LCD panel to heat up, affecting the display quality. Furthermore, existing charge sharing technology connects the S lines of adjacent liquid crystal rows to neutralize the charge on the two rows, reducing the current drawn from the driver chip's series of voltage sources in the process of generating the required voltage level at the next moment. There are also solutions for column inversion and dot inversion. The timing controller reverses each row of the LCD display and, between polarity reversals, controls the switches connected to the pixel drive lines of two adjacent rows to conduct, short-circuiting the two adjacent rows during this gap. However, the original charge is still lost every time the electrodes on both sides of the liquid crystal molecules change, and there is still high power consumption. Some researchers have also proposed using some charge sharing schemes combined with pre-charging, but this method of combining and redistributing the charge amounts of adjacent pixel rows is not efficient in charge utilization, and the panel still has high power consumption. Summary of the Invention

[0005] To solve the problems of low charge utilization efficiency and high driving power consumption in the above-mentioned prior art, the present invention proposes a low-power LCD driving circuit, driving method, display and chip, which can effectively improve charge utilization efficiency and reduce driving power consumption.

[0006] In order to achieve the above technical effects, the technical solutions of the present invention are as follows: An LCD low-power driving circuit, comprising: a level driving circuit, a charge sharing circuit, multiple pixel control circuits, a pre-charge switch control circuit, and a voltage peak control circuit; The output end of the level driving circuit is connected to the input end of the charge sharing circuit, the output end of the charge sharing circuit is respectively connected to the input end of each pixel control circuit, the output end of each pixel control circuit is respectively connected to the input end of the pre-charge switch control circuit, the output end of the pre-charge switch control circuit is connected to the input end of the voltage peak control circuit, and the output end of the voltage peak control circuit outputs the voltage peak.

[0007] Preferably, the level driving circuit includes multiple data signal input modules, each of which is provided with a digital-to-analog converter, a diode and a positive-to-negative driving level switching unit. The digital signal is input to the input end of the digital-to-analog converter, the output end of the digital-to-analog converter is connected to the positive end of the diode, the negative end of the diode is connected to the input end of the positive-to-negative driving level switching unit, and the output end of the positive-to-negative driving level switching unit is connected to the input end of the charge sharing circuit.

[0008] Preferably, the charge sharing circuit includes multiple first switch control units, each of which is provided with a first data signal switch and a second data signal switch, the first data signal switch and the second data signal switch in each of the first switch control units are connected in series to form a first series link, and the intermediate nodes of the first series links in two adjacent first switch control units are connected through the first charge sharing switch.

[0009] Preferably, each of the pixel control circuits includes a pixel control line, a plurality of MOS transistor switches, and a plurality of pixel units. The pixel control line in each of the pixel control circuits is connected to the source of each of the MOS transistor switches, the gate of each of the MOS transistor switches in each of the pixel control circuits is grounded, and the gate of each of the MOS transistor switches in each of the pixel control circuits is connected to a pixel unit.

[0010] Preferably, the pre-charge switch control circuit includes multiple second switch control units, each of which is provided with a third data signal switch and a fourth data signal switch, the third data signal switch and the fourth data signal switch in each of the second switch control units are connected in series to form a first series link, and the intermediate nodes of the second series links in two adjacent second switch control units are connected through a second charge sharing switch.

[0011] Preferably, the voltage peak control circuit includes a voltage peak processing unit, a positive voltage peak output unit and a negative voltage peak output unit, the output end of the pre-charge switch control circuit is connected to the input end of the voltage peak processing unit, the output end of the voltage peak processing unit is connected to the positive voltage peak output unit through the first voltage peak control switch Y1, and the output end of the voltage peak processing unit is connected to the negative voltage peak output unit through the second voltage peak control switch Y2.

[0012] The present invention also proposes a driving method for a low-power LCD driving circuit, which is characterized by comprising the following steps: S1. Inputting multiple digital signals into the level driving circuit, the level driving circuit outputs a multi-level driving voltage signal to the charge sharing circuit; S2. Using the charge sharing circuit to receive the multi-level driving voltage signal, charge sharing is performed on the currently selected pixel control circuit, and a drive completion signal is sent to the pre-charge switch control circuit through the currently selected pixel control circuit; S3. When the pre-charge switch control circuit receives the drive completion signal, it pre-charges the pixel control circuit to be selected and triggers the voltage peak control circuit to generate the target voltage peak of the pixel control circuit to be selected; S4. Using the target voltage peak value to establish an initial voltage condition for the next round of pixel driving.

[0013] Preferably, the target voltage peak includes a positive voltage peak and a negative voltage peak.

[0014] The present invention also provides a display comprising the LCD low-power driving circuit.

[0015] The present invention also provides a chip, which includes the LCD low-power driving circuit.

[0016] Compared with the prior art, the beneficial effects of the technical solution of the present invention are: The present invention proposes a low-power LCD drive circuit, drive method, display, and chip. First, under the drive of a level drive circuit, charge sharing is achieved between adjacent pixel control circuits through a charge sharing circuit, significantly reducing the number of repeated charging and discharging times, improving charge reuse efficiency, reducing the average current energy consumption required to drive the LCD panel, and also avoiding the impact of corresponding heat on the display effect. Second, a pre-charge switch control circuit is used to pre-charge unselected pixel control circuits, and the voltage peak is controlled in combination with a voltage peak control circuit, effectively reducing the driving voltage peak, suppressing invalid voltage overshoot, and reducing the driving voltage swing, thereby reducing the LCD driving power consumption and further extending the LCD driving endurance. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram showing pixel inversion proposed in the prior art according to an embodiment of the present invention; Figure 2 A structural diagram of a level generating circuit using a switched capacitor structure proposed in the prior art according to an embodiment of the present invention is shown; Figure 3 A block diagram showing a low-power LCD driving circuit structure proposed in an embodiment of the present invention; Figure 4 FIG2 is another structural block diagram of an LCD low-power driving circuit proposed in an embodiment of the present invention; Figure 5 A flowchart showing a driving method of a low-power LCD driving circuit proposed in an embodiment of the present invention; Figure 6 A structural block diagram of a display proposed in an embodiment of the present invention is shown; Figure 7 A block diagram of a chip structure proposed in an embodiment of the present invention is shown; 1. Level driving circuit; 11. Data signal input module; 111. Digital-to-analog converter; 112. Diode; 113. Positive and negative driving level switching unit; 2. Charge sharing circuit; 21. First switch control unit; 211. First data signal switch; 212. Second data signal switch; 213. First charge sharing switch; 3. Multiple pixel control circuits; 31. Pixel control line; 32. MOS tube switch; 33. Pixel unit; 4. Pre-charge switch control circuit; 41. Second switch control unit; 411. Third data signal switch; 412. Fourth data signal switch; 413. Second charge sharing switch; 5. Voltage peak control circuit; 51. Voltage peak processing unit; 52. Positive voltage peak output unit; 53. Negative voltage peak output unit. DETAILED DESCRIPTION

[0018] The accompanying drawings are for illustrative purposes only and are not to be construed as limiting this patent; In order to better illustrate the present embodiment, some parts of the drawings may be omitted, enlarged, or reduced, and do not represent actual sizes. The description of the directions of parts such as "upper" and "lower" does not limit this patent; To facilitate understanding of this embodiment, first, the prior art information of this embodiment is introduced as follows: Each pixel in a TFT-LCD (thin-film transistor liquid crystal display) is typically composed of three sub-pixels representing three colors (e.g., red, green, and blue). The sub-pixel is the basic unit of an LCD panel. Within the LCD panel structure, a sub-pixel exhibits a capacitive effect, displaying an image as long as a sufficient driving voltage is applied across it. The voltages applied across the capacitor are the common voltage (denoted by COM) and the data line voltage (denoted by S). Each sub-pixel has its own TFT, which acts as a switch, controlling the voltage sent to each sub-pixel, allowing each pixel to be independently controlled. When a backlight and color filters work together, a TFT screen can display a wide range of colors and brightness levels. To simplify the analytical model, this discussion focuses on the grayscale of a single pixel, not its color. In practice, the control method for driving three sub-pixels (red, green, and blue) is the same.

[0019] If the voltage applied to the capacitor is not reversed, the sub-pixels displaying the image will be charged with the same DC voltage for a long time. The long-term polarization of the liquid crystal molecules will gradually lose their optical rotation properties. A certain amount of charge will accumulate in the liquid crystal alignment layer between the common electrode and the pixel electrode, as well as in the liquid crystal layer, over time, causing the LCD panel to produce an afterimage, meaning that some background color will remain on the display and color contrast will decrease. Therefore, to avoid damaging the properties of the liquid crystal molecules, the polarity of the driving voltage must be continuously switched.

[0020] In order to prevent the liquid crystal molecules from being damaged due to maintaining the same polarity for a long time, they are reversed from time to time as the image is displayed. Row inversion, column inversion or dot inversion is used. This control method can improve the display effect of the liquid crystal molecules. In actual use, the reversal of the liquid crystal molecules is controlled by timing to reverse their polarity. The reversal of the liquid crystal molecules requires an external voltage to change the polarity of the liquid crystal molecules. When row inversion or dot inversion is used to control the rotation of the polarity of the liquid crystal molecules, a better display effect can be achieved. There are types of liquid crystal display panels such as dot inversion, row inversion, column inversion, etc. Figure 1 As shown in FIG. , a pixel row inversion type liquid crystal display panel is taken as an example.

[0021] In some products that require low power consumption, when a switched capacitor circuit is used to generate the required liquid crystal inversion level, a series of level generation circuits are required as the working level of COM and S. Usually, a switched capacitor structure circuit is used to generate the required series of gray levels. There are many structures of this level generation circuit, including Figure 2 The figure shows a level generating circuit constructed using switched capacitors.

[0022] During LCD operation, the potential of the plates on either side of the liquid crystal molecules constantly switches between positive and negative, which consumes a lot of power. The constant charging and discharging of the panel capacitors accounts for the majority of the LCD's operating energy consumption. Therefore, researchers have proposed methods to reduce power consumption, such as charge sharing.

[0023] It is understandable to those skilled in the art that some well-known contents may be omitted in the drawings; The positional relationships described in the drawings are for illustrative purposes only and should not be construed as limiting this patent. The technical solution of the present invention is further described below with reference to the accompanying drawings and embodiments.

[0024] Example 1 See also Figure 3 This embodiment proposes a low-power LCD driving circuit, including: a level driving circuit 1, a charge sharing circuit 2, a plurality of pixel control circuits 3, a pre-charge switch control circuit 4, and a voltage peak control circuit 5; The output end of the level driving circuit 1 is connected to the input end of the charge sharing circuit 2, the output end of the charge sharing circuit 2 is respectively connected to the input end of each pixel control circuit 3, the output end of each pixel control circuit 3 is respectively connected to the input end of the pre-charge switch control circuit 4, the output end of the pre-charge switch control circuit 4 is connected to the input end of the voltage peak control circuit 5, and the output end of the voltage peak control circuit 5 outputs the voltage peak.

[0025] See also Figure 4 The level driving circuit 1 includes multiple data signal input modules 11, each of which is provided with a digital-to-analog converter 111, a diode 112, and a positive-to-negative driving level switching unit 113. The digital signal is input to the input end of the digital-to-analog converter 111, the output end of the digital-to-analog converter 111 is connected to the positive end of the diode 112, the negative end of the diode 112 is connected to the input end of the positive-to-negative driving level switching unit 113, and the output end of the positive-to-negative driving level switching unit 113 is connected to the input end of the charge sharing circuit 2.

[0026] The charge sharing circuit 2 includes a plurality of first switch control units 21, each of which is provided with a first data signal switch 211 and a second data signal switch 212. The first data signal switch 211 and the second data signal switch 212 in each of the first switch control units 21 are connected in series to form a first series link. The intermediate nodes of the first series links in two adjacent first switch control units 21 are connected via a first charge sharing switch 213. The first data signal switch 211 is denoted as Z(m,1), where m=1,2,…,M, and M represents the total number of first data signal switches; the second data signal switch 212 is denoted as Z( ,2), =1,2,…, , represents the total number of the second data signal switches, the first charge sharing switch 213 is recorded as KEY(n,L), n=1,2,…,N, N represents the total number of the first charge sharing switches; after selecting a certain pixel control circuit 3, close Z(m,1), Z( ,2) Provide the pixel control circuit with the level corresponding to the display data, and Z(m,1) is open at other times; Each of the pixel control circuits 3 includes a pixel control line 31, multiple MOS transistor switches 32 and multiple pixel units 33. The pixel control line 31 in each of the pixel control circuits 3 is connected to the source of each of the MOS transistor switches 32. The gate of each of the MOS transistor switches 32 in each of the pixel control circuits 3 is grounded. The gate of each of the MOS transistor switches 32 in each of the pixel control circuits 3 is connected to a pixel unit 33.

[0027] The pre-charge switch control circuit 4 includes a plurality of second switch control units 41, each of which is provided with a third data signal switch 411 and a fourth data signal switch 412. The third data signal switch 411 and the fourth data signal switch 412 in each second switch control unit 41 are connected in series to form a first series link, and the middle nodes of the second series links in two adjacent second switch control units 41 are connected via a second charge sharing switch 413. The third data signal switch 411 is denoted as Z(t,3), t=1,2,…,T, T represents the total number of third data signal switches; the fourth data signal switch 412 is denoted as Z( ,4), =1,2,…, , represents the total number of fourth data signal switches; M= =T= , in the unselected pixel control circuit, Z(t,3), Z( ,4) Close to precharge; the second charge sharing switch 413 is recorded as KEY( ,R), =1,2,…, , represents the total number of second charge sharing switches; between the pixel rows that have completed displaying the current frame image and the pixel rows that have not been displayed, the on and off states of these switches are controlled according to a preset algorithm to realize charge sharing between the selected pixel control circuits 3.

[0028] The voltage peak control circuit 5 includes a voltage peak processing unit 51, a positive voltage peak output unit 52 and a negative voltage peak output unit 53. The output end of the pre-charge switch control circuit 4 is connected to the input end of the voltage peak processing unit 51, the output end of the voltage peak processing unit 51 is connected to the positive voltage peak output unit 52 through the first voltage peak control switch Y1, and the output end of the voltage peak processing unit 51 is connected to the negative voltage peak output unit 53 through the second voltage peak control switch Y2.

[0029] In this embodiment, first, under the drive of the level driving circuit, charge sharing is achieved between adjacent pixel control circuits through a charge sharing circuit, significantly reducing the number of repeated charge and discharge cycles, improving charge reuse efficiency, reducing the average current energy consumption required to drive the LCD panel, and also avoiding the impact of corresponding heat on the display effect. Secondly, a pre-charge switch control circuit is used to pre-charge the unselected pixel control circuits, and the voltage peak control circuit is combined with the voltage peak control circuit to control the voltage peak, effectively reducing the driving voltage peak, suppressing invalid voltage overshoot, and reducing the driving voltage swing, thereby reducing LCD driving power consumption and further extending the LCD driving endurance. The low-power LCD driving circuit proposed in this embodiment adds a set of control switches compared to the traditional LCD driving circuit, but can reduce the average current energy consumption required to drive the LCD panel. In addition, the reduction in current energy consumption can also avoid the impact of corresponding heat on the display effect. Charge sharing technology is an effective method for reducing dynamic energy consumption. On the basis of the traditional row driving circuit, switches or capacitors are added, and an improved sampling algorithm is used to sequentially select appropriate pixel rows for charge sharing and pre-charge the unselected rows, achieving better energy saving than the current common charge sharing scheme.

[0030] Example 2 See also Figure 5 This embodiment provides a driving method for a low-power LCD driving circuit, comprising the following steps: S1. A plurality of digital signals are input to the level driving circuit 1, and the level driving circuit 1 outputs a multi-level driving voltage signal to the charge sharing circuit 2; S2. Using the charge sharing circuit 2 to receive the multi-level driving voltage signal, the charge sharing circuit 3 is currently selected, and the drive completion signal is sent to the pre-charge switch control circuit 4 through the currently selected pixel control circuit 3; S3. When the pre-charge switch control circuit 4 receives the drive completion signal, it pre-charges the pixel control circuit 3 to be selected and triggers the voltage peak control circuit 5 to generate the target voltage peak of the pixel control circuit 3 to be selected; S4. Using the target voltage peak value to establish an initial voltage condition for the next round of pixel driving.

[0031] The target voltage peak includes a positive voltage peak and a negative voltage peak.

[0032] In this embodiment, first, under the drive of the level driving circuit, charge sharing is achieved between adjacent pixel control circuits through a charge sharing circuit, significantly reducing the number of repeated charge and discharge cycles, improving charge reuse efficiency, reducing the average current energy consumption required to drive the LCD panel, and also avoiding the corresponding heat generation that affects the display effect. Secondly, a pre-charge switch control circuit is used to pre-charge the unselected pixel control circuits, and the voltage peak control circuit is combined with the voltage peak control circuit to effectively reduce the driving voltage peak, suppress invalid voltage overshoot, reduce the driving voltage swing, reduce LCD driving power consumption, and further extend the LCD driving endurance. In this method, the voltage on the plates on both sides of the liquid crystal molecules adopts multiple intermediate levels during the inversion process. Assuming that the grayscale of the pixels is divided into 256 levels and the grayscale values ​​of these pixels are randomly distributed, an optimization algorithm is used to linearly combine several groups of row pixels to obtain voltage values, and other level values ​​can be obtained.

[0033] Example 3 See also Figure 6 This embodiment provides a display, which includes the LCD low-power driving circuit described in the above embodiment, including: a level driving circuit 1, a charge sharing circuit 2, a plurality of pixel control circuits 3, a pre-charge switch control circuit 4, and a voltage peak control circuit 5; The output end of the level driving circuit 1 is connected to the input end of the charge sharing circuit 2, the output end of the charge sharing circuit 2 is respectively connected to the input end of each pixel control circuit 3, the output end of each pixel control circuit 3 is respectively connected to the input end of the pre-charge switch control circuit 4, the output end of the pre-charge switch control circuit 4 is connected to the input end of the voltage peak control circuit 5, and the output end of the voltage peak control circuit 5 outputs the voltage peak.

[0034] In this embodiment, firstly, under the drive of the level driving circuit, charge sharing is achieved between adjacent pixel control circuits through the charge sharing circuit, which significantly reduces the number of repeated charging and discharging times, improves the charge reuse efficiency, reduces the average current energy consumption required to drive the LCD panel, and avoids the impact of corresponding heat on the display effect; secondly, the pre-charge switch control circuit is used to pre-charge the unselected pixel control circuits, and the voltage peak control circuit is combined with the voltage peak control circuit to control the voltage peak, effectively reducing the driving voltage peak, suppressing invalid voltage overshoot, reducing the driving voltage swing, reducing the LCD driving power consumption, and further extending the LCD driving endurance.

[0035] Example 4 See also Figure 7 This embodiment provides a chip, which includes the LCD low-power driving circuit described in the above embodiment, including: a level driving circuit 1, a charge sharing circuit 2, a plurality of pixel control circuits 3, a pre-charge switch control circuit 4, and a voltage peak control circuit 5; The output end of the level driving circuit 1 is connected to the input end of the charge sharing circuit 2, the output end of the charge sharing circuit 2 is respectively connected to the input end of each pixel control circuit 3, the output end of each pixel control circuit 3 is respectively connected to the input end of the pre-charge switch control circuit 4, the output end of the pre-charge switch control circuit 4 is connected to the input end of the voltage peak control circuit 5, and the output end of the voltage peak control circuit 5 outputs the voltage peak.

[0036] In this embodiment, firstly, under the drive of the level driving circuit, charge sharing is achieved between adjacent pixel control circuits through the charge sharing circuit, which significantly reduces the number of repeated charging and discharging times, improves the charge reuse efficiency, reduces the average current energy consumption required to drive the LCD panel, and avoids the impact of corresponding heat on the display effect; secondly, the pre-charge switch control circuit is used to pre-charge the unselected pixel control circuits, and the voltage peak control circuit is combined with the voltage peak control circuit to control the voltage peak, effectively reducing the driving voltage peak, suppressing invalid voltage overshoot, reducing the driving voltage swing, reducing the LCD driving power consumption, and further extending the LCD driving endurance.

[0037] Obviously, the above embodiments of the present invention are merely examples for the purpose of clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Those skilled in the art will appreciate that other variations or modifications can be made based on the above description. It is not necessary and impossible to enumerate all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the claims of the present invention.

Claims

1. A low-power LCD driving circuit, characterized in that: include: A level driving circuit (1), a charge sharing circuit (2), a plurality of pixel control circuits (3), a pre-charge switch control circuit (4), and a voltage peak control circuit (5); The output end of the level driving circuit (1) is connected to the input end of the charge sharing circuit (2), the output end of the charge sharing circuit (2) is respectively connected to the input end of each pixel control circuit (3), the output end of each pixel control circuit (3) is respectively connected to the input end of the pre-charge switch control circuit (4), the output end of the pre-charge switch control circuit (4) is connected to the input end of the voltage peak control circuit (5), and the output end of the voltage peak control circuit (5) outputs the voltage peak.

2. The LCD low power consumption driving circuit according to claim 1, characterized in that: The level driving circuit (1) comprises a plurality of data signal input modules (11), each of which is provided with a digital-to-analog converter (111), a diode (112) and a positive-to-negative driving level switching unit (113); a digital signal is input to the input end of the digital-to-analog converter (111); the output end of the digital-to-analog converter (111) is connected to the positive end of the diode (112); the negative end of the diode (112) is connected to the input end of the positive-to-negative driving level switching unit (113); and the output end of the positive-to-negative driving level switching unit (113) is connected to the input end of the charge sharing circuit (2).

3. The LCD low power consumption driving circuit according to claim 1, wherein: The charge sharing circuit (2) comprises a plurality of first switch control units (21), each of the first switch control units (21) being provided with a first data signal switch (211) and a second data signal switch (212), the first data signal switch (211) and the second data signal switch (212) in each of the first switch control units (21) being connected in series to form a first series link, and intermediate nodes of the first series links in two adjacent first switch control units (21) being connected via a first charge sharing switch (213).

4. The LCD low power consumption driving circuit according to claim 1, wherein: Each of the pixel control circuits (3) comprises a pixel control line (31), a plurality of MOS tube switches (32) and a plurality of pixel units (33); the pixel control line (31) in each of the pixel control circuits (3) is connected to the source of each of the MOS tube switches (32); the gate of each of the MOS tube switches (32) in each of the pixel control circuits (3) is grounded; and the gate of each of the MOS tube switches (32) in each of the pixel control circuits (3) is connected to a pixel unit (33).

5. The LCD low power consumption driving circuit according to claim 1, characterized in that: The pre-charge switch control circuit (4) comprises a plurality of second switch control units (41), each of the second switch control units (41) being provided with a third data signal switch (411) and a fourth data signal switch (412), the third data signal switch (411) and the fourth data signal switch (412) in each of the second switch control units (41) being connected in series to form a first series link, and the middle nodes of the second series links in two adjacent second switch control units (41) being connected via a second charge sharing switch (413).

6. The LCD low power consumption driving circuit according to claim 1, characterized in that: The voltage peak control circuit (5) comprises a voltage peak processing unit (51), a positive voltage peak output unit (52) and a negative voltage peak output unit (53); the output end of the pre-charge switch control circuit (4) is connected to the input end of the voltage peak processing unit (51); the output end of the voltage peak processing unit (51) is connected to the positive voltage peak output unit (52) via a first voltage peak control switch Y1; and the output end of the voltage peak processing unit (51) is connected to the negative voltage peak output unit (53) via a second voltage peak control switch Y2.

7. A driving method for a low-power LCD driving circuit, characterized in that: The following steps are involved: S1. Inputting a plurality of digital signals into the level driving circuit (1) respectively, and the level driving circuit (1) outputting a multi-level driving voltage signal to the charge sharing circuit (2); S2. Using the charge sharing circuit (2) to receive the multi-level driving voltage signal, performing charge sharing on the currently selected pixel control circuit (3), and sending a driving completion signal to the pre-charge switch control circuit (4) through the currently selected pixel control circuit (3); S3. When the pre-charge switch control circuit (4) receives the driving completion signal, it pre-charges the pixel control circuit (3) to be selected, and simultaneously triggers the voltage peak control circuit (5) to generate a target voltage peak of the pixel control circuit (3) to be selected; S4. Using the target voltage peak value to establish an initial voltage condition for the next round of pixel driving.

8. The driving method of the LCD low power driving circuit according to claim 7, characterized in that: The target voltage peak includes a positive voltage peak and a negative voltage peak.

9. A display, characterized in that: The display comprises the LCD low-power driving circuit according to any one of claims 1 to 6.

10. A chip, characterized in that: The chip includes the LCD low-power driving circuit according to any one of claims 1 to 6.

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