Sensor module and measurement system

Abstract

A sensor module and a measurement system. The sensor module (10) includes a first sensor device, a second sensor device, and a microcontroller. The microcontroller receives first detection data from the first sensor device and second detection data from the second sensor device. The microcontroller calculates first accumulated data by accumulating the first detection data up to the synchronization timing of the external synchronization signal, calculates second accumulated data by accumulating the second detection data up to the synchronization timing, and outputs the first accumulated data and the second accumulated data to the host device at the synchronization timing.

Description

Technical Field

[0001] The present invention relates to a sensor module and a measuring system, among others. Background Art

[0002] Patent Document 1 discloses an inertial measurement device. The inertial measurement device includes: an angular velocity sensor and an acceleration sensor that output inertial information; a storage unit that stores a plurality of correction parameters associated with the value range of the inertial information; a parameter control unit that selects a correction parameter from the plurality of correction parameters; and a correction calculation unit that corrects the inertial information using the selected correction parameter.

[0003] Prior art literature

[0004] Patent Document 1: Japanese Patent Application Laid-Open No. 2022-72338

[0005] Because inertial measurement units (IMUs) like the one described above output angular velocity data and acceleration data, they pose a significant burden on other devices that receive these data. For example, this burden can be high due to the high communication rate between the IMU and other devices, or it can be a significant burden on other devices processing the angular velocity data and acceleration data. Summary of the Invention

[0006] One embodiment of the present disclosure relates to a sensor module including: a first sensor device including a first sensor element, a first detection circuit, and a first interface, the first detection circuit receiving a signal from the first sensor element to perform detection processing, and the first interface outputting first detection data from the first detection circuit; a second sensor device including a second sensor element, a second detection circuit, and a second interface, the second detection circuit receiving a signal from the second sensor element to perform detection processing, and the second interface outputting second detection data from the second detection circuit; and a microcontroller including a synchronization terminal for receiving an external synchronization signal, wherein the microcontroller receives the first detection data from the first sensor device and the second detection data from the second sensor device, the microcontroller calculates first cumulative data by accumulating the first detection data up to a synchronization timing of the external synchronization signal, calculates second cumulative data by accumulating the second detection data up to the synchronization timing, and outputs the first cumulative data and the second cumulative data to a host device at the synchronization timing.

[0007] In addition, another aspect of the present disclosure relates to a measurement system including: the sensor module described above; and the host device electrically connected to the sensor module. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 This is an example of the structure of a sensor module.

[0009] Figure 2 This is an example of a timing chart for explaining the operation of a microcontroller.

[0010] Figure 3 This is the first structural example of a microcontroller.

[0011] Figure 4 This is a signal waveform diagram for explaining the operation of the sensor module.

[0012] Figure 5 This is the second structural example of the microcontroller.

[0013] Figure 6 This is an example of a timing chart for explaining the operation of the microcontroller in the second structural example.

[0014] Figure 7 It is a signal waveform diagram for explaining the operation of the sensor module using the microcontroller of the second structural example.

[0015] Figure 8 This is an example of the structure of a sensor device.

[0016] Figure 9 This is an example of the structure of an angular velocity sensor device.

[0017] Figure 10 This is an example of the structure of a measurement system.

[0018] Figure 11 This is an example of the structure of an electronic device.

[0019] Description of labels

[0020] 10: Sensor module; 20: Sensor device; 20X: First sensor device; 20Y: Second sensor device; 30: Angular velocity sensor device; 50: Sensor element; 50X: First sensor element; 50Y: Second sensor element; 60: Detection circuit; 60X: First detection circuit; 60Y: Second detection circuit; 70: Interface; 70X: First interface; 70Y: Second interface; 80: Microcontroller; 82: Digital interface; 90: Processing circuit; 91: Register unit; 92: Signal processing circuit; 93: Counter; 94: Interrupt controller; 96: Host interface; 200: Measurement system; 2 10: Host device; 213: Clock signal generating circuit; 220: GPS receiving unit; 222: Antenna; 230: Oscillator; 300: Electronic device; 310: Communication unit; 312: Antenna; 320: Processing unit; 330: Operation unit; 340: Display unit; 350: Storage unit; CTVAL: Count value; DRDY: Data ready signal; EXSYC: External synchronization signal; SD1: First detection data; SD2: Second detection data; SDAT: Detection data; SDATC: Accumulated data; SDATC1: First accumulated data; SDATC2: Second accumulated data; TS: Synchronization terminal. DETAILED DESCRIPTION

[0021] Hereinafter, preferred embodiments of the present disclosure will be described in detail. Note that the embodiments described below do not unduly limit the contents described in the claims, and not all of the structures described in the embodiments are necessarily essential structural elements.

[0022] 1. Example of sensor module structure

[0023] Figure 1 A configuration example of a sensor module 10 according to this embodiment is shown. The sensor module 10 is a physical quantity detection module composed of a plurality of sensor devices, and the sensor module 10 realizes a sensor system or a sensor unit. Figure 1 The sensor module 10 includes a first sensor device 20X, a second sensor device 20Y, and a microcontroller 80. In addition, the sensor module 10 is not limited to Figure 1 The structure can be modified in various ways, such as omitting some of its structural elements or adding other structural elements. Figure 1 , the number of sensor devices may be 3 or more. For example, the sensor module 10 of this embodiment may include first to n-th sensor devices, where n is an integer greater than 2.

[0024] The first sensor device 20X includes a first sensor element 50X; a first detection circuit 60X that receives a signal from the first sensor element 50X and performs detection processing; and a first interface 70X that outputs first detection data SD1 from the first detection circuit 60X. The first sensor device 20X is a device in which the first sensor element 50X and an integrated circuit device including the first detection circuit 60X and the first interface 70X are housed in a package. The integrated circuit device is an IC chip implemented using a semiconductor.

[0025] The second sensor device 20Y includes a second sensor element 50Y; a second detection circuit 60Y that receives a signal from the second sensor element 50Y and performs detection processing; and a second interface 70Y that outputs second detection data SD2 from the second detection circuit 60Y. The second sensor device 20Y is a device in which the second sensor element 50Y and an integrated circuit device including the second detection circuit 60Y and the second interface 70Y are housed in a package.

[0026] In addition, when the number of sensor devices is set to 3 or more and an nth sensor device is provided, the nth sensor device includes: an nth sensor element; an nth detection circuit, which receives a signal from the nth sensor element and performs detection processing; and an nth interface, which outputs nth detection data from the nth detection circuit.

[0027] The first sensor element 50X and the second sensor element 50Y are sensor elements that detect physical quantities, and can also be called physical quantity sensors (transducers). Physical quantities include, for example, angular velocity, acceleration, angular acceleration, speed, distance, pressure, sound pressure, or magnetism. The first sensor element 50X and the second sensor element 50Y detect different physical quantities. Taking angular velocity as an example, the first sensor element 50X detects angular velocity about the first axis, and the second sensor element 50Y detects angular velocity about the second axis. Taking acceleration as an example, the first sensor element 50X detects acceleration in the direction of the first axis, and the second sensor element 50Y detects acceleration in the direction of the second axis. Alternatively, the first sensor element 50X may detect a first physical quantity among angular velocity, acceleration, angular acceleration, speed, distance, pressure, or magnetism, and the second sensor element 50Y may detect a second physical quantity different from the first physical quantity. As an example, the first sensor element 50X detects angular velocity, and the second sensor element 50Y detects acceleration.

[0028] The first detection circuit 60X and the second detection circuit 60Y can each include an analog circuit and an A / D converter circuit that converts the analog signal from the analog circuit into digital data. The analog circuit can include an amplifier circuit that amplifies the signal from the sensor element, a detection circuit such as a synchronous detection circuit, a gain adjustment circuit, an offset adjustment circuit, and the like. The A / D converter circuit outputs the digital detection data to an interface. The A / D converter circuit can employ a successive approximation, delta-sigma, flash, pipeline, or dual-integral type A / D conversion method.

[0029] The first interface 70X and the second interface 70Y are circuits that perform digital interface processing, such as transmitting or receiving serial data. Specifically, these interfaces perform interface processing according to the SPI or I2C communication standards. These interfaces may also perform interface processing according to a communication standard that is an evolution of SPI or I2C, or a communication standard that is a partial improvement or modification of the SPI or I2C standards.

[0030] The first detection data SD1 from the first sensor device 20X and the second detection data SD2 from the second sensor device 20Y are input to the microcontroller 80. The sensor module 10 includes a digital interface bus BS that electrically connects the first and second sensor devices 20X, 20Y, and the microcontroller 80. The digital interface bus BS is a bus that complies with the communication standard for the interface processing performed by the first and second interfaces 70X, 70Y. The digital interface bus BS includes data signal lines, clock signal lines, and the like. Furthermore, the digital interface bus BS may also include a chip select signal. The first detection data SD1 is input from the first sensor device 20X to the microcontroller 80, and the second detection data SD2 is input from the second sensor device 20Y to the microcontroller 80 via the digital interface bus BS. Furthermore, the first interface 70X is electrically connected to the digital interface bus BS via terminal TD1, and the second interface 70Y is electrically connected to the digital interface bus BS via terminal TD2. Here, "electrically connected" refers to a connection capable of transmitting electrical signals, i.e., a connection capable of transmitting information based on electrical signals. The microcontroller 80 is a main controller for the first sensor device 20X and the second sensor device 20Y. The microcontroller 80 is an integrated circuit device and can be implemented by a processor such as an MPU or a CPU. Alternatively, the microcontroller 80 can be an ASIC or an FPGA.

[0031] In addition, an external synchronization signal EXSYC is input to the microcontroller 80. The external synchronization signal EXSYC is a signal input from an external device to the sensor module 10, and is a signal that becomes valid at each synchronization timing. The external synchronization signal EXSYC is, for example, a signal that becomes valid at regular intervals. Valid means that it is a high level in the case of positive logic and a low level in the case of negative logic. For example, the external device may be a receiver of a satellite positioning system, and the PPS signal from the receiver may be input to the sensor module 10 as the external synchronization signal EXSYC. Alternatively, the external device may be a host device of the sensor module 10, and the host device may use a PLL or the like to generate the external synchronization signal EXSYC synchronized with the PPS signal. Alternatively, the host device may obtain time information from an NTP server or the like via a network and generate the external synchronization signal EXSYC synchronized with the time information.

[0032] Figure 2 This is an example of a timing chart for explaining the operation of the microcontroller 80 . Figure 2 An example is shown in which a PPS signal of 10 pulses / second is input to the microcontroller 80 as the external synchronization signal EXSYC.

[0033] In the waveforms of the first detection data SD1 to the nth detection data SDn, one square represents one sampling data. Sampling here means that the microcontroller 80 receives the detection data from the interface of each sensor device. Figure 2 Although only one waveform is shown in FIG, the microcontroller 80 samples each of the first detection data SD1 to the n-th detection data SDn.

[0034] The microcontroller 80 accumulates the first detection data SD1 and obtains the first accumulated data SDATC1. Similarly, the microcontroller 80 accumulates the second detection data SD2 to the n-th detection data SDn and obtains the second accumulated data SDATC2 to the n-th accumulated data SDATCn. Figure 2 The waveform of only one accumulated data point is shown, and this waveform shows the waveform when the detected data is a constant value. The microcontroller 80 resets the first accumulated data point SDATC1 through the nth accumulated data point SDATCn at the edge timing of the external synchronization signal EXSYC and continues accumulation until the next edge timing of the external synchronization signal EXSYC. The edge timing of the external synchronization signal EXSYC may be either the rising or falling timing of the external synchronization signal EXSYC.

[0035] The microcontroller 80 outputs the first to nth accumulated data SDATC1 to SDATCn, accumulated from the edge timing of the external synchronization signal EXSYC to the next edge timing, to the host device. Specifically, the microcontroller 80 retains the first to nth accumulated data SDATC1 to SDATCn immediately before the edge timing of the external synchronization signal EXSYC is reset, and outputs the retained first to nth accumulated data SDATC1 to SDATCn to the host device. The host interface of the microcontroller 80 is, for example, SPI, I2C, or UART. If the host interface is SPI, the microcontroller 80 generates a data ready signal DRDY at the edge timing of the external synchronization signal EXSYC and outputs it to the host device. Upon receiving the data ready signal DRDY, the host device reads the first to nth accumulated data SDATC1 to SDATCn via the host interface of the microcontroller 80. Furthermore, when the host interface is I 2 C or UART, the data ready signal DRDY is not used in communication, but the data ready signal DRDY may be generated inside the microcontroller 80 .

[0036] Figure 3 This is a first configuration example of the microcontroller 80. The microcontroller 80 includes a digital interface 82, a processing circuit 90, a signal processing circuit 92, an interrupt controller 94, and a host interface 96. Here, the number of sensor devices is set to n=2.

[0037] The digital interface 82 is a circuit that performs interface processing with sensor devices. Specifically, the digital interface 82 primarily performs interface processing with the first interface 70X and the second interface 70Y. The digital interface 82 is connected to the digital interface bus BS via terminal TM. Similar to the first interface 70X and the second interface 70Y, the digital interface 82 performs interface processing based on the SPI or I2C communication standards, or on communication standards that are developed from, or partially modified from, SPI or I2C.

[0038] The signal processing circuit 92 is a circuit that performs digital signal processing such as the above-mentioned accumulation processing, and can be implemented by a DSP or the like. The signal processing circuit 92 accumulates the first detection data SD1 received by the digital interface 82 to obtain the first accumulated data SDATC1, and accumulates the second detection data SD2 received by the digital interface 82 to obtain the second accumulated data SDATC2. In addition, the signal processing circuit 92 can also perform filtering processing or correction processing, etc. Specifically, the signal processing circuit 92 can also perform the following processing: after calculating the moving average of the latest J detection data for the detection data, down-sampling at a rate of 1 / K (J and K are integers greater than 2). In addition, the signal processing circuit 92 can also perform correction processing such as temperature correction on the detection data after filtering. The signal processing circuit 92 can also accumulate the detection data after filtering or correction processing to obtain accumulated data.

[0039] The processing circuit 90 is a circuit corresponding to the core CPU of the microcontroller 80 and performs various calculations and control processes. The processing circuit 90 includes a register unit 91 having various registers. The processing circuit 90 stores the accumulated data from the signal processing circuit 92 in the register unit 91. The processing circuit 90 then generates a signal DRDY as a signal indicating that the accumulated data has been prepared and sends it to the terminal TR. Figure 10 The host device 210, described later, outputs a signal DRDY. This signal DRDY notifies the signal processing circuit 92 of the completion of digital signal processing. If the host interface 96 performs UART standard communication, the signal DRDY may not be output to the host device 210.

[0040] Register unit 91 includes multiple registers that are externally accessible. For example, host device 210 can access the data register of register unit 91 via host interface 96 and read accumulated data. Processing circuit 90 can also count the number of updates to the data register of accumulated data and write the counted update count to the update count register of register unit 91. This allows host device 210 to determine the number of accumulated data read from microcontroller 80.

[0041] The interrupt controller 94 accepts various interrupt requests. It then outputs a signal notifying the processing circuit 90 of the interrupt request, interrupt level, and vector number, based on the priority and interrupt level. As one of the interrupt request signals, the external synchronization signal EXSYC is input to the interrupt controller 94 via the synchronization terminal TS. When an interrupt request based on the external synchronization signal EXSYC is accepted, the processing circuit 90 executes the corresponding interrupt processing. Other interrupt requests include interrupt requests from the host interface 96 via the SPI or UART, interrupt requests from various timers, and interrupt requests from I2C.

[0042] The host interface 96 is a circuit that performs digital interface processing with the host device 210. For example, the host interface 96 performs serial data communication such as SPI, I2C, or UART as the host interface processing.

[0043] Figure 4 1 is a signal waveform diagram for explaining the operation of the sensor module 10. Here, the number of sensor devices is set to n = 2. In addition, data with the same hatching indicates that they correspond to each other.

[0044] Figure 4 The image SSD1 shows the detection data output by the first detection circuit 60X of the first sensor device 20X, and the image SSD2 shows the detection data output by the second detection circuit 60Y of the second sensor device 20Y. In this embodiment, the first sensor device 20X and the second sensor device 20Y operate based on independent clock signals. For example, each sensor device operates based on a clock signal from an oscillator circuit built into each sensor device, or a clock signal generated using an oscillator such as a quartz crystal resonator included in each sensor device. Therefore, the detection data SSD1 output by the first detection circuit 60X and the detection data SSD2 output by the second detection circuit 60Y are asynchronous.

[0045] Interrupt controller 94 generates signal SYCINT at regular intervals for executing internal interrupt processing. The frequency of signal SYCINT is slower than the sampling rate of detection data SSD1 and SSD2. Microcontroller 80 initiates internal interrupt processing at the edge of signal SYCINT. Here, an example is shown in which internal interrupt processing is initiated at the falling edge of signal SYCINT.

[0046] When internal interrupt processing begins, the digital interface 82 receives first detection data SD1 from the first interface 70X of the first sensor device 20X. First detection data SD1 refers to the falling timing of the SYCINT signal within the detection data SSD1 output by the first detection circuit 60X. Furthermore, the digital interface 82 receives second detection data SD2 from the second interface 70Y of the second sensor device 20Y. Second detection data SD2 refers to the falling timing of the SYCINT signal within the detection data SSD2 output by the second detection circuit 60Y. The detection data SDAT received by the digital interface 82 indicates either the first detection data SD1 or the second detection data SD2. Although only one detection data is shown here, the digital interface 82 receives both the first detection data SD1 and the second detection data SD2.

[0047] When the internal interrupt processing starts, the processing circuit 90 generates a signal SYACC that causes the signal processing circuit 92 to perform an arithmetic process. Figure 4 , an example is shown in which the signal SYACC is valid for a predetermined period starting from the falling edge of the signal SYCINT. Here, it is assumed that the signal SYACC is valid at a high level. While the signal SYACC is valid, the signal processing circuit 92 adds the detection data SDAT to the accumulated data SDATC at that time point, and updates the accumulated data SDATC based on the addition result. This update is performed, for example, at the end of the valid period of the signal SYACC. The accumulated data SDATC is generated by adding the detection data SDAT for each internal interrupt processing. Figure 4 Although only one piece of accumulated data is shown in the figure, the first detection data SD1 and the second detection data SD2 are accumulated to generate the first accumulated data and the second accumulated data.

[0048] The interrupt controller 94 generates an external interrupt signal at the edge timing of the external synchronization signal EXSYC, and the microcontroller 80 starts external interrupt processing according to the external interrupt signal. Figure 4 The example of starting the external interrupt processing at the falling timing of the external synchronization signal EXSYC is shown. When the external interrupt processing starts, the signal processing circuit 92 resets the accumulated data SDATC to zero. As a result, the detection data SDAT is accumulated from the edge timing of the external synchronization signal EXSYC to the next edge timing. Figure 4As shown in FIG. 1 , when the value of the detection data SDAT after the external synchronization signal EXSYC is input is 15, 20, 25, -5, -10, ..., the value of the accumulated data SDATC becomes 0, 0+15=15, 15+20=35, 35+25=60, 60-5=55, 55-10=45, .... The accumulated data SDATC immediately before the edge timing of the external synchronization signal EXSYC is reset is represented by DSMk or DSMk+1. k is an integer and is an index indicating the number of the accumulated data corresponding to the external synchronization signal EXSYC.

[0049] When the accumulated data SDATC is reset, the processing circuit 90 stores the immediately preceding accumulated data DSMk and DSMk+1 in the register unit 91 and outputs a data ready signal DRDY to the host device 210. The host device 210 receives the data ready signal DRDY and issues a read request to the host interface 96. The host interface 96 then outputs the accumulated data DSMk and DSMk+1 stored in the register unit 91 as output data SDATQ to the host device 210. Furthermore, when the host interface 96 performs UART communication, the accumulated data DSMk and DSMk+1 may be output to the host device 210 without outputting the signal DRDY to the host device 210.

[0050] In this embodiment, the sensor module 10 includes a first sensor device 20X, a second sensor device 20Y, and a microcontroller 80. The first sensor device 20X includes a first sensor element 50X; a first detection circuit 60X that receives a signal from the first sensor element 50X and performs detection processing; and a first interface 70X that outputs first detection data SD1 from the first detection circuit 60X. The second sensor device 20Y includes a second sensor element 50Y; a second detection circuit 60Y that receives a signal from the second sensor element 50Y and performs detection processing; and a second interface 70Y that outputs second detection data SD2 from the second detection circuit 60Y. The microcontroller 80 includes a synchronization terminal TS for receiving an external synchronization signal EXSYC. The microcontroller 80 receives the first detection data SD1 from the first sensor device 20X and the second detection data SD2 from the second sensor device 20Y. The microcontroller 80 calculates the first accumulated data SDATC1 by accumulating the first detection data SD1 until the synchronization timing of the external synchronization signal EXSYC, calculates the second accumulated data SDATC2 by accumulating the second detection data SD2 until the synchronization timing, and outputs the first accumulated data SDATC1 and the second accumulated data SDATC2 to the host device at the synchronization timing.

[0051] According to this embodiment, the data rate of the accumulated data is slower than the sampling rate of the detection data. Therefore, outputting the accumulated data to the host device via the microcontroller 80 reduces the load on the host device compared to outputting detection data. For example, the host device's communication load and computational load, such as that for accumulation processing, are reduced. The host device, for example, communicates with and controls various sensors and devices included in the system. Therefore, by reducing the load on the sensor module 10, the processing load can be distributed to other sensors and devices.

[0052] Furthermore, according to this embodiment, the microcontroller 80 outputs accumulated data to the host device in synchronization with the external synchronization signal EXSYC. This allows the host device to obtain synchronized data from various sensors. Specifically, the host device can receive data from the sensor module 10 and other sensors in synchronization with the external synchronization signal EXSYC and use this synchronized data to perform various processes and controls. For example, in autonomous navigation of a mobile object, the synchronized outputs of various sensors can be used to detect the position and posture of the mobile object.

[0053] In the present embodiment, the microcontroller 80 may obtain first accumulated data SDATC1 by accumulating first detection data SD1 during synchronization timing of the external synchronization signal EXSYC, and obtain second accumulated data SDATC2 by accumulating second detection data SD2 during synchronization timing.

[0054] In addition, in the present embodiment, the microcontroller 80 may reset the first accumulated data SDATC1 and the second accumulated data SDATC2 at each synchronization timing.

[0055] According to this embodiment, the host device can obtain accumulated data between each synchronization timing of the external synchronization signal EXSYC. The host device can use the accumulated data as detection data of the sensor module 10 or further process it, such as by accumulation. For example, if the sensor device is an angular velocity sensor and the external synchronization signal EXSYC is a 1PPS signal, the accumulated data represents the rotation angle per second. In other words, the accumulated data can be regarded as angular velocity data in decibels per second. For example, the host device can use the received accumulated data as angular velocity data or calculate the rotation angle through further accumulation.

[0056] In addition, in this embodiment, the microcontroller 80 may output a signal to the outside to notify completion of the accumulation when the accumulation between the synchronization timings is completed. Figure 2 and Figure 4 In the example, the data ready signal DRDY is a "signal notifying completion of accumulation".

[0057] According to this embodiment, the host device receives a signal notifying completion of integration, thereby executing a communication process for receiving integrated data and acquiring the completed integration result.

[0058] In this embodiment, the external synchronization signal EXSYC may also be a time reference signal obtained from a satellite positioning system. Satellite positioning systems are also called GNSS (Global Navigation Satellite System), and include GPS (Global Positioning System), QZSS (Quasi-Zenith Satellite System), GLONASS, and Galileo.

[0059] According to this embodiment, the microcontroller 80 can output accumulated data to the host device in synchronization with the time reference signal. For example, in a system that performs processing or control in synchronization with the time reference signal, the host device can obtain data synchronized with the time reference signal from the sensor module 10 and perform processing or control.

[0060] 2. Second structural example

[0061] Figure 5 This is a second configuration example of the microcontroller 80. Components already described are denoted by the same reference numerals, and descriptions of these components are omitted as appropriate. The following mainly describes the differences from the first configuration example. In the second configuration example, the processing circuit 90 includes a counter 93.

[0062] Counter 93 counts a predetermined time from the synchronization timing of external synchronization signal EXSYC. Microcontroller 80 includes an oscillator circuit (not shown), and counter 93 performs counting using a clock signal from this oscillator circuit. Alternatively, a clock signal may be input from an oscillator circuit external to microcontroller 80, and counter 93 may perform counting using this clock signal.

[0063] Register unit 91 stores setting information indicating a predetermined time. For example, the setting information is information indicating a count value corresponding to the predetermined time. For example, the host device writes the setting information to register unit 91 via host interface 96. Processing circuit 90 compares the count value of counter 93 with the setting information stored in register unit 91 to determine whether the predetermined time has elapsed.

[0064] Figure 6 This is an example of a timing chart for explaining the operation of the microcontroller 80 in the second configuration example. Figure 6In the following example, a PPS signal of 10 pulses / second is input to the microcontroller 80 as the external synchronization signal EXSYC, the counter 93 counts at 50 kHz, and the predetermined time corresponds to 1000 counts.

[0065] Processing circuit 90 resets count value CTVAL of counter 93 to zero at the edge timing of external synchronization signal EXSYC. Counter 93 increments count value CTVAL based on a 50kHz clock signal. Processing circuit 90 generates internal synchronization signal CSYC when count value CTVAL reaches 1000. Signal processing circuit 92 resets accumulated data SDATC1 to SDATCn at the edge timings of external synchronization signal EXSYC and internal synchronization signal CSYC. Signal processing circuit 92 accumulates detection data SD1 to SDn from the edge timing of external synchronization signal EXSYC to the edge timing of internal synchronization signal CSYC, and from the edge timing of internal synchronization signal CSYC to the edge timing of external synchronization signal EXSYC, thereby generating accumulated data SDATC1 to SDATCn.

[0066] The microcontroller 80 generates a data ready signal DRDY at the edge timing of the external synchronization signal EXSYC and the internal synchronization signal CSYC and outputs it to the host device. Upon receiving the data ready signal DRDY, the host device reads the first to nth accumulated data SDATC1 to SDATCn via the host interface of the microcontroller 80 .

[0067] Figure 7 This is a signal waveform diagram for explaining the operation of the sensor module 10 using the microcontroller 80 of the second configuration example. Here, the number of sensor devices is set to n = 2. The processing until the microcontroller 80 receives the detection data SDAT from each sensor device is the same as Figure 4 same.

[0068] The interrupt controller 94 generates an external interrupt signal at the edge timing of the external synchronization signal EXSYC, and the microcontroller 80 starts external interrupt processing according to the external interrupt signal. Figure 7 The example in which external interrupt processing is started at the falling timing of the external synchronization signal EXSYC is shown. When external interrupt processing is started, the signal processing circuit 92 resets the accumulated data SDATC to zero. Thereafter, while the signal SYACC is active, the signal processing circuit 92 adds the detection data SDAT to the accumulated data SDATC.

[0069] The processing circuit 90 generates the internal synchronization signal CSYC when the count value CTVAL matches 1000, which indicates a predetermined period. The signal processing circuit 92 resets the accumulated data SDATC to zero at the edge timing of the internal synchronization signal CSYC. Figure 7 In the example shown, the accumulated data SDATC is reset at the falling timing of the internal synchronization signal CSYC. Thereafter, the signal processing circuit 92 adds the detection data SDAT to the accumulated data SDATC while the signal SYACC is active.

[0070] In summary, the detection data SDAT is accumulated from the edge timing of the external synchronization signal EXSYC to the edge timing of the internal synchronization signal CSYC, and from the edge timing of the internal synchronization signal CSYC to the edge timing of the external synchronization signal EXSYC. Figure 7 As shown, after the external synchronization signal EXSYC is input, the values ​​of the detection data SDAT are 15, 20, 25, -5, -10, ..., and the internal synchronization signal CSYC is generated when SDAT = 25. In this case, the value of the accumulated data SDATC becomes 0, 0 + 15 = 15, 15 + 20 = 35, and 35 + 25 = 60. The internal synchronization signal CSYC resets the accumulated data SDATC to 0, 0 - 5 = -5, -5 - 10 = -15, ..., and so on. The accumulated data SDATC immediately before the edge timing of the external synchronization signal EXSYC and the internal synchronization signal CSYC is reset is set to DSMk, 60, and DSMk + 1. k is an integer and is an index indicating the number of the accumulated data corresponding to the external synchronization signal EXSYC.

[0071] When the accumulated data SDATC is reset, the processing circuit 90 stores the immediately preceding accumulated data DSMk, 60, DSMk+1 and the count values ​​5000, 1000, and 5000 in the register unit 91 and outputs a data ready signal DRDY to the host device 210. The host device 210 receives the data ready signal DRDY and issues a read request to the host interface 96. The host interface 96 then outputs the accumulated data DSMk, 60, and DSMk+1 stored in the register unit 91 as output data SDATQ and the count values ​​5000, 1000, and 5000 as output data CTVALQ to the host device 210. Furthermore, when the host interface 96 performs UART communication, the accumulated data DSMk, 60, and DSMk+1 and the count values ​​5000, 1000, and 5000 may be output to the host device 210 without outputting the DRDY signal to the host device 210.

[0072] In this embodiment, the microcontroller 80 calculates the first accumulated data SDATC1 by accumulating the first detection data SD1 between the output timing including the synchronization timing of the external synchronization signal EXSYC and the timing after a specified time from the synchronization timing, and calculates the second accumulated data SDATC2 by accumulating the second detection data SD2 between the output timings.

[0073] According to this embodiment, the microcontroller 80 can output accumulated data to the host device not only at the timing synchronized with the external synchronization signal EXSYC, but also at any output timing. The host device may obtain data from sensors with various synchronized timings. However, the host device can obtain accumulated data from the sensor module 10 in accordance with the synchronized timings of these sensors and use this synchronized data to perform various processes or controls.

[0074] In addition, in this embodiment, the sensor module 10 may include a register storing setting information of a predetermined time, and the microcontroller 80 may set the timing after the predetermined time based on the setting information.

[0075] According to the present embodiment, by writing setting information to the register from outside the sensor module 10 , the output timing of the accumulated data can be set to an arbitrary timing.

[0076] In addition, in the present embodiment, the microcontroller 80 may reset the first accumulated data SDATC1 and the second accumulated data SDATC2 at each output timing.

[0077] According to this embodiment, the accumulated data is reset at each output timing, so that the accumulated data becomes the data after the detection data between the output timings is accumulated. As a result, the host device can obtain the accumulated data between each output timing. The host device can use the accumulated data as the detection data of the sensor module 10, or can further process it by accumulation. For example, in the case where the sensor device is an angular velocity sensor, the accumulated data can be converted into the rotation angle per second based on the time between the accumulated data and the output timing, and used as angular velocity data in dps. Alternatively, the host device can also calculate the rotation angle by further accumulating the accumulated data.

[0078] In addition, in this embodiment, the microcontroller 80 may also output a signal to the outside to notify completion of the accumulation when the accumulation between the output timings is completed. Figure 6 and Figure 7 In the example, the data ready signal DRDY is a "signal notifying completion of accumulation".

[0079] According to this embodiment, the host device receives a signal notifying completion of integration, thereby executing a communication process for receiving integrated data and acquiring the completed integration result.

[0080] 3. Sensor devices

[0081] Figure 8 is a structural example of the sensor device 20. The sensor device 20 corresponds to Figure 1 、 Figure 3as well as Figure 5 The sensor device 20 includes a first sensor device 20X and a second sensor device 20Y. The sensor device 20 includes a sensor element 50 , a detection circuit 60 , a processing circuit 66 , and an interface 70 .

[0082] Detection circuit 60 includes an analog circuit 62 having an amplifier circuit 63 for amplifying the signal from sensor element 50, and an A / D converter circuit 64 for converting the analog signal from analog circuit 62 into digital data. Processing circuit 66 includes register 67. Interface 70 includes a parallel / serial converter circuit 72, a serial / parallel converter circuit 74, and a control circuit 76 for controlling the interface.

[0083] The A / D conversion circuit 64 samples the analog detection signal from the analog circuit 62 based on the clock signal ADCK of the frequency f1 and performs A / D conversion. The A / D conversion circuit 64 outputs the detection data ADQ at an output sampling rate corresponding to the frequency f1. The register 67 holds the detection data ADQ. The detection data ADQ output at the frequency f1 corresponds to Figure 4 and Figure 7 When the resolution of the A / D conversion by the A / D conversion circuit 64 is k bits, the detection data ADQ is, for example, k-bit parallel data.

[0084] The serial data of the data input signal SDI from the microcontroller 80 is converted into parallel data by the serial / parallel conversion circuit 74. The microcontroller 80 sends a read command to the interface 70 at the edge of the signal SYCINT. When the interface 70 receives the read command, the parallel / serial conversion circuit 72 converts the detection data ADQ held by the register 67 into serial data and outputs it to the microcontroller 80 as the data output signal SDO. The frequency of the signal SYCINT is f2 < f1, and the interface 70 outputs the detection data ADQ at an output sampling rate corresponding to the frequency f2. The detection data ADQ output at the frequency f2 corresponds to Figure 4 and Figure 7 Detection data SD1, SD2.

[0085] exist Figure 9 , an example of the configuration of an angular velocity sensor device is shown as an example of a sensor device. The angular velocity sensor device 30 includes a vibrator 56 , a drive circuit 58 , a detection circuit 60 , a processing circuit 66 , and an interface 70 .

[0086] The drive circuit 58 can include an amplifier circuit that receives the feedback signal DG from the oscillator 56 and amplifies the signal, an AGC circuit that performs automatic gain control, or an output circuit that outputs the drive signal DS to the oscillator 56. For example, the AGC circuit variably and automatically adjusts the gain to maintain a constant amplitude of the feedback signal DG from the oscillator 56. The output circuit outputs, for example, a rectangular wave drive signal DS to the oscillator 56. The detection circuit 60 can include an amplifier circuit, a synchronous detection circuit, or an A / D converter circuit. The amplifier circuit receives the detection signals S1 and S2 from the oscillator 56 and performs charge-to-voltage conversion and signal amplification on the detection signals S1 and S2, which are differential signals. The synchronous detection circuit uses the synchronization signal from the drive circuit 58 to perform synchronous detection to extract the desired wave. The A / D converter converts the analog detection signal after synchronous detection into digital detection data and outputs it to the processing circuit 66. The processing circuit 66 performs various processing on the detection data, such as zero-point calibration, sensitivity adjustment, filtering, and temperature correction, and then outputs the processed detection data to the interface 70.

[0087] exist Figure 9 In the embodiment, a vibrator with a double T-shaped structure is used as the vibrator 56. In addition, a tuning fork-shaped or H-shaped vibrator may also be used as the vibrator 56. The vibrator 56 includes driving arms 38A, 38B, 38C, and 38D, detection arms 39A and 39B, a base 31, and connecting arms 32A and 32B. The detection arms 39A and 39B extend in the +y-axis direction and the -y-axis direction relative to the rectangular base 31. In addition, the connecting arms 32A and 32B extend in the +x-axis direction and the -x-axis direction relative to the base 31. Furthermore, the driving arms 38A and 38B extend from the distal end of the connecting arm 32A in the +y-axis direction and the -y-axis direction relative to the connecting arm 32A, and the driving arms 38C and 38D extend from the distal end of the connecting arm 32B in the +y-axis direction and the -y-axis direction relative to the connecting arm 32B. Frequency adjustment weights are provided at the distal ends of the driving arms 38A, 38B, 38C, and 38D and the detecting arms 39A and 39B. When the z-axis is the thickness direction of the vibrator 56, the vibrator 56 detects angular velocity around the z-axis.

[0088] Drive electrodes 33 are formed on the upper and lower surfaces of the drive arms 38A and 38B, and drive electrodes 34 are formed on the right and left sides of the drive arms 38A and 38B. Drive electrodes 34 are formed on the upper and lower surfaces of the drive arms 38C and 38D, and drive electrodes 33 are formed on the right and left sides of the drive arms 38C and 38D. Furthermore, a drive signal DS from the drive circuit 58 is supplied to the drive electrode 33, and a feedback signal DG from the drive electrode 34 is input to the drive circuit 58. Detection electrodes 35 are formed on the upper and lower surfaces of the detection arm 39A, and ground electrodes 37 are formed on the right and left sides of the detection arm 39A. Detection electrodes 36 are formed on the upper and lower surfaces of the detection arm 39B, and ground electrodes 37 are formed on the right and left sides of the detection arm 39B. Furthermore, detection signals S1 and S2 from the detection electrodes 35 and 36 are input to the detection circuit 60.

[0089] Next, the operation of the angular velocity sensor device 30 will be described. When a drive signal DS is applied to the drive electrode 33 by the drive circuit 58, the drive arms 38A, 38B, 38C, and 38D undergo bending vibration as indicated by arrows C1. Each drive arm, for example, repeatedly vibrates between the vibration postures indicated by solid arrows and the vibration postures indicated by dashed arrows at a predetermined frequency. In this state, when an angular velocity about the z-axis is applied to the vibrator 56, the drive arms 38A, 38B, 38C, and 38D vibrate as indicated by arrows C2 due to the Coriolis force. This vibration indicated by arrow C2 is transmitted to the base 31 via the connecting arms 32A and 32B, causing the detection arms 39A and 39B to undergo bending vibration in the direction indicated by arrows C3. The charge signals generated by the piezoelectric effect caused by the bending vibration of the detection arms 39A and 39B are input as detection signals S1 and S2 to the detection circuit 60, which detects the angular velocity about the z-axis.

[0090] 4. Measurement system

[0091] exist Figure 10 2 shows an example of the structure of the measurement system 200 of this embodiment. The measurement system 200 includes a sensor module 10 and a host device 210 electrically connected to the sensor module 10. In addition, the measurement system 200 can include a GPS receiver 220, an antenna 222 for GPS reception, and an oscillator 230. Figure 10 In the embodiment, the sensor module 10 is used as a six-axis inertial measurement unit (IMU).

[0092] Host device 210 can be implemented as various processors such as an MPU or a CPU. Alternatively, host device 210 can be implemented as an integrated circuit device such as an ASIC. Host device 210 includes a DSP (digital signal processor) 212 that performs digital signal processing and a clock signal generation circuit 213 that generates a clock signal.

[0093] The GPS receiver 220 receives signals from GPS satellites via an antenna 222. Specifically, it receives satellite signals superimposed with location information as a GPS carrier wave. The GPS receiver 220 is a GPS receiver and can be implemented as an integrated circuit device containing GPS receiving circuitry. Based on the signals received by the GPS receiver 220, the host device 210 detects GPS positioning data indicating the position, velocity, and orientation of a measurement object, such as a moving object. The position of the measurement object is represented by latitude, longitude, or altitude. This GPS positioning data also includes status data indicating the reception status and time of reception. Furthermore, the host device 210 receives acceleration data and angular velocity data from the sensor module 10 and performs inertial navigation calculations on these data to obtain inertial navigation positioning data. This inertial navigation positioning data includes acceleration data and posture data of the measurement object. The host device 210 then calculates the position, posture, or both of the measurement object based on the obtained inertial navigation positioning data and GPS positioning data. If the measurement object is a moving object such as a car, the host device 210 calculates the location of the moving object on the ground. Note that such processing of calculating the position of the measurement object and the like can be realized by Kalman filter processing using the DSP 212 .

[0094] Oscillator 230 generates an oscillating clock signal using an oscillator such as a quartz resonator. Oscillator 230 is, for example, a temperature-compensated oscillator (TCXO). Alternatively, an oven-controlled oscillator (OCXO) equipped with a constant temperature chamber may be used as oscillator 230. Clock signal generation circuit 213 generates various clock signals used in host device 210 based on the oscillating clock signal from oscillator 230. In this case, clock signal generation circuit 213 generates clock signals based on a time reference signal, a signal obtained from a satellite positioning system such as GPS. Clock signal generation circuit 213 generates, for example, an external synchronization signal EXSYC as one of the clock signals.

[0095] The host device 210 can obtain accurate absolute time information based on the time information contained in the satellite signal received by the GPS receiving unit 220. The time information is information such as year, month, day, hour, minute and second. In addition, the GPS receiving unit 220 outputs a PPS signal that generates a pulse every 1 second as a time reference signal. The clock signal generating circuit 213 is composed of a PLL circuit that operates according to the oscillation clock signal from the oscillator 230, and the PPS signal is input to the PLL circuit as a reference signal for clock synchronization. Then, the PLL circuit generates a clock signal synchronized with the PPS signal as the time reference signal. The host device 210 outputs the external synchronization signal EXSYC synchronized with the time reference signal to the sensor module 10. In addition, the PPS signal from the GPS receiving unit 220 can also be input to the sensor module 10 as the external synchronization signal EXSYC. In addition, the PPS signal is not limited to 1 pulse per second. For example, it can also be as follows Figure 2 So that's 10 pulses per second.

[0096] 5. Electronic devices

[0097] Figure 11 The following shows an example configuration of an electronic device 300 according to this embodiment. The electronic device 300 includes the sensor module 10 according to this embodiment and a processing unit 320 that processes signals output from the sensor module 10. The electronic device 300 may further include a communication unit 310, an operating unit 330, a display unit 340, a storage unit 350, and an antenna 312.

[0098] The communication unit 310 is, for example, a wireless circuit that receives data from the outside or sends data to the outside via the antenna 312. The processing unit 320 controls the electronic device 300 and performs various digital processing of data sent and received via the communication unit 310. In addition, the processing unit 320 performs processing based on the output signal of the sensor module 10. Specifically, the processing unit 320 performs signal processing such as correction processing or filtering processing on the output signal of the sensor module 10, such as the detection data, or performs various control processing on the electronic device 300 based on the output signal. The functions of the processing unit 320 can be implemented by a processor such as an MPU or a CPU. The operation unit 330 is used for user input operations and can be implemented by operating buttons or a touch panel display. The display unit 340 displays various information and can be implemented by a display such as a liquid crystal or an organic EL. The storage unit 350 stores data and its functions can be implemented by a semiconductor memory such as a RAM or a ROM.

[0099] Furthermore, the electronic device 300 of this embodiment can be applied to imaging-related devices such as digital still cameras or video cameras, in-vehicle devices, wearable devices such as head-mounted displays or watch-related devices, inkjet ejection devices, robots, personal computers, portable information terminals, printing devices, or projectors. In-vehicle devices include car navigation systems or autonomous driving devices. Watch-related devices include watches or smartwatches. Inkjet ejection devices include inkjet printers. Portable information terminals include smartphones, mobile phones, portable gaming devices, notebook PCs, or tablet computers. Furthermore, the electronic device 300 of this embodiment can be applied to electronic notepads, electronic dictionaries, calculators, word processors, workstations, video phones, anti-theft television monitors, electronic binoculars, POS terminals, medical equipment, fish finders, measuring equipment, mobile terminal base station equipment, measuring instruments, flight simulators, network servers, and the like. Medical equipment includes electronic thermometers, blood pressure monitors, blood glucose meters, electrocardiograms, ultrasonic diagnostic equipment, and electronic endoscopes. Measuring instruments are measuring instruments for vehicles, aircraft, ships, etc.

[0100] In addition, the present embodiment has been described in detail as described above, but those skilled in the art can easily understand that many modifications can be made without substantially departing from the new matters and effects of the present disclosure. Therefore, all such modifications are included in the scope of the present disclosure. For example, in the specification or the drawings, a term that is recorded at least once together with a different term in a broader sense or with the same meaning can be replaced with the different term in any part of the specification or the drawings. In addition, all combinations of the present embodiment and the modifications are also included in the scope of the present disclosure. In addition, the structures and actions of sensor elements, detection circuits, interfaces, sensor devices, digital interfaces, processing circuits, signal processing circuits, interrupt controllers, host interfaces, microcontrollers, host devices, measurement systems, and electronic devices are not limited to the contents described in the present embodiment, and various modifications can be implemented.

Claims

1. A sensor module, characterized in that: Include: a first sensor device comprising a first sensor element, a first detection circuit, and a first interface, wherein the first detection circuit receives a signal from the first sensor element and performs detection processing, and the first interface outputs first detection data from the first detection circuit; a second sensor device comprising a second sensor element, a second detection circuit, and a second interface, wherein the second detection circuit receives a signal from the second sensor element and performs detection processing, and the second interface outputs second detection data from the second detection circuit; as well as a microcontroller including a synchronization terminal for inputting an external synchronization signal, wherein the first detection data from the first sensor device and the second detection data from the second sensor device are input to the microcontroller; The microcontroller calculates first accumulated data by accumulating the first detection data up to the synchronization timing of the external synchronization signal, calculates second accumulated data by accumulating the second detection data up to the synchronization timing, and outputs the first accumulated data and the second accumulated data to the host device at the synchronization timing.

2. The sensor module according to claim 1, wherein: The microcontroller obtains the first accumulated data by integrating the first detection data during synchronization timings of the external synchronization signal, and obtains the second accumulated data by integrating the second detection data during synchronization timings.

3. The sensor module according to claim 2, wherein: The microcontroller resets the first accumulated data and the second accumulated data at each synchronization timing.

4. The sensor module according to claim 2, wherein: When the accumulation between the synchronization timings is completed, the microcontroller outputs a signal notifying the completion of the accumulation to the outside.

5. The sensor module according to any one of claims 1 to 4, characterized in that The microcontroller calculates the first accumulated data by accumulating the first detection data between output timings including the synchronization timing of the external synchronization signal and a timing a predetermined time after the synchronization timing, and calculates the second accumulated data by accumulating the second detection data between the output timings.

6. The sensor module according to claim 5, characterized in that The sensor module includes a register, and the register stores setting information of the predetermined time. The microcontroller sets the timing after the predetermined time based on the setting information.

7. The sensor module according to claim 5, characterized in that The microcontroller resets the first accumulated data and the second accumulated data at each output timing.

8. The sensor module according to claim 5, wherein: When the accumulation between the output timings is completed, the microcontroller outputs a signal notifying the completion of the accumulation to the outside.

9. The sensor module according to any one of claims 1 to 4, characterized in that: The external synchronization signal is a time reference signal obtained from a satellite positioning system.

10. A measurement system, characterized in that: Include: The sensor module according to any one of claims 1 to 4; and The host device is electrically connected to the sensor module.

11. The measuring system according to claim 10, characterized in that The host device obtains at least one of the position and posture of the moving object based on positioning information from a satellite positioning system and an output signal from the sensor module.

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