Power switch control circuit and control device

Abstract

The invention discloses a power switch control circuit and a control device, and relates to the technical field of power supply protection. The power switch control circuit comprises a main control circuit; a first switching circuit; the first end of the suppression switch circuit is electrically connected with the power supply input end, and when the suppression switch circuit is in an on state, the second end of the suppression switch circuit is electrically connected with the power supply end of the main control circuit; when the suppression switch circuit is in an off state, the second end of the suppression switch circuit is electrically connected with the detection end of the main control circuit; when the suppression switch circuit is in a conducting state, the surge current input by the power supply input end is suppressed. Wherein the first switching circuit and the suppression switching circuit are arranged in parallel between the power input end and the power end of the main control circuit; and the main control circuit is used for controlling the first switching circuit to be closed when the suppression switching circuit is in a conducting state. The invention aims to improve the power supply safety of the control device.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply protection, and in particular to a power switch control circuit and a control device. Background Art

[0002] Due to the design of the control circuits in high-voltage systems, a surge current occurs at startup. However, existing high-voltage surge current suppression circuits can easily cause contact sticking and damage to the power switch due to the surge current. To prevent power switch damage, the switch is typically replaced with a higher-current rated one. However, this only protects the power switch from damage, leaving the backend hardware at risk. Summary of the Invention

[0003] The main purpose of the present invention is to provide a power switch control circuit and a control device, aiming to improve the safety of power supply of the control device.

[0004] To achieve the above-mentioned object, the present invention proposes a power switch control circuit, which includes:

[0005] Main control circuit;

[0006] a first switch circuit, wherein a first end of the first switch circuit is electrically connected to a power input end, a controlled end of the first switch circuit is electrically connected to the main control circuit, and a second end of the first switch circuit is electrically connected to a power supply end of the main control circuit;

[0007] a suppression switch circuit, wherein a first end of the suppression switch circuit is electrically connected to the power input terminal, and when the suppression switch circuit is in an on state, a second end of the suppression switch circuit is electrically connected to the power terminal of the main control circuit; when the suppression switch circuit is in an off state, the second end of the suppression switch circuit is electrically connected to the detection terminal of the main control circuit; when the suppression switch circuit is in an on state, the suppression switch circuit suppresses an inrush current input to the power input terminal;

[0008] The first switch circuit and the suppression switch circuit are arranged in parallel between the power input terminal and the power terminal of the main control circuit; the main control circuit is used to control the first switch circuit to be closed when the suppression switch circuit is in the on state.

[0009] In one embodiment, the first switch circuit includes a relay, a first end of the relay is electrically connected to the power input end, a second end of the relay is electrically connected to the power end of the main control circuit, and a controlled end of the relay is electrically connected to the control end of the main control circuit;

[0010] The relay is configured to close or open upon receiving a first switch control signal output by the main control circuit.

[0011] In one embodiment, the power switch control circuit includes:

[0012] a second switch circuit, wherein a first end of the first switch circuit is electrically connected to the power input end;

[0013] an inrush current suppression circuit, wherein a second end of the inrush current suppression circuit is electrically connected to the main control circuit; the inrush current suppression circuit is used to suppress inrush current when current is input to the power input end;

[0014] Wherein, when the second switch circuit is triggered, the second end of the second switch circuit is electrically connected to the inrush current suppression circuit; when the second switch circuit is not triggered, the second end of the second switch circuit is electrically connected to the detection end of the main control circuit;

[0015] Furthermore, the main control circuit is used to receive a corresponding detection signal when the second switch circuit is triggered, and output a corresponding first switch control signal to the first switch circuit to close or open the first switch circuit.

[0016] In one embodiment, the second switch circuit includes at least one of a self-resetting switch circuit or a time-delay switch circuit.

[0017] In one embodiment, the inrush current suppression circuit includes a negative temperature coefficient thermistor.

[0018] In one embodiment, the power switch control circuit further includes a prompt circuit, a controlled end of which is electrically connected to the main control circuit; the prompt circuit is configured to output a corresponding prompt signal upon receiving a corresponding prompt control signal output by the main control circuit.

[0019] In one embodiment, the power switch control circuit further includes a current detection circuit, wherein an input end of the current detection circuit is electrically connected to a power supply end of the main control circuit, and an output end of the current detection circuit is electrically connected to the main control circuit; the current detection circuit is configured to detect a current at the power supply end of the main control circuit and output a corresponding current detection signal;

[0020] The main control circuit is further configured to confirm the working state of the relay according to the current detection signal, and output a corresponding prompt control signal to the prompt circuit.

[0021] In one embodiment, the power switch control circuit further includes a voltage conversion circuit, wherein a first end of the voltage conversion circuit is electrically connected to the power input end, and a second end of the voltage conversion circuit is electrically connected to the first end of the first switch circuit and the first end of the suppression switch circuit; the voltage conversion circuit is used to convert the first voltage input from the power input end into a second voltage and output it.

[0022] In one embodiment, the voltage conversion circuit includes a step-down circuit, wherein a first end of the step-down circuit is electrically connected to the power input terminal, and a second end of the step-down circuit is electrically connected to the first end of the first switch circuit and the first end of the inhibition switch circuit; the step-down circuit is configured to step down a first voltage input from the power input terminal to a second voltage and output the second voltage;

[0023] The second voltage is lower than the first voltage.

[0024] The present invention further provides a control device, which includes a power input terminal and a power switch control circuit as described in any one of the above items.

[0025] The technical solution of the present invention effectively improves the safety of power supply to a control device by employing a power switch control circuit. The power switch control circuit includes a main control circuit, a first switch circuit, and a suppressor switch circuit. The first switch circuit and the suppressor switch circuit are connected in parallel, with their first ends electrically connected to the power input terminal, thereby forming a main power supply circuit connected by the first switch circuit and a bypass power supply circuit connected by the suppressor switch circuit. It is understood that when power supply to the main control circuit is not confirmed, the first switch circuit is in an open state, and the suppressor switch circuit is also in an off state. At this time, the suppressor switch circuit is electrically connected to the detection terminal of the main control circuit. The main control circuit confirms that the suppressor switch circuit has not been triggered by receiving a high-level signal output by the suppressor switch circuit. When the suppressor switch circuit is triggered, the suppressor switch circuit is in an on state, thereby interrupting the high-level signal received by the main control circuit. When the main control circuit does not receive the corresponding high-level signal, it controls the first switch circuit to close, thereby conducting the main power supply circuit between the power input terminal and the power supply terminal of the main control circuit. By suppressing the surge current input to the power input terminal through the bypass power supply circuit, the safety of the power supply of the control device is effectively improved, and the power consumption in the suppression switch circuit is also reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0027] Figure 1 This is a module schematic diagram of the power switch control circuit of the present invention;

[0028] Figure 2 This is a module diagram of another embodiment of the power switch control circuit of the present invention;

[0029] Figure 3 This is a module diagram of another embodiment of the power switch control circuit of the present invention;

[0030] Figure 4 FIG. 1 is a module diagram of another embodiment of a power switch control circuit of the present invention.

[0031] Description of Figure Numbers:

[0032] 10. Main control circuit; 20. First switch circuit; 30. Suppression switch circuit; 31. Second switch circuit; 32. Inrush current suppression circuit; 40. Prompt circuit; 50. Voltage conversion circuit.

[0033] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings and in conjunction with the embodiments. DETAILED DESCRIPTION

[0034] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0035] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0036] In addition, the descriptions of "first", "second", etc. in the present invention are for descriptive purposes only and should not be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0037] Due to the design of the control circuits in high-voltage systems, a surge current occurs at startup. However, existing high-voltage surge current suppression circuits can easily cause contact sticking and damage to the power switch due to the surge current. To prevent power switch damage, the switch is typically replaced with a higher-current rated one. However, this only protects the power switch from damage, leaving the backend hardware at risk.

[0038] Therefore, reference Figure 1 and Figure 2 The present invention provides a power switch control circuit, the power switch control circuit comprising:

[0039] Main control circuit 10;

[0040] a first switch circuit 20, wherein a first end of the first switch circuit 20 is electrically connected to a power input end, a controlled end of the first switch circuit 20 is electrically connected to the main control circuit 10, and a second end of the first switch circuit 20 is electrically connected to a power supply end of the main control circuit 10;

[0041] a suppression switch circuit 30, wherein a first end of the suppression switch circuit 30 is electrically connected to the power input terminal, and when the suppression switch circuit 30 is in an on state, a second end of the suppression switch circuit 30 is electrically connected to the power terminal of the main control circuit 10; when the suppression switch circuit 30 is in an off state, a second end of the suppression switch circuit 30 is electrically connected to the detection terminal of the main control circuit 10; when the suppression switch circuit 30 is in an on state, the suppression switch circuit 30 suppresses inrush current input to the power input terminal;

[0042] Among them, the first switch circuit 20 and the suppression switch circuit 30 are arranged in parallel between the power input end and the power end of the main control circuit 10; the main control circuit 10 is used to control the first switch circuit 20 to be closed when the suppression switch circuit 30 is in the on state.

[0043] In this embodiment, the main control circuit 10 can be implemented using an FPGA (Field Programmable Gate Array), a PLC (Programmable Logic Controller), an MCU (Microcontroller Unit), a DSP (Digital Signal Processor), a SOC (System on Chip), etc. The main control circuit 10 includes a corresponding power supply terminal, a detection terminal, and a control signal output terminal.

[0044] In this embodiment, the first switch circuit 20 can be implemented using at least one switch transistor, such as a MOS transistor, an IGBT transistor, a thyristor, a triode, a power transistor, etc., and / or at least one switching device, such as a contactor, a circuit breaker, and a relay. The first end of the first switch circuit 20 is electrically connected to the power input terminal, the second end of the first switch circuit 20 is electrically connected to the power terminal of the main control circuit 10, and the second end of the first switch circuit 20 is electrically connected to the control terminal of the main control circuit 10. It is understood that the first switch circuit 20 is arranged in series with the main power supply circuit between the power input terminal and the power terminal of the main control circuit 10. Therefore, the first switch circuit 20 can be closed or opened by receiving a corresponding first switch control signal output by the main control circuit 10, thereby enabling the power input terminal to supply power to the main control circuit 10 through the main power supply circuit. The resistance in the main power supply circuit is close to zero, which also allows the power input from the power input terminal to effectively power the main control circuit 10 without excessive power loss due to resistance in the power supply circuit. Optionally, the first switch circuit 20 includes a relay, a first end of the relay being electrically connected to the power input terminal, a second end of the relay being electrically connected to the power terminal of the main control circuit 10, and a controlled end of the relay being electrically connected to the control terminal of the main control circuit 10; wherein the relay is configured to close or open upon receiving a first switch control signal output by the main control circuit 10. The relay can provide good electrical isolation between the control circuit and the main control circuit 10, which means that the voltage of the main control circuit 10 can be much lower than the voltage of the power input terminal, thereby protecting the main control circuit 10 from the effects of high voltage. In addition, the relay can achieve stable and rapid control through low-power signals, which also enables the main control circuit 10 to effectively control the first switch circuit 20.

[0045] In this embodiment, the suppression switch circuit 30 can be implemented using a corresponding switch circuit and an inrush current suppression circuit 32. Optionally, the power switch control circuit includes: a second switch circuit 31, a first end of the first switch circuit 20 electrically connected to the power input terminal; an inrush current suppression circuit 32, a second end of the inrush current suppression circuit 32 electrically connected to the main control circuit 10; the inrush current suppression circuit 32 is configured to suppress inrush current when current is input to the power input terminal; wherein, when the second switch circuit 31 is triggered, the second end of the second switch circuit 31 is electrically connected to the inrush current suppression circuit 32; when the second switch circuit 31 is not triggered, the second end of the second switch circuit 31 is electrically connected to the detection terminal of the main control circuit 10; and, when the second switch circuit 31 is triggered, the second end of the second switch circuit 31 is electrically connected to the detection terminal of the main control circuit 10; and, wherein the main control circuit 10 is configured to receive a corresponding detection signal and output a corresponding first switch control signal to the first switch circuit 20 to close or open the first switch circuit 20. The second switch circuit 31 used in the suppression circuit can be implemented using at least one of a self-resetting switch circuit or a time-delay switch circuit. The inrush current suppression circuit 32 can be implemented using a thermistor whose resistance changes with temperature, specifically an NTC resistor whose resistance decreases as temperature increases. It is understood that the suppression switch circuit 30 is arranged in parallel with the first switch circuit 20 at the power input and the power supply of the main control circuit 10, and the first switch circuit 20 is arranged in series on the main power supply circuit between the power input and the power supply of the main control circuit 10. Therefore, the suppression switch circuit 30 is arranged in series on the bypass power supply circuit between the power input and the power supply of the main control circuit 10. When a user needs to activate the control device, the suppression switch circuit 30 is triggered, thereby closing the suppression switch circuit 30 and electrically connecting the second end of the suppression switch circuit 30 to the power supply of the main control circuit 10, thereby providing power to the main control circuit 10. However, at the moment the power input is connected to the main control circuit 10, an inrush current will flow into the current inputted by the power input, which may damage the main control circuit 10. Therefore, in this embodiment, the inrush current suppression circuit 32 provided in the suppression switch circuit 30 suppresses the corresponding input current to prevent damage to the main control circuit 10. It will be understood that when the second end of the suppression switch circuit 30 is electrically connected to the power supply terminal of the main control circuit 10, the second end of the suppression switch circuit 30 is disconnected from the detection terminal of the main control circuit 10. At this point, the main control circuit 10 will not receive the corresponding high-level signal and will therefore output the first switch control signal to the first switch circuit 20, thereby closing the first switch circuit 20. At this point, both the main power supply circuit and the bypass power supply circuit are in an on state.However, an inrush current suppression circuit 32 is provided on the bypass power supply circuit, so there is a large resistance on the bypass power supply circuit, which causes the current input from the power input end to power the main control circuit 10 through the main power supply circuit. Furthermore, the suppression switch circuit 30 adopts at least one of a self-resetting switch circuit or a time-delay switch circuit. Therefore, the suppression switch circuit 30 will disconnect the bypass power supply circuit after the first switch circuit 20 is closed. At this time, the detection end of the main control circuit 10 will detect the high-level signal input through the suppression switch circuit 30 again. When the detection end of the main control circuit 10 fails to detect the input high-level signal again, the main control circuit 10 will output the corresponding first switch control signal to the first switch circuit 20, so that the first switch circuit 20 disconnects the main power supply circuit. Thereafter, the suppression switch circuit 30 will disconnect the bypass power supply circuit so that the power input end stops supplying power to the control device.

[0046] The present application utilizes a power switch control circuit to effectively improve the safety of power supply to a control device. The power switch control circuit includes a main control circuit 10, a first switch circuit 20, and a suppression switch circuit 30. The first switch circuit 20 and the suppression switch circuit 30 are connected in parallel, with their first ends electrically connected to the power input terminal, thereby forming a main power supply circuit connected by the first switch circuit 20 and a bypass power supply circuit connected by the suppression switch circuit 30. It is understood that when power supply to the main control circuit 10 is not confirmed, the first switch circuit 20 is in an off state, and the suppression switch circuit 30 is also in an off state. At this point, the suppression switch circuit 30 is electrically connected to the detection terminal of the main control circuit 10. The main control circuit 10 receives a high-level signal output by the suppression switch circuit 30, thereby confirming that the suppression switch circuit 30 has not been triggered. When the suppression switch circuit 30 is triggered, the suppression switch circuit 30 is in an on state, thereby interrupting the high-level signal received by the main control circuit 10. When the main control circuit 10 does not receive a corresponding high-level signal, it controls the first switch circuit 20 to close, thereby conducting the main power supply circuit between the power input terminal and the power supply terminal of the main control circuit 10. By suppressing the inrush current input to the power input terminal through the bypass power supply circuit, the power supply safety of the control device is effectively improved, and the power consumption in the suppression switch circuit 30 is also reduced.

[0047] In one embodiment of the present invention, the inrush current suppression circuit 32 includes a negative temperature coefficient thermistor.

[0048] As you can understand, the principle behind NTC thermistors' effectiveness in suppressing inrush current relies primarily on their negative temperature coefficient (NTC) characteristics. When a device starts up, it typically experiences a momentary high current, known as an inrush current. This current can damage components within the circuit. NTC thermistors help suppress this inrush current through the following mechanisms. First, there's the initial (cold) high resistance: When a device is first powered on and the power is first applied, the NTC thermistor is at ambient temperature and has a high resistance. This high resistance effectively limits the initial current flowing through the circuit, thereby reducing the impact of inrush current. Second, there's the heating-induced resistance drop: As current flows through the NTC thermistor, it begins to heat up, and its rising temperature causes its resistance to drop rapidly. This is because the NTC thermistor's negative temperature coefficient (NTC) characteristic means that its resistance decreases as temperature increases. Once it reaches a stable operating temperature, its resistance drops to a relatively low level, allowing normal operating current to flow smoothly while minimizing energy loss. Finally, continuous protection: During normal operation, since the negative temperature coefficient thermistor maintains a low resistance state, it does not significantly affect the performance of the circuit. However, this process is repeated every time the power is cycled (turned off and then on again), providing continuous protection against inrush current. It should be noted that in order to effectively use the negative temperature coefficient thermistor for inrush current suppression, it is necessary to ensure that the device has sufficient cooling time so that the negative temperature coefficient can return to its initial high resistance state, especially in applications with frequent switching. If the device does not have sufficient time to cool, the negative temperature coefficient thermistor may not provide the expected surge protection effect. Therefore, in this embodiment, by setting a corresponding delay control for the main control circuit 10, the first switch circuit 20 is enabled to achieve delayed closing and delayed opening, that is, there is a delay in both powering on and off the main control circuit 10, thereby allowing the negative temperature coefficient thermistor to cool down accordingly. In addition, the technical solution of the present application provides a main power supply circuit connected in parallel with the negative temperature coefficient thermistor, so that the power-on time of the bypass power supply circuit where the negative temperature coefficient thermistor is located is shorter, which also provides a corresponding cooling time for the negative temperature coefficient thermistor.

[0049] refer to Figure 3 In one embodiment of the present invention, the power switch control circuit further includes a prompt circuit 40, and the controlled end of the prompt circuit 40 is electrically connected to the main control circuit 10; the prompt circuit 40 is used to output a corresponding prompt signal when receiving a corresponding prompt control signal output by the main control circuit 10.

[0050] In this embodiment, the prompt circuit 40 can be implemented using an LED prompt circuit 40, a voice prompt circuit 40, or the like. The controlled end of the prompt circuit 40 is electrically connected via the main control circuit 10, thereby receiving a corresponding prompt control signal output by the main control circuit 10 and outputting a corresponding prompt signal. It is understood that when the switch suppression circuit utilizes a self-reset switch circuit, the user is required to release a trigger button to disconnect the bypass power supply circuit. In this case, the user needs to confirm the status of the first switch circuit 20 using a corresponding prompt signal. Specifically, when the main control circuit 10 fails to detect a high-level signal output by the suppression switch circuit 30 for the first time, it outputs a first switch control signal to the first switch circuit 20 to close the first switch circuit 20, and further outputs a prompt control signal to the prompt circuit 40 to cause the prompt circuit 40 to output a corresponding prompt signal. This prompt signal allows the user to confirm that the first switch circuit 20 can be closed, and then releases the button of the self-reset switch circuit in the suppression switch circuit 30, causing the suppression switch circuit 30 to disconnect the bypass power supply circuit.

[0051] In one embodiment of the present invention, the power switch control circuit further includes a current detection circuit, wherein an input end of the current detection circuit is electrically connected to a power supply end of the main control circuit 10, and an output end of the current detection circuit is electrically connected to the main control circuit 10; the current detection circuit is configured to detect the current at the power supply end of the main control circuit 10 and output a corresponding current detection signal;

[0052] The main control circuit 10 is further configured to determine the working state of the relay according to the current detection signal, and output a corresponding prompt control signal to the prompt circuit 40 .

[0053] In this embodiment, the current detection circuit can be implemented by a shunt resistor circuit, a Hall detection circuit, etc. Among them, the main control circuit 10 can detect the current input to the power supply end of the main control circuit 10 through the current detection circuit, thereby determining the conduction state of the main power supply circuit and the bypass power supply circuit. It can be understood that the current on the bypass power supply circuit fluctuates within a certain period of time, while the current on the main power supply circuit is basically stable. Therefore, the main control circuit 10 detects the current on the power supply end of the main control circuit 10 through the current detection circuit, thereby confirming the working state of the first switch circuit 20, and then outputting the corresponding prompt control signal to the prompt circuit 40, so that the prompt circuit 40 outputs the corresponding prompt signal.

[0054] refer to Figure 4In one embodiment of the present invention, the power switch control circuit further includes a voltage conversion circuit 50, a first end of the voltage conversion circuit 50 being electrically connected to the power input end, and a second end of the voltage conversion circuit 50 being electrically connected to the first end of the first switch circuit 20 and the first end of the suppression switch circuit 30; the voltage conversion circuit 50 is configured to convert the first voltage input from the power input end into a second voltage and output the converted voltage.

[0055] In this embodiment, the voltage input to the power input terminal does not directly meet the power supply voltage required by the main control circuit 10. Therefore, a corresponding voltage conversion circuit 50 is also provided in the current switch control circuit to convert the first voltage input to the power supply input terminal into the power supply voltage required by the main control circuit 10, i.e., the second voltage. Optionally, the voltage conversion circuit 50 includes a step-down circuit, wherein a first end of the step-down circuit is electrically connected to the power input terminal, and a second end of the step-down circuit is electrically connected to the first end of the first switch circuit 20 and the first end of the suppression switch circuit 30; the step-down circuit is used to step down the first voltage input to the power input terminal to a second voltage and output it; wherein the second voltage is less than the first voltage. In this embodiment, the first voltage input to the power input terminal is greater than the power supply voltage required by the main control circuit 10. Therefore, the voltage conversion circuit 50 uses a step-down circuit to achieve voltage reduction for power supply.

[0056] The present invention further provides a control device, characterized in that the control device includes a power input terminal and any of the above-described power switch control circuits. It is worth noting that because the control device of the present invention is based on the above-described power switch control circuit, embodiments of the control device of the present invention include all technical solutions of all embodiments of the above-described power switch control circuit, and the technical effects achieved are identical, and therefore will not be further elaborated here.

[0057] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made by using the contents of the present invention description and drawings under the inventive concept of the present invention, or direct / indirect application in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A power switch control circuit, characterized in that: The power switch control circuit includes: Main control circuit; a first switch circuit, wherein a first end of the first switch circuit is electrically connected to a power input end, a controlled end of the first switch circuit is electrically connected to the main control circuit, and a second end of the first switch circuit is electrically connected to a power supply end of the main control circuit; a suppression switch circuit, wherein a first end of the suppression switch circuit is electrically connected to the power input terminal, and when the suppression switch circuit is in an on state, a second end of the suppression switch circuit is electrically connected to the power terminal of the main control circuit; when the suppression switch circuit is in an off state, the second end of the suppression switch circuit is electrically connected to the detection terminal of the main control circuit; when the suppression switch circuit is in an on state, the suppression switch circuit suppresses an inrush current input to the power input terminal; The first switch circuit and the suppression switch circuit are arranged in parallel between the power input terminal and the power terminal of the main control circuit; the main control circuit is used to control the first switch circuit to be closed when the suppression switch circuit is in the on state.

2. The power switch control circuit according to claim 1, wherein: The first switch circuit includes a relay, a first end of the relay is electrically connected to the power input end, a second end of the relay is electrically connected to the power end of the main control circuit, and a controlled end of the relay is electrically connected to the control end of the main control circuit; The relay is configured to close or open upon receiving a first switch control signal output by the main control circuit.

3. The power switch control circuit according to claim 1, wherein: The power switch control circuit includes: a second switch circuit, wherein a first end of the first switch circuit is electrically connected to the power input end; an inrush current suppression circuit, wherein a second end of the inrush current suppression circuit is electrically connected to the main control circuit; the inrush current suppression circuit is used to suppress inrush current when current is input to the power input end; Wherein, when the second switch circuit is triggered, the second end of the second switch circuit is electrically connected to the inrush current suppression circuit; when the second switch circuit is not triggered, the second end of the second switch circuit is electrically connected to the detection end of the main control circuit; Furthermore, the main control circuit is used to receive a corresponding detection signal when the second switch circuit is triggered, and output a corresponding first switch control signal to the first switch circuit to close or open the first switch circuit.

4. The power switch control circuit according to claim 3, wherein: The second switch circuit includes at least one of a self-resetting switch circuit or a time-delay switch circuit.

5. The power switch control circuit according to claim 3, wherein: The inrush current suppression circuit includes a negative temperature coefficient thermistor.

6. The power switch control circuit according to claim 1, wherein: The power switch control circuit further includes a prompt circuit, a controlled end of which is electrically connected to the main control circuit; the prompt circuit is configured to output a corresponding prompt signal upon receiving a corresponding prompt control signal output by the main control circuit.

7. The power switch control circuit according to claim 6, wherein: The power switch control circuit further includes a current detection circuit, wherein an input end of the current detection circuit is electrically connected to the power supply end of the main control circuit, and an output end of the current detection circuit is electrically connected to the main control circuit; the current detection circuit is used to detect the current at the power supply end of the main control circuit and output a corresponding current detection signal; The main control circuit is further configured to confirm the working state of the relay according to the current detection signal, and output a corresponding prompt control signal to the prompt circuit.

8. The power switch control circuit according to claim 1, wherein: The power switch control circuit also includes a voltage conversion circuit, a first end of the voltage conversion circuit is electrically connected to the power input end, and a second end of the voltage conversion circuit is electrically connected to the first end of the first switch circuit and the first end of the suppression switch circuit; the voltage conversion circuit is used to convert the first voltage input from the power input end into a second voltage and output it.

9. The power switch control circuit according to claim 8, wherein: The voltage conversion circuit includes a step-down circuit, a first end of the step-down circuit being electrically connected to the power input terminal, and a second end of the step-down circuit being electrically connected to the first end of the first switch circuit and the first end of the suppression switch circuit; the step-down circuit is configured to step down a first voltage input from the power input terminal to a second voltage and output the second voltage; The second voltage is lower than the first voltage.

10. A control device, characterized in that: The control device comprises a power input terminal and a power switch control circuit according to any one of claims 1 to 9.

Images