Light emitting diode epitaxial wafer and method of manufacturing the same

Abstract

The application discloses a light emitting diode epitaxial wafer and a preparation method thereof, and relates to the technical field of semiconductors. The light emitting diode epitaxial wafer comprises a substrate, a buffer layer, a non-doped GaN layer, an N-type GaN layer, an electron passing layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially stacked on the substrate; the electron passing layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer is a Si3N4 layer, the second sub-layer comprises periodically and alternately stacked AlGaN layers, first InGaN layers and first GaN layers, the third sub-layer comprises periodically and alternately stacked second GaN layers and second InGaN layers, and the fourth sub-layer comprises periodically and alternately stacked AlInGaN layers, third InGaN layers and third GaN layers. By implementing the application, electron overflow caused by too many electrons entering the multi-quantum well layer can be avoided while electron spreading is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a light emitting diode epitaxial wafer and a preparation method thereof. BACKGROUND

[0002] III-V nitride materials represented by GaN have been widely researched, developed and applied in the past decade. GaN-based high-efficiency light emitting diodes have been widely applied in lighting, large-screen display, traffic signal, multimedia display and optical communication fields due to their long service life, energy saving, green environmental protection and other remarkable characteristics. However, the light emitting efficiency of GaN-based light emitting diodes is affected by many factors, resulting in low light emitting efficiency, which seriously restricts the commercial application of GaN-based light emitting diodes as high-brightness and high-power devices in the lighting field. P-type doping of GaN material is relatively difficult, and the P-type doping concentration is much lower than the N-type doping concentration. At the same time, the effective mass of a hole is much larger than the effective mass of an electron, resulting in a much smaller hole mobility than electron mobility. These two factors make the injection rate of holes into the multi-quantum well region much smaller than the injection rate of electrons, causing the mismatch of electron and hole injection, and ultimately affecting the light emitting efficiency of the light emitting diode. SUMMARY

[0003] The technical problem to be solved by the present application is to provide a light emitting diode epitaxial wafer and a preparation method thereof, which can improve the electron spreading while avoiding excessive electrons from entering the multi-quantum well layer to cause electron overflow.

[0004] In order to solve the above problems, the present application discloses a light emitting diode epitaxial wafer, comprising a substrate, and a buffer layer, a non-doped GaN layer, an N-type GaN layer, an electron through layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially stacked on the substrate.

[0005] The electron through layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer is a Si3N4 layer, the second sub-layer comprises periodically and alternately stacked AlGaN layers, first InGaN layers and first GaN layers, the third sub-layer comprises periodically and alternately stacked second GaN layers and second InGaN layers, and the fourth sub-layer comprises periodically and alternately stacked AlInGaN layers, third InGaN layers and third GaN layers.

[0006] As an improvement of the above technical solution, the thickness of the Si3N4 layer is 1nm-10nm.

[0007] As the improvement of the above technical scheme, the period number of the second sub-layer is 3-8; the AlGaN layer is Ga-polar AlGaN layer, the Al component ratio is 0.01-0.2, and the thickness is 1-10 nm; the In component ratio of the first InGaN layer is 0.01-0.1, and the thickness is 1-10 nm; the first GaN layer is Si-doped GaN layer, the Si doping concentration is 1*10 18 cm -3 ~1*10 19 cm -3 , and the thickness is 5-20 nm.

[0008] As the improvement of the above technical scheme, with the increase of the period number of the alternating layer, the Al component ratio of the AlGaN layer is increased, and the Si doping concentration of the first GaN layer is increased.

[0009] As the improvement of the above technical scheme, the period number of the third sub-layer is 5-20; the second GaN layer is N-polar and Si-doped GaN layer, the Si doping concentration is 1*10 19 cm -3 ~1*10 21 cm -3 , and the thickness is 5-10 nm; the In component ratio of the second InGaN layer is 0.01-0.1, and the thickness is 1-10 nm.

[0010] As the improvement of the above technical scheme, the period number of the fourth sub-layer is 5-20; the AlInGaN layer is Ga-polar AlInGaN layer, the Al component ratio is 0.01-0.2, the In component ratio is 0.01-0.1, and the thickness is 1-10 nm; the In component ratio of the third InGaN layer is 0.01-0.1, and the thickness is 1-10 nm; the third GaN layer is Si-doped GaN layer, the Si doping concentration is 1*10 18 cm -3 ~1*10 19 cm -3 , and the thickness is 5-20 nm.

[0011] As the improvement of the above technical scheme, with the increase of the period number of the alternating layer, the Al component ratio of the AlInGaN layer is decreased, the In component ratio of the AlInGaN layer is increased, and the Si doping concentration of the third GaN layer is decreased.

[0012] Correspondingly, the application also discloses a preparation method of the above light emitting diode epitaxial wafer, comprising the following steps:

[0013] A substrate is provided, and a buffer layer, a non-doped GaN layer, an N-type GaN layer, an electron tunneling layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially grown on the substrate;

[0014] The electron tunneling layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer is a Si3N4 layer, the second sub-layer comprises periodically and alternately stacked AlGaN layers, first InGaN layers and first GaN layers, the third sub-layer comprises periodically and alternately stacked second GaN layers and second InGaN layers, and the fourth sub-layer comprises periodically and alternately stacked AlInGaN layers, third InGaN layers and third GaN layers.

[0015] As an improvement of the above technical solution, the growth temperature of the second sub-layer is 800-900 DEG C, the growth pressure is 50-500 torr, and the growth atmosphere is H2;

[0016] The growth temperature of the third sub-layer is 800-900 DEG C, the growth pressure is 50-500 torr, and the growth atmosphere is N2;

[0017] The growth temperature of the fourth sub-layer is 800-900 DEG C, the growth pressure is 50-500 torr, and the growth atmosphere is H2.

[0018] As an improvement of the above technical solution, after the growth of the first InGaN layer and the third InGaN layer is completed, a mixed gas is introduced for treatment, the mixed gas comprises N2, H2 and NH3, the volume ratio is 1:1:1-1:20:10, and the introduction time is 5-15 s.

[0019] The present application has the following beneficial effects:

[0020] The light emitting diode epitaxial wafer provided by the present application comprises an electron tunneling layer arranged between an N-type GaN layer and a multi-quantum well layer, the electron tunneling layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer is a Si3N4 layer, the bottom layer defect extension direction can be changed, so that the aggregation occurs and is annihilated, and the dislocation quantity is reduced. The second sub-layer, the third sub-layer and the fourth sub-layer are all superlattice structures, the dislocation at the interface can be continuously annihilated, the materials such as AlGaN, InGaN and AlInGaN can improve the electron expansion efficiency, meanwhile, too many electrons entering the multi-quantum well layer to cause electron overflow can be avoided, and finally the light emitting efficiency of the light emitting diode is improved. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a structure schematic diagram of the light emitting diode epitaxial wafer provided by the present application;

[0022] Figure 2 is a structural schematic diagram of an electronic dredging layer provided by an embodiment of the present application;

[0023] Figure 3 is a flowchart of a preparation method of a light emitting diode epitaxial wafer provided by an embodiment of the present application. DETAILED DESCRIPTION

[0024] In order to make the objects, technical solutions and advantages of the present application clearer, the present application is further described in detail below.

[0025] As shown in Figure 1 , the present application provides a light emitting diode epitaxial wafer, comprising a substrate 100, and a buffer layer 200, a non-doped GaN layer 300, an N-type GaN layer 400, an electronic dredging layer 500, a multi-quantum well layer 600, an electronic blocking layer 700 and a P-type GaN layer 800 which are sequentially stacked on the substrate 100.

[0026] As shown in Figure 2 , the electronic dredging layer 500 comprises a first sub-layer 510, a second sub-layer 520, a third sub-layer 530 and a fourth sub-layer 540 which are sequentially stacked, the first sub-layer 510 is a Si3N4 layer, the second sub-layer 520 comprises periodically and alternately stacked AlGaN layers 521, first InGaN layers 522 and first GaN layers 523, the third sub-layer 530 comprises periodically and alternately stacked second GaN layers 531 and second InGaN layers 532, and the fourth sub-layer 540 comprises periodically and alternately stacked AlInGaN layers 541, third InGaN layers 542 and third GaN layers 543.

[0027] The light emitting diode epitaxial wafer provided by the present application comprises the electronic dredging layer 500 arranged between the N-type GaN layer 400 and the multi-quantum well layer 600, the electronic dredging layer 500 comprises the first sub-layer 510, the second sub-layer 520, the third sub-layer 530 and the fourth sub-layer 540 which are sequentially stacked, the first sub-layer 510 is a Si3N4 layer, which can change the extension direction of the bottom layer line defects, so that the collection occurs and is annihilated, and the number of dislocations is reduced. The thickness of each layer of the second sub-layer 520, the third sub-layer 530 and the fourth sub-layer 540 is thin, and each layer is a superlattice structure, which can make the dislocations of the interface continuously annihilate, the materials such as AlGaN, InGaN and AlInGaN can improve the electron expansion efficiency, at the same time, too many electrons entering the multi-quantum well layer 600 to cause electron overflow are avoided, and finally the light emitting efficiency of the light emitting diode is improved.

[0028] In an embodiment, the thickness of the Si3N4 layer is 1 nm to 10 nm, for example, 2 nm, 4 nm, 5 nm, 6 nm, 8 nm or 9 nm, but not limited thereto. The Si3N4 layer changes the extension direction of most of the line defects from the underlying layer, so that the aggregation occurs and the dislocation number is reduced.

[0029] In an embodiment, the second sub-layer 520 is alternately stacked for 3 to 8 cycles, for example, 4, 5, 6 or 7. In each growth cycle, the AlGaN layer 521 is a Ga-polar AlGaN layer, the Al component ratio is 0.01 to 0.2, for example, 0.05, 0.08, 0.1, 0.12, 0.16 or 0.18, but not limited thereto, and the thickness of the AlGaN layer 521 is 1 nm to 10 nm, for example, 2 nm, 4 nm, 5 nm, 6 nm, 8 nm or 9 nm, but not limited thereto. The Ga-polar AlGaN layer can reduce the incorporation of oxygen impurities and improve the crystal quality. In each growth cycle, the In component ratio of the first InGaN layer 522 is 0.01 to 0.1, for example, 0.02, 0.03, 0.04, 0.05, 0.06 or 0.08, but not limited thereto, and the thickness of the first InGaN layer 522 is 1 nm to 10 nm, for example, 2 nm, 4 nm, 5 nm, 6 nm, 8 nm or 9 nm, but not limited thereto. In each growth cycle, the first GaN layer 523 is a Si-doped GaN layer, the Si doping concentration is 1×10 18 cm -3 ~1×10 19 cm -3 , for example, 2×10 18 cm -3 , 4×10 18 cm -3 , 5×10 18 cm -3 , 6×10 18 cm -3 , 8×10 18 cm -3 or 9×10 18 cm -3 , but not limited thereto, and the thickness of the first GaN layer 523 is 5 nm to 20 nm, for example, 8 nm, 10 nm, 12 nm, 14 nm, 16 nm or 18 nm, but not limited thereto. The compressive stress introduced by the AlGaN layer in the superlattice structure of the second sub-layer 520 can effectively balance the tensile stress of the GaN layer on the substrate 100, avoid cracks in the epitaxial layer due to thermal stress and the tensile stress of the GaN epitaxial layer on the substrate 100, and further improve the uniformity and crystal quality of the subsequent epitaxial wafer. The small amount of Si doping in the first GaN layer 523 can reduce the resistance and reduce the operating voltage.

[0030] In a preferred embodiment, the Al component ratio of the AlGaN layer 521 is increased with the increase of the number of the alternating layer stacking periods, which can reduce the electron migration speed in stages and reduce electron overflow. With the increase of the number of the alternating layer stacking periods, the Si doping concentration of the first GaN layer 523 is increased, which can make the electron distribution uniform on the surface, reduce the current congestion effect, and improve the electron expansion efficiency.

[0031] In a preferred embodiment, after the growth of the first InGaN layer 522 is completed, a mixed gas is introduced for treatment, the mixed gas includes N2, H2 and NH3, the volume ratio is 1:1:1~1:20:10, and the introduction time is 5s~15s, which can reduce the number of In droplets at the interface, increase the interface crystal quality, and enhance the uniformity of In incorporation.

[0032] In an embodiment, the number of the alternating layer stacking periods of the third sub-layer 530 is 5~20, and is exemplarily 6, 8, 10, 12, 14 or 18, but is not limited thereto. In each growth period, the second GaN layer 531 is an N-polar and Si-doped GaN layer, the Si doping concentration is 1×10 19 cm -3 ~1×10 21 cm -3 , and is exemplarily 2.5×10 19 cm -3 , 5×10 19 cm -3 , 7.5×10 19 cm -3 , 1×10 20 cm -3 , 5×10 20 cm -3 or 7.5×10 20 cm -3 , but is not limited thereto. The thickness of the second GaN layer 531 is 5nm~10nm, and is exemplarily 5.5nm, 6nm, 7nm, 8nm, 9nm or 9.5nm, but is not limited thereto. The N-polarity can increase the incorporation efficiency of In, form a flat and smooth two-dimensional plane as soon as possible, improve the crystal quality of the quantum well, and improve the light emitting efficiency of the light emitting diode. In each growth period, the In component ratio of the second InGaN layer 532 is 0.01~0.1, and is exemplarily 0.02, 0.03, 0.04, 0.05, 0.06 or 0.08, but is not limited thereto. The thickness of the second InGaN layer 532 is 1nm~10nm, and is exemplarily 2nm, 4nm, 5nm, 6nm, 8nm or 9nm, but is not limited thereto.

[0033] In one embodiment, the fourth sublayer 540 is alternately stacked for 5 to 20 cycles, typically 6, 8, 10, 12, 14, or 18, but not limited thereto. In each growth cycle, the AlInGaN layer 541 is a Ga-polar AlInGaN layer, with an Al component ratio of 0.01 to 0.2, typically 0.05, 0.08, 0.1, 0.12, 0.16, or 0.18, but not limited thereto, and an In component ratio of 0.01 to 0.1, typically 0.02, 0.03, 0.04, 0.05, 0.06, or 0.08, but not limited thereto. The thickness of the AlInGaN layer 541 is 1 nm to 10 nm, typically 2 nm, 4 nm, 5 nm, 6 nm, 8 nm, or 9 nm, but not limited thereto. The Ga-polar AlInGaN layer has a downward spontaneous polarization field, which, when superimposed with the piezoelectric polarization field, can further regulate the direction of the energy band bending, prevent excessive electron injection, and reduce the probability of non-radiative recombination in the multi-quantum well layer 600. In each growth cycle, the In component ratio of the third InGaN layer 542 is 0.01~0.1, and is exemplarily 0.02, 0.03, 0.04, 0.05, 0.06 or 0.08, but not limited thereto. The thickness of the third InGaN layer 542 is 1nm~10nm, and is exemplarily 2nm, 4nm, 5nm, 6nm, 8nm or 9nm, but not limited thereto. In each growth cycle, the third GaN layer 543 is a Si-doped GaN layer with a Si doping concentration of 1×10 18 cm -3 ~1×10 19 cm -3 , for example 2×10 18 cm -3 , 4×10 18 cm -3 , 5×10 18 cm -3 , 6×10 18 cm -3 , 8×10 18 cm -3 or 9×10 18 cm -3 , but not limited thereto, the thickness of the third GaN layer 543 is 5 nm to 20 nm, and exemplarily is 8 nm, 10 nm, 12 nm, 14 nm, 16 nm or 18 nm, but not limited thereto.

[0034] In a preferred embodiment, the Al component of the AlInGaN layer 541 decreases and the In component of the AlInGaN layer 541 increases with the increase of the number of the alternating layer stacking periods, which can effectively build a conduction band tilt barrier, significantly reduce electron overflow, and improve device efficiency and reliability. With the increase of the number of the alternating layer stacking periods, the Si doping concentration of the third GaN layer 543 decreases, which improves the electron extension while avoiding excessive electron overflow caused by electron rush into the quantum well.

[0035] In a preferred embodiment, after the growth of the third InGaN layer 542 is completed, a mixed gas including N2, H2 and NH3 with a volume ratio of 1:1:1~1:20:10 is introduced for processing for 5s~15s, which can reduce the number of In droplets at the interface, increase the interface crystal quality, and enhance the uniformity of In incorporation.

[0036] In addition to the electron tunneling layer 500, the features of other layered structures of the present application are as follows:

[0037] The substrate 100 can be one of a sapphire substrate, a SiO2sapphire composite substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate. In an embodiment, the substrate 100 is a sapphire substrate. Sapphire is the most commonly used GaN-based light-emitting diode substrate material at present. The sapphire substrate has the advantages of mature preparation process, low price, easy cleaning and processing, and good stability at high temperature.

[0038] The buffer layer 200 can be one or more of an AlN buffer layer, a GaN buffer layer, and an AlGaN buffer layer. In an embodiment, the buffer layer 200 is an AlN buffer layer with a thickness of 10nm~50nm. The AlN buffer layer provides the same orientation as the nucleation center of the substrate 100, releases the stress generated by the lattice mismatch between GaN and the substrate 100 and the thermal stress generated by the mismatch of the thermal expansion coefficient, provides a flat nucleation surface for further growth, reduces the contact angle of nucleation and growth, and enables the island-shaped GaN grains to be connected into a plane in a smaller thickness, thereby changing to two-dimensional epitaxial growth.

[0039] The thickness of the undoped GaN layer 300 is 1μm~5μm. With the increase of the thickness of the undoped GaN layer 300, the compressive stress is released through the stacking fault, the linear defect is reduced, the crystal quality is improved, and the reverse leakage is reduced. However, increasing the thickness of the undoped GaN layer 300 greatly increases the consumption of Ga source material, greatly increasing the epitaxial cost of the LED. Therefore, preferably, the thickness of the undoped GaN layer 300 is 2μm~3μm, which not only saves production cost, but also has good crystal quality of the undoped GaN layer 300.

[0040] The N-type GaN layer 400 is a Si-doped GaN layer, and the Si doping concentration is 1*10 19 cm -3 ~5*10 19 cm -3 , and the thickness is 2-3 μm. The N-type GaN layer 400 provides sufficient electrons for light emission of the light-emitting diode, and the resistivity of the N-type GaN layer 400 is higher than that of the transparent electrode on the P-type GaN layer 800. Therefore, sufficient Si doping can effectively reduce the resistivity of the N-type GaN layer 400, and in addition, the N-type GaN layer 400 with sufficient thickness can effectively release stress and improve the light-emitting efficiency of the light-emitting diode.

[0041] The multi-quantum well layer 600 includes periodically and alternately stacked InGaN quantum well layers and AlGaN quantum barrier layers, and the growth period is 6-12. In each period, the thickness of the InGaN quantum well layer is 2-5 nm, the Al component ratio of the AlGaN quantum barrier layer is 0.01-0.1, and the thickness is 5-15 nm. The multi-quantum well layer 600 is a region for electron and hole recombination, and reasonable structure design can significantly increase the degree of wave function overlap of electrons and holes, thereby improving the light-emitting efficiency of the light-emitting diode device.

[0042] The electron blocking layer 700 can be an AlInGaN electron blocking layer, and the Al component ratio is 0.01-0.1, the In component ratio is 0.01-0.2, and the thickness is 10-40 nm.

[0043] The P-type GaN layer 800 is a Mg-doped GaN layer, and the Mg doping concentration is 1*10 19 cm -3 ~1*10 21 cm -3 , and the thickness is 10-50 nm.

[0044] Correspondingly, as shown in Figure 3 , the application also discloses a preparation method of the above-mentioned light-emitting diode epitaxial wafer, comprising the following steps:

[0045] S1, providing a substrate.

[0046] In an embodiment, the substrate is a sapphire substrate.

[0047] S2, sequentially growing a buffer layer, an undoped GaN layer, an N-type GaN layer, an electron tunneling layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate. It can be understood that each layer structure can be grown by MOCVD, MBE, PVD or VPE, but is not limited thereto. Specifically, S2 comprises the following steps:

[0048] S21, growing a buffer layer.

[0049] The AlN buffer layer is grown by PVD. In one embodiment, the sapphire substrate with the AlN buffer layer is transferred into a MOCVD chamber, and pre-treated in H2 atmosphere for 1-10 min at 1000-1200℃, so as to improve the crystal quality of the AlN buffer layer and the crystal quality of the subsequently deposited GaN epitaxial layer.

[0050] S22, growing an undoped GaN layer.

[0051] The undoped GaN layer is grown by MOCVD, with the temperature of the reaction chamber controlled at 1050-1200℃, the pressure controlled at 100-600 torr, and N source and Ga source introduced.

[0052] S23, growing an N-type GaN layer.

[0053] The N-type GaN layer is grown by MOCVD, with the temperature of the reaction chamber controlled at 1050-1200℃, the pressure controlled at 100-600 torr, and N source, Ga source and N-type doping source introduced.

[0054] S24, growing an electron tunneling layer.

[0055] The electron tunneling layer is grown by MOCVD and / or PECVD, and sequentially grown with a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer. Specifically, S24 comprises the following steps:

[0056] S241, growing a first sub-layer.

[0057] The first sub-layer is grown by PECVD, with the temperature of the reaction chamber controlled at 200-400℃, the pressure controlled at 0.5-5 torr, and radio frequency or microwave excitation, with silane (SiH4) or silicon tetrafluoride (SiF4) introduced as Si source, and ammonia (NH3) or nitrogen (N2) introduced as N source.

[0058] S242, growing a second sub-layer.

[0059] The second sub-layer is grown by MOCVD, with the temperature of the reaction chamber controlled at 800-900℃, the pressure controlled at 50-500 torr, and H2 as the growth atmosphere, with N source, Ga source and Al source introduced to grow an AlGaN layer, with N source, Ga source and In source introduced to grow a first InGaN layer, with N source and Ga source introduced to grow a first GaN layer, and the AlGaN layer, the first InGaN layer and the first GaN layer repeatedly grown in a periodic manner.

[0060] In a preferred embodiment, the N source, Ga source and N-type doping source are introduced to grow the first GaN layer.

[0061] In a preferred embodiment, after the growth of the first InGaN layer is completed, a mixed gas is introduced for treatment, the mixed gas comprising N2, H2 and NH3 in a volume ratio of 1:1:1 to 1:20:10, and the introduction time is 5s to 15s.

[0062] S243, growing a third sub-layer.

[0063] The third sub-layer is grown by MOCVD, the temperature of the reaction chamber is controlled to be 800-900℃, the pressure is controlled to be 50-500torr, the growth atmosphere is N2, the N source and Ga source are introduced to grow the second GaN layer, the N source, Ga source and In source are introduced to grow the second InGaN layer, and the second GaN layer and the second InGaN layer are repeatedly grown periodically.

[0064] In a preferred embodiment, the N source, Ga source and N-type doping source are introduced to grow the second GaN layer.

[0065] S244, growing a fourth sub-layer.

[0066] The fourth sub-layer is grown by MOCVD, the temperature of the reaction chamber is controlled to be 800-900℃, the pressure is controlled to be 50-500torr, the growth atmosphere is H2, the N source, Ga source, In source and Al source are introduced to grow the AlInGaN layer, the N source, Ga source and In source are introduced to grow the third InGaN layer, the N source and Ga source are introduced to grow the third GaN layer, and the AlInGaN layer, the third InGaN layer and the third GaN layer are repeatedly grown periodically.

[0067] In a preferred embodiment, the N source, Ga source and N-type doping source are introduced to grow the third GaN layer.

[0068] In a preferred embodiment, after the growth of the third InGaN layer is completed, a mixed gas is introduced for treatment, the mixed gas comprising N2, H2 and NH3 in a volume ratio of 1:1:1 to 1:20:10, and the introduction time is 5s to 15s.

[0069] S25, growing a multiple quantum well layer.

[0070] The MOCVD is used to grow the multiple quantum well layer, the temperature of the reaction chamber is controlled to be 790-810 DEG C, the pressure is controlled to be 50-300 torr, the N source, the Ga source and the In source are introduced, the InGaN quantum well layer is grown, the temperature of the reaction chamber is controlled to be 800-900 DEG C, the pressure is controlled to be 50-300 torr, the N source, the Ga source and the Al source are introduced, the AlGaN quantum barrier layer is grown, and the InGaN quantum well layer and the AlGaN quantum barrier layer are repeatedly grown in a periodic manner.

[0071] S26, growing an electron blocking layer.

[0072] The MOCVD is used to grow the electron blocking layer, the temperature of the reaction chamber is controlled to be 900-1000 DEG C, the pressure is controlled to be 100-300 torr, the N source, the Ga source, the Al source and the In source are introduced.

[0073] S27, growing a P-type GaN layer.

[0074] The MOCVD is used to grow the P-type GaN layer, the temperature of the reaction chamber is controlled to be 900-1050 DEG C, the pressure is controlled to be 100-600 torr, the N source, the Ga source and the P-type doping source are introduced.

[0075] In the MOCVD growth process, the N source can be NH3, the Ga source can be TMGa and / or TEGa, the Al source can be TMAl, the In source can be TMIn, the N-type doping source can be SiH4, and the P-type doping source can be CP2Mg, but is not limited thereto.

[0076] The application is further described below with reference to specific embodiments.

[0077] Embodiment 1

[0078] The embodiment provides a light emitting diode epitaxial wafer, which comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, an electron tunneling layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially stacked on the substrate.

[0079] The electron tunneling layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked.

[0080] The first sub-layer is a Si3N4 layer with a thickness of 5 nm.

[0081] The second sub-layer comprises periodically and alternately stacked AlGaN layers, first InGaN layers and first GaN layers, and the number of the alternately stacked periods is 6. In each growth period, the AlGaN layer is a Ga-polar AlGaN layer with an Al composition ratio of 0.1 and a thickness of 5 nm, the first InGaN layer has an In composition ratio of 0.05 and a thickness of 5 nm, and the first GaN layer is a Si-doped GaN layer with a Si doping concentration of 5*10 18 cm -3 and a thickness of 10 nm.

[0082] The third sub-layer comprises periodically and alternately stacked second GaN layers and second InGaN layers, and the number of the alternately stacked periods is 12. In each growth period, the second GaN layer is a N-polar and Si-doped GaN layer with a Si doping concentration of 1*10 20 cm -3 and a thickness of 6 nm, and the second InGaN layer has an In composition ratio of 0.05 and a thickness of 5 nm.

[0083] The fourth sub-layer comprises periodically and alternately stacked AlInGaN layers, third InGaN layers and third GaN layers, and the number of the alternately stacked periods is 12. In each growth period, the AlInGaN layer is a Ga-polar AlInGaN layer with an Al composition ratio of 0.1 and a thickness of 5 nm, the third InGaN layer has an In composition ratio of 0.05 and a thickness of 5 nm, and the third GaN layer is a Si-doped GaN layer with a Si doping concentration of 5*10 18 cm -3 and a thickness of 10 nm.

[0084] A preparation method of a light emitting diode epitaxial wafer, comprising the following steps:

[0085] S1, providing a substrate.

[0086] The substrate is selected from a sapphire substrate.

[0087] S2, sequentially growing a buffer layer, an undoped GaN layer, an N-type GaN layer, an electron tunneling layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate. Specifically, S2 comprises the following steps:

[0088] S21, growing a buffer layer.

[0089] An AlN buffer layer is grown by PVD, and the sapphire substrate on which the AlN buffer layer has been plated is transferred into a MOCVD, and preprocessed in a H2 atmosphere for 5 min, and the processing temperature is 1100 DEG C.

[0090] S22, growing an undoped GaN layer.

[0091] The non-doped GaN layer is grown by MOCVD, the temperature of the reaction chamber is controlled at 1100℃, the pressure is 150torr, and N source and Ga source are introduced.

[0092] S23, growing an N-type GaN layer.

[0093] The N-type GaN layer is grown by MOCVD, the temperature of the reaction chamber is controlled at 1120℃, the pressure is 100torr, N source, Ga source and N-type doping source are introduced.

[0094] S24, growing an electron tunneling layer.

[0095] The first sub-layer, the second sub-layer, the third sub-layer and the fourth sub-layer are sequentially grown. Specifically, S24 includes the following steps:

[0096] S241, growing a first sub-layer.

[0097] The first sub-layer is grown by PECVD, the temperature of the reaction chamber is controlled at 300℃, the pressure is 2torr, radio frequency excitation is used, SiH4 is introduced as Si source, and NH3 is introduced as N source.

[0098] S242, growing a second sub-layer.

[0099] The second sub-layer is grown by MOCVD, the temperature of the reaction chamber is controlled at 850℃, the pressure is 150torr, the growth atmosphere is H2, N source, Ga source and Al source are introduced to grow an AlGaN layer, N source, Ga source and In source are introduced to grow a first InGaN layer, N source, Ga source and N-type doping source are introduced to grow a first GaN layer, and the AlGaN layer, the first InGaN layer and the first GaN layer are repeatedly grown in a periodic manner.

[0100] S243, growing a third sub-layer.

[0101] The third sub-layer is grown by MOCVD, the temperature of the reaction chamber is controlled at 850℃, the pressure is 150torr, the growth atmosphere is N2, N source, Ga source and N-type doping source are introduced to grow a second GaN layer, N source, Ga source and In source are introduced to grow a second InGaN layer, and the second GaN layer and the second InGaN layer are repeatedly grown in a periodic manner.

[0102] S244, growing a fourth sub-layer.

[0103] The fourth sub-layer is grown by MOCVD, the temperature of the reaction chamber is controlled to be 850℃, the pressure is 150torr, the growth atmosphere is H2, the N source, Ga source, In source and Al source are inputted, the AlInGaN layer is grown, the N source, Ga source and In source are inputted, the third InGaN layer is grown, the N source, Ga source and N-type doping source are inputted, the third GaN layer is grown, and the AlInGaN layer, the third InGaN layer and the third GaN layer are repeatedly grown in a periodic manner.

[0104] S25, growing a multi-quantum well layer.

[0105] The multi-quantum well layer is grown by MOCVD, the temperature of the reaction chamber is controlled to be 795℃, the pressure is 200torr, the N source, Ga source and In source are inputted, the InGaN quantum well layer is grown, the temperature of the reaction chamber is controlled to be 855℃, the pressure is 200torr, the N source, Ga source and Al source are inputted, the AlGaN quantum barrier layer is grown, and the InGaN quantum well layer and the AlGaN quantum barrier layer are repeatedly grown in a periodic manner.

[0106] S26, growing an electron blocking layer.

[0107] The electron blocking layer is grown by MOCVD, the temperature of the reaction chamber is controlled to be 965℃, the pressure is 200torr, the N source, Ga source, Al source and In source are inputted.

[0108] S27, growing a P-type GaN layer.

[0109] The P-type GaN layer is grown by MOCVD, the temperature of the reaction chamber is controlled to be 985℃, the pressure is 200torr, the N source, Ga source and P-type doping source are inputted.

[0110] In the MOCVD growth process, the N source is NH3, the Ga source is TMGa, the Al source is TMAl, the In source is TMIn, the N-type doping source is SiH4, and the P-type doping source is CP2Mg.

[0111] Example 2

[0112] The embodiment provides a light-emitting diode epitaxial wafer, which is different from the embodiment 1 in that, with the increase of the number of the alternating layering periods, the Al component proportion of the AlGaN layer is increased from 0.05 to 0.15, the Si doping concentration of the first GaN layer is increased from 1×1018cm-3 to 1×1019cm-3, and the Si doping concentration of the second GaN layer is increased from 1×1018cm-3 to 1×1019cm-3. 18 cm -3 . 19 cm -3 .

[0113] The rest are the same as those in the embodiment 1.

[0114] Example 3

[0115] The embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 2 in that after the first InGaN layer is grown, mixed gas is introduced for treatment, the mixed gas includes N2, H2 and NH3, the volume ratio is 1:1:1, and the introduction time is 10s.

[0116] The rest are the same as those in the embodiment 2.

[0117] Embodiment 4

[0118] The embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 3 in that with the increase of the number of alternating layering cycles, the Al component of the AlInGaN layer decreases from 0.15 to 0.05, the In component of the third InGaN layer increases from 0.02 to 0.08, and the Si doping concentration of the third GaN layer decreases from 1x10 19 cm -3 to 1x10 18 cm -3 .

[0119] The rest are the same as those in the embodiment 3.

[0120] Embodiment 5

[0121] The embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 4 in that after the third InGaN layer is grown, mixed gas is introduced for treatment, the mixed gas includes N2, H2 and NH3, the volume ratio is 1:1:1, and the introduction time is 10s.

[0122] The rest are the same as those in the embodiment 4.

[0123] Comparative Example 1

[0124] The comparative example provides a light emitting diode epitaxial wafer, which is different from the embodiment 1 in that no electron dredging layer is arranged, and correspondingly, the preparation method does not include the preparation of the electron dredging layer.

[0125] The rest are the same as those in the embodiment 1.

[0126] The light emitting diode epitaxial wafers obtained in the embodiment 1 to the embodiment 5 and the comparative example 1 are prepared into 10milx24mil LED chips by using the same chip process condition, 300 LED chips are extracted respectively, and the photoelectric efficiency improvement rate of the embodiment 1 to the embodiment 5 relative to the comparative example 1 is calculated by testing under the current of 120mA / 60mA, and the specific results are as follows.

[0127]

[0128] The above describes the preferred embodiments of the present application, it should be pointed out that, for those skilled in the art, without departing from the principles of the present application, can also make a number of improvements and refinements, these improvements and refinements are also considered to be within the scope of the present application.

Claims

1. A light emitting diode epitaxial wafer, characterized by, The LED structure comprises a substrate, and a buffer layer, a non-doped GaN layer, an N-type GaN layer, an electron tunneling layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially stacked on the substrate; The electron tunneling layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer is a Si3N4 layer, the second sub-layer comprises periodically and alternately stacked AlGaN layers, first InGaN layers and first GaN layers, the third sub-layer comprises periodically and alternately stacked second GaN layers and second InGaN layers, and the fourth sub-layer comprises periodically and alternately stacked AlInGaN layers, third InGaN layers and third GaN layers; The Si3N4 layer has a thickness of 1nm to 10nm; In the second sub-layer, the first GaN layers are Si-doped GaN layers, the Al component proportion of the AlGaN layers increases and the Si doping concentration of the first GaN layers increases with the increase of the number of the alternately stacked periods.

2. The light emitting diode epitaxial wafer of claim 1, wherein, The second sub-layer is alternately stacked for 3-8 periods; the AlGaN layer is a Ga-polar AlGaN layer, the Al component ratio is 0.01-0.2, and the thickness is 1-10 nm; the In component ratio of the first InGaN layer is 0.01-0.1, and the thickness is 1-10 nm; the Si doping concentration of the first GaN layer is 1*10 18 cm -3 ~1*10 19 cm -3 , and the thickness is 5-20 nm.

3. The light emitting diode epitaxial wafer of claim 1, wherein, The number of periods of the third sub-layer alternately stacked is 5-20; the second GaN layer is an N-polar and Si-doped GaN layer, the Si doping concentration is 1x10 19 cm -3 ~1x10 21 cm -3 , and the thickness is 5nm-10nm; the In component ratio of the second InGaN layer is 0.01-0.1, and the thickness is 1nm-10nm.

4. The light emitting diode epitaxial wafer of claim 1, wherein, The number of periods of the fourth sub-layer alternately stacked is 5-20; the AlInGaN layer is a Ga-polar AlInGaN layer, the Al component ratio is 0.01-0.2, the In component ratio is 0.01-0.1, and the thickness is 1-10 nm; the In component ratio of the third InGaN layer is 0.01-0.1, and the thickness is 1-10 nm; the third GaN layer is a Si-doped GaN layer, the Si doping concentration is 1x10 18 cm -3 ~1x10 19 cm -3 , and the thickness is 5-20 nm.

5. The light emitting diode epitaxial wafer of claim 4, wherein, With the increase of the number of the alternately stacked periods, the Al component proportion of the AlInGaN layers decreases, the In component proportion of the AlInGaN layers increases, and the Si doping concentration of the third GaN layers decreases.

6. A method of producing a light emitting diode epitaxial wafer as claimed in any one of claims 1 to 5, characterized in that The method comprises the following steps: A substrate is provided, and a buffer layer, a non-doped GaN layer, an N-type GaN layer, an electron tunneling layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially grown on the substrate; The electron tunneling layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer is a Si3N4 layer, the second sub-layer comprises periodically and alternately stacked AlGaN layers, first InGaN layers and first GaN layers, the third sub-layer comprises periodically and alternately stacked second GaN layers and second InGaN layers, and the fourth sub-layer comprises periodically and alternately stacked AlInGaN layers, third InGaN layers and third GaN layers.

7. The method of claim 6, wherein the epitaxial wafer is a light emitting diode epitaxial wafer. The second sub-layer is grown at a temperature of 800℃ to 900℃, a pressure of 50torr to 500torr and in a H2 atmosphere; The third sub-layer is grown at a temperature of 800℃ to 900℃, a pressure of 50torr to 500torr and in a N2 atmosphere; The fourth sub-layer is grown at a temperature of 800℃ to 900℃, a pressure of 50torr to 500torr and in a H2 atmosphere.

8. The method of claim 7, wherein the epitaxial wafer is a light emitting diode epitaxial wafer. After the first InGaN layers and the third InGaN layers are grown, a mixed gas is introduced for treatment, the mixed gas comprises N2, H2 and NH3, the volume ratio is 1:1:1 to 1:20:10, and the introduction time is 5s to 15s.

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