Power converter

Abstract

The present invention reliably performs soft handover. In a power converter (100), a controller (50) determines that resonant currents respectively passing through two or more switches (8) belonging to a plurality of switches (8) will simultaneously flow through a resonant inductor (L1). A first operation and a second operation are performed on the assumption that one of the two switches (8) corresponding one-to-one to the two AC terminals (41) through which the load current of the same polarity flows is a first switch and the other of the two switches (8) is a second switch. The first operation includes shortening a high-level period of a control signal for the first switch by a shortening period. The second operation includes shifting a high-level period of a control signal for the first switch or the second switch, after a current value of a resonance current passing through the second switch has become equal to an extreme value, a standby period has elapsed from a point in time at which the current value of the resonance current passing through the second switch and a current value of a load current passing through an AC terminal (41) corresponding to the second switch coincide with each other. The high level of the control signal for the first switch starts at a time segment.

Description

Technical Field

[0001] The present disclosure relates generally to power converters. More particularly, the present disclosure relates to power converters having the capability of converting DC power into AC power. Background Art

[0002] Patent Document 1 discloses a power converter for converting DC power into multi-phase AC power.

[0003] The power converter of patent document 1 includes a main switching component (power conversion circuit), two capacitors, a coil (resonant inductor), a plurality of auxiliary switching elements and a control component. The main switching component includes a plurality of main switching circuits provided for each phase of the multi-phase AC power. Each of the plurality of main switching circuits is implemented as a pair of main switching elements connected in series between two terminals of a DC power supply, and the interconnection node of the pair of main switching elements is used as the output node of its associated phase. The two capacitors divide the voltage of the DC power supply. One end of the coil is connected to the voltage dividing node of the two capacitors. The plurality of auxiliary switching elements connects the other end of the coil to the output node of each phase. When it is determined that multiple phase currents will flow through the coil, the control component controls the plurality of auxiliary switching elements so that the amount of current flowing through at least one phase is less than a preset amount.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2010-233306 Summary of the Invention

[0007] In the power converter of Patent Document 1, when the control component determines that multiple phase currents will flow through the coil, it controls multiple auxiliary switching elements so that the current flowing through at least one phase is less than a preset amount, so the control component does not perform soft switching of the main switch corresponding to the at least one phase.

[0008] An object of the present disclosure is to provide a power converter having the capability of soft switching more reliably.

[0009] According to one aspect of the present disclosure, a power converter includes first and second DC terminals, a power conversion circuit, multiple AC terminals, multiple switches, multiple resonant capacitors, a resonant inductor, a regenerative capacitor, and a controller. The power conversion circuit includes multiple first switching elements and multiple second switching elements. In the power conversion circuit, the multiple switching circuits are connected in parallel with each other, and in each of the multiple switching circuits, one of the multiple first switching elements and a corresponding second switching element of the multiple second switching elements are connected in series on a one-to-one basis. In the power conversion circuit, the multiple first switching elements are connected to the first DC terminal, and the multiple second switching elements are connected to the second DC terminal. The multiple AC terminals are provided one-to-one for each of the multiple switching circuits. Each of the multiple AC terminals is connected to a connection node between a first switching element and a second switching element of a corresponding switching circuit of the multiple switching circuits. The multiple switches are provided one-to-one for each of the multiple switching circuits. A first end of each of the multiple switches is connected to a connection node between the first switching element and the second switching element of the corresponding switching circuit of the multiple switching circuits. A second end of each of the multiple switches is commonly connected to a common connection node. The multiple resonant capacitors are provided one-to-one for each of the multiple switches. Each of the plurality of resonant capacitors is connected between the second DC terminal and the first end of a corresponding switch among the plurality of switches. The resonant inductor has a first end and a second end, and in the resonant inductor, the first end of the resonant inductor is connected to the common connection node. The regenerative capacitor has a third end and a fourth end. In the regenerative capacitor, the third end of the regenerative capacitor is connected to the first DC terminal or the second DC terminal. The controller applies a control signal having a potential alternating between a high level and a low level to each of the plurality of first switching elements, the plurality of second switching elements, and the plurality of switches. The controller sets a dead band period between a high level period of the control signal for the first switching element and a high level period of the control signal for the second switching element for each of the plurality of switching circuits, and sets a high level period of the control signal for each of the plurality of switches based on the dead band period for the corresponding switching circuit. Each of the plurality of AC terminals enables a load current to flow through the first switching element or the second switching element of the corresponding switching circuit.When determining that resonant currents flowing simultaneously through two or more switches belonging to the plurality of switches will flow through the resonant inductor, the controller performs a first operation and further performs a second operation, assuming that the two or more switches include two switches corresponding one-to-one to two AC terminals belonging to the plurality of AC terminals through which load currents of the same polarity flow, and that one of the two switches is a first switch and the other is a second switch. The first operation includes shortening a high-level period of a control signal for the first switch by a shortened period from a period including a resonant half-cycle and an additional time. The resonant half-cycle is determined by the capacitance of a resonant capacitor corresponding to the first switch among the plurality of resonant capacitors and the inductance of the resonant inductor. The additional time is determined by the voltage of the regenerative capacitor, the inductance of the resonant inductor, and the load current value. The second operation includes shifting a high-level period of a control signal for at least one of the first and second switches so that the high-level period of the control signal for the first switch starts when a standby period has elapsed since a point in time when the current value of the resonant current passing through the second switch coincides with a current value of a load current flowing through an AC terminal corresponding to the second switch and belonging to two or more AC terminals, after a current value of a resonant current passing through the second switch has become equal to an extreme value.

[0010] The power converter according to the present disclosure achieves the advantage of enabling soft switching to be performed more reliably. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a circuit diagram of a system including a power converter according to a first embodiment;

[0012] Figure 2 illustrates how the power converter operates under the condition that its controller has performed basic operations when the load current is >0 and its resonant capacitor undergoes a charging operation;

[0013] Figure 3 It also illustrates how the power converter operates in a situation where its controller has performed basic operations when the load current is >0 and its resonant capacitor undergoes a charging operation;

[0014] Figure 4 shows how duty ratios and load currents corresponding to three-phase voltage commands in AC loads connected to a plurality of AC terminals of the power converter vary over time;

[0015] Figure 5 showing a first current threshold and a second current threshold for use in a controller of the power converter;

[0016] Figure 6 illustrates how the power converter operates under the condition that its controller has performed basic operation when the load current is >0 and its resonant capacitor undergoes a discharge operation;

[0017] Figure 7 It also illustrates how the power converter operates in a situation where its controller has performed basic operations when the load current is <0 and its resonant capacitor undergoes a discharge operation;

[0018] Figure 8 illustrates how the power converter operates under the condition that its controller has performed basic operations when the load current is <0 and its resonant capacitor undergoes a charging operation;

[0019] Figure 9 is a timing diagram illustrating how the power converter operates when its controller performs a first operation and a second operation;

[0020] Figure 10 is a timing diagram illustrating how the power converter operates when its controller performs a first operation and a second operation;

[0021] Figure 11 is a timing diagram illustrating how the power converter operates when its controller performs a first operation and a second operation;

[0022] Figure 12 is a timing diagram illustrating how the power converter operates when its controller performs a first operation and a second operation;

[0023] Figure 13 is a timing chart illustrating how the controller of the power converter according to the first modification of the first embodiment operates;

[0024] Figure 14 is a timing chart illustrating how the controller of the power converter according to the second modification of the first embodiment operates;

[0025] Figure 15 is a timing diagram illustrating how the controller of the power converter operates;

[0026] Figure 16 is a timing chart illustrating how the power converter according to the second embodiment operates in a case where its controller performs a first operation and a second operation;

[0027] Figure 17 is a timing chart illustrating how the power converter according to the second embodiment operates in a case where its controller performs a first operation and a second operation;

[0028] Figure 18is a timing chart illustrating how the power converter according to the third embodiment operates in a case where its controller performs a first operation and a second operation;

[0029] Figure 19 is a timing chart illustrating how the power converter according to the fourth embodiment operates in a case where its controller performs a first operation and a second operation;

[0030] Figure 20 is a timing chart illustrating how the power converter according to the fifth embodiment operates in a case where its controller performs a first operation and a second operation;

[0031] Figure 21 is a timing chart illustrating how the power converter according to the sixth embodiment operates in a case where its controller performs a first operation and a second operation;

[0032] Figure 22 is a timing chart illustrating how the power converter according to the seventh embodiment operates in a case where its controller performs a first operation and a second operation;

[0033] Figure 23 is a timing chart illustrating how the power converter according to the eighth embodiment operates in a case where its controller performs a first operation and a second operation;

[0034] Figure 24 is a timing chart illustrating how the power converter according to the ninth embodiment operates in a case where its controller performs a first operation and a second operation;

[0035] Figure 25 is a timing chart illustrating how the power converter according to the tenth embodiment operates in a case where its controller performs a first operation and a second operation;

[0036] Figure 26 is a circuit diagram of a system including a power converter according to an eleventh embodiment;

[0037] Figure 27 is a circuit diagram of a system including a power converter according to a twelfth embodiment;

[0038] Figure 28 is a circuit diagram of a system including a power converter according to a thirteenth embodiment;

[0039] Figure 29 is a circuit diagram of a system including a power converter according to a fourteenth embodiment;

[0040] Figure 30 is a circuit diagram of a system including a power converter according to a fifteenth embodiment;

[0041] Figure 31is a circuit diagram of a system including a power converter according to a sixteenth embodiment;

[0042] Figure 32 is a circuit diagram of a system including a power converter according to a seventeenth embodiment; and

[0043] Figure 33 is a circuit diagram of a system including a power converter according to an eighteenth embodiment. DETAILED DESCRIPTION

[0044] (First embodiment)

[0045] Will refer to Figures 1 to 12 A power converter 100 according to a first embodiment will be described.

[0046] (1) Overall configuration of power converter

[0047] For example, Figure 1 As shown, the power converter 100 includes a first DC terminal 31 and a second DC terminal 32 and a plurality of (e.g., three) AC terminals 41. A DC power source E1 is connected between the first DC terminal 31 and the second DC terminal 32. An AC load RA1 is connected to the plurality of AC terminals 41. The AC load RA1 may be, for example, a three-phase motor. The power converter 100 converts the DC output of the DC power source E1 into AC power and outputs the AC power to the AC load RA1. The DC power source E1 may include, for example, a solar cell or a fuel cell. The DC power source E1 may include a DC-DC converter. In the power converter 100, if the plurality of AC terminals 41 are three AC terminals 41, the AC power may be, for example, three-phase AC power having a U phase, a V phase, and a W phase.

[0048] Power converter 100 includes power conversion circuit 11, multiple (e.g., three) switches 8, multiple (e.g., three) resonant capacitors 9, regenerative capacitor 15, resonant inductor L1, and controller 50. Power converter 100 also includes protection circuit 17 and capacitor C10. Each of the multiple switches 8 can be, for example, a bidirectional switch.

[0049] The power conversion circuit 11 includes a plurality (e.g., three) of first switching elements 1 and a plurality (e.g., three) of second switching elements 2. In the power conversion circuit 11, a plurality (e.g., three) of switching circuits 10 are connected in parallel. In each switching circuit 10, one of the plurality of first switching elements 1 and a corresponding second switching element of the plurality of second switching elements 2 are connected in series on a one-to-one basis. In the power conversion circuit 11, the plurality of first switching elements 1 are connected to a first DC terminal 31, and the plurality of second switching elements 2 are connected to a second DC terminal 32. A plurality of AC terminals 41 are provided for each of the plurality of switching circuits 10. Each of the plurality of AC terminals 41 is connected to a connection node 3 between the first switching element 1 and the second switching element 2 of a corresponding switching circuit 10. A plurality of switches 8 are provided for each of the plurality of switching circuits 10. A first end 81 of each of the plurality of switches 8 is connected to a connection node 3 between the first switching element 1 and the second switching element 2 of a corresponding switching circuit 10. A plurality of resonant capacitors 9 are provided for each of the plurality of switches 8. Each resonant capacitor in the plurality of resonant capacitors 9 is connected between the first end 81 of a corresponding switch in the plurality of switches 8 and the second DC terminal 32. The resonant inductor L1 has a first end and a second end. The first end of the resonant inductor L1 is connected to the common connection node 25. The regenerative capacitor 15 has a third end 153 and a fourth end 154. In the regenerative capacitor 15, its third end is connected to the second DC terminal 32, and its fourth end is connected to the common connection node 25 via the resonant inductor L1. The controller 50 controls the plurality of first switching elements 1, the plurality of second switching elements 2, and the plurality of switches 8.

[0050] (2) Details of power converter

[0051] In the following description, for the sake of convenience, with respect to a plurality of switching circuits 10, the switching circuits 10 for the U-phase, V-phase, and W-phase will be referred to as “switching circuit 10U,” “switching circuit 10V,” and “switching circuit 10W,” respectively, hereinafter. In addition, in the following description, the first switching element 1 and the second switching element 2 of the switching circuit 10U will be referred to as “first switching element 1U” and “second switching element 2U,” respectively, hereinafter. Similarly, in the following description, the first switching element 1 and the second switching element 2 of the switching circuit 10V will be referred to as “first switching element 1V” and “second switching element 2V,” respectively, hereinafter. Similarly, in the following description, the first switching element 1 and the second switching element 2 of the switching circuit 10W will be referred to as “first switching element 1W” and “second switching element 2W,” respectively, hereinafter. Furthermore, in the following description, the connection node 3 between the first switching element 1U and the second switching element 2U will be referred to as "connection node 3U," the connection node 3 between the first switching element 1V and the second switching element 2V will be referred to as "connection node 3V," and the connection node 3 between the first switching element 1W and the second switching element 2W will be referred to as "connection node 3W." Furthermore, in the following description, the AC terminal 41 connected to the connection node 3U will be referred to as "AC terminal 41U," the AC terminal 41 connected to the connection node 3V will be referred to as "AC terminal 41V," and the AC terminal 41 connected to the connection node 3W will be referred to as "AC terminal 41W." Furthermore, in the following description, the resonant capacitor 9 connected in parallel to the second switching element 2U will be referred to as "resonant capacitor 9U," the resonant capacitor 9 connected in parallel to the second switching element 2V will be referred to as "resonant capacitor 9V," and the resonant capacitor 9 connected in parallel to the second switching element 2W will be referred to as "resonant capacitor 9W." In addition, in the following description, the switch 8 connected to the connection node 3U will be referred to as "switch 8U" below, the switch 8 connected to the connection node 3V will be referred to as "switch 8V" below, and the switch 8 connected to the connection node 3W will be referred to as "switch 8W" below.

[0052] In the power converter 100, the high potential output terminal (positive electrode) of the DC power source E1 is connected to the first DC terminal 31, and the low potential output terminal (negative electrode) of the DC power source E1 is connected to the second DC terminal 32. In addition, in the power converter 100, the U-phase terminal, the V-phase terminal, and the W-phase terminal of the AC load RA1 are connected to the three AC terminals 41U, 41V, and 41W, respectively.

[0053] In the power conversion circuit 11, each of the plurality (e.g., three) first switching elements 1 and the plurality (e.g., three) second switching elements 2 has a control terminal, a first main terminal, and a second main terminal. The control terminals of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 are connected to the controller 50. In each of the plurality of switching circuits 10 of the power converter 100, the first main terminal of the first switching element 1 is connected to the first DC terminal 31, the second main terminal of the first switching element 1 is connected to the first main terminal of the second switching element 2, and the second main terminal of the second switching element 2 is connected to the second DC terminal 32. In each of the plurality of switching circuits 10, the first switching element 1 is a high-side switching element (P-side switching element), and the second switching element 2 is a low-side switching element (N-side switching element). Each of the plurality of first switching elements 1 and the plurality of second switching elements 2 can be, for example, an insulated gate bipolar transistor (IGBT). Thus, in each of the plurality of first switching elements 1 and the plurality of second switching elements 2, its control terminal, first main terminal, and second main terminal are, respectively, the gate terminal, collector terminal, and emitter terminal.

[0054] The power conversion circuit 11 also includes: a plurality of (e.g., three) first diodes 4, which are connected in anti-parallel to the plurality of (e.g., three) first switching elements 1 in a one-to-one manner; and a plurality of (e.g., three) second diodes 5, which are connected in anti-parallel to the plurality of (e.g., three) second switching elements 2 in a one-to-one manner. In each of the plurality of first diodes 4, the anode of the first diode 4 is connected to the second main terminal (emitter terminal) of the first switching element 1 corresponding to the first diode 4, and the cathode of the first diode 4 is connected to the first main terminal (collector terminal) of the first switching element 1 corresponding to the first diode 4. In each of the plurality of second diodes 5, the anode of the second diode 5 is connected to the second main terminal (emitter terminal) of the second switching element 2 corresponding to the second diode 5, and the cathode of the second diode 5 is connected to the first main terminal (collector terminal) of the second switching element 2 corresponding to the second diode 5.

[0055] The U-phase terminal of the AC load RA1 may be connected to a connection node 3U between the first switching element 1U and the second switching element 2U via, for example, an AC terminal 41U. The V-phase terminal of the AC load RA1 may be connected to a connection node 3V between the first switching element 1V and the second switching element 2V via, for example, an AC terminal 41V. The W-phase terminal of the AC load RA1 may be connected to a connection node 3W between the first switching element 1W and the second switching element 2W via, for example, an AC terminal 41W.

[0056] Multiple resonant capacitors 9 are provided one-to-one with each of the multiple switches 8. Each of the multiple resonant capacitors 9 is connected between the first end 81 of its corresponding switch 8 and the second DC terminal 32. The power converter 100 includes multiple resonant circuits. The multiple resonant circuits include a resonant circuit including a resonant capacitor 9U and a resonant inductor L1, a resonant circuit including a resonant capacitor 9V and a resonant inductor L1, and a resonant circuit including a resonant capacitor 9W and a resonant inductor L1. The multiple resonant circuits share the resonant inductor L1.

[0057] Each of the plurality of switches 8 may, for example, include two IGBTs (i.e., a first IGBT 6 and a second IGBT 7) connected in anti-parallel. In each of the plurality of switches 8, the collector terminal of the first IGBT 6 and the emitter terminal of the second IGBT 7 are connected to each other, and the emitter terminal of the first IGBT 6 and the collector terminal of the second IGBT 7 are connected to each other. In each of the plurality of switches 8, the emitter terminal of the first IGBT 6 is connected to the connection node 3 of the switching circuit 10 corresponding to the switch 8 including the first IGBT 6. In each of the plurality of switches 8, the collector terminal of the second IGBT 7 is connected to the connection node 3 of the switching circuit 10 corresponding to the switch 8 including the second IGBT 7. Switch 8U is connected to the connection node 3U between the first switching element 1U and the second switching element 2U. Switch 8V is connected to the connection node 3V between the first switching element 1V and the second switching element 2V. Switch 8W is connected to the connection node 3W between the first switching element 1W and the second switching element 2W. In the following description, for convenience of explanation, the first IGBT 6 and the second IGBT 7 of the switch 8U will be referred to as the "first IGBT 6U" and the "second IGBT 7U", respectively, the first IGBT 6 and the second IGBT 7 of the switch 8V will be referred to as the "first IGBT 6V" and the "second IGBT 7V", respectively, and the first IGBT 6 and the second IGBT 7 of the switch 8W will be referred to as the "first IGBT 6W" and the "second IGBT 7W", respectively.

[0058] The plurality of switches 8 are controlled by the controller 50. In other words, the first IGBT 6U, the second IGBT 7U, the first IGBT 6V, the second IGBT 7V, the first IGBT 6W, and the second IGBT 7W are controlled by the controller 50.

[0059] The resonant inductor L1 has a first end and a second end. In the resonant inductor L1 , the first end of the resonant inductor L1 is connected to the common connection node 25 , and the second end of the resonant inductor L1 is connected to the fourth end 154 of the regenerative capacitor 15 .

[0060] The regenerative capacitor 15 is connected between the second end of the resonant inductor L1 and the second DC terminal 32. The regenerative capacitor 15 may be, for example, a film capacitor.

[0061] Protection circuit 17 includes a third diode 13 and a fourth diode 14. Third diode 13 is connected between common connection node 25 and first DC terminal 31. The anode of third diode 13 is connected to common connection node 25, and the cathode of third diode 13 is connected to first DC terminal 31. Fourth diode 14 is connected between common connection node 25 and second DC terminal 32. The anode of fourth diode 14 is connected to second DC terminal 32, and the cathode of fourth diode 14 is connected to common connection node 25. Thus, fourth diode 14 is connected in series to third diode 13.

[0062] The capacitor C10 is connected between the first DC terminal 31 and the second DC terminal 32, and is connected in parallel to the power conversion circuit 11. The capacitor C10 may be, for example, an electrolytic capacitor.

[0063] The controller 50 controls a plurality of first switching elements 1, a plurality of second switching elements 2 and a plurality of switches 8. An agent for performing the functions of the controller 50 includes a computer system. The computer system includes a single or multiple computers. The computer system may include a processor and a memory as its main hardware components. The computer system is used as an agent for performing the functions of the controller 50 according to the present disclosure by causing the processor to execute a program stored in the memory of the computer system. The program may be pre-stored in the memory of the computer system. Alternatively, the program may also be downloaded via a telecommunications line, or distributed after being recorded in a non-transitory storage medium such as a memory card, an optical disc or a hard disk drive (disk) (any of which is readable by the computer system). The processor of the computer system may be composed of a single or multiple electronic circuits including a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI). These electronic circuits may be integrated together on a single chip or distributed on multiple chips, whichever is appropriate. These multiple chips may be aggregated together in a single device or distributed in multiple devices without limitation.

[0064] The controller 50 outputs control signals SU1, SV1, and SW1 for controlling the on / off states of the plurality of first switching elements 1U, 1V, and 1W, respectively. Each of the control signals SU1, SV1, and SW1 may be, for example, a pulse-width modulated (PWM) signal having a potential level that alternates between a first potential level (hereinafter referred to as a "low level") and a second potential level (hereinafter referred to as a "high level") that is higher than the first potential level. The first switching elements 1U, 1V, and 1W are turned on when the control signals SU1, SV1, and SW1 are at a high level, and are turned off when the control signals SU1, SV1, and SW1 are at a low level. Furthermore, the controller 50 outputs control signals SU2, SV2, and SW2 for controlling the on / off states of the plurality of second switching elements 2U, 2V, and 2W, respectively. Each of the control signals SU2, SV2, and SW2 may be, for example, a PWM signal having a potential level that alternates between a first potential level (hereinafter referred to as a "low level") and a second potential level (hereinafter referred to as a "high level") that is higher than the first potential level. The second switching elements 2U, 2V, and 2W are turned on when the control signals SU2, SV2, and SW2 are at a high level, respectively, and are turned off when the control signals SU2, SV2, and SW2 are at a low level, respectively.

[0065] The controller 50 uses a carrier signal having a sawtooth waveform (reference Figure 2 ) to generate control signals SU1, SV1, SW1 for multiple first switching elements 1U, 1V, 1W and control signals SU2, SV2, SW2 for multiple second switching elements 2U, 2V, 2W. More specifically, the controller 50 generates control signals SU1, SU2 to be applied to the first switching element 1U and the second switching element 2U, respectively, based at least on the carrier signal and the U-phase voltage instruction. In addition, the controller 50 generates control signals SV1, SV2 to be applied to the first switching element 1V and the second switching element 2V, respectively, based at least on the carrier signal and the V-phase voltage instruction. In addition, the controller 50 generates control signals SW1, SW2 to be applied to the first switching element 1W and the second switching element 2W, respectively, based at least on the carrier signal and the W-phase voltage instruction. The U-phase voltage instruction, the V-phase voltage instruction and the W-phase voltage instruction can be, for example, sinusoidal wave signals whose phases differ by 120 degrees from each other and whose amplitudes (voltage instruction values) vary with time. Note that the waveform of the carrier signal does not have to be a sawtooth waveform, but can also be a triangular waveform or Figure 2 The sawtooth waveform shown is a mirror-inverted version. In addition, the U-phase voltage command, the V-phase voltage command, and the W-phase voltage command each have a cycle of the same length. In addition, the cycle of the U-phase voltage command, the V-phase voltage command, and the W-phase voltage command is longer than the cycle of the carrier signal.

[0066] The duty ratios of the control signals SU1, SU2 to be applied from the controller 50 to the first switching element 1U and the second switching element 2U, respectively, vary according to the U-phase voltage command. Figure 4 In FIG. 5 , the duty cycle of the control signal SU1 is shown as “U-phase duty cycle”. The controller 50 (refer to FIG. Figure 1 ) generates a control signal SU1 to be applied to the first switching element 1U by comparing the U-phase voltage command with the carrier signal. The controller 50 generates a control signal SU2 to be applied to the second switching element 2U by inverting the control signal SU1 to be applied to the first switching element 1U. In addition, in order to prevent the respective conduction periods of the first switching element 1U and the second switching element 2U from overlapping each other, the controller 50 sets a dead band period Td (reference period) between the high level period of the control signal SU1 and the high level period of the control signal SU2. Figure 2 ).

[0067] The duty ratios of the control signals SV1, SV2 to be applied from the controller 50 to the first switching element 1V and the second switching element 2V, respectively, vary according to the V-phase voltage command. Figure 4 In FIG. 5 , the duty cycle of the control signal SV1 is shown as “V-phase duty cycle”. Figure 1 ) generates a control signal SV1 to be applied to the first switching element 1V by comparing the V-phase voltage command with the carrier signal. The controller 50 also generates a control signal SV2 to be applied to the second switching element 2V by inverting the control signal SV1 to be applied to the first switching element 1V. In addition, in order to prevent the respective conduction periods of the first switching element 1V and the second switching element 2V from overlapping each other, the controller 50 sets a dead band period Td (reference period) between the high level period of the control signal SV1 and the high level period of the control signal SV2. Figure 2 ).

[0068] The duty ratios of the control signals SW1, SW2 to be applied from the controller 50 to the first switching element 1W and the second switching element 2W, respectively, vary according to the W-phase voltage command. Figure 4 In FIG. 5 , the duty cycle of the control signal SW1 is shown as “W-phase duty cycle”. Figure 1 ) generates a control signal SW1 to be applied to the first switching element 1W by comparing the W-phase voltage command with the carrier signal. The controller 50 generates a control signal SW2 to be applied to the second switching element 2W by inverting the control signal SW1 to be applied to the first switching element 1W. In addition, in order to prevent the respective on-periods of the first switching element 1W and the second switching element 2W from overlapping each other, the controller 50 sets a dead band period Td (reference period) between the high-level period of the control signal SW1 and the high-level period of the control signal SW2. Figure 3 ).

[0069] The U-phase voltage command, the V-phase voltage command, and the W-phase voltage command may be, for example, sinusoidal signals whose phases differ by 120 degrees from each other and whose amplitudes vary with time. Figure 4 As shown, the duty ratios of the control signals SU1, SV1, and SW1 (i.e., the U-phase duty ratio, the V-phase duty ratio, and the W-phase duty ratio) vary in the form of sinusoidal waves that are 120 degrees out of phase with each other. Similarly, the duty ratios of the control signals SU2, SV2, and SW2 also vary in the form of sinusoidal waves that are 120 degrees out of phase with each other.

[0070] Controller 50 generates control signals SU1, SU2, SV1, SV2, SW1, and SW2 based on the carrier signal, the voltage commands, and information about the state of AC load RA1. For example, if AC load RA1 is a three-phase motor, the information about the state of AC load RA1 may include detection values ​​provided by a plurality of current sensors for detecting output currents iU, iV, and iW, respectively, flowing through the U-phase, V-phase, and W-phase of AC load RA1 (hereinafter referred to as "load currents").

[0071] A plurality of switches 8 , a resonant inductor L1 , a plurality of resonant capacitors 9 , and a regenerative capacitor 15 are provided to perform zero-voltage soft switching of the plurality of first switching elements 1 and the plurality of second switching elements 2 .

[0072] In this power converter 100 , the controller 50 controls not only the plurality of first switching elements 1 and the plurality of second switching elements 2 of the power conversion circuit 11 , but also the plurality of switches 8 .

[0073] The controller 50 generates control signals SU6, SU7, SV6, SV7, SW6, SW7 for respectively controlling the on / off states of the first IGBT 6U, the second IGBT 7U, the first IGBT 6V, the second IGBT 7V, the first IGBT 6W, and the second IGBT 7W, and outputs the control signals SU6, SU7, SV6, SV7, SW6, SW7 to the gate terminals of the first IGBT 6U, the second IGBT 7U, the first IGBT 6V, the second IGBT 7V, the first IGBT 6W, and the second IGBT 7W.

[0074] When the first IGBT 6U is on and the second IGBT 7U is off, the switch 8U allows a charging current to flow sequentially through the regenerative capacitor 15, the resonant inductor L1, the switch 8U, and the resonant capacitor 9U. The charging current is the current used to charge the resonant capacitor 9U. On the other hand, when the first IGBT 6U is off and the second IGBT 7U is on, the switch 8U allows a discharging current to flow sequentially through the resonant capacitor 9U, the switch 8U, the resonant inductor L1, and the regenerative capacitor 15. The discharging current is the current used to discharge the resonant capacitor 9U.

[0075] When the first IGBT 6V is on and the second IGBT 7V is off, the switch 8V allows a charging current to flow sequentially through the regenerative capacitor 15, the resonant inductor L1, the switch 8V, and the resonant capacitor 9V. The charging current is the current used to charge the resonant capacitor 9V. On the other hand, when the first IGBT 6V is off and the second IGBT 7V is on, the switch 8V allows a discharging current to flow sequentially through the resonant capacitor 9V, the switch 8V, the resonant inductor L1, and the regenerative capacitor 15. The discharging current is the current used to discharge the resonant capacitor 9V.

[0076] When the first IGBT 6W is on and the second IGBT 7W is off, the switch 8W allows a charging current to flow sequentially through the regenerative capacitor 15, the resonant inductor L1, the switch 8W, and the resonant capacitor 9W. The charging current is the current used to charge the resonant capacitor 9W. On the other hand, when the first IGBT 6W is off and the second IGBT 7W is on, the switch 8W allows a discharging current to flow sequentially through the resonant capacitor 9W, the switch 8W, the resonant inductor L1, and the regenerative capacitor 15. The discharging current is the current used to discharge the resonant capacitor 9W.

[0077] (3) Operation of power converter

[0078] In the following description, for the current iL1 flowing through the resonant inductor L1, if the current is Figure 1 If the current iL1 flows in the direction indicated by the arrow shown in FIG, the polarity of the current iL1 is assumed to be positive. On the other hand, if the current iL1 flows in the direction indicated by the arrow shown in FIG, the polarity of the current iL1 is assumed to be positive. Figure 1 If the current iL1 flows in the direction opposite to the direction indicated by the arrow shown in FIG. 1 , the polarity of the current iL1 is assumed to be negative. In the following description, for each of the load currents iU, iV, iW flowing through the U-phase, V-phase, and W-phase of the AC load RA1, if the load currents iU, iV, iW are in the direction indicated by the arrow shown in FIG. Figure 1If the load currents iU, iV, iW flow in the direction indicated by the corresponding arrows in the arrows shown, the polarity of the load currents iU, iV, iW is assumed to be positive. On the other hand, if the load currents iU, iV, iW flow in the direction indicated by the corresponding arrows in the arrows shown, the polarity of the load currents iU, iV, iW is assumed to be positive. Figure 1 If the load currents iU, iV, and iW flow in the direction opposite to the direction indicated by the arrow shown in FIG. 1 , the polarity of the load currents iU, iV, and iW is assumed to be negative. In addition, for each of the currents i9U, i9V, and i9W flowing through the resonant capacitors 9U, 9V, and 9W, respectively, if the currents i9U, i9V, and i9W are Figure 1 If the currents i9U, i9V, i9W flow in the direction indicated by the corresponding arrows in the arrows shown, the polarity of the currents i9U, i9V, i9W is assumed to be positive. On the other hand, if the currents i9U, i9V, i9W flow in the direction indicated by the corresponding arrows in the arrows shown, the polarity of the currents i9U, i9V, i9W is assumed to be positive. Figure 1 If the currents i9U, i9V, and i9W flow in a direction opposite to the direction indicated by the arrows shown in FIG. 1 , the polarity of the currents i9U, i9V, and i9W is negative. Therefore, during a discharge operation (discharging the resonant capacitors 9U, 9V, and 9W), the polarity of the currents i9U, i9V, and i9W is positive. On the other hand, during a charge operation (charging the resonant capacitors 9U, 9V, and 9W), the polarity of the currents i9U, i9V, and i9W is negative.

[0079] In this power converter 100, for example, when the first IGBT 6U of the switch 8U is on and a positive current iL1 is flowing through the resonant inductor L1, the first IGBT 6U of the switch 8U can be turned off. In this case, the current iL1 flowing through the resonant inductor L1 is regenerated to the power conversion circuit 11 via the third diode 13 until the current iL1 reaches zero due to energy dissipation in the resonant inductor L1. Furthermore, in this power converter 100, for example, when the second IGBT 7U of the switch 8U is on and a negative current iL1 is flowing through the resonant inductor L1, the second IGBT 7U of the switch 8U can be turned off. In this case, the current iL1 flows through the resonant inductor L1 along a path that passes through the fourth diode 14, the resonant inductor L1, and the regeneration capacitor 15 in this order until the current iL1 reaches zero due to energy dissipation in the resonant inductor L1.

[0080] Furthermore, in this power converter 100, for example, when the first IGBT 6V of the switch 8V is on and a positive current iL1 is flowing through the resonant inductor L1, the first IGBT 6V of the switch 8V can be turned off. In this case, the current iL1 flowing through the resonant inductor L1 is regenerated to the power conversion circuit 11 via the third diode 13 until the current iL1 reaches zero due to energy dissipation in the resonant inductor L1. Furthermore, in this power converter 100, for example, when the second IGBT 7V of the switch 8V is on and a negative current iL1 is flowing through the resonant inductor L1, the second IGBT 7V of the switch 8V can be turned off. In this case, the current iL1 flows through the resonant inductor L1 along a path that passes through the fourth diode 14, the resonant inductor L1, and the regeneration capacitor 15 in this order until the current iL1 reaches zero due to energy dissipation in the resonant inductor L1.

[0081] Furthermore, in this power converter 100, for example, when the first IGBT 6W of the switch 8W is on and a positive current iL1 is flowing through the resonant inductor L1, the first IGBT 6W of the switch 8W can be turned off. In this case, the current iL1 flowing through the resonant inductor L1 is regenerated to the power conversion circuit 11 via the third diode 13 until the current iL1 reaches zero due to energy dissipation in the resonant inductor L1. Furthermore, in this power converter 100, for example, when the second IGBT 7W of the switch 8W is on and a negative current iL1 is flowing through the resonant inductor L1, the second IGBT 7W of the switch 8W can be turned off. In this case, the current iL1 flows through the resonant inductor L1 along a path that passes through the fourth diode 14, the resonant inductor L1, and the regeneration capacitor 15 in this order until the current iL1 reaches zero due to energy dissipation in the resonant inductor L1.

[0082] For each of the plurality of switching circuits 10, the controller 50 sets a deadband period Td between the high-level period of the control signals SU1, SV1, and SW1 for the first switching elements 1U, 1V, and 1W and the high-level period of the control signals SU2, SV2, and SW2 for the second switching elements 2U, 2V, and 2W. Furthermore, the controller 50 sets the high-level period of the control signal for each of the plurality of switches 8 based on the deadband period Td for the corresponding switching circuit in the plurality of switching circuits 10. In this case, the controller 50 sets the length of the high-level period of the control signal for each of the plurality of switches 8 to, for example, the sum of the length of the first period and the length of the second period. The length of the first period is N (where N is an integer) times the resonant half-cycle, which is determined by the capacitance of the resonant capacitor 9 corresponding to the switch 8 and the inductance of the resonant inductor L1. Assuming the resonant period is Tres, the length of the first period is calculated as N×(Tres / 2). The end time of the first period (i.e., the time point at which the period N times longer than the resonant half cycle ends) preferably coincides with the end time of the dead time period Td for the switching circuit 10 corresponding to the switch 8. Figure 2 In the example shown, N=1 is satisfied, and the length of the control signal SU6 between time t2 and time t3 is the length of the first period. More specifically, assuming that N is 1, the length of the first period is designed to be Tres / 2=the length of the dead zone period Td. In other words, Figure 2 An example of selecting the capacitance of the resonant capacitor 9 and the inductance of the resonant inductor L1 so that Tres / 2 is equal to the length of the dead time period Td is shown. The length of the second period can be, for example, an additional time Tau determined by the voltage of the regenerative capacitor 15, the inductance of the resonant inductor L, and the load current value. The length of the first period mentioned above is an exemplary value according to an ideal design. Alternatively, the length of the first period can also be equal to or greater than 90% of the length N×(Tres / 2) and equal to or less than 110% of the length. The length of the second period mentioned above is an exemplary value according to an ideal design. Alternatively, the length of the second period can also be equal to or greater than the additional time determined by the voltage of the regenerative capacitor 15, the inductance of the resonant inductor L, and the load current value (for example, in Figure 2 In the example shown, it is 90% of the additional time Tau) and equal to or less than 110% of the additional time.

[0083] Next, refer to Figures 1 to 8The basic operation of zero-voltage soft switching to be performed on each of the plurality of first switching elements 1 and the plurality of second switching elements 2 will be described. As used herein, "basic operation" refers to the operation to be performed when the resonant currents flowing through two or more switches 8 belonging to the plurality of switches 8 will not flow through the resonant inductor L1 at the same time. After the basic operation has been described, how the power converter 100 operates when the controller 50 determines that the resonant currents flowing through two or more switches 8 belonging to the plurality of switches 8 will flow at the same time will be described.

[0084] (3.1) Basic operations

[0085] When performing zero-voltage soft switching on the first switching element 1, the voltage across the first switching element 1 needs to be reduced to zero immediately before the first switching element 1, which is the target of zero-voltage soft switching, becomes conductive. When performing zero-voltage soft switching on the second switching element 2, the voltage across the second switching element 2 needs to be reduced to zero immediately before the second switching element 2, which is the target of zero-voltage soft switching, becomes conductive. In the following description, the switching element that is the target of zero-voltage soft switching (whether it is the first switching element 1 or the second switching element 2) will be referred to as the "target switching element" below.

[0086] The basic operation of the controller 50 changes depending on the polarity (i.e., positive or negative) of the load current flowing through the AC terminal 41 connected to the target switching element, and whether the resonant capacitor 9 connected in series or parallel to the target switching element is performing a charging operation or a discharging operation. The load current has a positive polarity when flowing from the AC terminal 41 toward the AC load RA1, and has a negative polarity when flowing from the AC load RA1 toward the AC terminal 41. When the resonant capacitor 9 is performing a charging operation, the voltage across the resonant capacitor 9 increases. On the other hand, when the resonant capacitor 9 is performing a discharging operation, the voltage across the resonant capacitor 9 decreases. The voltage across each of the plurality of second switching elements 2 is the same as the voltage across the resonant capacitor 9 connected in parallel to the second switching element 2.

[0087] (3.1.1) Soft Switching Operation of the First Switching Element When Load Current > 0

[0088] If the target of soft switching is the first switching element 1 (hereinafter referred to as "target first switching element 1") and the polarity of the load current flowing through the AC terminal 41 connected to the target first switching element 1 is positive, the controller 50 turns on the first IGBT 6 corresponding to the target first switching element 1. In this way, the controller 50 causes the resonant inductor L1 and the resonant capacitor 9 connected to the target first switching element 1 to resonate, thereby charging the resonant capacitor 9 with the charge supplied from the regenerative capacitor 15 and reducing the voltage across the target first switching element 1 to zero. This enables the power converter 100 to perform zero-voltage soft switching of the target first switching element 1.

[0089] exist Figure 2 , which shows control signals SU1 and SU2 to be applied from the controller 50 to the first switching element 1U and the second switching element 2U of the switching circuit 10U, respectively, when the target first switching element is the first switching element 1U of the switching circuit 10U. Figure 2 Also shown in FIG. 5 are the control signal SU6 to be applied from the controller 50 to the first IGBT 6U of the switch 8U, the load current iU of the U phase flowing through the AC load RA1, the current iL1 flowing through the resonant inductor L1, the voltage V1u across the first switching element 1U, and the voltage V2u across the second switching element 2U. Figure 2 , control signals SV1 and SV2 to be applied from the controller 50 to the first switching element 1V and the second switching element 2V of the switching circuit 10V, respectively, are also shown in FIG. Figure 2 Also shown are the control signal SV6 to be applied from the controller 50 to the first IGBT 6V of the switch 8V, the load current iV of the V phase flowing through the AC load RA1, the current iL1 flowing through the resonant inductor L1, the voltage V1v across the first switching element 1V, and the voltage V2v across the second switching element 2V. Figure 2 In FIG, the voltage value of the DC power supply E1 is designated by Vd.

[0090] In addition, Figure 2 The dead zone period Td set by the controller 50 to prevent the first switching element 1 and the second switching element 2 of the same phase from being turned on at the same time is also shown in FIG. Figure 2 8U and the additional time Tau and Tav are also shown. The additional time Tau and Tav are set by the controller 50 for the control signal SV6 for the first IGBT 6V of the switch 8V. The additional time Tau and Tav will be described later.

[0091] exist Figure 3illustrates control signals SW1 and SW2 to be respectively applied from a controller 50 to a first switching element 1W and a second switching element 2W of a switching circuit 10W in a case where the first switching element of an object is the first switching element 1W of the switching circuit 10W. Additionally, in Figure 3 also illustrates a control signal SW6 to be applied from the controller 50 to a first IGBT 6W of a switch 8W and a load current iW of a W-phase flowing through an AC load RA1. In Figure 3 also illustrates a current iL1 flowing through a resonant inductor L1. In Figure 3 also illustrates a voltage V1w across the first switching element 1W and a voltage V2w across the second switching element 2W. In Figure 3 the voltage value of a DC power supply E1 is specified by Vd.

[0092] Furthermore, in Figure 3 also illustrates a dead time period Td set by the controller 50 to prevent the first switching element 1W and the second switching element 2W from being turned on simultaneously. Furthermore, in Figure 3 also illustrates an additional time Taw set by the controller 50 for the control signal SW6 of the first IGBT 6W for the switch 8W. The additional time Taw will be described later.

[0093] As Figure 2 shown, the additional time Tau is such an amount of time that the controller 50 sets this amount of time to make the high-level period of the control signal SU6 longer than the dead time period Td by setting the start time t1 of the high-level period of the control signal SU6 to a time point earlier than the start time t2 of the dead time period Td. The length of the additional time Tau is determined by the value of the load current iU. In order to generate LC resonance starting from the start time t2 of the dead time period Td, it is preferable that the value of the current iL1 coincides with the value of the load current iU at the start time t2 of the dead time period Td. This is because as long as iL1 < iU, all of the current iL1 flows through the AC load RA1, and thus the resonant capacitor 9U cannot be charged. The end time of the high-level period of the control signal SU6 can be simultaneous with or later than the end time t3 of the dead time period Td. In Figure 2In the example shown, the end time of the high level period of the control signal SU6 is set to be simultaneous with the end time t3 of the dead time period Td. The controller 50 sets the high level period of the control signal SU6 to Tau+Td. That is, by setting N=1 and Tres / 2=the length of the dead time period Td, the controller 50 sets the length of the first period to N×Tres / 2=Td. In the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at the end time t3 of the dead time period Td, and the voltage V1u across the first switching element 1U becomes zero at the end time t3 of the dead time period Td. Figure 2 In the example shown, the current iL1 starts to flow through the resonant inductor L1 at the start time t1 of the high level period of the control signal SU6, and becomes zero at the time t4 after the additional time Tau has passed since the end time t3 of the dead time period Td. Regarding the current iL1, from the start time t2 of the dead time period Td, the current iL1 satisfies iL1 ≥ iU, so from Figure 2 From the top of the current waveform, the current iL1 in the shaded portion of the fifth waveform flows into the resonant capacitor 9U, generating LC resonance. From the end time t3 of the dead time period Td, the current iL1 is regenerated to the power conversion circuit 11 via the third diode 13 directly connected to the resonant inductor L1.

[0094] As described above, in order to initiate LC resonance at the start time t2 of the dead-band period Td and to end the resonant half-cycle at the end time of the dead-band period Td, the controller 50 determines the additional time Tau based on the load current iU so that iL1 = iU is satisfied at the start time t2 of the dead-band period Td. More specifically, for example, using the detection result of the load current iU using a current sensor or its signal-processed value, or an estimated value of current iU, the pre-stored inductance L of the resonant inductor L1, and the voltage V15 at the regenerative capacitor 15 (i.e., the potential V15 at the fourth terminal 154 of the regenerative capacitor 15), the controller 50 determines the additional time Tau using the equation Tau = iU × (L / V15). In this case, the detection result of the load current iU or its signal-processed value can be a detection value at the carrier cycle to which the additional time Tau is added, or a detection value at a timing closest to the carrier cycle. In this case, as an estimated value of the load current iU, for example, a value of the load current iU estimated according to the carrier cycle to which the additional time Tau is added can be used. The resonance half-cycle in the case of basic operation is half of the resonance cycle, which is the inverse of the resonance frequency of the resonance circuit including the resonance inductor L1 and the resonance capacitor 9. Therefore, if the inductance of the resonance inductor L1 is L and the capacitance of the resonance capacitor 9 is C, the resonance half-cycle is π×(L·C)1 / 2 The controller 50 sets the resonant half period in the case of the basic operation, for example, such that the resonant half period is as long as the length of the dead time period Td.

[0095] As Figure 2 shown, the additional time Tav is the amount of time during which the controller 50 sets the start time t5 of the high level period of the control signal SV6 to a time point earlier than the start time t6 of the dead time period Td, so that the high level period of the control signal SV6 is longer than the dead time period Td. The length of the additional time Tav is determined by the value of the load current iV. In order to generate LC resonance starting from the start time t6 of the dead time period Td, it is preferable that the value of the current iL1 coincides with the value of the load current iV at the start time t6 of the dead time period Td. This is because as long as iL1 < iV, all of the current iL1 flows through the AC load RA1, and thus the resonant capacitor 9V cannot be charged. The end time of the high level period of the control signal SV6 can be the same as or later than the end time t7 of the dead time period Td. In Figure 2 the example shown, the end time of the high level period of the control signal SV6 is set to be the same as the end time t7 of the dead time period Td. The controller 50 sets the high level period of the control signal SV6 to Tav + Td. The voltage V1v across the first switching element 1V becomes zero at the end time t7 of the dead time period Td. In Figure 2 the example shown, the current iL1 starts flowing through the resonant inductor L1 at the start time t5 of the high level period of the control signal SV6, and becomes zero at the time t8 after the additional time Tav has elapsed since the end time t7 of the dead time period Td. Regarding the current iL1, starting from the start time t6 of the dead time period Td, the current iL1 satisfies iL1 ≥ iV, and thus the current iL1 in the shaded portion of the current waveform shown as the tenth waveform from the top of Figure 2 flows into the resonant capacitor 9V to generate LC resonance. Starting from the end time t7 of the dead time period Td, the current iL1 will be regenerated to the power conversion circuit 11 via the third diode 13 directly connected to the resonant inductor L1.

[0096] As described above, in order to start generating LC resonance at the start time t6 of the dead time period Td, the controller 50 determines an additional time Tav based on the load current iV such that iL1 = iV is satisfied at the start time t6 of the dead time period Td. More specifically, for example, using the detection result of the load current iV by the current sensor or its signal processing value, or the estimated value of the current iV, and the detection result of the inductance L of the resonance inductor L1 and the voltage V15 at the regenerative capacitor 15 stored in advance, the controller 50 determines the additional time Tav by the formula Tav = iV × (L / V15). In this case, as the detection result of the load current iV or its signal processing value, the detection value according to the carrier period plus the additional time Tav or the detection value according to the timing closest to the carrier period can be used. Further, in this case, as the estimated value of the load current iV, for example, the value of the load current iV estimated according to the carrier period plus the additional time Tav can be used.

[0097] As Figure 3 shown, the additional time Taw is the amount of time by which the controller 50 sets the start time t9 of the high level period of the control signal SW6 to an earlier time point than the start time t10 of the dead time period Td so that the high level period of the control signal SW6 is longer than the dead time period Td. The length of the additional time Taw is determined by the value of the load current iW. In order to start generating LC resonance from the start time t10 of the dead time period Td, it is preferable that the value of the current iL1 coincides with the value of the load current iW at the start time t10 of the dead time period Td. This is because as long as iL1 < iW is satisfied, all of the current iL1 flows through the AC load RA1, and thus the resonance capacitor 9W cannot be charged. The end time of the high level period of the control signal SW6 may be the same as or later than the end time t11 of the dead time period Td. In Figure 3 the example shown, the end time of the high level period of the control signal SW6 is set to be the same as the end time t11 of the dead time period Td. The controller 50 sets the high level period of the control signal SW6 to Taw + Td. The voltage V1w across the first switching element 1W becomes zero at the end time t11 of the dead time period Td. In Figure 3 the example shown, the current iL1 starts to flow through the resonance inductor L1 at the start time t9 of the high level period of the control signal SW6 and becomes zero at the time t12 after the additional time Taw has elapsed since the end time t11 of the dead time period Td. Regarding the current iL1, from the start time t10 of the dead time period Td, iL1 ≥ iW is satisfied, and thus from Figure 3From the top of the fourth waveform, the current iL1 in the shaded portion of the current waveform flows into the resonant capacitor 9W to generate LC resonance. From the end time t11 of the dead time period Td, the current iL1 is regenerated to the power conversion circuit 11 via the third diode 13 directly connected to the resonant inductor L1.

[0098] The controller 50 determines the additional time Taw based on the load current iW. More specifically, for example, the controller 50 uses the detection result of the load current iW by the current sensor, the pre-stored inductance L of the resonant inductor L1, and the detection result of the voltage V15 at the regenerative capacitor 15 to determine the additional time Taw using the equation Taw = iW × (L / V15). In this case, the detection result of the load current iW or its signal-processed value can be a detection value at a carrier cycle to which the additional time Taw is added, or a detection value at a timing closest to the carrier cycle. Furthermore, in this case, the estimated value of the load current iW can be, for example, a value estimated at a carrier cycle to which the additional time Taw is added.

[0099] (3.1.2) Soft switching operation of the second switching element when the load current is greater than 0

[0100] If the object of soft switching is the second switching element 2 (hereinafter referred to as "the object second switching element 2"), and the polarity of the load current (which is the load current iU, the load current iV, or the load current iW) flowing through the AC terminal 41 connected to the object second switching element 2 is positive, the controller 50 compares the current value of the load current with the first current threshold value I1 (=Ith, reference Figure 5 ) is compared. If the current value of the load current is greater than the first current threshold value I1, the controller 50 does not turn on the switch 8. On the other hand, if the current value of the load current is less than the first current threshold value I1, the controller 50 turns on the switch 8 within the dead time period Td. In this case, as in Section (3.1.1), it is assumed that the resonant half-cycle is set to be as long as, for example, the length of the dead time period Td. In the power converter 100, if the current value of the load current is greater than the first current threshold value I1, the controller 50 can use the load current iU to discharge the resonant capacitor 9U connected in parallel with the object second switching element 2 without turning on the switch 8 corresponding to the object second switching element 2. This enables the power converter 100 to perform zero-voltage soft switching of the object second switching element 2.

[0101] exist Figure 6In FIG. 1 , regarding the case where the second switching element 2 is the second switching element 2U of the switching circuit 10U and the current value of the load current is greater than the first current threshold value I1, the control signals SU1, SU2, and SU7, the load current iU, the current i9U flowing from the resonant capacitor 9U, and the voltage V2u across the second switching element 2U are shown. Figure 6 Also shown in FIG. 8 are a dead-band period Td and an additional time Tau set by the controller 50 for the control signal SU7 for the second IGBT 7U of the switch 8U.

[0102] If the current value of the load current iU is greater than the first current threshold I1, the controller 50 does not set any high-level period for the control signal SU7. In this case, in the power converter 100, the current i9U begins to flow from the resonant capacitor 9U at the start time t22 of the dead time period Td, decreases to zero before the end time t23 of the dead time period Td, and the voltage V2u across the second switching element 2U becomes zero before the end time t23 of the dead time period Td. Therefore, in the power converter 100, when the control signal SU2 changes from a low level to a high level at the end time t23 of the dead time period Td, zero-voltage soft switching is performed on the second switching element 2U.

[0103] If the current value of the load current iU is less than the first current threshold I1, then, for example, Figure 6The double-dotted chain line in FIG indicates that the controller 50 sets a high-level period for the control signal SU7. In this case, the start time of the high-level period of the control signal SU7 may coincide with the start time t22 of the dead time period Td. Furthermore, the end time of the high-level period of the control signal SU7 coincides with the end time t23 of the dead time period Td. Therefore, in the power converter 100, the voltage V2u across the second switching element 2U reaches zero before the end time t23 of the dead time period Td. Therefore, in the power converter 100, when the control signal SU2 changes from a low level to a high level at the end time t23 of the dead time period Td, zero-voltage soft switching is performed on the second switching element 2U. Alternatively, the start time of the high-level period of the control signal SU7 may be time t21, which is earlier than the start time of the dead time period Td by an additional time Tau. The end time of the high-level period of the control signal SU7 may be time t24, which is later than the end time t23 of the dead time period Td by an additional time Tau. Note that the time before or after the high-level period overlaps with the dead-band period Td does not necessarily have to be the additional time Tau, but may be any other preset time. Furthermore, note that the manner in which the high-level period of the control signal for switch 8 is determined based on the load current threshold is merely an example of an ideal design and should not be construed as limiting. For example, even if the load current is greater than the first current threshold I1, the controller 50 may set the high-level period of the control signal for switch 8 to cause switch 8 to conduct during the dead-band period Td. Furthermore, even if the load current is less than the first current threshold I1, the controller 50 does not necessarily cause switch 8 to conduct during the dead-band period Td. Alternatively, regardless of the first current threshold I1, the controller 50 may set the high-level period of the control signal for switch 8 to, for example, always keep switch 8 conducting throughout the dead-band period Td. Still alternatively, the controller 50 may always keep switch 8 off regardless of the first current threshold I1. Still further alternatively, the controller 50 may appropriately combine some of the operations described in Section (3.1.2). In addition, the controller 50 does not necessarily need to make the high-level period of the control signal for the switch 8 coincide with the dead-band period Td as in the above example. For example, the high-level period of the control signal for the switch 8 can be designed to have a length different from the length of the dead-band period Td according to the design time of the resonant half cycle.

[0104] (3.1.3) Soft switching operation of the second switching element when the load current is less than 0

[0105] If the polarity of the load current (which is load current iU, load current iV, or load current iW) flowing through the AC terminal 41 connected to the second switching element 2 is negative, the controller 50 turns on the second IGBT 7 corresponding to the second switching element 2. In this way, the controller 50 causes the resonant capacitor 9 and the resonant inductor L1 connected to the second switching element 2 to resonate, thereby discharging the resonant capacitor 9 and reducing the voltage across the second switching element 2 to zero. This enables the power converter 100 to perform zero-voltage soft switching of the second switching element 2.

[0106] exist Figure 7 , for the case where the target second switching element 2 is the second switching element 2U of the switching circuit 10U, control signals SU1, SU2, SU7, load current iU, current iL1 flowing through the resonant inductor L1, and voltage V2u across the second switching element 2U are shown.

[0107] In addition, Figure 7 The dead zone period Td set by the controller 50 to prevent the first switching element 1 and the second switching element 2 of the same phase from being turned on at the same time is also shown in FIG. Figure 7 8U. The additional time Tau set by the controller 50 for the control signal SU7 of the second IGBT 7U for the switch 8U is also shown in FIG. The end time of the high level period of the control signal SU7 may be simultaneous with or later than the end time t33 of the dead time period Td. Figure 7 In the example shown, the end time of the high level period of the control signal SU7 is set to coincide with the end time t33 of the dead time period Td. The controller 50 sets the high level period of the control signal SU7 to Tau+Td. In the switching circuit 10U, the voltage V2u across the second switching element 2U becomes zero at the end time t33 of the dead time period Td. Figure 7 In the example shown, current iL1 begins flowing through resonant inductor L1 at time t31, the start of the high-level period of control signal SU7, and becomes zero at time t34, after an additional time Tau has elapsed since time t33, the end of dead-band period Td. Regarding current iL1, from time t32, the start of dead-band period Td, current iL1 satisfies iL1 ≤ iU, thus generating LC resonance and causing a resonant current (i.e., a discharge current from resonant capacitor 9U) to flow from resonant capacitor 9U toward resonant inductor L1. From time t33, the end of dead-band period Td, current iL1 is regenerated to power conversion circuit 11 via fourth diode 14, which is directly connected to resonant inductor L1.

[0108] To start LC resonance at the start time t32 of the dead-band period Td and end the resonant half-cycle at the end time t33 of the dead-band period Td, the controller 50 determines the additional time Tau based on the load current iU so that iL1 = iU is satisfied at the start time t32 of the dead-band period Td. More specifically, for example, the controller 50 uses the detection result of the output current iU using the current sensor or its signal-processed value, or the estimated value of the load current iU, the pre-stored inductance L of the resonant inductor L1, and the voltage V15 at the regenerative capacitor 15 to determine the additional time Tau using the formula Tau = |iU| × (L / V15). In this case, the load current value (i.e., the detection result of the load current iU or its signal-processed value) can be used as the detection value according to the carrier cycle to which the additional time Tau is added, or as the detection value at the timing closest to the carrier cycle. Furthermore, in this case, the estimated value of the load current iU can be used, for example, as the estimated value of the load current iU according to the carrier cycle to which the additional time Tau is added. The resonant half period in the case of basic operation is half of the resonant period which is the inverse of the resonant frequency of the resonant circuit including the resonant inductor L1 and the resonant capacitor 9. Thus, if the inductance of the resonant inductor L1 is L and the capacitance of the resonant capacitor 9 is C, the resonant half period is π×(L·C) 1 / 2 The controller 50 sets the resonance half period in the case of the basic operation to make the resonance half period as long as the length of the dead zone period Td, for example.

[0109] (3.1.4) Soft switching operation of the first switching element when the load current is less than 0

[0110] If the polarity of the load current (which is the load current iU, the load current iV, or the load current iW) flowing through the AC terminal 41 connected to the subject first switching element 1 is negative, the controller 50 compares the current value of the load current with the second current threshold value I2 (=-Ith, reference Figure 5) is compared. If the current value of the load current is less than the second current threshold value I2, then according to the exemplary operation design of the controller 50, the controller 50 does not turn on the switch 8. On the other hand, if the current value of the load current is greater than the second current threshold value I2, the controller 50 turns on the switch 8 within the dead time period Td. In this case, as in Section (3.1.1), it is assumed that the resonant half-cycle is set to be as long as, for example, the length of the dead time period Td. In the power converter 100, if the current value of the load current is less than the second current threshold value I2, the controller 50 can use the load current to charge the resonant capacitor 9U connected in series with the object first switching element 1 without turning on the switch 8 corresponding to the object first switching element 1. This enables the power converter 100 to perform zero-voltage soft switching of the object first switching element 1.

[0111] exist Figure 8 , regarding the case where the target first switching element 1 is the first switching element 1U of the switching circuit 10U and the current value of the load current is greater than the second current threshold value I2 (in other words, the case where the absolute value of the current value of the load current is less than the absolute value of the second current threshold value I2), the control signals SU1, SU2, and SU6, the load current iU, the current i9U flowing from the resonant capacitor 9U, and the voltage V2u across the second switching element 2U are also shown. Figure 8 Also shown in FIG. 1 is a dead-band period Td.

[0112] If the current value of the load current is less than the second current threshold value I2 (in other words, if the absolute value of the load current is greater than the absolute value of the second current threshold value I2), the controller 50 does not provide any high-level period for the control signal SU6. In this case, in the power converter 100, the current i9U begins to flow through the resonant capacitor 9U at the start time t41 of the dead time period Td. As a result, in the power converter 100, the resonant capacitor 9U is charged, causing the voltage V2u across the second switching element 2U to increase. The current i9U becomes zero before the end time t23 of the dead time period Td, and the voltage V1u across the first switching element 1U becomes zero before the end time t42 of the dead time period Td. Thus, in the power converter 100, when the control signal SU1 changes from a low level to a high level at the end time t42 of the dead time period Td, zero-voltage soft switching is performed on the first switching element 1U.

[0113] If the current value of the load current is greater than the second current threshold value I2 (in other words, if the absolute value of the load current is less than the absolute value of the second current threshold value), then, for example, as given by Figure 8The double-dotted chain line in FIG indicates that the controller 50 provides a high-level period for the control signal SU6. In this case, the start time of the high-level period of the control signal SU6 may coincide with the start time t41 of the dead time period Td, for example. Furthermore, the end time of the high-level period of the control signal SU6 coincides with the end time t42 of the dead time period Td. Thus, in the power converter 100, the voltage V1u across the first switching element 1U reaches zero before the end time t42 of the dead time period Td. Therefore, in the power converter 100, when the control signal SU1 changes from a low level to a high level at the end time t42 of the dead time period Td, zero-voltage soft switching is performed on the first switching element 1U. Furthermore, it should be noted that the manner in which the high-level period of the control signal for the switch 8 is determined based on the load current threshold is merely an example of an ideal design and should not be construed as limiting. For example, even if the load current value is less than the second current threshold I2, the controller 50 may set the high-level period of the control signal for the switch 8 to cause the switch 8 to conduct during the dead time period Td. Furthermore, even if the current value of the load current is greater than the second current threshold I2, the controller 50 does not necessarily have to turn on the switch 8 during the dead time period Td. Alternatively, regardless of the second current threshold I2, the controller 50 can set the high-level period of the control signal for the switch 8 to, for example, always keep the switch 8 turned on throughout the dead time period Td. Still alternatively, regardless of the second current threshold I2, the controller 50 can always keep the switch 8 turned off. Still alternatively, the controller 50 can appropriately combine some of the operations described in Section (3.1.3). Furthermore, the controller 50 does not necessarily have to make the high-level period of the control signal for the switch 8 coincide with the dead time period Td as in the above example. For example, the high-level period of the control signal for the switch 8 can be designed to have a length different from the length of the dead time period Td based on the design time of the resonant half cycle.

[0114] (3.2) First Operation and Second Operation

[0115] When the controller 50 determines that the resonant currents flowing through two or more switches 8 belonging to the plurality of switches 8 will flow simultaneously through the resonant inductor L1, the controller 50 performs the first operation and the second operation, assuming that the two or more switches 8 include two switches 8 corresponding one-to-one to two AC terminals 41 belonging to the plurality of AC terminals 41 through which load currents of the same polarity flow, and that one of the two switches 8 is a first switch and the other of the two switches 8 is a second switch. As used herein, the expression "when it is determined that the resonant currents flowing through two or more switches 8 belonging to the plurality of switches 8 will flow simultaneously" refers to a situation in which it has been previously estimated that the resonant currents flowing through the two or more switches 8 will flow simultaneously through the resonant inductor L1.

[0116] The first operation includes shortening the high level period of the control signal for the first switch from a period including the resonance half period and the additional time by a shortened period Tred (reference Figure 10 ). The resonant half-period is determined by the capacitance C of one resonant capacitor 9 corresponding to the first switch among the plurality of resonant capacitors 9 and the inductance L of the resonant inductor L1. The additional time is determined by the voltage V15 of the regenerative capacitor 15, the inductance of the resonant inductor L1, and the load current value. Assuming that the resonant period of the resonant circuit formed by the inductance L of the resonant inductor L1 and the capacitance C of the resonant capacitor 9 corresponding to the first switch is Tres, Tres=1 / {2π(L·C) 1 / 2} and the resonant half-period is Tres / 2. Assuming that the additional time is Tad and the load current flowing through AC terminal 41 corresponding to the first switch is i, the additional time Tad is given by Tad = L × i / V15. Regarding the load current i, if the first switch is switch 8U, the load current is load current iU. If the first switch is switch 8V, the load current is load current iV. If the first switch is switch 8W, the load current is load current iW. Regarding the additional time Tad, if the first switch is switch 8U, the additional time Tad is the additional time Tau. If the first switch is switch 8V, the additional time Tad is the additional time Tav. If the first switch is switch 8W, the additional time Tad is the additional time Taw.

[0117] The second operation includes shifting the high-level period of the control signal for the first switch or the second switch so that the high-level period of the control signal for the first switch starts when a standby period has elapsed from a time point when the current value of the resonant current passing through the second switch coincides with the current value of the load current flowing through the AC terminal 41 corresponding to the second switch after the current value of the resonant current passing through the second switch has become equal to the extreme value.

[0118] (3.2.1) Determine whether the two-phase resonant currents flow simultaneously

[0119] In the power converter 100, the phases of the three-phase (i.e., U-phase, V-phase, and W-phase) voltage commands are different from each other by 120 degrees, but the command values ​​of the two-phase voltage commands are close to each other every 60 degrees in electrical angle, and the duty ratios of the two-phase control signals are close to each other (refer to FIG. Figure 4 Specifically, in the areas A1 and A2 shown in FIG. Figure 4 In the region A1 shown, the duty ratio of the U-phase control signal and the duty ratio of the V-phase control signal are around 0.75. Figure 4In the region A2 shown, the duty ratio of the U-phase control signal and the duty ratio of the V-phase control signal are around 0.25. The polarity of the resonant current is the same as the polarity of the current iL1. In the region A1, the polarity of the resonant current is positive. In the region A2, the polarity of the resonant current is negative. In the region A1, for example, the start time t1 of the high level period of the control signal SU6 to be applied to the first IGBT 6U (refer to Figure 2 ) and the start time t5 of the high level period of the control signal SV6 to be applied to the first IGBT 6V (reference Figure 2 ) becomes so short within one cycle time of the carrier signal that the U-phase resonant current and the V-phase resonant current may flow through the resonant inductor L1 at the same time. In the power converter 100, the direction of the resonant current in the region A2 is opposite to the direction of the resonant current in the region A1, but the U-phase resonant current and the V-phase resonant current may flow through the resonant inductor L1 at the same time.

[0120] Assuming that the capacitance of each of the plurality of resonant capacitors 9U, 9V, and 9W is C, if the U-phase current and the V-phase current simultaneously flow through the resonant inductor L1, then in the equivalent circuit, a capacitor having a combined capacitance (=2×C) of the resonant capacitors 9U and 9V is connected in series to the resonant inductor L1. Therefore, in power converter 100, if two-phase currents simultaneously flow through resonant inductor L1, the resonant frequency of the resonant circuit including resonant inductor L1 changes compared to the case where a single-phase current flows through resonant inductor L1. Consequently, power converter 100 may be unable to perform zero-voltage soft switching.

[0121] (3.2.1.1) Charging the resonant capacitor

[0122] Figure 2 Exemplary boundary conditions between the case where the U-phase resonant current and the V-phase resonant current do not overlap with each other (ie, do not flow simultaneously) and the case where the U-phase resonant current and the V-phase resonant current overlap with each other (ie, flow simultaneously) are shown. Figure 2 To illustrate this boundary condition.

[0123] In the power converter 100, if the time lag ΔTuv between the start time t3 of the high-level period of the control signal SU1 and the start time t7 of the high-level period of the control signal SV1 is equal to or greater than (Tau + Tav + Td), the U-phase resonant current and the V-phase resonant current do not overlap with each other. On the other hand, if the time lag ΔTuv is less than (Tau + Tav + Td), the U-phase resonant current and the V-phase resonant current overlap with each other. That is, when the threshold value for the time lag ΔTuv is set to (Tau + Tav + Td), for example, if the time lag ΔTuv is less than the threshold value, the controller 50 estimates that the resonant currents corresponding to the two phases of the switching circuit 10U and the switching circuit 10V belonging to the plurality of switching circuits 10 will flow simultaneously through the resonant inductor L1. Note that this threshold value is merely an example, and the threshold value may also be set to any other value. For example, in consideration of the error in the additional time Tau and the error in the additional time Tav, the threshold value may also be set to a value even greater than (Tau + Tav + Td). Alternatively, the threshold value may also be set to Td. In this case, if the time lag ΔTuv is equal to or greater than Td, the controller 50 determines that the U-phase LC resonant current (ie, Figure 2 The current in the region indicated by the oblique lines in the resonant inductor current waveform iL1 corresponding to the U phase) and the V phase LC resonant current (ie, Figure 2 d) will not overlap with each other. On the other hand, if the time lag ΔTuv is less than Td, the controller 50 determines that the U-phase LC resonant current and the V-phase LC resonant current will overlap with each other in the resonant inductor L1. Even in this case, the threshold value can be set to a value even larger than Td, for example, taking into account the error. In addition, the above-mentioned method for calculating the time lag ΔTuv to determine whether the two-phase resonant current flows simultaneously is only an example. On the contrary, any other calculation method can be used as long as the time lag corresponding to the above-mentioned time lag can be calculated. For example, as the time lag ΔTuv for determining whether the two-phase resonant current flows simultaneously, the time lag between the end time t2 of the high-level period of the control signal SU2 and the end time t6 of the high-level period of the control signal SV2 can also be used.

[0124] In the power converter 100, if the time lag between the start time t3 of the high-level period of the control signal SU1 and the start time t11 of the high-level period of the control signal SW1 is equal to or greater than (Tau + Taw + Td), the U-phase resonant current and the W-phase resonant current do not overlap with each other. On the other hand, if the time lag is less than (Tau + Taw + Td), the U-phase resonant current and the W-phase resonant current overlap with each other. That is, when the threshold value for this time lag is set to (Tau + Taw + Td), for example, if the time lag is less than the threshold value, the controller 50 estimates that the resonant currents corresponding to the two phases of the switching circuit 10U and the switching circuit 10W belonging to the plurality of switching circuits 10 will flow through the resonant inductor L1 at the same time. Note that this threshold value is merely an example, and the threshold value may also be set to any other value. For example, in consideration of the error in the additional time Tau and the error in the additional time Taw, the threshold value may also be set to a value even greater than (Tau + Taw + Td). Alternatively, the threshold value may also be set to Td. In this case, if the time lag is equal to or greater than Td, the controller 50 determines that the U-phase LC resonant current and the W-phase LC resonant current will not overlap with each other in the resonant inductor L1. On the other hand, if the time lag is less than Td, the controller 50 determines that the U-phase LC resonant current and the W-phase LC resonant current will overlap with each other in the resonant inductor L1. Even in this case, the threshold value can be set to a value even larger than Td, for example, taking into account an error. In addition, the above-mentioned method for calculating the time lag to determine whether the two-phase resonant current will flow simultaneously is merely an example. On the contrary, any other calculation method can be used as long as a time lag corresponding to the above-mentioned time lag can be calculated. For example, as the time lag for determining whether the two-phase resonant current will flow simultaneously, the time lag between the end time t2 of the high-level period of the control signal SU2 and the end time t10 of the high-level period of the control signal SW2 can also be used.

[0125] In the power converter 100, if the time lag between the start time t7 of the high-level period of the control signal SV1 to be applied to the first switching element 1V of the switching circuit 10V and the start time t11 of the high-level period of the control signal SW1 to be applied to the first switching element 1W of the switching circuit 10W is equal to or greater than (Tav+Taw+Td), the V-phase resonant current and the W-phase resonant current do not overlap with each other. On the other hand, if the time lag is less than (Tav+Taw+Td), the V-phase resonant current and the W-phase resonant current overlap with each other. That is, when the threshold value for the time lag is set to (Tav+Taw+Td), for example, if the time lag is less than the threshold value, the controller 50 estimates that the resonant currents corresponding to the two phases of the switching circuit 10V and the switching circuit 10W belonging to the plurality of switching circuits 10 will flow through the resonant inductor L1 at the same time. Note that this threshold value is merely an example, and the threshold value may also be set to any other value. For example, taking into account the error in the additional time Tav and the error in the additional time Taw, the threshold value may be set to a value even greater than (Tav + Taw + Td). Alternatively, the threshold value may be set to Td. In this case, if the time lag is equal to or greater than Td, the controller 50 determines that the V-phase LC resonant current and the W-phase LC resonant current in resonant inductor L1 will not overlap. On the other hand, if the time lag is less than Td, the controller 50 determines that the V-phase LC resonant current and the W-phase LC resonant current in resonant inductor L1 will overlap. Even in this case, the threshold value may be set to a value even greater than Td, for example, taking into account the error. Furthermore, the above-described method for calculating the time lag to determine whether the two-phase resonant currents will flow simultaneously is merely an example. Instead, any other calculation method may be employed as long as a time lag corresponding to the above-described time lag can be calculated. For example, the time lag between the end time t6 of the high-level period of control signal SV2 and the end time t10 of the high-level period of control signal SW2 may be used as the time lag for determining whether the two-phase resonant currents will flow simultaneously. In this case, the controller 50 sets the resonant half-cycle of the basic operation to a period as long as the dead-band period Td, for example. Thus, in the exemplary settings of the threshold values ​​described above (i.e., Tau+Tav+Td, Tau+Taw+Td, Tav+Taw+Td, or Td), Td represents the resonant half-cycle. Unless the length of the dead-band period Td is set to be the same as the resonant half-cycle, the length of the dead-band period Td is set to be replaced by the length of the resonant half-cycle, which is set to Td in the exemplary settings of the threshold values ​​described above. The same statement applies to the discharge operation of the resonant capacitor, which will be described in the next section.

[0126] (3.2.1.2) Discharging the resonant capacitor

[0127] In the discharge operation of the resonance capacitor 9 , the controller 50 can also use the same time lag and threshold value as in the case of the charging operation of the resonance capacitor 9 to determine whether the two-phase resonance currents will flow simultaneously.

[0128] For example, if the time lag between the start time of the high-level period of the control signal SU2 and the start time of the high-level period of the control signal SV2 is less than a threshold value (e.g., Tau+Tav+Td), the controller 50 estimates that the U-phase resonant current and the V-phase resonant current will overlap with each other. In addition, if the time lag between the start time of the high-level period of the control signal SU2 and the start time of the high-level period of the control signal SV2 is less than a threshold value (e.g., Td), the controller 50 estimates that the U-phase LC resonant current and the V-phase LC resonant current will overlap with each other.

[0129] Furthermore, if the time lag between the start time of the high-level period of the control signal SU2 and the start time of the high-level period of the control signal SW2 is less than a threshold value (e.g., Tau+Taw+Td), the controller 50 estimates that the U-phase resonant current and the W-phase resonant current will overlap with each other. Furthermore, if the time lag between the start time of the high-level period of the control signal SU2 and the start time of the high-level period of the control signal SW2 is less than a threshold value (e.g., Td), the controller 50 estimates that the U-phase LC resonant current and the W-phase LC resonant current will overlap with each other.

[0130] Furthermore, if the time lag between the start time of the high-level period of the control signal SV2 and the start time of the high-level period of the control signal SW2 is less than a threshold value (e.g., Tav+Taw+Td), the controller 50 estimates that the V-phase resonant current and the W-phase resonant current will overlap with each other. Furthermore, if the time lag between the start time of the high-level period of the control signal SV2 and the start time of the high-level period of the control signal SW2 is less than a threshold value (e.g., Td), the controller 50 estimates that the V-phase LC resonant current and the W-phase LC resonant current will overlap with each other.

[0131] (3.2.2) First and Second Operations to be Performed When Determined that Two-Phase Resonant Currents Flow Simultaneously

[0132] For example, when determining that the resonant currents passing through the two switches 8 will flow simultaneously through the resonant inductor L1 , the controller 50 performs the first and second operations to shorten the period during which the resonant currents passing through the two switches 8 flow simultaneously through the resonant inductor L1 .

[0133] The controller 50 performs the first and second operations to prevent the length of the dead zone period Td between the high-level period of the control signal applied to the first switching element 1 of each of the two switching circuits 10 corresponding to the two switches 8 and the high-level period of the control signal applied to the second switching element 2 thereof from changing. For example, when performing the second operation to shift the high-level period of the control signals SU6 and SU7 applied to the switch 8U, the controller 50 shifts the high-level period of each of the control signals SU1 and SU2 without changing the duty cycle of either control signal SU1 or SU2 within a single cycle of the carrier signal. Similarly, when shifting the high-level period of the control signal SV6 or SV7 applied to the switch 8V, the controller 50 shifts the high-level period of each of the control signals SV1 and SV2 without changing the duty cycle of either control signal SV1 or SV2 within a single cycle of the carrier signal. In the same manner, when shifting the high-level period of control signal SW6 or SW7 to be applied to switch 8W, controller 50 shifts the high-level period of each of control signals SW1 and SW2, but does not change the duty cycle of any of control signals SW1 and SW2 within one cycle of the carrier signal. In the following description, for ease of explanation, when shifting the high-level period of control signal SU6 or SU7 for switch 8U, the amount of time the high-level period of control signal SU6 or SU7 is shifted (hereinafter referred to as "shift time") will be designated as Tsu. Furthermore, when shifting the high-level period of control signal SV6 or SV7 for switch 8V, for ease of explanation, the shift time of the high-level period of control signal SV6 or SV7 will be designated as Tsv. Furthermore, when shifting the high-level period of control signal SW6 or SW7 for switch 8W, for ease of explanation, the shift time of the high-level period of control signal SW6 or SW7 will be designated as Tws.

[0134] (3.2.2.1) Soft Switching Operation of the First Switching Element

[0135] Figure 9 is exemplified in that the controller 50 has been predetermined to Figure 4 A timing diagram of the waveforms of the control signals SU1, SU2, SV1, SV2, the control signal SU6, SV6, the load current iU, iV, the current iL1, and the voltages V2u, V2v across the second switching elements 2U, 2V, in a case where the two-phase resonant currents (i.e., the U-phase resonant current and the V-phase resonant current) will flow simultaneously in the time period corresponding to the area A1 shown, and before the first operation and the second operation are performed (which will also be referred to as "before the shift" below). Figure 10 The upper part shows that the controller 50 has been predetermined to be in Figure 4The timing diagram of the situation where two phase resonant currents (ie, U phase resonant current and V phase resonant current) will flow simultaneously in the period corresponding to the area A1 shown in FIG. Figure 10 The upper part of shows the waveforms of the control signals SU1, SU2, SV1, SV2, the control signals SU6, SV6, the load currents iU, iV, and the current iL1 before the shift. Figure 10 The lower part is shown in Figure 4 The timing diagram of the case where the controller 50 has performed both the first operation and the second operation in the period corresponding to the region A1 shown (which will be referred to as "after shifting") is shown. In this case, Figure 10 The lower part is a timing chart showing the waveforms of the control signals SU1, SU2, SV1, SV2, the control signals SU6, SV6, the load currents iU, iV, the current iL1, and the voltages V2u, V2v across the second switching elements 2U, 2V after the shift. Figure 10 In the example shown, the polarity of the load current iU, iV flowing through the two AC terminals 41U, 41V connected to the two switches 8U, 8V is positive, and the absolute value of the load current iV is greater than the absolute value of the load current iU. Note that Figure 9 and Figure 10 The timing diagram shown shows the waveform in only a partial period of one cycle of the carrier signal.

[0136] exist Figure 10 In the example shown, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high-level period of the control signal SU6 to be applied to the switch 8U corresponding to one of the two AC terminals 41U, 41V through which the load current having the smaller absolute value flows by the shortened period Tred. Figure 10 In the example shown, the controller 50 sets the length of the shortened period Tred so that the high level period of the control signal SU6 is as long as the resonance half period (= Tres / 2). Figure 10 In the example shown, the shortened period Tred is as long as the additional time Tau.

[0137] In addition, the controller 50 shifts the high-level period of the control signal SU6 by the shift time Tsu in the direction of delaying the high-level period of the control signal SU6 when performing the second operation. In this case, the controller 50 shifts each of the high-level period of the control signal SU6 for the switch 8U, the high-level period of the control signal SU1 for the first switching element 1U, and the high-level period of the control signal SU2 for the second switching element 2U by the shift time Tsu in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SV6 for the switch 8V starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8V has become equal to the extreme value (at Figure 10 In the example shown, after the maximum value (maximum value), at the time point tc after the standby period Tdef has passed since the time point tb at which the current value of the resonant current (current iL1) passing through the switch 8V and the current value of the load current iV flowing through the AC terminal 41V corresponding to the switch 8V are consistent, the high level period of the control signal SU6 for the switch 8U begins. The absolute value of the resonant current (current iL1) at the time point tb is greater than the absolute value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U. The controller 50 determines the standby period Tdef by the formula Tdef=L×(iV-iU) / V15. The controller 50 determines the shift time by the formula Tsu=ΔT+Tdef. Figure 10 In the example shown, ΔT is the time lag between the start of the high-level period of the control signal SV1 for the first switching element 1V corresponding to the switch 8V and the end of the high-level period of the control signal SU2 for the second switching element 2U corresponding to the switch 8U. This ensures that the current value of the resonant current (current iL1) at the time point tc at the end of the standby period Tdef is equal to the absolute value of the load current iU. This enables the power converter 100 to perform zero-voltage soft switching of the first switching element 1U even if the high-level period of the control signal SU6 for the switch 8U does not include the additional time Tau and is as long as the resonant half-cycle (Tres / 2).

[0138] from Figure 10 The waveform of the current iL1 shown in the upper part and Figure 10As can be seen from the waveform of the current iL1 shown in the lower part of , when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the V-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the V-phase resonant current overlap with each other. In the same way, when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the W-phase resonant current overlap with each other. In the same way, when the controller 50 has predetermined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the V-phase resonant current and the W-phase resonant current overlap with each other.

[0139] In the power converter 100, if the controller 50 does not perform the first operation or the second operation, Figure 9 As shown, at the point in time when the control signals SU1 and SV1 transition from a low-level period to a high-level period (i.e., at the end of the dead-band period Td corresponding to each of the U-phase and V-phase), the voltages V2u and V2v across the second switching elements 2U and 2V do not rise to Vd. That is, if the controller 50 does not perform the first or second operation, the resonant capacitors 9U and 9V will not be fully charged at the end of the dead-band period Td corresponding to each of the U-phase and V-phase. Therefore, if the controller 50 does not perform the first or second operation, the voltages across the first switching elements 1U and 1V will not drop to zero at the end of the dead-band period Td corresponding to each of the U-phase and V-phase. Therefore, in the power converter 100, the first switching elements 1U and 1V are hard-switched.

[0140] On the other hand, if the controller 50 has performed the first operation and the second operation, Figure 10 As shown in the lower portion of FIG, at the time when the control signals SU1 and SV1 transition from a low-level period to a high-level period (i.e., at the end of the dead-band period Td corresponding to each of the U-phase and V-phase), the voltages V2u and V2v across the second switching elements 2U and 2V rise to Vd. That is, if the controller 50 has performed the first and second operations, then at the end of the dead-band period Td corresponding to each of the U-phase and V-phase, the resonant capacitors 9U and 9V have already been charged. Therefore, in the power converter 100, if the controller 50 has performed the first and second operations, the first switching elements 1U and 1V are switched using zero-voltage soft switching.

[0141] The above referenced Figure 10 The following illustrates how the first and second operations can be performed when the controller 50 has predetermined that the U-phase resonant current and the V-phase resonant current will flow through the resonant inductor L1 at the same time. However, this is merely an example and should not be construed as limiting. For example, even if the controller 50 has predetermined that the V-phase resonant current and the W-phase resonant current will flow through the resonant inductor L1 at the same time, and even if the controller 50 has predetermined that the W-phase resonant current and the U-phase resonant current will flow through the resonant inductor L1 at the same time, zero-voltage soft switching can be performed by causing the controller 50 to perform the first and second operations.

[0142] The first operation and the second operation to be performed by the controller 50 in the case of the charging operation can be summarized as follows.

[0143] During the first operation, the controller 50 shortens the high-level period of the control signal for the first switch, which corresponds to the load current having a larger absolute value, between the first and second switches, by a shortened period Tred. Meanwhile, during the second operation, the controller 50 shifts the high-level period of the control signal for the first switch by a shift time in a direction that delays the high-level period of the control signal. In this case, the controller 50 shifts the high-level period of the control signal for the first switch so that, if the high-level period of the control signal for the second switch begins at time ta, the high-level period of the control signal for the first switch begins at time tc, after the current value of the resonant current (current iL1) passing through the second switch has reached its extreme value and after a standby period Tdef has elapsed since time tb, when the current value of the resonant current (current iL1) passing through the second switch matches the current value of the load current iV flowing through the AC terminal 41V corresponding to the second switch. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current flowing through the AC terminal 41 corresponding to the first switch. Setting the length of the standby period Tdef to be the same as the length of the additional time Tad of the control signal for the first switch makes the current value of the resonant current (current iL1) at time point tc equal to the absolute value of the load current flowing through the AC terminal 41 corresponding to the first switch.

[0144] (3.2.2.2) Soft Switching Operation of the Second Switching Element

[0145] Figure 11 is exemplified in that the controller 50 has been predetermined to Figure 4A timing diagram of the waveforms of the control signals SU1, SU2, SV1, SV2, the control signal SU7, SV7, the load current iU, iV, the current iL1, and the voltages V2u, V2v across the second switching elements 2U, 2V, in a case where the two-phase resonant currents (i.e., the U-phase resonant current and the V-phase resonant current) will flow simultaneously in the time period corresponding to the area A2 shown, and before the first operation and the second operation are performed (which will also be referred to as "before the shift" below). Figure 12 The upper part shows that the controller 50 has been predetermined to be in Figure 4 The timing diagram of the situation where the two-phase resonant current (ie, the U-phase resonant current and the V-phase resonant current) will flow simultaneously in the period corresponding to the area A2 shown. In this case, Figure 12 The upper part of is a timing chart showing the waveforms of the control signals SU1, SU2, SV1, SV2, the control signals SU7, SV7, the load currents iU, iV, and the current iL1 before the shift. Figure 12 The lower part is shown in Figure 4 The timing diagram of the case where the controller 50 has performed both the first operation and the second operation in the period corresponding to the region A2 shown (which will be referred to as "after shifting") is shown. In this case, Figure 12 The lower part is a timing chart showing the waveforms of the control signals SU1, SU2, SV1, SV2, the control signals SU7, SV7, the load currents iU, iV, the current iL1, and the voltages V2u, V2v across the second switching elements 2U, 2V after the shift. Figure 12 In the example shown, the polarity of the load currents iU, iV flowing through the two AC terminals 41U, 41V respectively connected to the two switches 8U, 8V is negative, and the absolute value of the load current iV is greater than the absolute value of the load current iU.

[0146] exist Figure 12 In the illustrated example, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high-level period of the control signal SU7 to be applied to the switch 8U corresponding to one of the two AC terminals 41U, 41V through which the load current having the larger absolute value flows by the shortened period Tred. Figure 12 In the example shown, the controller 50 sets the length of the shortened period Tred so that the high level period of the control signal SU7 is as long as the resonance half period (= Tres / 2). Figure 12 In the example shown, the shortened period Tred is as long as the additional time Tau.

[0147] In addition, the controller 50 shifts the high-level period of the control signal SU7 by the shift time Tsu in the direction of delaying the high-level period of the control signal SU7 when performing the second operation. In this case, the controller 50 shifts each of the high-level period of the control signal SU7 for the switch 8U, the high-level period of the control signal SU1 for the first switching element 1U, and the high-level period of the control signal SU2 for the second switching element 2U by the shift time Tsu in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SV7 for the switch 8V starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8V has become equal to the extreme value (at Figure 12 In the example shown, after the minimum value), at the time point tc after the standby period Tdef has passed since the time point tb at which the current value of the resonant current (current iL1) passing through the switch 8V and the current value of the load current iV flowing through the AC terminal 41V corresponding to the switch 8V are consistent, the high level period of the control signal SU7 for the switch 8U begins. The absolute value of the resonant current (current iL1) at the time point tb is greater than the absolute value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U. The controller 50 determines the standby period Tdef by the formula Tdef=L×|iV-iU| / V15. The controller 50 determines the shift time by the formula Tsu=ΔT+Tdef. Figure 12 In the example shown, ΔT is the time lag between the start of the high-level period of the control signal SV2 for the second switching element 2V corresponding to the switch 8V and the end of the high-level period of the control signal SU1 for the first switching element 1U corresponding to the switch 8U. This ensures that the current value of the resonant current (current iL1) at the time point tc at the end of the standby period Tdef is equal to the absolute value of the load current iU. This enables the power converter 100 to perform zero-voltage soft switching of the second switching element 2U even if the high-level period of the control signal SU7 for the switch 8U does not include the additional time Tau and is as long as the resonant half-cycle (Tres / 2).

[0148] from Figure 12 The waveform of the current iL1 shown in the upper part and Figure 12As can be seen from the waveform of the current iL1 shown in the lower part of , when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the V-phase resonant current) will flow simultaneously, the controller 50 then performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the V-phase resonant current overlap with each other. In the same way, when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the W-phase resonant current overlap with each other. In the same way, when the controller 50 has predetermined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the V-phase resonant current and the W-phase resonant current overlap with each other.

[0149] In the power converter 100, if the controller 50 does not perform the first operation or the second operation, Figure 11 As shown, at the point in time when the control signals SU2 and SV2 transition from a low-level period to a high-level period (i.e., at the end of the dead-band period Td corresponding to each of the U-phase and V-phase), the voltages V2u and V2v across the second switching elements 2U and 2V do not drop to zero. That is, if the controller 50 does not perform the first or second operation, then at the end of the dead-band period Td corresponding to each of the U-phase and V-phase, the discharge from the resonant capacitors 9U and 9V has not yet been completed. Therefore, if the controller 50 does not perform the first or second operation, then at the end of the dead-band period Td corresponding to each of the U-phase and V-phase, the voltages V2u and V2v across the second switching elements 2U and 2V do not drop to zero. Therefore, in the power converter 100, the second switching elements 2U and 2V are hard-switched.

[0150] On the other hand, if the controller 50 has performed the first operation and the second operation, Figure 12 As shown in the lower portion of FIG, at the time when the control signals SU2 and SV2 transition from a low-level period to a high-level period (i.e., at the end of the dead-band period Td corresponding to each of the U-phase and V-phase), the voltages V2u and V2v across the second switching elements 2U and 2V drop to zero. That is, if the controller 50 has performed the first and second operations, then at the end of the dead-band period Td corresponding to each of the U-phase and V-phase, the discharge from the resonant capacitors 9U and 9V has already been completed. Therefore, in the power converter 100, if the controller 50 has performed the first and second operations, the second switching elements 2U and 2V are switched using zero-voltage soft switching.

[0151] The above referenced Figure 12 The following illustrates how the first and second operations can be performed when the controller 50 has predetermined that the U-phase resonant current and the V-phase resonant current will flow through the resonant inductor L1 at the same time. However, this is merely an example and should not be construed as limiting. For example, even if the controller 50 has predetermined that the V-phase resonant current and the W-phase resonant current will flow through the resonant inductor L1 at the same time, and even if the controller 50 has predetermined that the W-phase resonant current and the U-phase resonant current will flow through the resonant inductor L1 at the same time, zero-voltage soft switching can be performed by causing the controller 50 to perform the first and second operations.

[0152] The first operation and the second operation to be performed by the controller 50 in the case of the discharging operation can be summarized as follows.

[0153] When performing the first operation, the controller 50 shortens the high-level period of the control signal for the first switch corresponding to the load current having the larger absolute value between the first and second switches by a shortening period Tred. On the other hand, when performing the second operation, the controller 50 shifts the high-level period of the control signal for the first switch by a shifting time in a direction that delays the high-level period. In this case, the controller 50 shifts the high-level period of the control signal for the first switch so that, if the high-level period of the control signal for the second switch begins at time ta, the high-level period of the control signal for the first switch begins at time tc, after the current value of the resonant current (current iL1) passing through the second switch has reached its extreme value and after a standby period Tdef has elapsed since time tb, when the current value of the resonant current (current iL1) passing through the second switch matches the current value of the load current iV flowing through the AC terminal 41 corresponding to the second switch. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current flowing through the AC terminal 41 corresponding to the first switch. Setting the length of the standby period Tdef to be the same as the length of the additional time Tad of the control signal for the first switch makes the current value of the resonant current (current iL1) at time point tc equal to the absolute value of the load current flowing through the AC terminal 41 corresponding to the first switch.

[0154] (4) Summary

[0155] In the power converter 100 according to the first embodiment, the controller 50 performs a first operation and further performs a second operation when it is determined that the resonant currents flowing through two switches 8 of the plurality of switches 8 will flow simultaneously through the resonant inductor L1. Assuming that one of the two switches 8 is the first switch and the other of the two switches 8 is the second switch, the first operation includes shortening the high-level period of the control signal for the first switch by a shortened period Tred from a period including a resonant half-cycle (Tred / 2) and an additional time Tad. The resonant half-cycle (Tred / 2) is determined by the capacitance C of the resonant capacitor 9 of the plurality of resonant capacitors 9 corresponding to the first switch and the inductance L of the resonant inductor L1. The additional time Tad is determined by the voltage V15 of the regenerative capacitor 15, the inductance L of the resonant inductor L1, and the load current value. The second operation includes shifting the high-level period of the control signal for the first switch so that the high-level period of the control signal for the first switch begins when the standby period Tdef has elapsed since the current value of the resonant current through the second switch coincided with the current value of the load current flowing through the AC terminal 41 corresponding to the second switch, after the current value of the resonant current through the second switch has become equal to the extreme value. This enables the power converter 100 to perform soft switching more reliably.

[0156] In the power converter 100 , the shortened period Tred may be equal to or shorter than the additional time Tad. This enables the power converter 100 to perform soft switching even if the length of the shortened period Tred varies.

[0157] Furthermore, in the power converter 100, when performing the second operation, the controller 50 shifts the high-level period of the control signal for the first switch or the high-level period of the control signal for the second switch. This makes it possible to suppress variations in the line voltage. Alternatively, the controller 50 may be configured to shift the high-level period of the control signal for the first switch and the high-level period of the control signal for the second switch alternately or at an arbitrary ratio. This enables the power converter 100 to reduce the deviation in variations in the ripple of the line voltage. Furthermore, the power converter 100 can also disperse the period during which the resonant current flows through the resonant inductor L1, thereby reducing the thermal load on the resonant inductor L1.

[0158] (First Modification of the First Embodiment)

[0159] The power converter 100 according to the first modification of the first embodiment has the same features as the power converter 100 according to the first embodiment described above (see Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0160] Now, refer to Figure 13 How the power converter 100 according to the first modification performs soft switching on the first switching element 1 will be described. Figure 13 Can be used with Figure 10 and thus their description will be omitted in this article.

[0161] exist Figure 13 In the example shown, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high level period of the control signal SU6 to the switch 8U corresponding to one of the two AC terminals 41U, 41V through which the load current having the smaller absolute value flows by the shortened period Tred. Figure 13 In the example shown, the controller 50 sets the length of the shortened period Tred so that the high level period of the control signal SU6 is as long as the resonance half period (= Tres / 2). Figure 13 In the example shown, the shortened period Tred is as long as the additional time Tau.

[0162] In addition, when performing the second operation, the controller 50 shifts the high-level periods of the control signals SU6 and SU7 in opposite directions. More specifically, the controller 50 shifts the high-level period of the control signal SU6 by the shift time Tsu in the direction of delaying the high-level period of the control signal SU6, and also shifts the high-level period of the control signal SV6 by the shift time Tsv in the direction of advancing the high-level period of the control signal SV6. In this case, the controller 50 shifts each of the high-level periods of the control signals SU6, SU1, and SU2 by the shift time Tsu in the direction of delaying each of the high-level periods in these high-level periods, and also shifts each of the high-level periods of the control signals SV6, SV1, and SV2 by the shift time Tsv in the direction of advancing their high-level periods, so that if the high-level period of the control signal SV6 for the switch 8V starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8V has become equal to the extreme value (at Figure 13In the example shown, after the maximum value (maximum), the high-level period of control signal SU6 for switch 8U begins at time tc, after a standby period Tdef has elapsed since time tb, when the current value of the resonant current (current iL1) passing through switch 8V matches the current value of load current iV flowing through AC terminal 41V corresponding to switch 8V. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of load current iU flowing through AC terminal 41U corresponding to switch 8U. Controller 50 determines standby period Tdef using the equation Tdef = L × (iV - iU) / V15. Controller 50 determines shift time Tsu using the equation Tsu = (ΔT + Tdef) / 2, and shift time Tsv using the equation Tsv = (ΔT + Tdef) / 2. The ratio of shift time Tsu to shift time Tsv does not necessarily have to be 1:1, but may be any ratio. For example, the controller 50 may determine the shift time Tsu by the formula Tsu=(ΔT+Tdef)×0.4, and may determine the shift time Tsv by the formula Tsv=(ΔT+Tdef)×0.6. Figure 13 In the example shown, ΔT is the time lag between the start of the high-level period of the control signal SV1 for the first switching element 1V corresponding to the switch 8V and the end of the high-level period of the control signal SU2 for the second switching element 2U corresponding to the switch 8U. This ensures that the current value of the resonant current (current iL1) at the time point tc at the end of the standby period Tdef is equal to the absolute value of the load current iU. This enables the power converter 100 to perform zero-voltage soft switching of the first switching element 1U even if the high-level period of the control signal SU6 for the switch 8U does not include the additional time Tau and is as long as the resonant half-cycle (Tres / 2).

[0163] As from Figure 13 The waveform of the current iL1 shown in the upper part and Figure 13As can be seen from the waveform of the current iL1 shown in the lower part of , when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the V-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the V-phase resonant current overlap with each other. In the same way, when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the W-phase resonant current overlap with each other. In the same way, when the controller 50 has predetermined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the V-phase resonant current and the W-phase resonant current overlap with each other.

[0164] In the power converter 100 according to the first modification, if the controller 50 does not perform the first operation or the second operation, as in the first embodiment, Figure 9 As shown, at the point in time when the control signals SU1 and SV1 transition from a low-level period to a high-level period (i.e., at the end of the dead-band period Td corresponding to each of the U-phase and V-phase), the voltages V2u and V2v across the second switching elements 2U and 2V do not rise to Vd. That is, if the controller 50 does not perform the first or second operation, the resonant capacitors 9U and 9V are not fully charged at the end of the dead-band period Td corresponding to each of the U-phase and V-phase. Therefore, if the controller 50 does not perform the first or second operation, the voltages across the first switching elements 1U and 1V do not drop to zero at the end of the dead-band period Td corresponding to each of the U-phase and V-phase. Therefore, in the power converter 100, the first switching elements 1U and 1V are hard-switched.

[0165] On the other hand, if the controller 50 has performed the first operation and the second operation, Figure 13 As shown in the lower portion of FIG, at the time when the control signals SU1 and SV1 transition from a low-level period to a high-level period (i.e., at the end of the dead-band period Td corresponding to each of the U-phase and V-phase), the voltages V2u and V2v across the second switching elements 2U and 2V rise to Vd. That is, if the controller 50 has performed the first and second operations, then at the end of the dead-band period Td corresponding to each of the U-phase and V-phase, the resonant capacitors 9U and 9V have already been charged. Therefore, in the power converter 100, if the controller 50 has performed the first and second operations, the first switching elements 1U and 1V are switched using zero-voltage soft switching.

[0166] Figure 13 The following illustrates how the first and second operations can be performed when the controller 50 has predetermined that the U-phase resonant current and the V-phase resonant current will flow through the resonant inductor L1 simultaneously. However, this is merely an example and should not be construed as limiting. For example, even if the controller 50 has predetermined that the V-phase resonant current and the W-phase resonant current will flow through the resonant inductor L1 simultaneously, and even if the controller 50 has predetermined that the W-phase resonant current and the U-phase resonant current will flow through the resonant inductor L1 simultaneously, the first switching element can be subjected to zero-voltage soft switching by having the controller 50 perform the first and second operations.

[0167] In the case of performing soft switching on the second switching element 2, zero voltage soft switching can also be performed by causing the controller 50 to perform the first operation and the second operation. Even in this case, assuming that one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents having the same polarity flow is regarded as the first switch and the other switch is regarded as the second switch, the controller 50 performs the first operation and the second operation.

[0168] The first operation and the second operation to be performed by the controller 50 can be summarized as follows.

[0169] During the first operation, the controller 50 shortens the high-level period of the control signal for the first switch corresponding to the load current having a larger absolute value, of the first and second switches, by a shortened period Tred. Meanwhile, during the second operation, the controller 50 shifts the high-level period of the control signal for the first switch in a direction that delays its high-level period, and also shifts the high-level period of the control signal for the second switch in a direction that advances its high-level period. In this case, the controller 50 shifts the high-level period of the control signal for the second switch and the high-level period of the control signal for the first switch in opposite directions, such that if the high-level period of the control signal for the second switch begins at time ta, the high-level period of the control signal for the first switch begins at time tc, after the current value of the resonant current (current iL1) passing through the second switch has reached its extreme value and after a standby period Tdef has elapsed since time tb, when the current value of the resonant current (current iL1) passing through the second switch and the current value of the load current corresponding to the second switch coincide. The absolute value of the resonant current (current iL1) at time point tb is greater than the absolute value of the load current flowing through AC terminal 41 corresponding to the first switch. Setting the length of standby period Tdef to be the same as the length of the additional time Tad of the control signal for the first switch allows the current value of the resonant current (current iL1) at time point tc to be equal to the absolute value of the load current flowing through AC terminal 41 corresponding to the first switch. This enables power converter 100 to perform soft switching more reliably.

[0170] Furthermore, in the power converter 100 according to the first modification, when performing the first operation and the second operation, the controller 50 shortens the high-level period of one of the two control signals for the two switches 8 and shifts the high-level periods of the control signals for the two switches 8 in directions different from each other. This enables the power converter 100 according to the first modification to contribute to an increase in operating frequency and cope with shorter carrier cycles.

[0171] (Second Modification of the First Embodiment)

[0172] The power converter 100 according to the second modification of the first embodiment has the same features as the power converter 100 according to the first embodiment (see Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0173] Now, refer to Figure 14 and Figure 15 How the power converter 100 according to the second modification example operates will be described.

[0174] In the second modification, if Figure 14As shown, the controller 50 postpones the end time of the high level period of the control signal SU6 from the end time t3 of the dead zone period Td by the clamping period (whose length is as long as the length of the additional time Tau). Figure 2 In the case shown in FIG, the high level period of the control signal SU6 is longer. In addition, in the second modification, as shown in FIG. Figure 15 As shown, the controller 50 also postpones the end time of the high level period of the control signal SU7 from the end time t33 of the dead time period Td by the clamping period (whose length is the same as the length of the additional time Tau). Figure 7 Compared with the case shown, the high level period of the control signal SU6 is longer.

[0175] exist Figure 14 In the example shown, the current iL1 starts to flow through the resonant inductor L1 at the start time t1 of the high level period of the control signal SU6, and becomes zero at the time point t4 after the clamping period (additional time Tau) has passed since the end time t3 of the dead time period Td. Regarding the current iL1, from the start time t2 of the dead time period Td, the current iL1 satisfies iL1 ≥ iU, so as Figure 14 The current iL1 in the shaded portion of the current waveform shown in the fourth waveform from the top flows into the resonant capacitor 9U to generate LC resonance. In the clamp period from the end time t3 of the dead time period Td until time t4, the current iL1 flows through a path that passes through the resonant inductor L1, the switch 8U (the first IGBT 6U), the AC terminal 41U, and the AC load RA1 in this order.

[0176] exist Figure 15 In the example shown, current iL1 begins flowing through resonant inductor L1 at time t31, the start of the high-level period of control signal SU7, and becomes zero at time t34, after the additional time Tau has elapsed since time t33, the end of dead-band period Td. Regarding current iL1, from time t32, the start of dead-band period Td, current iL1 satisfies iL1 ≤ iU, thus generating LC resonance and causing a resonant current (i.e., the discharge current of resonant capacitor 9U) to flow from resonant capacitor 9U toward resonant inductor L1. During the clamp period from time t33, the end of dead-band period Td, until time t34, current iL1 flows through a path that sequentially passes through AC load RA1, switch 8U (second IGBT 7U), and resonant inductor L1.

[0177] In the second variant example, the controller 50 also sets a clamping period (whose length is the same as the additional time Tav) for the high level period of each control signal SV6 and SV7, and sets a clamping period (whose length is the same as the additional time Taw) for the high level period of each control signal SW6 and SW7.

[0178] The operation of the controller 50 according to the second modification example is different from the operation of the controller 50 according to the first embodiment only in setting the clamp period.

[0179] Thus, in the power converter 100 according to the second modification, as in the power converter 100 according to the first embodiment, the controller 50 also performs the first operation and further performs the second operation when determining that the resonant currents flowing through two switches 8 belonging to the plurality of switches 8 will flow simultaneously through the resonant inductor L1. Assuming that one of the two switches 8 is the first switch and the other of the two switches 8 is the second switch, the first operation includes shortening the high-level period of the control signal for the first switch by the shortened period Tred from the period including the resonant half-cycle (Tred / 2) and the additional time Tad. The resonant half-cycle (Tred / 2) is determined by the one resonant capacitor 9 corresponding to the first switch and the resonant inductor L1. The additional time Tad is determined by the voltage V15 of the regenerative capacitor 15 and the inductance L of the resonant inductor L1. The second operation involves shifting the high-level period of the control signal for the first switch so that the high-level period of the control signal for the first switch begins when the standby period Tdef has elapsed since the current value of the resonant current passing through the second switch coincided with the current value of the load current flowing through the AC terminal 41 corresponding to the second switch, after the current value of the resonant current passing through the second switch has reached an extreme value. This enables the power converter 100 according to the second modification to perform soft switching more reliably, as does the power converter 100 according to the first embodiment.

[0180] (Second embodiment)

[0181] The power converter 100 according to the second embodiment has the same features as the power converter 100 according to the first embodiment described above (refer to FIG. Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0182] In the power converter 100 according to the second embodiment, the controller 50 performs the first operation and the second operation when it is determined that the three-phase resonant currents will overlap with each other in both the operation of soft switching of the first switching element 1 and the operation of soft switching of the second switching element 2, which is different from the power converter 100 according to the first embodiment.

[0183] Now, refer to Figure 16 and Figure 17 The following describes how the controller 50 performs the soft switching operation on the first switching element 1 when it is determined that the resonant currents respectively passing through the three switches 8 belonging to the plurality of switches 8 will flow through the resonant inductor L1 at the same time.

[0184] When it is determined that the resonant currents flowing through the three switches 8 belonging to the plurality of switches 8 will flow simultaneously through the resonant inductor L1, the controller 50 not only performs the first and second operations on at least one of the first and second switches, but also stops the operation of the switch 8 corresponding to the AC terminal 41 of the one phase through which the load current of different polarity flows. In other words, the controller 50 reduces the high-level period of the control signal to zero within one carrier cycle. As used herein, the expression "when it is determined that the resonant currents flowing through the three switches 8 belonging to the plurality of switches 8 will flow simultaneously" refers to a situation in which it has been presumed that the resonant currents flowing through the three switches 8 will flow simultaneously through the resonant inductor L1. For example, if the time lag between the start moment of the high-level period of the control signal SU6 corresponding to the U phase and the start moment of the high-level period of the control signal SV6 corresponding to the V phase, the time lag between the start moment of the high-level period of the control signal SV6 corresponding to the V phase and the start moment of the high-level period of the control signal SW6 corresponding to the W phase, and the time lag between the start moment of the high-level period of the control signal SW6 corresponding to the W phase and the start moment of the high-level period of the control signal SU6 corresponding to U are all less than the threshold value, the controller 50 determines that the three-phase resonant currents will flow simultaneously.

[0185] Assuming that the capacitance of each of the plurality of resonant capacitors 9U, 9V, and 9W is C, if the U-phase current, the V-phase current, and the W-phase current simultaneously flow through the resonant inductor L1, then in the equivalent circuit, a capacitor having a combined capacitance (=3×C) of the resonant capacitors 9U, 9V, and 9W is connected in series with the resonant inductor L1. Therefore, in power converter 100, if the three-phase current simultaneously flows through resonant inductor L1, the resonant frequency of the resonant circuit including resonant inductor L1 changes compared to the case where a single-phase current flows through resonant inductor L1. Consequently, power converter 100 may be unable to perform zero-voltage soft switching.

[0186] Figure 16 A timing diagram is shown illustrating a situation where the controller 50 has predetermined that three-phase resonant currents (i.e., U-phase resonant current, V-phase resonant current, and W-phase resonant current) will flow simultaneously and the first operation or the second operation has not yet started (i.e., before shifting). Figure 16It is a timing diagram showing the waveforms of control signals SU1, SU2, SV1, SV2, SW1, SW2, SU6, SV6, SW6, load currents iU, iV, iW, current iL1, and voltages V2u, V2v, V2w across the second switching elements 2U, 2V, 2W.

[0187] Figure 17 is a timing diagram illustrating a case where the controller 50 has predetermined that three-phase resonant currents (i.e., U-phase resonant current, V-phase resonant current, and W-phase resonant current) will flow simultaneously and has performed both the first operation and the second operation (i.e., after shifting). Figure 17 1 is a timing diagram showing the waveforms of the control signals SU1, SU2, SV1, SV2, SW1, SW2, SU6, SV6, SW6, the load currents iU, iV, iW, the current iL1, and the voltages V2u, V2v, V2w across the second switching elements 2U, 2V, 2W. Figure 17 , a high-level period of the control signal SW6 before the high-level period of the control signal SW6 is reduced to zero is indicated by a dotted line.

[0188] exist Figure 16 In the example shown, the polarity of the load currents iU and iV is positive, the polarity of the load current iW is negative, and the absolute value of the load current iU is greater than the absolute value of the load current iV. When performing the first operation, the controller 50 compares the absolute value of the load current iU with the absolute value of the load current iV for the load currents iU and iV having the same polarity, and shortens the high level period of the control signal SV6 for the switch 8V corresponding to the AC terminal 41V through which the load current with the smaller absolute value flows by the shortened period Tred (refer to FIG. Figure 17 ).exist Figure 17 In the example shown, the controller 50 sets the length of the shortened period Tred so that the length of the high level period of the control signal SV6 is as long as the length of the resonance half period (= Tres / 2). Figure 17 In the example shown, the shortened period Tred is as long as the additional time Tav.

[0189] In addition, the controller 50 shifts the high-level period of the control signal SV6 by the shift time Tsv in the direction of delaying the high-level period of the control signal SV6 when performing the second operation. In this case, the controller 50 shifts each of the high-level period of the control signal SV6 for the switch 8V, the high-level period of the control signal SV1 for the first switching element 1V, and the high-level period of the control signal SV2 for the second switching element 2 by the shift time Tsv in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SU6 for the switch 8U starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8U becomes equal to the extreme value (for example, at Figure 17 In the example shown, after the maximum value (maximum value), at the time point tc after the standby period Tdef has passed since the time point tb at which the current value of the resonant current (current iL1) passing through the switch 8U and the current value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U are consistent, the high level period of the control signal SV6 for the switch 8V begins. The absolute value of the resonant current (current iL1) at the time point tb is greater than the absolute value of the load current iV flowing through the AC terminal 41V corresponding to the switch 8V. The controller 50 determines the standby period Tdef by the formula Tdef=L×(iV-iU) / V15. The controller 50 determines the shift time Tsv by the formula Tsu=ΔT+Tdef. Figure 16 In the example shown, ΔT is the time lag between the end of the high-level period of the control signal SV2 for the second switching element 2V corresponding to the switch 8V and the start of the high-level period of the control signal SU1 for the first switching element 1U corresponding to the switch 8U. This ensures that the current value of the resonant current (current iL1) at the end time tc of the standby period Tdef is equal to the absolute value of the load current iV. This enables the power converter 100 to perform zero-voltage soft switching of the first switching element 1V even if the high-level period of the control signal SV6 for the switch 8V does not include the additional time Tav and is as long as the resonant half-cycle (Tres / 2).

[0190] As from Figure 16 The waveform of the current iL1 and Figure 17 It can be seen from the waveform of the current iL1 shown that if the controller 50 has predetermined that the three-phase resonant current (i.e., the U-phase resonant current, the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the power converter 100 can shorten the period in which the U-phase resonant current and the V-phase resonant current overlap with each other by causing the controller 50 to perform the first operation and the second operation.

[0191] In the power converter 100, if the controller 50 does not perform the first operation or the second operation, Figure 16 As shown, at the point in time when the control signals SU1 and SV1 transition from a low-level period to a high-level period (i.e., at the end of the dead-band period Td corresponding to each of the U-phase and V-phase), the voltages V2u and V2v across the second switching elements 2U and 2V do not rise to Vd. That is, if the controller 50 does not perform the first or second operation, the resonant capacitors 9U and 9V will not be fully charged at the end of the dead-band period Td corresponding to each of the U-phase and V-phase. Therefore, if the controller 50 does not perform the first or second operation, the voltages across the first switching elements 1U and 1V will not drop to zero at the end of the dead-band period Td corresponding to each of the U-phase and V-phase. Therefore, in the power converter 100, the first switching elements 1U and 1V are hard-switched.

[0192] On the other hand, if the controller 50 has performed the first operation and the second operation, Figure 17 As shown, at the point in time when the control signals SU1 and SV1 transition from a low-level period to a high-level period (i.e., at the end of the dead-band period Td corresponding to each of the U-phase and V-phase), the voltages V2u and V2v across the second switching elements 2U and 2V rise to Vd. That is, if the controller 50 has already performed the first and second operations, then at the end of the dead-band period Td corresponding to each of the U-phase and V-phase, the resonant capacitors 9U and 9V have already been charged. Therefore, in the power converter 100, if the controller 50 has already performed the first and second operations, the first switching elements 1U and 1V are switched using zero-voltage soft switching.

[0193] The above referenced Figure 17 An example is shown in which the first operation and the second operation are performed when the load currents iU, iV, and iW have the same polarity and only the load current iW has a different polarity. However, this is merely an example and should not be construed as limiting. Alternatively, for example, even when the load currents iV and iW have the same polarity and only the load current iU has a different polarity, the controller 50 performs the first operation and the second operation, zero voltage soft switching can also be performed. Still alternatively, for example, even when the load currents iW and iU have the same polarity and only the load current iV has a different polarity, the controller 50 performs the first operation and the second operation, zero voltage soft switching of the first switching elements 1U, 1V, and 1W can also be performed.

[0194] Even in the case of performing soft switching operation on the second switching element 2, zero-voltage soft switching can be performed by causing the controller 50 to perform the first operation and the second operation. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents having the same polarity flow is the first switch and the other is the second switch, the controller 50 also performs the first operation and the second operation, and stops the operation of the other switch 8 corresponding to the load current having a different polarity (i.e., reduces the length of the high-level period to zero).

[0195] In the power converter 100 according to the second embodiment, the controller 50 performs a first operation and further performs a second operation when determining that resonant currents flowing through three switches 8 belonging to the plurality of switches 8 will simultaneously flow through the resonant inductor L1. Assuming that one of the two switches 8 among the three switches 8 that correspond one-to-one to two AC terminals 41 belonging to the three AC terminals 41 through which load currents of the same polarity flow is the first switch, and the other of the two switches 8 is the second switch, the first operation includes shortening the high-level period of the control signal for the first switch by a shortened period Tred from a period including a resonant half-cycle (Tred / 2) and an additional time Tad. The resonant half-cycle (Tred / 2) is determined by the capacitance C of the resonant capacitor 9 corresponding to the first switch among the plurality of resonant capacitors 9 and the inductance L of the resonant inductor L1. The additional time Tad is determined by the voltage V15 of the regenerative capacitor 15 and the inductance L of the resonant inductor L1. The second operation includes shifting the high-level period of the control signal for the first switch so that the high-level period of the control signal for the first switch begins after the current value of the resonant current passing through the second switch has reached an extreme value and after a standby period Tdef has elapsed since the current value of the resonant current passing through the second switch and the current value of the load current flowing through the AC terminal 41 corresponding to the second switch become consistent. This enables the power converter 100 to perform soft switching more reliably.

[0196] (Third embodiment)

[0197] The power converter 100 according to the third embodiment has the same features as the power converter 100 according to the first embodiment described above (refer to Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0198] Now, refer to Figure 18 How the power converter 100 according to the third embodiment performs soft switching on the first switching element 1 will be described. Figure 18 Can be used with Figure 10 and thus their description will be omitted in this article.

[0199] exist Figure 18 In the illustrated example, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high-level period of the control signal SU6 to be applied to the switch 8U corresponding to one of the two AC terminals 41U, 41V through which the load current having the smaller absolute value flows by the shortened period Tred. Figure 18 In the example shown, the controller 50 sets the length of the shortened period Tred so that the high level period of the control signal SU6 is as long as the resonance half period (= Tres / 2). Figure 18 In the example shown, the shortened period Tred is as long as the additional time Tau.

[0200] In addition, the controller 50 shifts the high-level period of the control signal SU6 by the shift time Tsu in the direction of delaying the high-level period of the control signal SU6 when performing the second operation. In this case, the controller 50 shifts the high-level period of the control signal SU6 for the switch 8U, the high-level period of the control signal SU1 for the first switching element 1U, and the high-level period of the control signal SU2 for the second switching element 2U by the shift time Tsu in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SV6 for the switch 8V starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8V has become equal to the extreme value (for example, at Figure 18 In the example shown, after the maximum value), the standby period Tdef (reference time) has passed since the time point tb at which the current value of the resonant current (current iL1) passing through the switch 8V and the current value of the load current iV flowing through the AC terminal 41V corresponding to the switch 8V match. Figure 10 ) at the time point tc, the high level period of the control signal SU6 for the switch 8U starts. Figure 10 ) is set to zero. The absolute value of the resonant current (current iL1) at the time point tb is greater than the absolute value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U. The controller 50 sets the length of the shift time Tsu to be as long as ΔT. Figure 18 In the example shown, ΔT is the time lag between the start time of the high-level period of the control signal SV1 for the first switching element 1V corresponding to the switch 8V and the end time of the high-level period of the control signal SU2 for the second switching element 2U corresponding to the switch 8U. This enables the power converter 100 to perform zero-voltage soft switching of the first switching element 1U even if the high-level period of the control signal SU6 for the switch 8U does not include the additional time Tau but is as long as the resonant half period (Tres / 2).

[0201] As from Figure 18 The waveform of the current iL1 shown in the upper part and Figure 18 It can be seen from the waveform of the current iL1 shown in the lower part that when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the V-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period in which the U-phase resonant current and the V-phase resonant current overlap with each other.

[0202] In the power converter 100, if the controller 50 does not perform the first operation or the second operation, Figure 9 As shown, the first switching elements 1U, 1V are hard switched.

[0203] On the other hand, in the power converter 100, the controller 50 performs the first operation and the second operation, so as Figure 18 As shown, the first switching elements 1U, 1V are switched by zero-voltage soft switching.

[0204] In the same manner, if the controller 50 has previously determined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the W-phase resonant current overlap with each other to perform zero-voltage soft switching of the first switching elements 1U, 1W. Furthermore, if the controller 50 has previously determined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the V-phase resonant current and the W-phase resonant current overlap with each other to perform zero-voltage soft switching of the first switching elements 1V, 1W.

[0205] Even when the second switching element 2 is subjected to soft switching, zero-voltage soft switching can be performed by causing the controller 50 to perform the first and second operations. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents having the same polarity flow is the first switch and the other is the second switch, the controller 50 also performs the first and second operations.

[0206] (Fourth embodiment)

[0207] The power converter 100 according to the fourth embodiment has the same features as the power converter 100 according to the first embodiment described above (see Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0208] Now, refer to Figure 19How the power converter 100 according to the fourth embodiment performs soft switching on the first switching element 1 will be described. Figure 19 Can be used with Figure 10 and thus their description will be omitted in this article.

[0209] exist Figure 19 In the illustrated example, when performing the first operation, the controller 50 compares the absolute values ​​of the load currents iU and iV. This reduces the high-level period of the control signal SV6 applied to the switch 8V corresponding to the AC terminal 41V through which the load current having the larger absolute value flows, of the two AC terminals 41U and 41V, by a reduced period Tred. The controller 50 determines the reduced period Tred using the equation Tred = Tav - Tav2. In this case, the controller 50 determines Tav2 using the equation Tav2 = L × (iV - iU) / V15. In other words, reducing the high-level period by the reduced period Tred shortens the additional time Tav of the control signal SV6 to Tav2. As used herein, Tav2 refers to the additional time remaining after the control signal SV6 has been reduced by the reduced period Tred.

[0210] In addition, the controller 50 shifts the high-level period of the control signal SV6 by the shift time Tsv in the direction of delaying the high-level period of the control signal SV6 when performing the second operation. In this case, the controller 50 shifts the high-level period of the control signal SV6 for the switch 8V, the high-level period of the control signal SV1 for the first switching element 1V, and the high-level period of the control signal SV2 for the second switching element 2V by the shift time Tsv in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SV6 for the switch 8V starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8V has become equal to the extreme value (for example, at Figure 19In the example shown, after the local maximum value, at time point tc after a new additional time Tav2 has passed since time point tb at which the current value of the resonant current (current iL1) passing through the switch 8V and the current value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U coincide, the resonant half cycle included in the high level period of the control signal SV6 for the switch 8V begins. As used herein, the new additional time Tav2 refers to the time remaining after the additional time Tad of the original control signal SV6 has been shortened by the shortened period Tred. The absolute value of the resonant current (current iL1) at time point tb is equal to the absolute value of the load current iU and is less than the absolute value of the load current iV. The controller 50 determines the shortened period Tred by the formula Tred = Tav-Tav2. In this case, the controller 50 determines the new Tav2 by the formula Tav2 = L×(iV-iU) / V15. The controller 50 sets the shift time Tsu to be as long as ΔT. In Figure 19 In the example shown, ΔT is the time lag between the start time of the high-level period of the control signal SU1 for the first switching element 1U corresponding to the switch 8U and the end time of the high-level period of the control signal SV2 for the second switching element 2V corresponding to the switch 8V. This makes the current value of the resonant current (current iL1) equal to the absolute value of the load current iV at the end time tc of the new additional time Tav2. This enables the power converter 100 to perform zero-voltage soft switching of the first switching element 1U even if the additional time Tav of the high-level period of the control signal SV6 for the switch 8V is shortened from the original additional time Tav to the new additional time Tav2.

[0211] As from Figure 19 The waveform of the current iL1 shown in the upper part and Figure 19 It can be seen from the waveform of the current iL1 shown in the lower part that when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the V-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period in which the U-phase resonant current and the V-phase resonant current overlap with each other.

[0212] In the power converter 100, if the controller 50 does not perform the first operation or the second operation, Figure 9 As shown, the first switching elements 1U, 1V are hard switched.

[0213] On the other hand, in the power converter 100, the controller 50 performs the first operation and the second operation, and therefore, as shown in FIG. Figure 19 As shown, the first switching elements 1U, 1V are switched by zero-voltage soft switching.

[0214] In the same manner, if the controller 50 has previously determined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the W-phase resonant current overlap with each other to perform zero-voltage soft switching of the first switching elements 1U, 1W. Furthermore, if the controller 50 has previously determined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the V-phase resonant current and the W-phase resonant current overlap with each other to perform zero-voltage soft switching of the first switching elements 1V, 1W.

[0215] Even when the second switching element 2 is subjected to soft switching, zero-voltage soft switching can be performed by causing the controller 50 to perform the first and second operations. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents having the same polarity flow is the first switch and the other is the second switch, the controller 50 also performs the first and second operations.

[0216] (Fifth embodiment)

[0217] The power converter 100 according to the fifth embodiment has the same features as the power converter 100 according to the first embodiment described above (refer to Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0218] Now, refer to Figure 20 How the power converter 100 according to the fifth embodiment performs soft switching on the first switching element 1 will be described. Figure 20 Can be used with Figure 19 and thus their description will be omitted in this article.

[0219] In the power converter 100 according to the fifth embodiment, the controller 50 shortens the additional time Tav2 (refer to Figure 19 ) is set to zero (ie, the shortened period Tred according to the fourth embodiment satisfies Tred=Tav), which is different from the power converter 100 according to the fourth embodiment.

[0220] exist Figure 20In the illustrated example, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high-level period of the control signal SV6 to be applied to the switch 8V corresponding to the AC terminal 41V through which the load current having the larger absolute value of the two AC terminals 41U, 41V flows by the shortened period Tred. Figure 20 In the illustrated example, the controller 50 sets the shortened period Tred satisfying Tred=Tav.

[0221] In addition, the controller 50 shifts the high-level period of the control signal SV6 by the shift time Tsv in the direction of delaying the high-level period of the control signal SV6 when performing the second operation. In this case, the controller 50 shifts the high-level period of the control signal SV6 for the switch 8V, the high-level period of the control signal SV1 for the first switching element 1V, and the high-level period of the control signal SV2 for the second switching element 2V by the shift time Tsv in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SU6 for the switch 8U starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8U has become equal to the extreme value (for example, at Figure 20 In the example shown, after the local maximum value, at a time point tc after the standby period Tdef has elapsed since the time point tb at which the current value of the resonant current (current iL1) passing through the switch 8U and the current value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U coincide, the resonant half cycle included in the high-level period of the control signal SV6 for the switch 8V begins. The absolute value of the resonant current (current iL1) at the time point tb is equal to the absolute value of the load current iU and smaller than the absolute value of the load current iV. The controller 50 will be in the additional time Tav2 (reference time) after the additional time Tav for the control signal SV6 has been shortened by the shortened period Tred. Figure 19 ) is set to zero. In addition, the controller 50 sets the shift time Tsv to satisfy Tsv=ΔT. Figure 20 In the example shown, ΔT is the time lag between the start time of the high-level period of the control signal SU1 for the first switching element 1U corresponding to the switch 8U and the end time of the high-level period of the control signal SV2 for the second switching element 2V corresponding to the switch 8V. This enables the power converter 100 to perform zero-voltage soft switching of the first switching element 1U and basically to perform zero-voltage soft switching of the first switching element 1V. This can make it possible to Figure 9 Compared with the case shown, the voltage V2v across the second switching element 2V at the end timing of the high level period of the control signal SV6 is even closer to Vd, thereby substantially performing soft switching.

[0222] As from Figure 20 The waveform of the current iL1 shown in the upper part and Figure 20 It can be seen from the waveform of the current iL1 shown in the lower part that when the controller 50 has predetermined that the two-phase resonant current (i.e., the U-phase resonant current and the V-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period in which the U-phase resonant current and the V-phase resonant current overlap with each other.

[0223] In the same manner, if the controller 50 has previously determined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the W-phase resonant current overlap with each other. In addition, if the controller 50 has previously determined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the V-phase resonant current and the W-phase resonant current overlap with each other.

[0224] Even when the second switching element 2 is subjected to soft switching, the controller 50 performs the first and second operations. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents of the same polarity flow is the first switch and the other is the second switch, the controller 50 performs the first and second operations.

[0225] (Sixth embodiment)

[0226] The power converter 100 according to the sixth embodiment has the same features as the power converter 100 according to the first embodiment described above (see Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0227] Now, refer to Figure 21 How the power converter 100 according to the sixth embodiment performs soft switching on the first switching element 1 will be described. Figure 21 Can be used with Figure 10 and thus their description will be omitted in this article.

[0228] exist Figure 21 In the illustrated example, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high-level period of the control signal SV6 to be applied to the switch 8V corresponding to the AC terminal 41V through which the load current having the smaller absolute value of the two AC terminals 41U, 41V flows by the shortened period Tred. Figure 21In the illustrated example, the controller 50 sets the shortened period Tred satisfying Tred=Tav.

[0229] In addition, the controller 50 shifts the high-level period of the control signal SV6 by the shift time Tsv in the direction of delaying the high-level period of the control signal SV6 when performing the second operation. In this case, the controller 50 shifts the high-level period of the control signal SV6 for the switch 8V, the high-level period of the control signal SV1 for the first switching element 1V, and the high-level period of the control signal SV2 for the second switching element 2V by the shift time Tsv in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SV6 for the switch 8V starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8V has become equal to the extreme value (for example, at Figure 21 In the example shown, after the local maximum value, at a time point tc after the standby period Tdef has passed since the time point tb at which the current value of the resonant current (current iL1) passing through the switch 8V and the current value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U are consistent, the resonant half cycle included in the high level period of the control signal SV6 for the switch 8V begins. The absolute value of the resonant current (current iL1) at the time point tb is equal to the absolute value of the load current iU and is greater than the absolute value of the load current iV. The controller 50 determines the standby period Tdef by the formula Tdef=L×(iU-iV) / V15. In addition, the controller 50 determines the shift time Tsv by the formula Tsv=ΔT+Tdef. Figure 21 In the example shown, ΔT is the time lag between the start time of the high-level period of the control signal SU1 for the first switching element 1U corresponding to the switch 8U and the end time of the high-level period of the control signal SV2 for the second switching element 2V corresponding to the switch 8V. This enables the power converter 100 to perform zero-voltage soft switching of the first switching elements 1U, 1V by causing the controller 50 to perform the first operation and the second operation when the controller 50 has previously determined that two-phase resonant current (i.e., U-phase resonant current and V-phase resonant current) will flow through the resonant inductor L1.

[0230] In the same manner, if the controller 50 has previously determined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to perform zero-voltage soft switching of the first switching elements 1U, 1W. Furthermore, if the controller 50 has previously determined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to perform zero-voltage soft switching of the first switching elements 1V, 1W.

[0231] Even when soft switching is being performed on the second switching element 2, the controller 50 performs the first and second operations. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents of the same polarity flow is the first switch and the other is the second switch, the controller 50 performs the first and second operations. This enables the power converter 100 to perform zero-voltage soft switching of the second switching element 2.

[0232] (Seventh embodiment)

[0233] The power converter 100 according to the seventh embodiment has the same features as the power converter 100 according to the first embodiment described above (refer to Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0234] Now, refer to Figure 22 How the power converter 100 according to the seventh embodiment performs soft switching on the first switching element 1 will be described. Figure 22 Can be used with Figure 21 and thus their description will be omitted in this article.

[0235] In the power converter 100 according to the seventh embodiment, the controller 50 sets the standby period Tdef (refer to Figure 21 ) is set to zero, which is different from the power converter 100 according to the sixth embodiment.

[0236] exist Figure 22 In the illustrated example, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high-level period of the control signal SV6 to be applied to the switch 8V corresponding to the AC terminal 41V through which the load current having the smaller absolute value of the two AC terminals 41U, 41V flows by the shortened period Tred. Figure 22 In the illustrated example, the controller 50 sets the shortened period Tred satisfying Tred=Tav.

[0237] In addition, the controller 50 shifts the high-level period of the control signal SV6 by the shift time Tsv in the direction of delaying the high-level period of the control signal SV6 when performing the second operation. In this case, the controller 50 shifts the high-level period of the control signal SV6 for the switch 8V, the high-level period of the control signal SV1 for the first switching element 1V, and the high-level period of the control signal SV2 for the second switching element 2V by the shift time Tsv in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SU6 for the switch 8U starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8U has become equal to the extreme value (for example, at Figure 22 In the example shown, after the local maximum value, at a time point tc after the standby period Tdef has passed since the time point tb at which the current value of the resonant current (current iL1) passing through the switch 8U and the current value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U coincide, the resonant half cycle included in the high level period of the control signal SV6 for the switch 8V begins. The absolute value of the resonant current (current iL1) at the time point tb is equal to the absolute value of the load current iU and greater than the absolute value of the load current iV. The controller 50 sets the standby period Tdef to zero. In addition, the controller 50 sets the shift time Tsv that satisfies Tsv=ΔT+Tdef. Figure 22 In the example shown, ΔT is the time lag between the start time of the high-level period of the control signal SU1 for the first switching element 1U corresponding to the switch 8U and the end time of the high-level period of the control signal SV2 for the second switching element 2V corresponding to the switch 8V. This enables the power converter 100 to perform zero-voltage soft switching of the first switching elements 1U, 1V by causing the controller 50 to perform the first operation and the second operation when the controller 50 has previously determined that the U-phase resonant current and the V-phase resonant current will flow through the resonant inductor L1.

[0238] In the same manner, if the controller 50 has previously determined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to perform zero-voltage soft switching of the first switching elements 1U, 1W. Furthermore, if the controller 50 has previously determined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to perform zero-voltage soft switching of the first switching elements 1V, 1W.

[0239] Even when soft switching is being performed on the second switching element 2, the controller 50 performs the first and second operations. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents of the same polarity flow is the first switch and the other is the second switch, the controller 50 performs the first and second operations. This enables the power converter 100 to perform zero-voltage soft switching of the second switching element 2.

[0240] (Eighth embodiment)

[0241] The power converter 100 according to the eighth embodiment has the same features as the power converter 100 according to the first embodiment described above (see Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0242] Now, refer to Figure 23 How the power converter 100 according to the eighth embodiment performs soft switching on the first switching element 1 will be described. Figure 23 Can be used with Figure 10 and thus their description will be omitted in this article.

[0243] exist Figure 23 In the illustrated example, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high-level period of the control signal SU6 to be applied to the switch 8U corresponding to the one AC terminal 41U through which the load current having a larger absolute value flows, of the two AC terminals 41U, 41V, by the shortened period Tred. Figure 23 In the example shown, the controller 50 determines the shortened period Tred by the formula Tred=Tau-Tau2. In this case, the controller 50 determines a new Tau2 by the formula Tau2=L×(iU-iV) / V15.

[0244] In addition, the controller 50 shifts the high-level period of the control signal SU6 by the shift time Tsu in the direction of delaying the high-level period of the control signal SU6 when performing the second operation. In this case, the controller 50 shifts the high-level period of the control signal SU6 for the switch 8U, the high-level period of the control signal SU1 for the first switching element 1U, and the high-level period of the control signal SU2 for the second switching element 2U by the shift time Tsu in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SV6 for the switch 8V starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8V has become equal to the extreme value (for example, at Figure 23In the example shown, after the local maximum value, at a time point tc after a new additional time Tau2 has passed since a time point tb at which the current value of the resonant current (current iL1) passing through the switch 8V and the current value of the load current iV flowing through the AC terminal 41V corresponding to the switch 8V coincide, the resonant half cycle included in the high level period of the control signal SU6 for the switch 8U begins. The absolute value of the resonant current (current iL1) at the time point tb is equal to the absolute value of the load current iV and is smaller than the absolute value of the load current iU. The controller 50 determines the shortened period Tred by the formula Tred = Tau-Tau2. In this case, the controller 50 determines the new Tau2 by the formula Tau2 = L×(iU-iV) / V15. The controller 50 sets the shift time Tsu to be as long as ΔT. In Figure 23 In the example shown, ΔT is the time lag between the start of the high-level period of the control signal SV1 for the first switching element 1V corresponding to the switch 8V and the end of the high-level period of the control signal SU2 for the second switching element 2U corresponding to the switch 8U. This ensures that the current value of the resonant current (current iL1) at the end time tc of the new additional time Tau2 is equal to the absolute value of the load current iU. This enables the power converter 100 to perform zero-voltage soft switching of the first switching elements 1V and 1U by causing the controller 50 to perform the first and second operations.

[0245] In the same manner, if the controller 50 has previously determined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the U-phase resonant current and the W-phase resonant current overlap with each other to perform zero-voltage soft switching of the first switching elements 1U, 1W. Furthermore, if the controller 50 has previously determined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to shorten the period during which the V-phase resonant current and the W-phase resonant current overlap with each other to perform zero-voltage soft switching of the first switching elements 1V, 1W.

[0246] Even in the case of performing soft switching operation on the second switching element 2, zero-voltage soft switching can be performed by also performing the first operation and the second operation by the controller 50. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents having the same polarity flow is the first switch and the other is the second switch, the controller 50 also performs the first operation and the second operation.

[0247] (Ninth embodiment)

[0248] The power converter 100 according to the ninth embodiment has the same features as the power converter 100 according to the first embodiment described above (see Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0249] Now, refer to Figure 24 How the power converter 100 according to the ninth embodiment performs soft switching on the first switching element 1 will be described. Figure 24 Can be used with Figure 23 and thus their description will be omitted in this article.

[0250] In the power converter 100 according to the ninth embodiment, the controller 50 sets the additional time Tau2 (refer to FIG. 1 ) after the additional time Tau for the control signal SU6 has been shortened by the shortening period Tred. Figure 23 ) is set to zero, which is different from the power converter 100 according to the eighth embodiment.

[0251] exist Figure 24 In the illustrated example, the controller 50 compares the absolute values ​​of the load currents iU, iV with each other when performing the first operation, thereby shortening the high-level period of the control signal SU6 to be applied to the switch 8U corresponding to the one AC terminal 41U through which the load current having a larger absolute value flows, of the two AC terminals 41U, 41V, by the shortened period Tred. Figure 24 In the example shown, the controller 50 sets the shortened period Tred that satisfies Tred=Tau.

[0252] In addition, the controller 50 shifts the high-level period of the control signal SU6 by the shift time Tsu in the direction of delaying the high-level period of the control signal SU6 when performing the second operation. In this case, the controller 50 shifts the high-level period of the control signal SU6 for the switch 8U, the high-level period of the control signal SU1 for the first switching element 1U, and the high-level period of the control signal SU2 for the second switching element 2U by the shift time Tsu in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SV6 for the switch 8V starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8V has become equal to the extreme value (for example, at Figure 24In the example shown, after the local maximum value (the local maximum value), the resonant half cycle included in the high-level period of the control signal SU6 for the switch 8U starts at a time point tc after a new additional time Tau2 has passed since the time point tb at which the current value of the resonant current (current iL1) passing through the switch 8V and the current value of the load current iV flowing through the AC terminal 41V corresponding to the switch 8V coincide. The absolute value of the resonant current (current iL1) at the time point tb is equal to the absolute value of the load current iV and smaller than the absolute value of the load current iU. The controller 50 will be at the additional time Tau2 (reference time) after the additional time Tau for the control signal SU6 has been shortened by the shortened period Tred. Figure 23 ) is set to zero. In addition, the controller 50 sets the shift time Tsu by the formula Tsu=ΔT+Tdef (ie, Tsv=ΔT). Figure 24 In the example shown, ΔT is the time lag between the start of the high-level period of the control signal SV1 for the first switching element 1V corresponding to the switch 8V and the end of the high-level period of the control signal SU2 for the second switching element 2U corresponding to the switch 8U. This enables the power converter 100 to perform zero-voltage soft switching of the first switching elements 1U, 1V by causing the controller 50 to perform the first operation and the second operation when the controller 50 has previously determined that the U-phase resonant current and the V-phase resonant current will flow through the resonant inductor L1.

[0253] In the same manner, if the controller 50 has previously determined that the two-phase resonant current (i.e., the U-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to perform zero-voltage soft switching of the first switching elements 1U, 1W. Furthermore, if the controller 50 has previously determined that the two-phase resonant current (i.e., the V-phase resonant current and the W-phase resonant current) will flow simultaneously, the controller 50 performs the first operation and the second operation, thereby enabling the power converter 100 to perform zero-voltage soft switching of the first switching elements 1V, 1W.

[0254] Even when soft switching is being performed on the second switching element 2, the controller 50 performs the first and second operations. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents of the same polarity flow is the first switch and the other is the second switch, the controller 50 performs the first and second operations. This enables the power converter 100 to perform zero-voltage soft switching of the second switching element 2.

[0255] (Tenth embodiment)

[0256] The power converter 100 according to the tenth embodiment has the same features as the power converter 100 according to the first embodiment described above (refer to Figure 1 ) has the same circuit structure, so its illustration and description will be omitted in this article.

[0257] Now, refer to Figure 25 How the power converter 100 according to the tenth embodiment performs soft switching operation on the first switching element 1 when the controller 50 has previously determined that resonant currents respectively through three switches 8 belonging to the plurality of switches 8 will flow simultaneously will be described. Figure 25 The same method as that referred to in the foregoing description of the second embodiment may be used. Figure 17 and thus their description will be omitted in this article.

[0258] When it is determined that the resonant currents flowing through three switches 8 belonging to the plurality of switches 8 will simultaneously flow through the resonant inductor L1, the controller 50 not only performs the first operation and the second operation on at least one of the first switch and the second switch, but also shortens the high-level period of the control signal for the switch 8 corresponding to the AC terminal 41 of the one phase through which the load current of different polarity flows by a shortening period, and shifts the high-level period by a shifting time in a direction that delays or advances the high-level period. The shortening period can have any length. The shifting time can also be set arbitrarily.

[0259] In the foregoing description of the second embodiment, reference has been made to Figure 16 A timing diagram illustrating a situation where the example controller 50 has predetermined that three-phase resonant currents (i.e., U-phase resonant current, V-phase resonant current, and W-phase resonant current) will flow simultaneously and the first operation or the second operation has not yet started (i.e., before shifting). Figure 16 It is a timing diagram showing the waveforms of control signals SU1, SU2, SV1, SV2, SW1, SW2, SU6, SV6, SW6, load currents iU, iV, iW, current iL1, and voltages V2u, V2v, V2w across the second switching elements 2U, 2V, 2W. Figure 25 A timing diagram illustrating the following situation is shown: if the controller 50 has predetermined that the three-phase resonant current (i.e., the U-phase resonant current, the V-phase resonant current, and the W-phase resonant current) will flow simultaneously, the controller 50 has performed the first operation and the second operation on the control signal SV6 for the switch 8V of the two switches 8U, 8V, and has shortened the high-level period of the control signal SW6 for the switch 8W by the shortened period Tred2, and has shifted the high-level period by the shift time Tsw in the direction of delaying the high-level period. The shortened period Tred2 can have an arbitrary length. The shift time Tsw of the control signal SW6 can also be set arbitrarily. Figure 25 middle, Figure 16 The high-level period of the control signal SW6 shown is indicated by a single-dot chain line.

[0260] exist Figure 16 In the example shown, the polarity of the load currents iU and iV is positive, the polarity of the load current iW is negative, and the absolute value of the load current iU is greater than the absolute value of the load current iV. When performing the first operation, the controller 50 compares the absolute value of the load current iU with the absolute value of the load current iV for the load currents iU and iV having the same polarity, and shortens the high level period of the control signal SV6 for the switch 8V corresponding to the AC terminal 41V through which the load current with the smaller absolute value flows by the shortened period Tred (refer to FIG. Figure 25 ).exist Figure 25 In the example shown, the controller 50 sets the length of the shortened period Tred so that the length of the high level period of the control signal SV6 is as long as the length of the resonance half period (= Tres / 2). Figure 25 In the example shown, the shortened period Tred and the additional time Tav (reference Figure 16 ) are the same length.

[0261] In addition, the controller 50 shifts the high-level period of the control signal SV6 by the shift time Tsv in the direction of delaying the high-level period of the control signal SV6 when performing the second operation. In this case, the controller 50 shifts each of the high-level period of the control signal SV6 for the switch 8V, the high-level period of the control signal SV1 for the first switching element 1V, and the high-level period of the control signal SV2 for the second switching element 2V by the shift time Tsv in the direction of delaying each of these high-level periods, so that if the high-level period of the control signal SU6 for the switch 8U starts at the time point ta, the current value of the resonant current (current iL1) passing through the switch 8U has become equal to the extreme value (for example, at Figure 25 In the example shown, after the maximum value (maximum value), at the time point tc after the standby period Tdef has passed since the time point tb when the current value of the resonant current (current iL1) passing through the switch 8U and the current value of the load current iU flowing through the AC terminal 41U corresponding to the switch 8U are consistent, the high level period of the control signal SV6 for the switch 8V begins. The absolute value of the resonant current (current iL1) at the time point tb is greater than the absolute value of the load current iU flowing through the AC terminal 41V corresponding to the switch 8V. The controller 50 determines the standby period Tdef by the formula Tdef=L×(iU-iV) / V15. The controller 50 determines the shift time Tsv by the formula Tsv=ΔT+Tdef. Figure 16In the example shown, ΔT is the time lag between the end of the high-level period of the control signal SV2 for the second switching element 2V corresponding to the switch 8V and the start of the high-level period of the control signal SU1 for the first switching element 1U corresponding to the switch 8U. This ensures that the current value of the resonant current (current iL1) at the time point tc at the end of the standby period Tdef is equal to the absolute value of the load current iV. This enables the power converter 100 to perform zero-voltage soft switching of the first switching element 1V even if the high-level period of the control signal SV6 for the switch 8V does not include the additional time Tav and is as long as the resonant half-cycle (Tres / 2).

[0262] from Figure 16 The waveform of the current iL1 and Figure 25 As can be seen from the waveform of the current iL1 shown, if the controller 50 has previously determined that the three-phase resonant current (i.e., the U-phase resonant current, the V-phase resonant current, and the W-phase resonant current) will flow simultaneously, the power converter 100 can shorten the period in which the U-phase resonant current and the V-phase resonant current overlap with each other by causing the controller 50 to perform the first operation and the second operation. In addition, the controller 50 shortens the high-level period of the control signal SW6 for the switch 8W by the shortening period Tred2, and shifts the high-level period by the shift time Tsw in the direction of delaying the high-level period of the control signal SW6, thereby preventing the W-phase resonant current from overlapping with the U-phase resonant current or the V-phase resonant current.

[0263] In the power converter 100, if the controller 50 does not perform the first operation or the second operation, Figure 16 As shown, the first switching elements 1U, 1V are hard switched.

[0264] On the other hand, if the controller 50 performs the first operation and the second operation, Figure 25 As shown, the first switching elements 1U, 1V are switched by zero-voltage soft switching.

[0265] Figure 25An example is shown in which the first operation and the second operation are performed when the load currents iU, iV, and iW have the same polarity and only the load current iW has a different polarity. However, this is merely an example and should not be construed as limiting. Alternatively, for example, even when the load currents iV and iW have the same polarity and only the load current iU has a different polarity, the controller 50 performs the first operation and the second operation, zero voltage soft switching can also be performed. Still alternatively, for example, even when the load currents iW and iU have the same polarity and only the load current iV has a different polarity, the controller 50 performs the first operation and the second operation, zero voltage soft switching of the first switching elements 1U, 1V, and 1W can also be performed.

[0266] Even in the case of performing soft switching operation on the second switching element 2, zero-voltage soft switching can be performed by performing the first operation and the second operation by the controller 50. That is, if one of the two switches 8 corresponding one-to-one to the two AC terminals 41 through which load currents having the same polarity flow is the first switch and the other is the second switch, the controller 50 also performs the first operation and the second operation, shortens the high-level period of the control signal for the switch 8 corresponding to the AC terminal 41 through which load currents having different polarities flow by the shortened period, and shifts the high-level period by the shift time in a direction that delays or advances the high-level period.

[0267] Regardless of whether the first switching element 1 or the second switching element 2 is to be soft-switched, if the controller 50 has determined that the resonant currents respectively passing through the three switches 8 belonging to the plurality of switches 8 will flow simultaneously, only the high-level period of the control signal for the switch 8 corresponding to the AC terminal 41 through which the load current of different polarities flows can be shortened by a shortened period, or only the high-level period thereof can be shifted by a shift time in a direction of delaying or advancing the high-level period.

[0268] (Eleventh embodiment)

[0269] Will refer to Figure 26 In the following description, any constituent elements of the power converter 100A according to the eleventh embodiment having the same functions as those of the corresponding portions of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portions, and description thereof will be omitted herein.

[0270] In the power converter 100A according to the eleventh embodiment, in each of the plurality of switches 8, the first IGBT 6 and the second IGBT 7 are connected in anti-series. In the power converter 100A according to the eleventh embodiment, in each of the plurality of switches 8, the collector terminal of the first IGBT 6 and the collector terminal of the second IGBT 7 are connected to each other, the emitter terminal of the first IGBT 6 is connected to the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10, and the emitter terminal of the second IGBT 7 is connected to the common connection node 25. In addition, each of the plurality of switches 8 further includes a diode 61 connected in anti-parallel to the first IGBT 6 and a diode 71 connected in anti-parallel to the second IGBT 7.

[0271] In the power converter 100A according to the eleventh embodiment, each of the first IGBT 6 and the second IGBT 7 can be replaced with a MOSFET or a bipolar transistor. In this case, Figure 22 The diode 61 and the diode 71 shown can each be replaced with, for example, a parasitic diode of a replacement element or an element built into one chip of the replacement element. In addition, in the power converter 100A according to the eleventh embodiment, the diode 61 and the diode 71 do not necessarily need to be provided as external elements for the first IGBT 6 and the second IGBT 7, respectively, but may be elements built into one chip.

[0272] The controller 50 can operate in the same manner as, for example, the controller 50 according to the first embodiment. However, this is merely an example and should not be construed as limiting. Alternatively, the controller 50 can also operate in the same manner as the controller 50 according to the first modification of the first embodiment, the second modification of the first embodiment, or any of the second to tenth embodiments described above, and any of these operations can also be performed in combination.

[0273] (Twelfth embodiment)

[0274] Will refer to Figure 27 In the following description, any constituent elements of the power converter 100B according to the twelfth embodiment having the same functions as those of the corresponding portions of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portions, and description thereof will be omitted herein.

[0275] In the power converter 100B according to the twelfth embodiment, in each of the plurality of switches 8, the first IGBT 6 and the second IGBT 7 are connected in anti-series. In the power converter 100B according to the twelfth embodiment, in each of the plurality of switches 8, the emitter terminal of the first IGBT 6 and the emitter terminal of the second IGBT 7 are connected to each other, the collector terminal of the second IGBT 7 is connected to the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10, and the collector terminal of the first IGBT 6 is connected to the common connection node 25. In addition, each of the plurality of switches 8 further includes a diode 61 connected in anti-parallel to the first IGBT 6 and a diode 71 connected in anti-parallel to the second IGBT 7.

[0276] In the power converter 100B according to the twelfth embodiment, each of the first IGBT 6 and the second IGBT 7 can be replaced with a MOSFET or a bipolar transistor. In this case, Figure 27 The diode 61 and the diode 71 shown can each be replaced with, for example, a parasitic diode of a replacement element or an element built into one chip of the replacement element. In addition, in the power converter 100B according to the twelfth embodiment, the diode 61 and the diode 71 do not necessarily need to be provided as external elements for the first IGBT 6 and the second IGBT 7, respectively, but may be elements built into one chip.

[0277] The controller 50 can operate in the same manner as, for example, the controller 50 according to the first embodiment. However, this is merely an example and should not be construed as limiting. Alternatively, the controller 50 can also operate in the same manner as the controller 50 according to the first modification of the first embodiment, the second modification of the first embodiment, or any of the second to tenth embodiments described above, and any of these operations can also be performed in combination.

[0278] (Thirteenth embodiment)

[0279] Will refer to Figure 28 A power converter 100C according to a thirteenth embodiment will be described below. In the following description, any constituent elements of the power converter 100C according to the thirteenth embodiment that have the same functions as corresponding portions of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portions, and description thereof will be omitted herein.

[0280] In a power converter 100C according to the thirteenth embodiment, a first MOSFET 6A and a second MOSFET 7A are connected in anti-series in each of the plurality of switches 8. In the power converter 100C according to the thirteenth embodiment, the drain terminal of the first MOSFET 6A and the drain terminal of the second MOSFET 7A are connected to each other in each of the plurality of switches 8. Furthermore, each of the plurality of switches 8 includes a diode 61 connected in anti-parallel to the first MOSFET 6A and a diode 71 connected in anti-parallel to the second MOSFET 7A. In each of the plurality of switches 8, the source terminal of the second MOSFET 7A is connected to a common connection node 25. In each of the plurality of switches 8, the source terminal of the first MOSFET 6A is connected to the connection node 3 of the switching circuit 10 corresponding to the switch 8 including the first MOSFET 6A. Control signals SU6 and SU7 are applied from the controller 50 to the first MOSFET 6A and the second MOSFET 7A of the switch 8U, respectively. Control signals SV6 and SV7 are applied from the controller 50 to the first MOSFET 6A and the second MOSFET 7A of the switch 8V, respectively. Control signals SW6 , SW7 are applied from the controller 50 to the first MOSFET 6A and the second MOSFET 7A of the switch 8W, respectively.

[0281] The controller 50 can operate in the same manner as, for example, the controller 50 according to the first embodiment. However, this is merely an example and should not be construed as limiting. Alternatively, the controller 50 can also operate in the same manner as the controller 50 according to the first modification of the first embodiment, the second modification of the first embodiment, or any of the second to tenth embodiments described above, and any of these operations can also be performed in combination.

[0282] (Fourteenth embodiment)

[0283] Will refer to Figure 29 In the following description, any constituent elements of the power converter 100D according to the fourteenth embodiment having the same functions as those of the corresponding portions of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portions, and description thereof will be omitted herein.

[0284] In the power converter 100D according to the fourteenth embodiment, a diode 63 is connected in series to the first MOSFET 6A, and a diode 73 is connected in series to the second MOSFET 7A in each of the plurality of switches 8. In the power converter 100D according to the fourteenth embodiment, a series circuit of the first MOSFET 6A and the diode 63 and a series circuit of the second MOSFET 7A and the diode 73 are connected in antiparallel to each other.

[0285] The controller 50 can operate in the same manner as, for example, the controller 50 according to the first embodiment. However, this is merely an example and should not be construed as limiting. Alternatively, the controller 50 can also operate in the same manner as the controller 50 according to the first modification of the first embodiment, the second modification of the first embodiment, or any of the second to tenth embodiments described above, and any of these operations can also be performed in combination.

[0286] (Fifteenth embodiment)

[0287] Will refer to Figure 30 In the following description, any constituent elements of the power converter 100E according to the fifteenth embodiment having the same functions as those of the corresponding portions of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portions, and description thereof will be omitted herein.

[0288] In a power converter 100E according to the fifteenth embodiment, each of the plurality of switches 8 includes: a MOSFET 80; a diode 83 connected in antiparallel to the MOSFET 80; a series circuit of two diodes 84 and 85 connected in antiparallel to the MOSFET 80; and a series circuit of two diodes 86 and 87 connected in antiparallel to the MOSFET 80. In each of the plurality of switches 8, the connection node between the diodes 84 and 85 in the switch 8 (i.e., the first end 81 of the switch 8) is connected to the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10, and the connection node between the diodes 86 and 87 (i.e., the second end 82 of the switch 8) is connected to the common connection node 25. In each of the plurality of switches 8, when the MOSFET 80 is on, the switch 8 is on. On the other hand, when the MOSFET 80 is off, the switch 8 is off.

[0289] The MOSFETs 80 of the plurality of switches 8 are controlled by the controller 50. The controller 50 outputs a control signal SU8 for controlling the on / off state of the MOSFET 80 of the switch 8U, a control signal SV8 for controlling the on / off state of the MOSFET 80 of the switch 8V, and a control signal SW8 for controlling the on / off state of the MOSFET 80 of the switch 8W.

[0290] In each switch 8, when its MOSFET 80 is turned on, a resonant current generated by a resonant circuit including the resonant inductor L1 and the corresponding resonant capacitor in the resonant capacitor 9 flows. In the power converter 100E, when one of the multiple switches 8 is turned on, the charging current including the resonant current flows along a path that passes through the regenerative capacitor 15, the resonant inductor L1, the diode 86, the MOSFET 80, the diode 85, and the resonant capacitor 9 in this order. In addition, in the power converter 100E, when one of the multiple switches 8 is turned on, the discharging current including the resonant current flows along a path that passes through the resonant capacitor 9, the diode 84, the MOSFET 80, the diode 87, the resonant inductor L1, and the resonant capacitor 15 in this order.

[0291] In the power converter 100E according to the fifteenth embodiment, each of the plurality of MOSFETs 80 may be replaced with an IGBT. Furthermore, in the power converter 100E according to the fifteenth embodiment, each of the plurality of switches 8 may include, for example, a bipolar transistor or a GaN-based gate injection transistor (GIT) instead of the MOSFET 80.

[0292] The controller 50 can operate in the same manner as, for example, the controller 50 according to the first embodiment. However, this is merely an example and should not be construed as limiting. Alternatively, the controller 50 can also operate in the same manner as the controller 50 according to the first modification of the first embodiment, the second modification of the first embodiment, or any of the second to tenth embodiments described above, and any of these operations can also be performed in combination.

[0293] (Sixteenth embodiment)

[0294] Will refer to Figure 31 A power converter 100F according to a sixteenth embodiment will be described below. In the following description, any constituent elements of the power converter 100F according to the sixteenth embodiment having the same functions as those of the corresponding portions of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portions, and description thereof will be omitted herein.

[0295] In the power converter 100F according to the sixteenth embodiment, each of the plurality of switches 8 is a dual-gate GaN-based GIT including a first source terminal, a first gate terminal, a second gate terminal, and a second source terminal. In the power converter 100F according to the sixteenth embodiment, a control signal SU6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT serving as switch 8U, and a control signal SU7 is applied between its second gate terminal and the second source terminal. Furthermore, a control signal SV6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT serving as switch 8V, and a control signal SV7 is applied between its second gate terminal and the second source terminal. Furthermore, a control signal SW6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT serving as switch 8W, and a control signal SW7 is applied between its second gate terminal and the second source terminal.

[0296] The controller 50 can operate in the same manner as, for example, the controller 50 according to the first embodiment. However, this is merely an example and should not be construed as limiting. Alternatively, the controller 50 can also operate in the same manner as the controller 50 according to the first modification of the first embodiment, the second modification of the first embodiment, or any of the second to tenth embodiments described above, and any of these operations can also be performed in combination.

[0297] (Seventeenth embodiment)

[0298] Will refer to Figure 32 A power converter 100G according to a seventeenth embodiment will be described. The power converter 100G according to the seventeenth embodiment further includes a capacitor 16 connected between the second end of the resonant inductor L1 and the first DC terminal 31, which is different from the power converter 100 according to the first embodiment. In the following description, any constituent elements in the power converter 100G according to the seventeenth embodiment that have the same functions as the corresponding portions of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portions, and description thereof will be omitted herein.

[0299] Power converter 100G does not include capacitor C10 of power converter 100 according to the first embodiment. Capacitor 16 is connected in series to regenerative capacitor 15. Thus, in this power converter 100G, the series circuit of capacitor 16 and regenerative capacitor 15 is connected between first DC terminal 31 and second DC terminal 32. The capacitance of capacitor 16 is equal to the capacitance of regenerative capacitor 15. As used herein, the expression "the capacitance of capacitor 16 is equal to the capacitance of regenerative capacitor 15" refers not only to the case where the capacitance of capacitor 16 is exactly equal to the capacitance of regenerative capacitor 15, but also to the case where the capacitance of capacitor 16 is equal to or greater than 95% and equal to or less than 105% of the capacitance of regenerative capacitor 15.

[0300] In the power converter 100G according to the seventeenth embodiment, the potential V15 at the fourth terminal 154 of the regenerative capacitor 15 has a value calculated by dividing the voltage value Vd of the DC power supply E1 by 2, which is the number of capacitors (i.e., the capacitor 16 and the regenerative capacitor 15). Therefore, the potential V15 at the fourth terminal 154 of the regenerative capacitor 15 is approximately Vd / 2. In the power converter 100G according to the seventeenth embodiment, the controller 50 can pre-store the value of the potential V15 at the fourth terminal 154 of the regenerative capacitor 15.

[0301] The controller 50 of the power converter 100G according to the seventeenth embodiment performs the first operation and the second operation in the same manner as the controller 50 of the power converter 100 according to the first embodiment. Thus, the power converter 100G according to the seventeenth embodiment can perform zero-voltage soft switching on each of the plurality of first switching elements 1 and the plurality of second switching elements 2 in the same manner as the power converter 100 according to the first embodiment.

[0302] The controller 50 can operate in the same manner as, for example, the controller 50 according to the first embodiment. However, this is merely an example and should not be construed as limiting. Alternatively, the controller 50 can also operate in the same manner as the controller 50 according to the first modification of the first embodiment, the second modification of the first embodiment, or any of the second to tenth embodiments described above, and any of these operations can also be performed in combination.

[0303] (Eighteenth embodiment)

[0304] Will refer to Figure 33Next, a power converter 100H according to an eighteenth embodiment will be described. In the power converter 100H according to the eighteenth embodiment, a regenerative capacitor 15 is connected between the second end of the resonant inductor L1 and the first DC terminal 31, which is different from the power converter 100 according to the first embodiment. In the following description, any constituent elements in the power converter 100H according to this eighteenth embodiment that have the same functions as the corresponding portions of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portions, and their description will be omitted herein.

[0305] Controller 50 of power converter 100H according to the eighteenth embodiment performs the first operation and the second operation in the same manner as controller 50 of power converter 100 according to the first embodiment. Thus, power converter 100H according to the eighteenth embodiment can perform soft switching more reliably, as can power converter 100 according to the first embodiment.

[0306] (Other Modifications)

[0307] Note that the first to eighteenth embodiments and their modifications described above are merely exemplary embodiments among the various embodiments and their modifications of the present disclosure and should not be construed as limiting. Rather, the first to eighteenth exemplary embodiments and their modifications may be readily modified in various ways according to design choices or any other factors without departing from the scope of the present disclosure.

[0308] The operation performed by the controller 50 to “determine that a plurality of resonance currents will flow simultaneously” is not limited to the operation to “determine that a plurality of resonance currents will flow simultaneously” when the time lag described with respect to the first embodiment is smaller than the threshold value.

[0309] Alternatively, if any one of the current difference between the U-phase load current iU and the V-phase load current iV, the current difference between the V-phase load current iV and the W-phase load current iW, and the current difference between the W-phase load current iW and the U-phase load current iU is less than the current difference threshold, the controller 50 can determine that the two-phase resonant current will flow simultaneously.

[0310] Still alternatively, if the current difference between the U-phase load current iU and the V-phase load current iV, the current difference between the V-phase load current iV and the W-phase load current iW, and the current difference between the W-phase load current iW and the U-phase load current iU are all less than the current difference threshold, the controller 50 can determine that the three-phase resonant currents will flow simultaneously.

[0311] Alternatively, if the electrical angle determined by calculation or the estimated electrical angle based on sensor information provided by a sensor device for detecting the number of revolutions of the motor (such as an encoder or a rotary transformer, etc.) falls within a first rotation angle range (e.g., equal to or greater than 55 degrees and equal to or less than 65 degrees), or a second rotation angle range (e.g., equal to or greater than 115 degrees and equal to or less than 125 degrees), or a third rotation angle range (e.g., equal to or greater than 175 degrees and equal to or less than 185 degrees), or a fourth rotation angle range (e.g., equal to or greater than 235 degrees and equal to or less than 245 degrees), or a fifth rotation angle range (e.g., equal to or greater than 295 degrees and equal to or less than 305 degrees), or a sixth rotation angle range (e.g., equal to or greater than 355 degrees and equal to or less than 365 degrees), the controller 50 can determine that "two-phase resonant currents will flow simultaneously."

[0312] For example, each switching element in the plurality of first switching elements 1 and the plurality of second switching elements 2 does not necessarily have to be an IGBT, but may also be a MOSFET. In this case, each first diode in the plurality of first diodes 4 may be replaced by, for example, a parasitic diode of the MOSFET used as its corresponding first switching element 1. In addition, each second diode in the plurality of second diodes 5 may also be replaced by, for example, a parasitic diode of the MOSFET used as its corresponding second switching element 2. The MOSFET may be, for example, a Si-based MOSFET or a SiC-based MOSFET. Each switching element in the plurality of first switching elements 1 and the plurality of second switching elements 2 may also be, for example, a bipolar transistor or a GaN-based GIT.

[0313] Alternatively, in power converters 100 and 100A to 100H, if each of the multiple resonant capacitors 9 has a relatively small capacitance, instead of setting the multiple resonant capacitors 9 as separate elements, parasitic capacitors across the multiple second switching elements 2 may also be used as the multiple resonant capacitors 9 .

[0314] Furthermore, the length of the dead zone period Td does not necessarily have to be set to be as long as one resonance half cycle, but may also be set to be different from one resonance half cycle.

[0315] The dead time period Td may also be set by a dead time generation circuit included in a gate driver integrated circuit (IC) provided separately from the controller 50. Alternatively, the controller 50 may include a gate driver IC, and the dead time generation circuit included in the gate driver IC may set the dead time period Td.

[0316] Furthermore, in the second through eighteenth embodiments, the controller 50 may set the clamping period as described in the second variation of the first embodiment. In this case, the length of the clamping period of the control signal SU6 for the U-phase switch 8U does not necessarily need to coincide with the additional time Tau, for example. Alternatively, the length of the clamping period may be zero, set to a value within the range from 0 to Tau, or longer than the additional time Tau by an arbitrary period ΔTclp. Even if the arbitrary period ΔTclp is set to any value, there is no problem as long as the end time of the period Tau + ΔTclp falls within one carrier cycle.

[0317] Furthermore, in any of the second to eighteenth embodiments, as in the first embodiment, the length of the shortened period Tred may be equal to or shorter than the length of the additional time Tad. This enables soft handover to be performed in any of the second to eighteenth embodiments even if the length of the shortened period Tred varies.

[0318] Furthermore, in the first embodiment described above, the controller 50 calculates the shift time (e.g., Tsu) = ΔT + Tdef. However, the shift time is not limited to the result calculated by this formula, but may be calculated by any other formula as long as soft switching can be substantially achieved compared to the situation before the shift. Alternatively, the shift time may deviate from the result obtained by this formula.

[0319] Furthermore, when it is determined that two-phase resonant currents, such as the U-phase resonant current and the V-phase resonant current, will flow simultaneously, the standby period Tdef may have the value calculated by the formula Tdef = L × |iV - iU| / V15 in the first embodiment described above, and satisfy Tdef = 0 in the second embodiment described above. Alternatively, the standby period Tdef may be set to a value within the range of 0 to (L × |iV - iU| / V15). In any of the other embodiments, from the third embodiment to the eighteenth embodiment, the standby period Tdef may also be set in the same manner.

[0320] Furthermore, it is assumed that the new additional time is calculated by the formula Tav2=L×(iV-iU) / V15 in the fourth embodiment, and that Tav2=0 is satisfied in the fifth embodiment. Alternatively, the new additional time may be set to any value within the range from 0 to (L×|iV-iU| / V15). In any other embodiment, the new additional time may also be set in the same manner.

[0321] In addition, the power converters 100 and 100A to 100H do not necessarily have to be configured to output three-phase AC power, but can also be configured to output multi-phase AC power with more than three phases. Regarding the method for determining the additional time Tau, Tav, Taw described in the "(3.1) Basic Example" section of the first embodiment, the above formula is an example of an ideal design, so such a formula is not always used for calculation. On the contrary, depending on the situation, there is no problem even if the additional time Tau, Tav, Taw is set to 0 or any other fixed value. In addition, as long as the purpose of providing the additional time Tau, Tav, Taw is achievable, the additional time Tau, Tav, Taw can also have a value calculated by any other formula. For example, in the basic example above, the additional time Tau is calculated by the formula Tau = iU × (L / V15). However, this is merely an example and should not be interpreted as limiting. Alternatively, Tau may be set to 0, may be set to a value falling within the range from 0 to iU×(L / V15), may be set to an additional time that is always constant, may be calculated by other formulas, or may be set to a combination of these.

[0322] (all aspects)

[0323] The foregoing description provides specific implementations of the following aspects of the present disclosure.

[0324] According to the first aspect, a power converter (100; 100A; 100B; 100C; 100D; 100E; 100F; 100G; 100H) includes a first DC terminal (31) and a second DC terminal (32), a power conversion circuit (11), a plurality of AC terminals (41), a plurality of switches (8), a plurality of resonant capacitors (9), a resonant inductor (L1), a regenerative capacitor (15), and a controller (50). The power conversion circuit (11) includes a plurality of first switching elements (1) and a plurality of second switching elements (2). In the power conversion circuit (11), a plurality of switching circuits (10) are connected in parallel to each other, and in each switching circuit of the plurality of switching circuits (10), one first switching element of the plurality of first switching elements (1) is connected in series with a corresponding second switching element of the plurality of second switching elements (2) in a one-to-one manner. In the power conversion circuit (11), the plurality of first switching elements (1) are connected to the first DC terminal (31), and the plurality of second switching elements (2) are connected to the second DC terminal (32). A plurality of AC terminals (41) are provided one-to-one for the plurality of switching circuits (10). Each of the plurality of AC terminals (41) is connected to a connection node (3) between a first switching element (1) and a second switching element (2) of a corresponding switching circuit in the plurality of switching circuits (10). A plurality of switches (8) are provided one-to-one for the plurality of switching circuits (10). A first end (81) of each of the plurality of switches (8) is connected to a connection node (3) between a first switching element (1) and a second switching element (2) of a corresponding switching circuit in the plurality of switching circuits (10). A second end (82) of each of the plurality of switches (8) is commonly connected to a common connection node (25). A plurality of resonant capacitors (9) are provided one-to-one for the plurality of switches (8). Each of the plurality of resonant capacitors (9) is connected between a first end (81) of a corresponding switch in the plurality of switches (8) and a second DC terminal (32). A resonant inductor (L1) has a first end and a second end. In the resonant inductor (L1), a first end of the resonant inductor (L1) is connected to a common connection node (25). The regenerative capacitor (15) has a third end (153) and a fourth end (154). In the regenerative capacitor (15), the third end (153) of the regenerative capacitor (15) is connected to the first DC terminal (31) or the second DC terminal (32). The controller (50) applies a control signal having a potential alternating between a high level and a low level to each of the plurality of first switching elements (1), the plurality of second switching elements (2), and the plurality of switches (8).The controller (50) sets a dead time period (Td) between a high level period of a control signal for a first switching element (1) and a high level period of a control signal for a second switching element (2) for each of the plurality of switching circuits (10), and sets a high level period of a control signal for each of the plurality of switches (8) based on the dead time period (Td) for the corresponding switching circuit (10) belonging to the plurality of switching circuits (10). Each of the plurality of AC terminals (41) allows a load current to flow through the first switching element (1) or the second switching element (2) of the corresponding switching circuit (10). When determining that resonant currents flowing through two or more switches (8) belonging to a plurality of switches (8) will flow simultaneously through a resonant inductor (L1), the controller (50) performs a first operation and further performs a second operation, assuming that the two or more switches include two switches (8) corresponding one-to-one to two AC terminals (41) belonging to a plurality of AC terminals (41) through which load currents of the same polarity flow, and one of the two switches (8) is a first switch and the other one of the two switches (8) is a second switch. The first operation includes shortening a high-level period of a control signal for the first switch by a shortened period (Tred) from a period including a resonant half cycle and an additional time (Tad). The resonant half cycle is determined by the capacitance of one resonant capacitor (9) belonging to a plurality of resonant capacitors (9) corresponding to the first switch and the inductance of the resonant inductor (L1). The additional time (Tad) is determined by the voltage (V15) of the regenerative capacitor (15), the inductance of the resonant inductor (L1), and the load current value. The second operation includes shifting a high-level period of a control signal for at least one of the first switch and the second switch so that the high-level period of the control signal for the first switch starts when a standby period (Tdef) has elapsed since a point in time when the current value of the resonant current passing through the second switch and the current value of a load current flowing through an AC terminal (41) corresponding to the second switch and belonging to two or more AC terminals (41) coincide with each other after the current value of the resonant current passing through the second switch has become equal to an extreme value.

[0325] This aspect enables soft handover to be performed more reliably.

[0326] In the power converter (100; 100A; 100B; 100C; 100D; 100E; 100F; 100G; 100H) according to the second aspect, the shortened period (Tred) is equal to or shorter than the additional time (Tad).

[0327] This aspect enables soft handover even with shortened period changes.

[0328] In a power converter (100; 100A; 100B; 100C) according to a third aspect that can be implemented in combination with the first aspect or the second aspect, when performing a second operation, a controller (50) shifts a high-level period of a control signal for a first switch and a high-level period of a control signal for a second switch in mutually different directions.

[0329] This aspect helps to increase the frequency of operation.

[0330] In a power converter (100; 100A; 100B; 100C; 100D; 100E; 100F; 100G; 100H) according to a fourth aspect that can be implemented in combination with the first aspect or the second aspect, the controller (50) shifts a high-level period of a control signal for the first switch or a high-level period of a control signal for the second switch when performing the second operation.

[0331] This aspect enables suppression of variations in line voltage.

[0332] Industrial applicability

[0333] The power converter according to the present disclosure enables soft switching to be performed more reliably, thereby further improving the reliability of the power converter.As can be seen, the power converter according to the present disclosure is effectively applicable to various fields based on industry.

[0334] Description of Reference Numerals

[0335] 1First switching element

[0336] 2 Second switching element

[0337] 3 Connecting Nodes

[0338] 8 switches

[0339] 9 Resonant capacitor

[0340] 10Switching circuit

[0341] 11 Power conversion circuit

[0342] 15 Regeneration capacitor

[0343] 153 The Third End

[0344] 154 The Fourth End

[0345] 31 First DC terminal

[0346] 32 Second DC terminal

[0347] 41 AC terminal

[0348] 50 Controller

[0349] 100,100A,100B,100C,100D,100E,100F,100G,100H power converters

[0350] iU, iV, iW output current (load current)

[0351] L1 resonant inductor

[0352] RA1 AC load

[0353] SU1, SU2, SU6, SU7 control signals

[0354] SV1, SV2, SV6, SV7 control signals

[0355] SW1, SW2, SW6, SW7 control signals

[0356] Tad additional time

[0357] Tred shortens the period

[0358] Tdef standby period

[0359] Tres resonant half period

[0360] V15 voltage

Claims

1. A power converter comprising: a first DC terminal and a second DC terminal; a power conversion circuit comprising a plurality of first switching elements and a plurality of second switching elements, the power conversion circuit being implemented as a parallel connection of the plurality of switching circuits, wherein in each of the plurality of switching circuits, one of the plurality of first switching elements and a corresponding second switching element of the plurality of second switching elements are connected in series one-to-one, the plurality of first switching elements being connected to the first DC terminal, and the plurality of second switching elements being connected to the second DC terminal; a plurality of AC terminals provided one-to-one for the plurality of switching circuits, each AC terminal of the plurality of AC terminals being connected to a connection node between a first switching element and a second switching element of a corresponding switching circuit of the plurality of switching circuits; a plurality of switches provided one-to-one for the plurality of switching circuits, wherein a first end of each of the plurality of switches is connected to a connection node between a first switching element and a second switching element of a corresponding switching circuit of the plurality of switching circuits, and a second end of each of the plurality of switches is commonly connected to a common connection node; a plurality of resonant capacitors provided one-to-one with respect to the plurality of switches, each resonant capacitor of the plurality of resonant capacitors being connected between the second DC terminal and a first end of a corresponding switch of the plurality of switches; a resonant inductor having a first end and a second end, the first end of the resonant inductor being connected to the common connection node; a regenerative capacitor having a third end and a fourth end, the third end of the regenerative capacitor being connected to the first DC terminal or the second DC terminal; as well as a controller configured to apply a control signal having a potential alternating between a high level and a low level to each of the plurality of first switching elements, the plurality of second switching elements, and the plurality of switches, The controller is configured to set a dead period between a high-level period of a control signal for the first switching element and a high-level period of a control signal for the second switching element for each of the plurality of switching circuits, and to set a high-level period of a control signal for each of the plurality of switches based on the dead period for the corresponding switching circuit belonging to the plurality of switching circuits. Each of the plurality of AC terminals is configured to allow a load current to flow through the first switching element or the second switching element of the corresponding switching circuit, The controller is configured to, when determining that resonant currents respectively passing through two or more switches belonging to the plurality of switches will flow simultaneously through the resonant inductor, perform the first operation and the second operation on the assumption that the two or more switches include two switches corresponding one-to-one to two AC terminals belonging to the plurality of AC terminals through which load currents of the same polarity flow, and one of the two switches is a first switch and the remaining one of the two switches is a second switch. The first operation is configured to shorten a high-level period of a control signal for the first switch by a shortened period from a period including a resonant half period determined by the capacitance of one resonant capacitor corresponding to the first switch among the plurality of resonant capacitors and the inductance of the resonant inductor, and an additional time determined by the voltage of the regenerative capacitor, the inductance of the resonant inductor, and a load current value. The second operation is to shift a high-level period of a control signal for at least one of the first and second switches so that the high-level period of the control signal for the first switch starts when a standby period has elapsed since a point in time when the current value of the resonant current passing through the second switch and a current value of a load current flowing through an AC terminal corresponding to the second switch, which belongs to two or more AC terminals, become consistent after the current value of the resonant current passing through the second switch has become equal to an extreme value.

2. The power converter according to claim 1, wherein The shortened period is equal to or shorter than the additional time.

3. The power converter according to claim 1 or 2, wherein: The controller is configured to shift a high-level period of a control signal for the first switch and a high-level period of a control signal for the second switch in mutually different directions when performing the second operation.

4. The power converter according to claim 1 or 2, wherein: The controller is configured to shift a high-level period of a control signal for the first switch or a high-level period of a control signal for the second switch when performing the second operation.

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