True random number generator with high thermal stability and control method thereof

Abstract

The invention relates to a true random number generator with high thermal stability and a control method thereof. The generator comprises a temperature sensing module, a voltage linear conversion module, a write driving module and a TRNG reading module. The temperature sensing module monitors environment temperature changes in real time and transmits collected temperature data to the corresponding voltage linear conversion modules. The voltage linear conversion module receives the temperature data transmitted by the temperature sensing module, linearly converts the temperature data into write-in voltage, and transmits the write-in voltage to the corresponding write driving module; the write driving module comprises a forward write driving module and a reverse write driving module and is used for respectively realizing write operation of a state '1' and a state '0' of a magnetic tunnel junction (MTJ) according to the received write voltage; and the TRNG reading module is used for outputting a true random number through internal node discharge and level conversion according to resistance comparison of the MTJ and the reference resistor. According to the invention, high-quality true random numbers can be stably generated in a wide temperature range.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit design and true random number technology, and in particular to a true random number generator with high thermal stability based on a magnetic tunnel junction and a control method thereof. Background Art

[0002] In modern information technology, true random number generators (TRNGs) are core modules of information security systems. In numerous applications requiring random numbers, such as cryptography, the quality of these numbers directly impacts the security of encryption algorithms. In secure communications, TRNGs are used to generate keys to ensure the confidentiality of information transmission. Currently, various TRNGs generally leverage the uncertainty of physical entropy sources to generate random numbers. Common sources include thermal noise, random jitter, and quantum phenomena. However, these physical phenomena are often highly sensitive to temperature. As ambient temperature changes, the physical process of generating TRNGs is affected to varying degrees, resulting in changes in the statistical properties of TRNGs. Current mainstream CMOS-based TRNGs rely primarily on charge storage mechanisms or transistor switching mechanisms to generate random numbers. During this process, temperature fluctuations can easily affect the transistor's electrical properties, such as threshold voltage and carrier mobility, leading to deviations in the generated TRNGs.

[0003] The emerging non-volatile magnetic random access memory (MRAM) has become an ideal entropy source for TRNG due to its inherent random flipping characteristics and advantages in speed, number of writes and power consumption, and has attracted widespread attention in the industry. As one of the core devices of MRAM, the spin transfer torque magnetic tunnel junction (STT-MTJ) is mainly composed of a free layer, a tunnel layer and a reference layer to form a multi-layer film structure similar to a sandwich. Among them, the free layer and the reference layer are composed of ferromagnetic materials (such as CoFeB and NiFe), and the tunnel layer is composed of metal oxides (such as Al2O3 and MgO). The reference layer is usually thicker and its magnetization direction remains fixed, while the magnetization direction of the free layer is variable. Based on the spin transfer torque effect, the magnetic field polarization direction of the free layer can be changed by applying a bidirectional current of sufficient intensity. The resistance state of the MTJ depends on the polarization direction of the two ferromagnetic layers relative to the magnetic field. When the polarization directions of the two ferromagnetic layers are consistent, the MTJ is said to be in a parallel state (Parallel, P), and its resistance is recorded as R P When the magnetization directions of the two ferromagnetic layers are opposite, the MTJ is said to be in the anti-parallel state (AP), and its resistance is recorded as RAP The resistance of an MTJ in the parallel state is lower than that in the antiparallel state. Therefore, in memory or logic circuits, the P and AP states of the MTJ are defined as storing data "0" and "1," respectively. Furthermore, the random flipping of MRAM stems from physical phenomena such as thermal noise. This process is inherently random and unpredictable, enabling the generation of high-quality random numbers.

[0004] For traditional true random number generators based on CMOS or MRAM, they all face the problem of randomness degradation in a changing temperature environment. For example, the critical flip current (I C0 ) is significantly affected by temperature: at high temperatures, thermal disturbances increase, reducing the critical current; at low temperatures, thermal disturbances decrease, increasing the critical current. However, existing TRNGs generally use a fixed write current. This causes the MTJ flip probability to deviate from the ideal 50% when the temperature fluctuates, reducing the output sequence uniformity. Furthermore, existing solutions often use complex calibration circuits or algorithms to compensate for temperature drift, which undoubtedly increases circuit area and power consumption.

[0005] Chinese patent document CN 111443896B discloses a high-temperature-resistant true random number generator and true random number generation method. This true random number generator uses an avalanche photodiode (APD module) to generate high-quality true random numbers. However, this true random number generator maintains a high temperature environment (≥50°C) only through a heating constant temperature module, making it unable to adapt to wide temperature fluctuations. Chinese patent document CN 104461457B discloses a true random number generator and its offset compensation control method. This true random number generator generates high-quality true random numbers based on an offset compensation control circuit. However, the offset compensation mechanism used in this true random number generator only targets the comparator reference voltage and does not address the direct impact of temperature on the physical entropy source.

[0006] Therefore, there is an urgent need to realize a true random number generator with a wider temperature adaptability range and higher physical entropy source stability. Summary of the Invention

[0007] The purpose of the present invention is to provide a true random number generator with high thermal stability based on a magnetic tunnel junction and a control method thereof. The true random number generator can address the shortcomings of the existing technology and stably generate high-quality true random numbers over a wide temperature range. It is suitable for scenarios requiring high-reliability random numbers, such as Internet of Things devices, encryption chips, and secure communications.

[0008] To achieve the above object, the present invention adopts the following technical solutions:

[0009] A true random number generator with high thermal stability comprises a temperature sensing module, a voltage linear conversion module, a write driver module, and a TRNG reading module. The temperature sensing module comprises a temperature sensing module I and a temperature sensing module II, and is used to monitor ambient temperature changes in real time and transmit the collected temperature data to the corresponding voltage linear conversion module. The voltage linear conversion module comprises a voltage linear conversion module I and a voltage linear conversion module II, and is used to receive temperature data transmitted by the temperature sensing module, linearly convert the temperature data into a write voltage, and transmit the voltage to the corresponding write driver module. The write driver module comprises a forward write driver module and a reverse write driver module, and is used to implement a write operation of a magnetic tunnel junction (MTJ) to a state of "1" and a state of "0" respectively according to the received write voltage. The TRNG reading module is used to compare the resistance of the magnetic tunnel junction (MTJ) with that of a reference resistor, discharge the internal nodes thereof, and perform level conversion, and ultimately output a true random number.

[0010] As a further improvement of the above technical solution, both the temperature sensing module I and the temperature sensing module II adopt temperature sensors.

[0011] As a further improvement of the above technical solution, the output terminal A of the temperature sensing module I is connected to the input node B of the voltage linear conversion module I; the output terminal C of the voltage linear conversion module I is connected to the input terminal of the forward write driver module; the output terminal of the forward write driver module is connected to the input terminals G and H of the TRNG reading module; the output terminal D of the temperature sensing module II is connected to the input node E of the voltage linear conversion module II; the output terminal F of the voltage linear conversion module II is connected to the input terminal of the reverse write driver module; the output terminal of the reverse write driver module is connected to the input terminals H and G of the TRNG reading module; the output terminal OUT of the TRNG reading module is the output terminal of the true random number generator with high thermal stability.

[0012] As a further improvement of the above technical solution, the voltage linear conversion module I receives a temperature signal from the temperature sensing module I, and the signal is transmitted to the input node B of the voltage linear conversion module I through the output terminal A of the temperature sensing module I; the voltage linear conversion module II receives the temperature signal from the temperature sensing module II, and transmits it from the output terminal D of the temperature sensing module II to the input node E of the voltage linear conversion module II; the voltage linear conversion module I converts the received temperature data into a first write voltage, which is transmitted to the forward write driver module and converted by the forward write driver module into a first write current, which is used to control the forward write driver module to write data to the magnetic tunnel junction MTJ in the TRNG read module; the voltage linear conversion module II converts the received temperature data into a second write voltage, which is transmitted to the reverse write driver module and converted by the reverse write driver module into a second write current, which is used to control the reverse driver module to write data to the magnetic tunnel junction MTJ in the TRNG read module.

[0013] As a further improvement of the above technical solution, the forward write drive module includes a transistor P5 and a transistor N5; the source of the transistor P5 is connected to the output terminal C of the voltage linear conversion module I, and the gate of the transistor P5 is connected to the forward random write signal The drain of the transistor P5 is connected to the free layer G end of the magnetic tunnel junction MTJ in the TRNG read module; the drain of the transistor N5 is connected to the reference layer H end of the magnetic tunnel junction MTJ in the TRNG read module, the gate of the transistor N5 is connected to the forward random write signal Write1, and the source of the transistor N5 is connected to the ground signal GND; the input end of the forward write drive module is the source of the transistor P5, the output end F of the voltage linear conversion module II is connected to the input end of the reverse write drive module, and the input end of the reverse write drive module is the source of the transistor P6.

[0014] As a further improvement of the above technical solution, the reverse write drive module includes a transistor P6 and a transistor N6; the source of the transistor P6 is connected to the output terminal F of the voltage linear conversion module II, and the gate of the transistor P6 is connected to the reverse random write signal The drain of the transistor P6 is connected to the reference layer H end of the magnetic tunnel junction MTJ in the TRNG read module; the drain of the transistor N6 is connected to the free layer G end of the magnetic tunnel junction MTJ in the TRNG read module, the gate of the transistor N6 is connected to the reverse random write signal Write0, and the source of the transistor N6 is connected to the ground signal GND.

[0015] As a further improvement of the above technical solution, the TRNG reading module includes transistor P0, transistor P1, transistor P2, transistor P3, transistor N0, transistor N1, transistor N2, transistor N3, transistor N4, a magnetic tunnel junction MTJ, a reference resistor Rref and an inverter.

[0016] The sources of the transistors P0 to P3 are all connected to the power supply VDD; the gate of the transistor P0 is connected to the clock signal CLK; the drain of the transistor P0 is connected to the drain of the transistor P1, the drain of the transistor N3, the gate of the transistor P2, and the gate of the transistor N4; the gate of the transistor P1 is connected to the gate of the transistor N3, the drain of the transistor P2, the drain of the transistor P3, and the drain of the transistor N4; the drain of the transistor P1 is connected to the drain of the transistor P0, the drain of the transistor N3, the gate of the transistor P2, and the gate of the transistor N4; the gate of the transistor P2 is connected to the gate of the transistor P1. The gate of transistor N4, the drain of transistor P1, the drain of transistor P0, and the drain of transistor N3 are connected; the drain of transistor P2 is connected to the drain of transistor P3, the drain of transistor N4, the gate of transistor P1, and the gate of transistor N3; the gate of transistor P3 is connected to the clock signal CLK, the drain of transistor P3 is connected to the drain of transistor P2, the drain of transistor N4, the gate of transistor P1, the gate of transistor N3, and the input end of the inverter; the gate of transistor N0 is connected to the clock signal CLK, the source of transistor N0 is connected to the ground signal GND, and transistor N0 is connected to the gate of transistor N1. The drain of the transistor N1 is connected to the reference layer H end of the magnetic tunnel junction MTJ and the second end of the reference resistor Rref; the gate of the transistor N1 is connected to the clock signal CLK, the source of the transistor N1 is connected to the free layer G end of the magnetic tunnel junction MTJ, and the drain of the transistor N1 is connected to the source of the transistor N3; the gate of the transistor N2 is connected to the clock signal CLK, the source of the transistor N2 is connected to the first end of the reference resistor Rref, and the drain of the transistor N2 is connected to the source of the transistor N4; the gate of the transistor N3 is connected to the gate of the transistor P1, the drain of the transistor P2, the drain of the transistor P3, the drain of the transistor N4, and the drain of the transistor N5. and the input end of the inverter; the source of the transistor N3 is connected to the drain of the transistor N1, the drain of the transistor N3 is connected to the drain of the transistor P0, the drain of the transistor P1, the gate of the transistor P2, and the gate of the transistor N4; the gate of the transistor N4 is connected to the gate of the transistor P2, the drain of the transistor P0, the drain of the transistor P1, and the drain of the transistor N3; the source of the transistor N4 is connected to the drain of the transistor N2, the drain of the transistor N4 is connected to the drain of the transistor P2, the drain of the transistor P3, the gate of the transistor P1, and the gate of the transistor N3; the drain of the transistor P0 is an internal node The drain of the transistor P3 is the internal node QM, and the output of the inverter is the final output OUT of the TRNG read module.

[0017] As a further improvement of the above technical solution, the transistors P0, P1, P2 and P3 are all PMOS transistors.

[0018] As a further improvement of the above technical solution, the transistor N0 , the transistor N1 , the transistor N2 , the transistor N3 , and the transistor N4 are all NMOS transistors.

[0019] The present invention also includes a control method for the above-mentioned true random number generator with high thermal stability, the method comprising the following steps:

[0020] S1. Ambient temperature collection

[0021] The temperature sensing module I and the temperature sensing module II respectively collect ambient temperature data. The temperature sensing module I sends the collected temperature data to the voltage linear conversion module I, and the temperature sensing module II sends the collected temperature data to the voltage linear conversion module II.

[0022] S2, voltage linear conversion

[0023] The voltage linear conversion module I and the voltage linear conversion module II respectively convert the received temperature data into a write voltage; the voltage linear conversion module I sends the generated write voltage to the forward write drive module, and the voltage linear conversion module II sends the generated write voltage to the reverse write drive module.

[0024] S3, forward write drive and precharge

[0025] The forward random write signal is activated, and the forward write driver module drives current through the magnetic tunnel junction MTJ in the TRNG read module according to the write voltage provided by the voltage linear conversion module I, in an attempt to rewrite the state of the magnetic tunnel junction MTJ to "1"; during this process, the clock signal CLK remains at a low level to pre-charge the internal nodes of the TRNG read module, and the reverse write driver module stops working.

[0026] S4, reverse write drive and precharge

[0027] The reverse random write signal is activated. The reverse write driver module guides the current to flow in the reverse direction through the magnetic tunnel junction MTJ in the TRNG read module according to the write voltage provided by the voltage linear conversion module II, in an attempt to set the state of the magnetic tunnel junction MTJ to "0". During this process, the clock signal CLK remains at a low level to ensure that the pre-charge state of the internal nodes of the TRNG read module remains unchanged, and the forward write driver module stops working.

[0028] S5. Data reading

[0029] When the clock signal CLK goes high, the precharge transistor in the TRNG read module turns off and the discharge transistor turns on. The discharge rate of the internal nodes of the TRNG read module is determined by the resistance value of the magnetic tunnel junction MTJ and the reference resistor Rref, and then the level state of the internal nodes of the TRNG read module is determined. After inverting the level state of the node, a true random number is output.

[0030] Compared with the prior art, the advantages of the present invention are:

[0031] Compared with the prior art, the true random number generator with high thermal stability described in the present invention has a wider temperature adaptability range and higher physical entropy source stability. The true random number generator with high thermal stability described in the present invention adopts a temperature sensing module to monitor the ambient temperature changes in real time, and converts the temperature signal into a precisely controlled write voltage through a voltage linear conversion module to achieve precise adaptation of the MTJ critical flip current. The true random number generator with high thermal stability described in the present invention is designed with an independent forward / reverse write drive module to achieve bidirectional random switching of the MTJ between the "0" and "1" states, greatly increasing the throughput of the true random number generator. The present invention can not only realize the data information reading function with high speed and low power consumption, but also has the ability to resist temperature interference during the data information reading process. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 This is a principle block diagram of the high thermal stability true random number generator of the present invention;

[0033] Figure 2 This is a circuit diagram of a true random number generator with high thermal stability in the present invention;

[0034] Figure 3 This is a schematic diagram of the temperature sensing module and the voltage linear conversion module in the present invention;

[0035] Figure 4 It is a schematic diagram of the forward write driver module in the present invention;

[0036] Figure 5 It is a schematic diagram of the reverse write driver module in the present invention;

[0037] Figure 6 It is a schematic diagram of the TRNG reading module in the present invention;

[0038] Figure 7 This is a graph of NIST test results of output random numbers at different temperatures. DETAILED DESCRIPTION

[0039] The present invention will be further described below with reference to the accompanying drawings:

[0040] Currently, mainstream CMOS-based true random number generators (TRNGs) rely primarily on charge storage and transistor switching mechanisms to generate random numbers. The electrical characteristics of CMOS devices can change significantly when exposed to temperature fluctuations. Specifically, rising or falling temperatures can cause transistor threshold voltage drift and carrier mobility changes, which in turn affect the quality of the random numbers they generate, resulting in uneven distribution and predictability. This makes them unable to meet the stringent requirements for high-quality and secure random numbers when used in varying temperature environments.

[0041] In recent years, the emerging non-volatile magnetic random access memory (MRAM) has attracted widespread attention in the industry due to its inherent random flip characteristics and advantages in speed, write times, and power consumption. However, traditional true random number generators based on magnetic tunnel junctions (MTJs) still suffer from randomness degradation under varying temperature environments. The critical flip current of the MTJ shifts with temperature, causing its random flip probability to deviate from 50%, reducing the uniformity of the output sequence. In addition, existing TRNG designs mostly rely on fixed write currents or complex temperature compensation circuits, making it difficult to maintain stable randomness over a wide temperature range. Therefore, the technical problem to be solved by the present invention is how to design a generator that can stably generate high-quality true random numbers over a wide temperature range.

[0042] like Figure 1 A true random number generator with high thermal stability is shown, comprising a temperature sensing module, a voltage linear conversion module, a write driver module, and a TRNG read module. The temperature sensing module comprises a temperature sensing module I and a temperature sensing module II; the voltage linear conversion module comprises a voltage linear conversion module I and a voltage linear conversion module II; and the write driver module comprises a forward write driver module and a reverse write driver module. Both the temperature sensing module I and the temperature sensing module II utilize temperature sensors.

[0043] Since the MTJ device has different resistance values ​​in the parallel (P) and antiparallel (AP) states, the current required to achieve a 50% switching probability in the two directions is also different under the same pulse width. In order to achieve a 50% switching probability in the two directions, the present invention sets up two temperature sensing modules and two voltage linear conversion modules, one temperature sensing module corresponds to one voltage linear conversion module, which are used for forward write drive and reverse write drive respectively. Temperature sensing modules I and II use temperature sensing circuits to monitor ambient temperature changes in real time, convert the temperature into a voltage signal, and provide input signals for dynamic compensation. Voltage linear conversion module I and voltage linear conversion module II convert the temperature signal into a write voltage through a linear mapping relationship, and further generate a write current that matches the critical flip current of the magnetic tunnel junction MTJ in real time. This global temperature-current adaptation solves the limitations of local compensation in traditional solutions.

[0044] Specifically, the temperature sensing module I is used to monitor ambient temperature changes. Output A of the temperature sensing module I is connected to input node B of the voltage linear conversion module I. Output C of the voltage linear conversion module I is connected to the input of the forward write driver module. The output of the forward write driver module is connected to input terminals G and H of the TRNG read module. The temperature sensing module II is used to monitor ambient temperature changes. Output D of the temperature sensing module II is connected to input node E of the voltage linear conversion module II. Output F of the voltage linear conversion module II is connected to the input of the reverse write driver module. The output of the reverse write driver module is connected to input terminals H and G of the TRNG read module. Output OUT of the TRNG read module serves as the output of the true random number generator with high thermal stability described in the present invention. The write current of a magnetic tunnel junction (MTJ) decreases with increasing temperature and requires precise control through linear conversion. The connection between the temperature sensing module, voltage linear conversion module, and write driver module forms a closed-loop control chain of temperature, voltage, and current, ensuring dynamic matching of the write current and temperature. To avoid mutual interference between forward and reverse currents, independent voltage linear conversion modules I and II are used to control the write current and achieve temperature adaptation of bidirectional current.

[0045] Existing technologies often use fixed write currents or local compensation techniques, making it impossible to directly perform global temperature adaptation for the critical switching current of the magnetic tunnel junction (MTJ). The present invention achieves precise control of the physical entropy source of the magnetic tunnel junction (MTJ) by linearly mapping the temperature-voltage-current relationship, thus overcoming the limitations of temperature drift on random number uniformity. The present invention employs a dynamic temperature compensation mechanism, using temperature sensing modules I and II to monitor ambient temperature in real time. The collected temperature data is then linearly converted into a write voltage via voltage linear conversion modules I and II, respectively. The write current is dynamically adjusted using the write voltage to ensure that the critical switching current of the magnetic tunnel junction (MTJ) adapts to temperature variations.

[0046] As a further improvement of the above technical solution, Figure 2 and Figure 3 As shown, the temperature sensing module I and the temperature sensing module II are both used to monitor changes in ambient temperature. The output terminal A of the temperature sensing module I is connected to the input terminal B of the voltage linear conversion module I. The output terminal D of the temperature sensing module II is connected to the input terminal E of the voltage linear conversion module II. The output terminal C of the voltage linear conversion module I is connected to the input terminal of the forward write driver module, which is the source of transistor P5. The output terminal F of the voltage linear conversion module II is connected to the input terminal of the reverse write driver module, which is the source of transistor P6. The output terminal of the temperature sensing module is connected to the input terminal of the corresponding voltage conversion module to transmit the temperature signal to the voltage conversion module and start the dynamic compensation process. The forward write driver module and the reverse write driver module need to receive precise voltage signals to control the amplitude and direction of the write current. Therefore, the output terminal of the voltage conversion module is connected to the write driver module to input the compensated write voltage into the write driver module to generate an adaptive current.

[0047] As a further improvement of the above technical solution, Figures 1 to 3As shown, the voltage linear conversion module includes a voltage linear conversion module I and a voltage linear conversion module II. The voltage linear conversion module I receives a temperature signal from the temperature sensing module I, and the signal is transmitted to the input node B of the voltage linear conversion module I through the output terminal A of the temperature sensing module I. Similarly, the voltage linear conversion module II receives a temperature signal from the temperature sensing module II, and transmits it from the output terminal D of the temperature sensing module II to the input node E of the voltage linear conversion module II. The temperature signal collected by the temperature sensing module is the basis for the subsequent voltage linear conversion module to perform voltage conversion. After receiving the temperature signal, the voltage linear conversion module converts the temperature signal into a precisely controlled write voltage. This linear conversion is regular. For example, when the temperature rises, the temperature sensing module outputs a linearly decreasing voltage. After receiving the decreasing voltage signal, the voltage linear conversion module performs operational amplification according to the set linear relationship. Assuming the voltage linear conversion module's conversion relationship is a fixed linear function: Vout = k*Vin + b, where Vout is the output voltage, Vin is the input voltage, and k and b are constants determined by the circuit design. As the input voltage varies linearly, the output voltage will also vary linearly according to this functional relationship. The MTJ critical flip current varies approximately linearly with temperature, requiring a linear conversion to match its characteristics. Therefore, the voltage linear conversion module uses an operational amplifier with a feedback resistor network, setting the gain k and bias b to ensure a linear relationship between the output and input. The temperature signal is mapped to a write voltage, achieving linear adaptation of temperature and write current.

[0048] As a further improvement to the above technical solution, the output terminal C of the voltage linear conversion module I is connected to the input terminal of the forward write driver module. The output voltage signal is converted by a circuit into a write current. This write current is used to control the forward write driver module to write data to the magnetic tunnel junction (MTJ) in the TRNG read module. Similarly, the output terminal F of the voltage linear conversion module II is connected to the input terminal of the reverse write driver module. The write current converted from its output voltage is used by the reverse write driver module. Taking the forward write driver module as an example, when the voltage linear conversion module I outputs a voltage signal, this voltage signal acts on the source of transistor P5 in the forward write driver module. According to Ohm's law, I = V / R, where I is current, V is voltage, and R is resistance. With the circuit parameters such as resistance determined, the output voltage signal can be converted into a precisely controlled write current. This write current can be adaptively adjusted based on temperature changes, ensuring that the magnetic tunnel junction (MTJ) maintains a precise 50% flip probability over a wide temperature range. The write operation of the magnetic tunnel junction (MTJ) depends on the current amplitude, requiring Ohm's law to achieve precise voltage-current conversion. The write driver module converts the compensated write voltage into a write current, driving the MTJ to randomly flip. Adaptive adjustment of the write current dynamically adjusts the write current based on temperature fluctuations to maintain a stable MTJ flip probability. As the temperature rises, the voltage linear conversion module reduces the output voltage, reducing the write current and preventing excessive flipping at high temperatures. As the temperature drops, the output voltage increases, increasing the write current and ensuring sufficient drive at low temperatures.

[0049] As a further improvement to the above technical solution, traditional TRNGs rely heavily on a single write path, limiting throughput. This invention designs independent forward / reverse write drive modules that support bidirectional random writes, resolving the throughput issue inherent in a unidirectional write path. By independently driving the forward / reverse write drive modules in both directions, eliminating the need for additional reset operations and combining them with dynamic temperature compensation, this not only improves write efficiency but also enables symmetrical random switching between "0" and "1," ensuring that the flip probability of "0" and "1" remains stable at approximately 50% across all temperatures.

[0050] Specifically, if Figure 2 and Figure 4 As shown, the forward write drive module includes a transistor P5 and a transistor N5. The source of the transistor P5 is connected to the output terminal C of the voltage linear conversion module I, and the gate of the transistor P5 is connected to the forward random write signal The drain of the transistor P5 is connected to the free layer G end of the magnetic tunnel junction MTJ in the TRNG read module. The drain of the transistor N5 is connected to the reference layer H end of the magnetic tunnel junction MTJ in the TRNG read module. The gate of the transistor N5 is connected to the forward random write signal Write1, and the source of the transistor N5 is connected to the ground signal GND.

[0051] like Figure 2 and Figure 5 As shown, the reverse write drive module includes a transistor P6 and a transistor N6. The source of the transistor P6 is connected to the output terminal F of the voltage linear conversion module II, and the gate of the transistor P6 is connected to the reverse random write signal. The drain of the transistor P6 is connected to the reference layer H terminal of the magnetic tunnel junction MTJ in the TRNG read module. The drain of the transistor N6 is connected to the free layer G terminal of the magnetic tunnel junction MTJ in the TRNG read module. The gate of the transistor N6 is connected to the reverse random write signal Write0, and the source of the transistor N6 is connected to the ground signal GND.

[0052] Based on the above solution, the present invention adopts an independent bidirectional write drive architecture, separating the forward write drive module (P5, N5) from the reverse write drive module (P6, N6), corresponding to the write operations of MTJ states "1" and "0", respectively, and realizing bidirectional random switching through temperature-compensated write current. In addition, the current direction and timing control of the forward write drive module (P5, N5) and the reverse write drive module (P6, N6) must be strictly coordinated. This design is not a simple combination, but an innovation to solve the throughput of the TRNG read module. The TRNG read module in the present invention can achieve an operating frequency of 100MHz, significantly improving the random number generation rate.

[0053] As a further improvement of the above technical solution, Figure 2 and Figure 6As shown, the TRNG read module includes transistors P0, P1, P2, P3, N0, N1, N2, N3, N4, a magnetic tunnel junction (MTJ), a reference resistor Rref, and an inverter. Transistors P0, P1, P2, and P3 are all PMOS transistors. Transistors N0, N1, N2, N3, and N4 are all NMOS transistors. The sources of transistors P0 through P3 are all connected to a power supply VDD. The gate of transistor P0 is connected to a clock signal CLK, and the drain of transistor P0 is connected to the drain of transistor P1, the drain of transistor N3, the gate of transistor P2, and the gate of transistor N4. The gate of transistor P1 is connected to the gate of transistor N3, the drain of transistor P2, the drain of transistor P3, and the drain of transistor N4. The drain of transistor P1 is connected to the drain of transistor P0, the drain of transistor N3, the gate of transistor P2, and the gate of transistor N4. The gate of transistor P2 is connected to the gate of transistor N4, the drain of transistor P1, the drain of transistor P0, and the drain of transistor N3. The drain of transistor P2 is connected to the drain of transistor P3, the drain of transistor N4, the gate of transistor P1, and the gate of transistor N3. The gate of transistor P3 is connected to the clock signal CLK, and the drain of transistor P3 is connected to the drain of transistor P2, the drain of transistor N4, the gate of transistor P1, the gate of transistor N3, and the input terminal of the inverter. The gate of transistor N0 is connected to the clock signal CLK, the source of transistor N0 is connected to the ground signal GND, and the drain of transistor N0 is connected to the reference layer H terminal of the magnetic tunnel junction MTJ and the second terminal of the reference resistor Rref. The gate of transistor N1 is connected to the clock signal CLK, the source of transistor N1 is connected to the free layer G segment of the magnetic tunnel junction MTJ, and the drain of transistor N1 is connected to the source of transistor N3. The gate of transistor N2 is connected to the clock signal CLK, the source of transistor N2 is connected to the first end of reference resistor Rref, and the drain of transistor N2 is connected to the source of transistor N4. The gate of transistor N3 is connected to the gate of transistor P1, the drain of transistor P2, the drain of transistor P3, the drain of transistor N4, and the input terminal of the inverter. The source of transistor N3 is connected to the drain of transistor N1, and the drain of transistor N3 is connected to the drain of transistor P0, the drain of transistor P1, the gate of transistor P2, and the gate of transistor N4. The gate of transistor N4 is connected to the gate of transistor P2, the drain of transistor P0, the drain of transistor P1, and the drain of transistor N3. The source of transistor N4 is connected to the drain of transistor N2, and the drain of transistor N4 is connected to the drain of transistor P2, the drain of transistor P3, the gate of transistor P1, and the gate of transistor N3. The drain of transistor P0 is an internal node. The drain of the transistor P3 is the internal node QM, and the output of the inverter is the final output OUT of the TRNG read module.

[0054] Based on the above technical solution, the TRNG read module of the present invention maintains a stable flip probability of the magnetic tunnel junction (MTJ) approaching the ideal value of 50% over a wide temperature range of -25°C to 125°C. The present invention converts the temperature signal into a precise write voltage through a voltage linear conversion module, generating an adaptive current without the need for additional calibration circuitry, thus resolving the problem of a fixed write current being unable to adapt to temperature changes. The TRNG read module of the present invention generates true random numbers that pass NIST randomness tests at different ambient temperatures (-25°C, 25°C, 75°C, and 125°C).

[0055] The present invention also includes a control method for the above-mentioned true random number generator with high thermal stability, the method comprising the following steps:

[0056] S1. Ambient temperature collection

[0057] The temperature sensing module I and the temperature sensing module II respectively collect ambient temperature data. The temperature sensing module I sends the collected temperature data to the voltage linear conversion module I, and the temperature sensing module II sends the collected temperature data to the voltage linear conversion module II.

[0058] S2, voltage linear conversion

[0059] The voltage linear conversion module I and the voltage linear conversion module II respectively convert the received temperature data into a write voltage; the voltage linear conversion module I sends the generated write voltage to the forward write drive module, and the voltage linear conversion module II sends the generated write voltage to the reverse write drive module.

[0060] S3, forward write drive and precharge

[0061] The forward random write signal is activated, and the forward write driver module drives current through the magnetic tunnel junction MTJ in the TRNG read module according to the write voltage provided by the voltage linear conversion module I, in an attempt to rewrite the state of the magnetic tunnel junction MTJ to "1"; during this process, the clock signal CLK remains at a low level to pre-charge the internal nodes of the TRNG read module, and the reverse write driver module stops working.

[0062] S4, reverse write drive and precharge

[0063] The reverse random write signal is activated. The reverse write driver module guides the current to flow in the reverse direction through the magnetic tunnel junction MTJ in the TRNG read module according to the write voltage provided by the voltage linear conversion module II, in an attempt to set the state of the magnetic tunnel junction MTJ to "0". During this process, the clock signal CLK remains at a low level to ensure that the pre-charge state of the internal nodes of the TRNG read module remains unchanged, and the forward write driver module stops working.

[0064] S5. Data reading

[0065] When the clock signal CLK goes high, the precharge transistor in the TRNG read module turns off and the discharge transistor turns on. The discharge rate of the internal nodes of the TRNG read module is determined by the resistance value of the magnetic tunnel junction MTJ and the reference resistor Rref, and then the level state of the internal nodes of the TRNG read module is determined. After inverting the level state of the node, a true random number is output.

[0066] The working principle of the true random number generator with high thermal stability described in the present invention is:

[0067] The high thermal stability true random number generator described in this invention has a cycle consisting of two phases: a random write "1" (forward) followed by a read phase; and a random write "0" (reverse) followed by a read phase. The read phase is further divided into two phases: a precharge phase and a data read phase.

[0068] When the true random number generator with high thermal stability of the present invention works in the random write "1" (forward) stage, that is, the forward write drive stage described in step S3, the forward random write signal is "0", the forward random write signal Write1 is "1", the write drive transistor P5 and transistor N5 are turned on; the reverse random write signal =1, the reverse random write signal Write0 is "0", the write driver transistor P6 and transistor N6 are turned off. The logic level of the clock signal CLK is "0", the precharge transistor P0 and transistor P3 are in the on state, and the internal nodes QM and QM of the TRNG reading module are The voltage of is precharged to the supply voltage VDD, and the transistors N0, N1 and N2 are all in the off state.

[0069] When the true random number generator with high thermal stability of the present invention works in the random write "0" (reverse) stage, that is, the reverse write drive stage described in step S4, the reverse random write signal =0, the reverse random write signal Write0 is =1, the write driver transistor P6 and transistor N6 are turned on. =1, the forward random write signal Write1 is "0", the write driver transistor P5 and transistor N5 are turned off; the logic level of the clock signal CLK is "0", the precharge transistor P0 and transistor P3 are in the on state, and the internal nodes QM and QM of the TRNG reading module are turned off. The voltage of is precharged to the supply voltage VDD, and the transistors N0, N1 and N2 are all in the off state.

[0070] When the true random number generator with high thermal stability of the present invention operates in the reading stage, in the pre-charging stage, i.e., the pre-charging described in step S3 and step S4, the logic level of the clock signal CLK is "0", the pre-charging transistor P0 and the transistor P3 are in the on state, and the internal nodes QM, QM, QM and QM of the TRNG reading module are connected. The voltage of the FET is precharged to the supply voltage VDD, and transistors N0, N1, and N2 are all off. During the data reading phase, the logic level of the clock signal CLK is "1," precharging transistors P0 and P3 are off, and the discharge transistors N0, N1, and N2 of the TRNG read module are all on. During the reading phase, write driver transistors P5, P6, N5, and N6 are all off.

[0071] The resistance of the reference resistor Rref in the TRNG reading module is R ref =(R AP +R P ) / 2, internal node QM, The voltage depends on the resistance of the random write magnetic tunnel junction MTJ and the size of the reference resistance Rref.

[0072] In step S5, the discharge rate of the internal node of the TRNG reading module is determined according to the resistance value of the magnetic tunnel junction MTJ and the reference resistor Rref, and then the level state of the internal node of the TRNG reading module is determined, and the level state of the node is inverted to output a true random number, including:

[0073] S51, if the resistance value of the magnetic tunnel junction MTJ connected to the transistor N1 is greater than the resistance value of the reference resistor Rref connected to the transistor N2, the logic level of the internal node QM after the TRNG read module is discharged is "0", and the internal node The logic level of the output terminal OUT of the inverter is "1", that is, the data information read out by the true random number generator with high thermal stability of the present invention is "1".

[0074] S52: If the resistance of the magnetic tunnel junction MTJ connected to the transistor N1 is less than the resistance of the reference resistor Rref connected to the transistor N2, the logic level of the internal node QM after the TRNG read module is discharged is "1", and the internal node The logic level of is “0”, and the logic level of the output terminal OUT of the inverter is “0”, that is, the data information read out by the true random number generator with high thermal stability of the present invention is “0”.

[0075] When the true random number generator with high thermal stability described in the present invention works in the forward and reverse random writing stages, since the flipping probability of random writing "1" (forward) and random writing "0" (reverse) are fixed at 50%, the state of the magnetic tunnel junction MTJ may flip to another state or maintain its original state. Next, we will analyze the process of success / failure of flipping when the original state is "0" and random writing "1" (forward); the process of success / failure of flipping when the original state is "1" and random writing "1" (forward); the process of success / failure of flipping when the original state is "0" and random writing "0" (reverse); the process of success / failure of flipping when the original state is "1" and random writing "0" (reverse) as well as the maintenance of the flipping probability when the external ambient temperature changes during the above processes, to illustrate the ability of the true random number generator with high thermal stability described in the present invention to generate true random numbers within a wide temperature range. The specific description is as follows:

[0076] (1) When the state of the magnetic tunnel junction MTJ in the TRNG read module is "0" in the previous stage and "1" is randomly written (forward), the write driver transistor P5 and transistor N5 are turned on, and the write driver transistor P6 and transistor N6 are turned off; the transistor N0, transistor N1, and transistor N2 in the TRNG read module are all turned off, and the write current is precisely controlled by the voltage linear conversion module I and flows out from the C end of the voltage linear conversion module I. The write path includes transistor P5, magnetic tunnel junction MTJ, transistor N5, and GND. Since the flip probability is fixed at 50%, the state of the magnetic tunnel junction MTJ may flip to another state or remain in its original state. If the magnetic tunnel junction MTJ is successfully flipped, the data "1" is stored in the magnetic tunnel junction MTJ. In the data reading stage, since the resistance value of the magnetic tunnel junction MTJ (high resistance state) is greater than the resistance value of the reference resistor Rref, in the discharge stage of CLK=1, the transistor N0, transistor N1, and transistor N2 in the TRNG read module are all turned on, and the current discharge rates in the two paths are different. The QM end is higher than the reference resistor Rref. The current discharge speed of the terminal is faster, and the QM terminal will be pulled down to GND, that is, logic "0"; resulting in The charging transistor P1 corresponding to the terminal is turned on. The end will be pulled up to the supply voltage VDD, that is, logic "1". The logic level of the internal node QM is "1" after passing through the inverter, and the logic level of the output terminal OUT is "1", that is, the data information read by the true random number generator in this case is "1". If the magnetic tunnel junction MTJ is not successfully flipped, the data "0" is still stored in the magnetic tunnel junction MTJ. In the data reading stage, since the resistance value of the magnetic tunnel junction MTJ (low resistance state) is less than the resistance value of the reference resistor Rref, in the discharge stage of CLK=1, the transistor N0, transistor N1, and transistor N2 in the TRNG reading module are all turned on, and the current discharge rates in the two paths are different. The current discharge speed of the terminal is faster than that of the QM terminal. The terminal is pulled down to GND, which is a logic "0". This causes the charging transistor P2 corresponding to the QM terminal to turn on, and the QM terminal is pulled up to the supply voltage VDD, which is a logic "1". The logic level of the internal node QM passes through the inverter and the logic level of the output terminal OUT is "0". In this case, the data information read by the true random number generator is "0".

[0077] (2) When the state stored in the magnetic tunnel junction MTJ in the TRNG read module is "1" in the previous stage and "1" is randomly written (forward), the write driver transistor P5 and transistor N5 are turned on, and the write driver transistor P6 and transistor N6 are turned off; the transistor N0, transistor N1, and transistor N2 in the TRNG read module are all turned off, and the write current is precisely controlled by the voltage linear conversion module I and flows out from the C end of the voltage linear conversion module I. The write path includes transistor P5, magnetic tunnel junction MTJ, transistor N5, and GND. Since in this case it is only possible to maintain the original state "1" and it is impossible to flip to the state "0", the data "1" is stored in the magnetic tunnel junction MTJ. In the data reading stage, since the resistance value of the magnetic tunnel junction MTJ (high resistance state) is greater than the resistance value of the reference resistor Rref, therefore, in the discharge stage of CLK=1, the transistor N0, transistor N1, and transistor N2 in the TRNG read module are all turned on, and the current discharge rates in the two paths are different, and the QM end is higher than the reference resistor Rref. The current discharge speed of the terminal is faster, and the QM terminal will be pulled down to GND, that is, logic "0"; resulting in The charging transistor P1 corresponding to the terminal is turned on. The terminal will be pulled up to the supply voltage VDD, that is, logic "1". The logic level of the internal node QM passes through the inverter and the logic level of the output terminal OUT is "1", that is, the data information read by the true random number generator in this case is "1".

[0078] (3) When the state stored in the magnetic tunnel junction MTJ in the TRNG read module is "0" in the previous stage and "0" is randomly written (reverse), the write driver transistor P6 and transistor N6 are turned on, and the write driver transistor P5 and transistor N5 are turned off; the transistor N0, transistor N1, and transistor N2 in the TRNG read module are all turned off, and the write current is precisely controlled by the voltage linear conversion module II and flows out from the F end of the voltage linear conversion module II. The write path includes transistor P6, magnetic tunnel junction MTJ, transistor N6, and GND. Since in this case it is only possible to maintain the original state "0" and it is impossible to flip to the state "1", the data "0" is stored in the MTJ. In the data reading stage, since the resistance value of the magnetic tunnel junction MTJ (low resistance state) is less than the resistance value of the reference resistor Rref, in the discharge stage of CLK=1, the transistor N0, transistor N1, and transistor N2 in the TRNG read module are all turned on, and the current discharge rates in the two paths are different. The current discharge speed of the terminal is faster than that of the QM terminal. The terminal is pulled down to GND, which is a logic "0". This causes the charging transistor P2 corresponding to the QM terminal to turn on, and the QM terminal is pulled up to the supply voltage VDD, which is a logic "1". The logic level of the internal node QM passes through the inverter and the logic level of the output terminal OUT is "0". In this case, the data information read by the true random number generator is "0".

[0079] (4) When the state of the magnetic tunnel junction MTJ in the TRNG reading module is "1" in the previous stage and "0" is randomly written (reverse), the write driver transistor P6 and transistor N6 are turned on, and the write driver transistor P5 and transistor N5 are turned off; the transistor N0, transistor N1, and transistor N2 in the TRNG reading module are all turned off, and the write current is precisely controlled by the voltage linear conversion module II and flows out from the F end of the voltage linear conversion module II. The write path includes transistor P6, magnetic tunnel junction MTJ, transistor N6, and GND. Since the flip probability is fixed at 50%, the state of the magnetic tunnel junction MTJ may flip to another state or remain in its original state. If the magnetic tunnel junction MTJ is successfully flipped, the data "0" is stored in the magnetic tunnel junction MTJ. In the data reading stage, since the resistance value of the magnetic tunnel junction MTJ (low resistance state) is less than the resistance value of the reference resistor Rref, in the discharge stage of CLK=1, the transistor N0, transistor N1, and transistor N2 in the TRNG reading module are all turned on, and the current discharge rates in the two paths are different. The current discharge speed of the terminal is faster than that of the QM terminal. The terminal will be pulled down to GND, which is logic "0", causing the charging transistor P2 corresponding to the QM terminal to turn on, and the QM terminal will be pulled up to the power supply voltage VDD, which is logic "1". The logic level of the internal node QM is "0" at the output terminal OUT after passing through the inverter, that is, the data information read out by the true random number generator in this case is "0". If the magnetic tunnel junction MTJ is not successfully flipped, the data "1" is still stored in the magnetic tunnel junction MTJ. In the data reading stage, since the resistance value of the magnetic tunnel junction MTJ (high resistance state) is greater than the resistance value of the reference resistor Rref, in the discharge stage of CLK=1, the transistor N0, transistor N1, and transistor N2 in the TRNG reading module are all turned on, and the current discharge rates in the two paths are different. The QM terminal is higher than The current discharge speed of the terminal is faster, and the QM terminal will be pulled down to GND, that is, logic "0"; resulting in The charging transistor P1 corresponding to the terminal is turned on. The terminal will be pulled up to the supply voltage VDD, that is, logic "1". The logic level of the internal node QM passes through the inverter and the logic level of the output terminal OUT is "1", that is, the data information read by the true random number generator in this case is "1".

[0080] When the ambient temperature changes during the above process, the MTJ device is affected by the ambient temperature, and its flip probability will change. When the ambient temperature increases, the critical flip current required by the MTJ decreases. If the original write current is still used, the flip success probability will be significantly improved. When the ambient temperature decreases, the critical flip current required by the MTJ increases. If the original write current is still used, the flip success probability will be significantly reduced.

[0081] The prior art generally believes that the critical switching current of a magnetic tunnel junction (MTJ) is inevitably subject to temperature drift, requiring complex post-processing circuits or algorithms to compensate. However, this invention proposes a hardware-level linear mapping solution that achieves dynamic adaptation directly through a closed-loop control process of temperature sensing, voltage conversion, and write current, breaking the technical preconception that it must rely on post-processing / software calibration. Existing TRNGs generally use a fixed write current, resulting in MTJs that are prone to flipping at high temperatures but difficult at low temperatures. This dynamic adaptation mechanism breaks the stereotype that a fixed current is sufficient.

[0082] To globally compensate for the temperature drift of the critical current of the magnetic tunnel junction (MTJ), the present invention requires independent temperature monitoring via sensors to improve compensation accuracy. The critical switching current of the MTJ varies linearly with temperature, requiring dynamic adaptation through linear conversion. Voltage linear conversion modules I and II linearly map the temperature signal to a write voltage, thereby generating a write current that matches the critical switching current of the MTJ. By setting the linear function Vout = k*Vin + b, where k and b are optimized based on the temperature characteristics of the MTJ, the write current is ensured to match the critical switching current. The present invention dynamically monitors the ambient temperature via a temperature sensing module and adjusts the write current in real time, ensuring that the switching probability of the MTJ remains stable near 50% over a wide temperature range. This solves the problem of decreased random number uniformity caused by temperature drift. The present invention combines the temperature sensing module and the voltage linear conversion module with the dynamic adaptation of the critical switching current of the MTJ to form a closed-loop control system, representing an innovation not disclosed in the prior art.

[0083] In addition, considering that the traditional unidirectional write path cannot achieve high throughput and the bidirectional current needs to be adjusted independently under temperature changes, the present invention designs a forward write drive module and a reverse write drive module, which control the current direction through independent drive circuits (transistors P5 / N5 and P6 / N6) to control the write operation of MTJ state "1" and "0" respectively. At the same time, the temperature compensation voltage is combined to generate precise write current to support bidirectional random switching. The resistance state of the magnetic tunnel junction MTJ (high resistance state R AP Or low resistance R P ) needs to be compared with the reference resistor Rref to determine the random bit. The TRNG read module triggers level conversion based on the difference in discharge rates on different paths and outputs a true random number.

[0084] In order to verify the effect of the present invention, the randomness of the true random numbers generated at different temperatures was evaluated using the NIST 800-22 randomness standard. The NIST test results are as follows: Figure 7 As shown. Figure 7 As shown, all 15 test results are outside the circle with a radius of 0.01 (PASS: P>0.01), indicating that the true random number generator with high thermal stability of the present invention successfully passed all NIST randomness tests, and the true random number generator is capable of generating unbiased, uncorrelated and unpredictable random numbers at different temperatures.

[0085] In summary, the high thermal stability true random number generator described in the present invention adaptively adjusts the write current of the TRNG read module according to changes in ambient temperature, thereby achieving stable output of true random numbers. The present invention uses a temperature sensor (temperature sensing modules I and II) to monitor ambient temperature changes in real time, and its linear output characteristics are dynamically matched with the flip probability requirements of the magnetic tunnel junction (MTJ). When the temperature rises, the sensor outputs a linearly decreasing voltage. After the voltage signal is accurately linearly converted by the operational amplifier circuit (voltage linear conversion module I and voltage linear conversion module II), the output is a write current that is linearly related to the temperature. This write current acts on the TRNG read module, ensuring that the magnetic tunnel junction MTJ maintains an accurate 50% flip probability over a wide temperature range, thereby breaking through the temperature stability bottleneck of traditional TRNG.

[0086] The above-described embodiments are merely descriptions of preferred implementations of the present invention and are not intended to limit the scope of the present invention. Without departing from the spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should fall within the scope of protection determined by the claims of the present invention.

Claims

1. A true random number generator with high thermal stability, characterized in that: Includes temperature sensing module, voltage linear conversion module, write driver module and TRNG reading module; The temperature sensing module includes a temperature sensing module I and a temperature sensing module II, which are used to monitor the ambient temperature changes in real time and transmit the collected temperature data to the corresponding voltage linear conversion modules respectively; The voltage linear conversion module includes a voltage linear conversion module I and a voltage linear conversion module II, which are used to receive temperature data transmitted by the temperature sensing module, linearly convert the temperature data into a write voltage, and transmit the voltage to the corresponding write driver module respectively; The write driver module includes a forward write driver module and a reverse write driver module, which are used to implement write operations of the magnetic tunnel junction MTJ state "1" and state "0" respectively according to the received write voltage; The TRNG reading module is used to compare the resistance of the magnetic tunnel junction MTJ with that of the reference resistor, discharge the internal nodes and perform level conversion, and finally output a true random number.

2. The true random number generator with high thermal stability according to claim 1, characterized in that The temperature sensing module I and the temperature sensing module II both use temperature sensors.

3. The true random number generator with high thermal stability according to claim 1, characterized in that: The output terminal A of the temperature sensing module I is connected to the input node B of the voltage linear conversion module I; the output terminal C of the voltage linear conversion module I is connected to the input terminal of the forward write driver module; the output terminal of the forward write driver module is connected to the input terminals G and H of the TRNG reading module; the output terminal D of the temperature sensing module II is connected to the input node E of the voltage linear conversion module II; the output terminal F of the voltage linear conversion module II is connected to the input terminal of the reverse write driver module; the output terminal of the reverse write driver module is connected to the input terminals H and G of the TRNG reading module; the output terminal OUT of the TRNG reading module is the output terminal of the true random number generator with high thermal stability.

4. The true random number generator with high thermal stability according to claim 3, characterized in that: The voltage linear conversion module I receives a temperature signal from the temperature sensing module I, and transmits the temperature signal to the input node B of the voltage linear conversion module I through the output terminal A of the temperature sensing module I. The voltage linear conversion module II receives a temperature signal from the temperature sensing module II, and transmits the temperature signal from the output terminal D of the temperature sensing module II to the input node E of the voltage linear conversion module II. The voltage linear conversion module I converts the received temperature data into a first write voltage, which is transmitted to the forward write driver module and converted by the forward write driver module into a first write current. The first write current is used to control the forward write driver module to write data to the magnetic tunnel junction MTJ in the TRNG read module. The voltage linear conversion module II converts the received temperature data into a second write voltage, which is transmitted to the reverse write drive module and converted into a second write current by the reverse write drive module. The second write current is used to control the reverse drive module to write data to the magnetic tunnel junction MTJ in the TRNG read module.

5. The true random number generator with high thermal stability according to claim 1 or 3, characterized in that: The forward write drive module includes a transistor P5 and a transistor N5; the source of the transistor P5 is connected to the output terminal C of the voltage linear conversion module I, the gate of the transistor P5 is connected to the forward random write signal Write1, and the drain of the transistor P5 is connected to the free layer G terminal of the magnetic tunnel junction MTJ in the TRNG read module; the drain of the transistor N5 is connected to the reference layer H terminal of the magnetic tunnel junction MTJ in the TRNG read module, the gate of the transistor N5 is connected to the forward random write signal Write1, and the source of the transistor N5 is connected to the ground signal GND; the input terminal of the forward write drive module is the source of the transistor P5, the output terminal F of the voltage linear conversion module II is connected to the input terminal of the reverse write drive module, and the input terminal of the reverse write drive module is the source of the transistor P6.

6. The true random number generator with high thermal stability according to claim 1 or 3, characterized in that: The reverse write drive module includes a transistor P6 and a transistor N6; the source of the transistor P6 is connected to the output terminal F of the voltage linear conversion module II, and the gate of the transistor P6 is connected to the reverse random write signal The drain of the transistor P6 is connected to the reference layer H end of the magnetic tunnel junction MTJ in the TRNG read module; the drain of the transistor N6 is connected to the free layer G end of the magnetic tunnel junction MTJ in the TRNG read module, the gate of the transistor N6 is connected to the reverse random write signal Write0, and the source of the transistor N6 is connected to the ground signal GND.

7. The true random number generator with high thermal stability according to claim 1 or 3, characterized in that: The TRNG reading module includes a transistor P0, a transistor P1, a transistor P2, a transistor P3, a transistor N0, a transistor N1, a transistor N2, a transistor N3, a transistor N4, a magnetic tunnel junction MTJ, a reference resistor Rref and an inverter; The sources of the transistors P0 to P3 are all connected to the power supply VDD; the gate of the transistor P0 is connected to the clock signal CLK, the drain of the transistor P0 is connected to the drain of the transistor P1, the drain of the transistor N3, the gate of the transistor P2, and the gate of the transistor N4; the gate of the transistor P1 is connected to the gate of the transistor N3, the drain of the transistor P2, the drain of the transistor P3, and the drain of the transistor N4; the drain of the transistor P1 is connected to the drain of the transistor P0, the drain of the transistor N3, the gate of the transistor P2, and the gate of the transistor N4; the gate of the transistor P2 is connected to the gate of the transistor N4, the drain of the transistor P1, the drain of the transistor P0, and the drain of the transistor N3; the drain of the transistor P2 is connected to the drain of the transistor P0, the drain of the transistor N3, the drain of the transistor P2, and the gate of the transistor N4; The drain of transistor P3, the drain of transistor N4, the gate of transistor P1, and the gate of transistor N3 are connected; the gate of transistor P3 is connected to the clock signal CLK, and the drain of transistor P3 is connected to the drain of transistor P2, the drain of transistor N4, the gate of transistor P1, the gate of transistor N3, and the input end of the inverter; the gate of transistor N0 is connected to the clock signal CLK, the source of transistor N0 is connected to the ground signal GND, the drain of transistor N0 is connected to the reference layer H end of the magnetic tunnel junction MTJ and the second end of the reference resistor Rref; the gate of transistor N1 is connected to the clock signal CLK, the source of transistor N1 is connected to the free layer G end of the magnetic tunnel junction MTJ, and the drain of transistor N1 is connected to the source of transistor N3; The gate of the transistor N2 is connected to the clock signal CLK, the source of the transistor N2 is connected to the first end of the reference resistor Rref, and the drain of the transistor N2 is connected to the source of the transistor N4; the gate of the transistor N3 is connected to the gate of the transistor P1, the drain of the transistor P2, the drain of the transistor P3, the drain of the transistor N4, and the input end of the inverter; the source of the transistor N3 is connected to the drain of the transistor N1, the drain of the transistor N3 is connected to the drain of the transistor P0, the drain of the transistor P1, the gate of the transistor P2, and the gate of the transistor N4; the gate of the transistor N4 is connected to the gate of the transistor P2, the drain of the transistor P0, the drain of the transistor P1, and the drain of the transistor N3; the source of the transistor N4 is connected to the drain of the transistor N2, the drain of the transistor N4 is connected to the drain of the transistor P2, the drain of the transistor P3, the gate of the transistor P1, and the gate of the transistor N3; the drain of the transistor P0 is an internal node The drain of the transistor P3 is the internal node QM, and the output of the inverter is the final output OUT of the TRNG read module.

8. The true random number generator with high thermal stability according to claim 7, characterized in that: The transistor P0 , the transistor P1 , the transistor P2 , and the transistor P3 are all PMOS transistors.

9. The true random number generator with high thermal stability according to claim 7, characterized in that: The transistor N0 , the transistor N1 , the transistor N2 , the transistor N3 , and the transistor N4 are all NMOS transistors.

10. The control method of a true random number generator with high thermal stability according to any one of claims 1 to 9, characterized in that: The method comprises the following steps: S1. Ambient temperature collection The temperature sensing module I and the temperature sensing module II respectively collect ambient temperature data. The temperature sensing module I sends the collected temperature data to the voltage linear conversion module I, and the temperature sensing module II sends the collected temperature data to the voltage linear conversion module II; S2, voltage linear conversion The voltage linear conversion module I and the voltage linear conversion module II respectively convert the received temperature data into a write voltage; the voltage linear conversion module I sends the generated write voltage to the forward write driver module, and the voltage linear conversion module II sends the generated write voltage to the reverse write driver module; S3, forward write drive and precharge The forward random write signal is activated. The forward write driver module drives current through the magnetic tunnel junction (MTJ) in the TRNG read module based on the write voltage provided by the voltage linear conversion module 1, thereby rewriting the state of the magnetic tunnel junction (MTJ) to "1." During this process, the clock signal CLK remains at a low level to precharge the internal nodes of the TRNG read module, and the reverse write driver module stops working. S4, reverse write drive and precharge The reverse random write signal is activated. The reverse write driver module, based on the write voltage provided by the voltage linear conversion module II, directs current to flow in the reverse direction through the magnetic tunnel junction (MTJ) in the TRNG read module, thereby setting the state of the MTJ to "0." During this process, the clock signal CLK remains at a low level to ensure that the pre-charge state of the internal nodes of the TRNG read module remains unchanged. The forward write driver module stops operating. S5. Data reading When the clock signal CLK goes high, the precharge transistor in the TRNG read module turns off and the discharge transistor turns on. The discharge rate of the internal nodes of the TRNG read module is determined by the resistance value of the magnetic tunnel junction MTJ and the reference resistor Rref, and then the level state of the internal nodes of the TRNG read module is determined. After inverting the level state of the node, a true random number is output.

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