Driving circuit, driving method, and display device

Abstract

The application discloses a driving circuit, a driving method and a display device, and relates to the technical field of display. The driving circuit comprises a power input end, a control module, a first control switch group, a second control switch group, a first capacitor, a second capacitor and a load capacitor. The control module is connected with the first control switch group and the second control switch group. The control module outputs a first control signal to control the control switch of the first control switch group to be turned on. The control module outputs a second control signal to control the control switch of the second control switch group to be turned on. The power input end is connected with the control switch of the first control switch group and the control switch of the second control switch group. One end of the load capacitor is connected with the first capacitor and the second capacitor, and the other end is grounded. The driving circuit of the application can reduce the input voltage through the first capacitor, the second capacitor and the load capacitor, and the voltage reduction effect is realized.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a driving circuit, driving method and display device. Background Technology

[0002] Current LCD driving systems employ a scanning line and data line co-operation mechanism. In traditional driving architectures, the scanning line needs to maintain a fixed input voltage of approximately 25V (this threshold voltage ensures that the TFT device is fully turned on, enabling effective charging of the pixel unit). Current solutions obtain the driving voltage through clock signal charge pump technology. This passive energy extraction method easily leads to a significant temperature rise in the scanning driving module, severely affecting the system's thermal stability.

[0003] When using an active drive architecture, the scan line voltage can be directly supplied by the power management chip. To optimize energy transfer efficiency, a high-voltage transmission strategy is required: according to Joule's law (P=UI), under constant power conditions, increasing the transmission voltage can effectively reduce line current, thereby reducing ohmic losses in the transmission path. After the high-voltage power is transmitted to the terminal, a high-efficiency step-down circuit needs to be configured to achieve voltage conversion (high-voltage step-down, current step-up) to meet the scan line load requirements.

[0004] Traditional solutions often use Buck-type switching power supply circuits, which require dedicated step-down chips and power inductors. This presents significant integration challenges within the limited internal space of the display panel. Therefore, there is an urgent need for a step-down circuit that can be integrated into an LCD display. Summary of the Invention

[0005] The purpose of this application is to provide a driving circuit, driving method, and display device that, by setting a first capacitor, a second capacitor, and a load capacitor, can step down the input voltage to achieve a voltage reduction effect.

[0006] This application discloses a driving circuit for use in a display panel. The driving circuit includes a power input terminal, a control module, a first control switch group, a second control switch group, a first capacitor, a second capacitor, and a load capacitor. The control module is connected to the first control switch group and outputs a first control signal to control the control switches of the first control switch group to conduct. The control module is also connected to the second control switch group and outputs a second control signal to control the control switches of the second control switch group to conduct. The power input terminal is connected to the control switches of the first and second control switch groups respectively. The first and second capacitors are disposed between the control switches of the first and second control switch groups. One end of the load capacitor is connected to the first and second capacitors, and the other end is grounded. When the control switches of the first control switch group are in the conducting state, the first capacitor and the load capacitor are connected in series, and the second capacitor and the load capacitor are connected in parallel. When the control switches of the second control switch group are in the conducting state, the first capacitor and the load capacitor are connected in parallel, and the second capacitor and the load capacitor are connected in series.

[0007] Optionally, the control module includes a timing controller, which outputs a first control signal or a second control signal to control the control switches of the first control switch group or the second control switch group to turn on.

[0008] Optionally, the control switches of the first control switch group include a first transistor, a third transistor, a sixth transistor, and an eighth transistor, and the control switches of the second control switch group include a second transistor, a fourth transistor, a fifth transistor, and a seventh transistor. The control terminals of the first transistor, the third transistor, the sixth transistor, and the eighth transistor are connected to the control module and receive a first control signal output by the control module. The control terminals of the second transistor, the fourth transistor, the fifth transistor, and the seventh transistor are connected to the control module and receive a second control signal output by the control module. The first transistor, the second transistor, the third transistor, and the fourth transistor are connected in series, and the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are connected in series. One end of the first capacitor is connected between the first transistor and the second transistor, and the other end is connected between the third transistor and the fourth transistor. One end of the second capacitor is connected between the fifth transistor and the sixth transistor, and the other end is connected between the seventh transistor and the eighth transistor.

[0009] Optionally, one end of the load capacitor is connected between the second and third transistors, and between the sixth and seventh transistors, while the other end of the load capacitor is grounded.

[0010] Optionally, the source terminals of the fourth transistor and the eighth transistor are grounded.

[0011] Optionally, the voltage at the power input terminal is greater than the voltage at the load capacitor.

[0012] This application also discloses a driving method applied to the driving circuit described in any of the above claims, the driving method comprising the steps of:

[0013] Input operating voltage;

[0014] Input control signals;

[0015] The control signal controls the conduction of the control switches of the first and second control switch groups to control the voltage value at the load capacitor.

[0016] Optionally, the driving method further includes the step of:

[0017] According to the control signal, the control switches of the first control switch group and the second control switch group are alternately turned on;

[0018] Specifically, during the first conduction cycle, the control switch of the first control switch group is turned on, and the control switch of the second control switch group is turned off; during the second conduction cycle, the control switch of the first control switch group is turned off, and the control switch of the second control switch group is turned on.

[0019] Optionally, the driving method further includes the step of:

[0020] Adjust the duty cycle of different control signals according to the required voltage value;

[0021] The duty cycle of the control signal is adjusted to control the conduction time of the control switches of the first and second control switch groups, thereby controlling the voltage at the load capacitor.

[0022] This application also discloses a display device, including a display panel and a driving circuit as described in any of the above claims, the driving circuit being used to drive the display panel.

[0023] The driving circuit of this application can step down the input voltage by setting a first capacitor, a second capacitor, and a load capacitor, thereby achieving a voltage reduction effect. Furthermore, by changing the connection relationship between the first capacitor, the second capacitor, and the load capacitor, the voltage at the load capacitor is made to be the combined voltage of the first capacitor and the second capacitor. The voltage at the load capacitor remains relatively stable, avoiding voltage fluctuations on the scan line connected to the load capacitor, which could lead to uneven pixel charging on the scan line and affect the display effect of the display panel. Attached Figure Description

[0024] The accompanying drawings, which form part of the specification, are used to provide a further understanding of the embodiments of this application and illustrate the implementation methods of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any creative effort. In the drawings:

[0025] Figure 1 This is a schematic diagram of the circuit structure of a driving circuit according to the first embodiment of this application;

[0026] Figure 2 This is a schematic diagram of the structure of the control module, the first control switch group, and the second control switch group in a driving circuit according to the first embodiment of this application;

[0027] Figure 3 This is an equivalent circuit diagram of the first capacitor, the second capacitor, and the load capacitor in a driving circuit according to the first embodiment of this application when the first control switch group is turned on.

[0028] Figure 4 This is an equivalent circuit diagram of the first capacitor, the second capacitor, and the load capacitor in a driving circuit according to the first embodiment of this application when the second control switch group is turned on.

[0029] Figure 5 This is a timing diagram of a driving circuit according to the first embodiment of this application;

[0030] Figure 6 This is a schematic diagram of the driving architecture of the display panel according to the first embodiment of this application;

[0031] Figure 7 This is a flowchart of the steps of a driving method according to the second embodiment of this application;

[0032] Figure 8 This is a schematic diagram of the structure of a display device according to the third embodiment of this application.

[0033] Among them, 100 is the driving circuit; 110 is the control module; 120 is the first control switch group; 130 is the second control switch group; 200 is the display panel; 300 is the display device; power input terminal Vin; first control signal K1; second control signal K2; first capacitor C1; second capacitor C2; load capacitor C3; first transistor Q1; second transistor Q2; third transistor Q3; fourth transistor Q4; fifth transistor Q5; sixth transistor Q6; seventh transistor Q7; and eighth transistor Q8. Detailed Implementation

[0034] It should be understood that the terminology, specific structural and functional details used herein are merely for describing particular embodiments and are representative. However, this application may be implemented in many alternative forms and should not be construed as being limited to the embodiments set forth herein.

[0035] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating relative importance or implying the number of technical features indicated. Therefore, unless otherwise stated, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "multiple" means two or more. The term "comprising" and any variations thereof mean non-exclusive inclusion, where one or more other features, integers, steps, operations, units, components, and / or combinations thereof may be present or added.

[0036] In addition, terms such as “center,” “horizontal,” “up,” “down,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer” that indicate orientation or positional relationship are based on the orientation or relative positional relationship shown in the accompanying drawings. They are only for the purpose of simplifying the description of this application and do not indicate that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0037] Furthermore, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium, or internal connections between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0038] The present application will now be described in detail with reference to the accompanying drawings and optional embodiments. It should be noted that, without conflict, the various embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0039] The inventors of this application have designed a driving circuit for use in a display panel. This driving circuit meets the requirements of voltage reduction without occupying too much in-plane space of the display panel. Moreover, compared with traditional buck circuits, it is easier to install in the display panel. The specific structure of the driving circuit of this application is as follows:

[0040] Figure 1 This is a schematic diagram of the circuit structure of a driving circuit according to the first embodiment of this application. Figure 2This is a schematic diagram of the structure of the control module, the first control switch group, and the second control switch group in a drive circuit according to the first embodiment of this application. Figure 6 This is a schematic diagram of the driving architecture of the display panel according to the first embodiment of this application, as shown below. Figure 1 and Figure 2 As shown, as a first embodiment of this application, a driving circuit 100 is disclosed, applied to a display panel, the driving architecture of which is as follows: Figure 6 As shown, the drive circuit 100 includes a power input terminal Vin, a control module 110, a first control switch group 120, a second control switch group 130, a first capacitor C1, a second capacitor C2, and a load capacitor C3. The control module 110 is connected to the first control switch group 120 and the second control switch group 130. The control module 110 outputs a first control signal K1 to control the control switch of the first control switch group 120 to turn on, and outputs a second control signal K2 to control the control switch of the second control switch group 130 to turn on. The power input terminal Vin is connected to the control switches of the first control switch group 120 and the second control switch group 130 respectively. The first capacitor C1 and the second capacitor C2 are disposed between the control switches of the first control switch group 120 and the second control switch group 130. One end of the load capacitor C3 is connected to the first capacitor C1 and the second capacitor C2, and the other end is grounded. When the control switch of the first control switch group 120 is in the on state, the first capacitor C1 and the load capacitor C3 are connected in series, and the second capacitor C2 and the load capacitor C3 are connected in parallel. When the control switch of the second control switch group 130 is in the on state, the first capacitor C1 and the load capacitor C3 are connected in parallel, and the second capacitor C2 and the load capacitor C3 are connected in series.

[0041] The driving circuit 100 of this application controls the control switches of the first control switch group 120 and the second control switch group 130, thereby changing the connection relationship between the first capacitor C1, the second capacitor C2, and the load capacitor C3. When the control switch of the first control switch group 120 is in the on state, the first capacitor C1 and the load capacitor C3 are connected in series, and the second capacitor C2 and the load capacitor C3 are connected in parallel. At this time, the load capacitor C3 is charged by the first capacitor C1 and discharged by the second capacitor C2, so that the voltage at the load capacitor C3 is the combined voltage of the first capacitor C1 and the second capacitor C2. When the control switch of the second control switch group 130 is in the on state, the first capacitor C1... C1 is connected in parallel with the load capacitor C3, and the second capacitor C2 is connected in series with the load capacitor C3. At this time, the load capacitor C3 is discharged by the first capacitor C1 and charged by the second capacitor C2, so that the voltage at the load capacitor C3 is the combined voltage of the first capacitor C1 and the second capacitor C2. That is, the control switches of the first control switch group 120 and the second control switch group 130 are alternately turned on, so that the connection relationship between the first capacitor C1, the second capacitor C2 and the load capacitor C3 changes, so that the voltage at the load capacitor C3 is the combined voltage of the first capacitor C1 and the second capacitor C2. The voltage at the load capacitor C3 remains relatively stable, avoiding voltage fluctuations in the gate line connected to the load capacitor C3, which would cause uneven pixel charging on the gate line and affect the display effect of the display panel. Furthermore, under the action of the first capacitor C1, the second capacitor C2 and the load capacitor C3, the voltage output from the power input terminal Vin is reduced after passing through the drive circuit 100, achieving the effect of voltage reduction.

[0042] In summary, the driving circuit 100 of this application, by setting a first capacitor C1, a second capacitor C2, and a load capacitor C3, can step down the voltage input at the power input terminal Vin to meet the voltage requirements of the scan lines in the display panel, thus achieving a voltage reduction effect. Furthermore, by changing the connection relationship between the first capacitor C1, the second capacitor C2, and the load capacitor C3, the voltage at the load capacitor C3 is made to be the combined voltage of the first capacitor C1 and the second capacitor C2. The voltage at the load capacitor C3 remains relatively stable, preventing voltage fluctuations in the scan lines connected to the load capacitor C3, which could lead to uneven pixel charging on the scan lines and affect the display effect of the display panel.

[0043] In this embodiment, the control module 110 includes a timing controller Tcon IC, which outputs a first control signal K1 or a second control signal K2. When the timing controller outputs the first control signal K1, the control switch of the first control switch group 120 is turned on; when the timing controller outputs the second control signal K2, the control switch of the second control switch group 130 is turned on. Of course, the control module 110 can also be output by other control chips or controllers, as long as the output first control signal K1 and second control signal K2 are adjustable switch control signals. For example, it can be output by a power IC. This will not be elaborated here, and designers can choose to design according to the actual situation.

[0044] The specific structures of the first control switch group 120 and the second control switch group 130 in this embodiment are shown below, see below. Figure 1 and Figure 2 As shown, the control switches of the first control switch group 120 include a first transistor Q1, a third transistor Q3, a sixth transistor Q6, and an eighth transistor Q8. The control switches of the second control switch group 130 include a second transistor Q2, a fourth transistor Q4, a fifth transistor Q5, and a seventh transistor Q7. The control terminals of the first transistor Q1, the third transistor Q3, the sixth transistor Q6, and the eighth transistor Q8 are connected to the control module 110 and receive a first control signal K1 output by the control module 110 to turn on. The control terminals of the second transistor Q2, the fourth transistor Q4, the fifth transistor Q5, and the seventh transistor Q7 are connected to the control module 110 and receive a first control signal K1 output by the control module 110 to turn on. The second control signal K2 output by block 110 is turned on. The first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are connected in series. The fifth transistor Q5, the sixth transistor Q6, the seventh transistor Q7, and the eighth transistor Q8 are connected in series. One end of the first capacitor C1 is connected between the first transistor Q1 and the second transistor Q2, and the other end is connected between the third transistor Q3 and the fourth transistor Q4. One end of the second capacitor C2 is connected between the fifth transistor Q5 and the sixth transistor Q6, and the other end is connected between the seventh transistor Q7 and the eighth transistor Q8. The source terminals of the fourth transistor Q4 and the eighth transistor Q8 are grounded.

[0045] like Figure 1 As shown, one end of the load capacitor C3 is connected between the second transistor Q2 and the third transistor Q3, and between the sixth transistor Q6 and the seventh transistor Q7, and the other end of the load capacitor C3 is grounded.

[0046] When the control module 110 outputs the first control signal K1, the control switches of the first control switch group 120 are turned on. That is, the control terminals of the first transistor Q1, the third transistor Q3, the sixth transistor Q6, and the eighth transistor Q8 receive the first control signal K1 and are turned on. The current at the power input terminal Vin passes through the first transistor Q1 and first charges the first capacitor C1, making the voltage at the input and output terminals of the first capacitor C1 the same. Then, after passing through the third transistor Q3, the current is delivered to the load capacitor C3 and the capacitor connected to the sixth transistor Q6, respectively. The second capacitor C2 is used to charge the load capacitor C3 and the second capacitor C2. The other end of the second capacitor C2 is grounded through the eighth transistor Q8, and the other end of the load capacitor C3 is also grounded. Therefore, the second capacitor C2 and the load capacitor C3 will discharge together through ground, lowering their voltages. At this time, the voltage at the load capacitor C3 is the combined voltage of the first capacitor C1 and the second capacitor C2 (a high charging voltage combined with a low discharging voltage). The equivalent circuit of the first capacitor C1 and the load capacitor C3 is as follows: Figure 3 As shown, the equivalent circuit of the second capacitor C2 and the load capacitor C3 is as follows: Figure 3 As shown;

[0047] When the control module 110 outputs the second control signal K2, the control switches of the second control switch group 130 are turned on. That is, the control terminals of the second transistor Q2, the fourth transistor Q4, the fifth transistor Q5, and the seventh transistor Q7 receive the second control signal K2 and are turned on. The current at the power input terminal Vin, after passing through the fifth transistor Q5, first charges the second capacitor C2, making the voltage at the input and output terminals of the second capacitor C2 the same. Then, after passing through the seventh transistor Q7, it is sent to the load capacitor C3 and the first capacitor C1 connected to the second transistor Q2, respectively, to charge the load capacitor C3 and the first capacitor C1. The other end of the first capacitor C1 is grounded through the fourth transistor Q4, and the other end of the load capacitor C3 is also grounded. Thus, the first capacitor C1 and the load capacitor C3 discharge simultaneously through ground. At this time, the voltage at the load capacitor C3 is the combined voltage of the first capacitor C1 and the second capacitor C2 (a high voltage for charging and a low voltage for discharging). The equivalent circuit of the first capacitor C1 and the load capacitor C3 is as follows. Figure 4 As shown, the equivalent circuit of the second capacitor C2 and the load capacitor C3 is as follows: Figure 4 As shown;

[0048] By controlling the on and off states of the control switches in the first control switch group 120 and the second control switch group 130, the first capacitor C1 and the second capacitor C2 alternately charge or discharge the load capacitor C3, ensuring that the voltage at the load capacitor C3 is always the combined voltage of the first capacitor C1 and the second capacitor C2. See the timing diagram of the specific drive circuit 100. Figure 5The voltage at the load capacitor C3 remains relatively stable, which keeps the voltage supplied to the scan line relatively stable. This prevents voltage fluctuations on the scan line from causing uneven pixel charging and affecting the display effect of the display panel.

[0049] During the driving process of the drive circuit 100, when the control module 110 outputs the first control signal K1, the control switch of the first control switch group 120 is turned on. At this time, the first capacitor C1 and the load capacitor C3 are connected in series, and the voltage at the first capacitor C1 and the voltage at the load capacitor C3 are equal to the voltage at the power input terminal Vin. The second capacitor C2 and the load capacitor C3 are connected in parallel, and the voltage at the second capacitor C2 is equal to the voltage at the load capacitor C3. Therefore, Vc1 + Vc3 = Vin, Vc3 = Vc2. When the control module 110 outputs the second control signal K2, the control switch of the second control switch group 130 is turned on. At this time, the first capacitor C1 and the load capacitor C3 are connected in parallel, and the voltage at the first capacitor C1 is equal to the voltage at the load capacitor C3. The second capacitor C2 and the load capacitor C3 are connected in series, and the voltage at the second capacitor C2 and the voltage at the load capacitor C3 are equal to the voltage at the power input terminal Vin. Therefore, Vc2 + Vc3 = Vin, and Vc3 = Vc1; therefore, it can be seen that the voltage at the power output terminal Vin, after passing through the drive circuit 100 described in this embodiment, that is, after passing through the first capacitor C1 or the second capacitor C2, finally reaches the load capacitor C3. When the voltage at the load capacitor C3 is less than the voltage at the power output terminal Vin, that is, the voltage at the power output terminal Vin, after passing through the first capacitor C1 and the second capacitor C2, will be proportionally reduced before being delivered to the load capacitor C3, so that the drive circuit 100 achieves the purpose of reducing voltage; in this embodiment, the first control signal K1 and the second control signal K2 can also be adjusted. By changing the duty cycle of the first control signal K1 and the second control signal K2, the conduction time of the control switch of the first control switch group 120 is inconsistent with the conduction time of the control switch of the second control switch group 130, thereby changing the magnitude of the voltage at the load capacitor C3, so that the voltage at the load capacitor C3 can be changed according to the designer's needs.

[0050] Figure 7 This is a flowchart of the steps of a driving method according to the second embodiment of this application, as follows: Figure 7 As shown, as a second embodiment of this application, a driving method is disclosed. The driving method is applied to the driving circuit 100 described in the above embodiment, and the driving method includes the following steps:

[0051] Input operating voltage;

[0052] Specifically, the operating voltage is output from the power input terminal Vin of the drive circuit 100 to the drive circuit 100, and the operating voltage can be provided by the power supply in the display panel;

[0053] Input control signals;

[0054] Specifically, the control module 110 in the drive circuit 100 outputs a control signal, which can be provided by a power IC or a timing control IC.

[0055] The control signal controls the conduction of the control switches of the first control switch group 120 and the second control switch group 130 to control the voltage value at the load capacitor C3.

[0056] The control signals include a first control signal K1 and a second control signal K2. The first control signal K1 controls the conduction of the control switch of the first control switch group 120, and the second control signal K2 controls the conduction of the control switch of the second control switch group 130.

[0057] In this embodiment, the control switches of the first control switch group 120 and the second control switch group 130 are controlled by control signals. Different control signals are input to turn on the control switches of the first control switch group 120 and the second control switch group 130, so that the connection relationship between the first capacitor C1, the second capacitor C2 and the load capacitor C3 changes, so that the voltage at the load capacitor C3 remains stable, so as to continuously and stably supply voltage to the scan line.

[0058] Furthermore, the driving method also includes the step of:

[0059] According to the control signal, the control switches of the first control switch group and the second control switch group are alternately turned on;

[0060] In the first conduction cycle, the control switch of the first control switch group 120 is turned on, and the control switch of the second control switch group 130 is turned off; in the second conduction cycle, the control switch of the first control switch group 120 is turned off, and the control switch of the second control switch group 130 is turned on; in the first conduction cycle, the first capacitor C1 and the load capacitor C3 are connected in series, and the second capacitor C2 and the load capacitor C3 are connected in parallel; in the second conduction cycle, the first capacitor C1 and the load capacitor C3 are connected in parallel, and the second capacitor C2 and the load capacitor C3 are connected in series; the connection relationship between the first capacitor C1 and the second capacitor C2 and the load capacitor C3 alternates, so that the first capacitor C1 and the second capacitor C2 alternately charge the load capacitor C3.

[0061] Furthermore, the driving method also includes the step of:

[0062] Adjust the duty cycle of different control signals according to the required voltage value;

[0063] Specifically, by adjusting the duty cycle of the control signal, the conduction time of the control switches of the first control switch group 120 and the second control switch group 130 is controlled, thereby controlling the voltage at the load capacitor C3. Specifically, by controlling the duty cycle of the first control signal K1 and the duty cycle of the second control signal K2, the conduction time of the control switches of the first control switch group 120 and the second control switch group 130 can be made unequal. This results in different charging times for the first capacitor C1 and the second capacitor C2, thereby changing the voltage at the load capacitor C3 and allowing the voltage value to vary according to the designer's requirements, satisfying different voltage value needs.

[0064] like Figure 8 As shown, as a third embodiment of this application, a display device 300 is disclosed. The display device 300 includes a display panel 200 and a driving circuit 100 as described in the above embodiment. The driving circuit 100 is used to drive the display panel 200.

[0065] In this embodiment, the display device, by setting a driving circuit 100, can step down the input voltage by setting a first capacitor, a second capacitor, and a load capacitor, thereby achieving a voltage reduction effect. Furthermore, by changing the connection relationship between the first capacitor, the second capacitor, and the load capacitor, the voltage at the load capacitor is made to be the combined voltage of the first capacitor and the second capacitor, and the voltage at the load capacitor remains relatively stable. This avoids voltage fluctuations on the scan lines connected to the load capacitor, which could lead to uneven pixel charging on the scan lines and affect the display effect of the display panel.

[0066] It should be noted that the limitations on each step involved in this solution are not considered as limiting the order of steps, provided that they do not affect the implementation of the specific solution. The steps listed first can be executed first, later, or even simultaneously. As long as this solution can be implemented, it should be considered to fall within the scope of protection of this application.

[0067] It should be noted that the inventive concept of this application can form many embodiments, but due to the limited space of the application documents, they cannot all be listed. Therefore, without conflict, the embodiments described above or the technical features can be arbitrarily combined to form new embodiments. After the embodiments or technical features are combined, the original technical effect will be enhanced.

[0068] The above description, in conjunction with specific optional embodiments, provides a further detailed explanation of this application and should not be construed as limiting the specific implementation of this application to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of this application, and all such modifications or substitutions should be considered within the scope of protection of this application.

Claims

1. A driving circuit applied to a display panel, characterized in that, The driving circuit includes: Power input terminal; Control module; A first control switch group, wherein the control module is connected to the first control switch group, and the control module outputs a first control signal to control the control switches of the first control switch group to be turned on; The second control switch group is connected to the control module. The control module outputs a second control signal to control the control switches of the second control switch group to be turned on. The power input terminal is connected to the control switches of the first control switch group and the control switches of the second control switch group respectively. A first capacitor and a second capacitor are disposed between the control switches of the first control switch group and the control switches of the second control switch group; and A load capacitor, one end of which is connected to the first capacitor and the second capacitor, and the other end is grounded; Wherein, when the control switch of the first control switch group is in the on state, the first capacitor and the load capacitor are connected in series, and the second capacitor and the load capacitor are connected in parallel; when the control switch of the second control switch group is in the on state, the first capacitor and the load capacitor are connected in parallel, and the second capacitor and the load capacitor are connected in series. The voltage at the load capacitor is the combined voltage of the first capacitor and the second capacitor.

2. The driving circuit according to claim 1, characterized in that, The control module includes a timing controller, which outputs a first control signal or a second control signal to control the control switches of the first control switch group or the second control switch group to turn on.

3. The driving circuit according to claim 1, characterized in that, The control switches of the first control switch group include a first transistor, a third transistor, a sixth transistor, and an eighth transistor. The control switches of the second control switch group include a second transistor, a fourth transistor, a fifth transistor, and a seventh transistor. The control terminals of the first transistor, the third transistor, the sixth transistor, and the eighth transistor are connected to the control module and receive a first control signal output by the control module. The control terminals of the second transistor, the fourth transistor, the fifth transistor, and the seventh transistor are connected to the control module and receive a second control signal output by the control module. The first transistor, the second transistor, the third transistor, and the fourth transistor are connected in series, and the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are connected in series. The first capacitor has one end connected between the first transistor and the second transistor, and the other end connected between the third transistor and the fourth transistor. The second capacitor has one end connected between the fifth transistor and the sixth transistor, and the other end connected between the seventh transistor and the eighth transistor.

4. The driving circuit according to claim 3, characterized in that, One end of the load capacitor is connected between the second and third transistors, and between the sixth and seventh transistors, while the other end of the load capacitor is grounded.

5. The driving circuit according to claim 3, characterized in that, The source terminals of the fourth transistor and the eighth transistor are grounded.

6. The driving circuit according to claim 1, characterized in that, The voltage at the power input terminal is greater than the voltage at the load capacitor.

7. A driving method, applied to the driving circuit as described in any one of claims 1 to 6, characterized in that, The driving method includes the following steps: Input operating voltage; Input control signals; The control signal controls the conduction of the control switches of the first and second control switch groups to control the voltage value at the load capacitor.

8. The driving method according to claim 7, characterized in that, It also includes the following steps: According to the control signal, the control switches of the first control switch group and the second control switch group are alternately turned on; Specifically, during the first conduction cycle, the control switch of the first control switch group is turned on, and the control switch of the second control switch group is turned off; during the second conduction cycle, the control switch of the first control switch group is turned off, and the control switch of the second control switch group is turned on.

9. The driving method according to claim 7, characterized in that, It also includes the following steps: Adjust the duty cycle of different control signals according to the required voltage value; The duty cycle of the control signal is adjusted to control the conduction time of the control switches of the first and second control switch groups, thereby controlling the voltage at the load capacitor.

10. A display device, characterized in that, It includes a display panel and a driving circuit as described in any one of claims 1 to 6, the driving circuit being used to drive the display panel.

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