Edge polishing method for inhibiting self-doping effect of super back sealing product

By combining plasma cleaning and chemical mechanical polishing with a multi-stage cleaning and coating process, the problem of self-doping effect at the edge of silicon wafers is solved, achieving higher product quality and yield.

CN120656928APending Publication Date: 2025-09-16SHANGHAI SEMICON WAFER TECH CO LTD
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Patent Information

Application Number
CN202510782988.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-12
Publication Date
2025-09-16

AI Technical Summary

Technical Problem

In the prior art, the edges of silicon wafers after chemical vapor deposition (CVD) suffer from rough deposited films and severe autodoping effects, and polishing cannot effectively remove defects, thus affecting product yield.

Method used

Plasma cleaning pretreatment, chemical mechanical polishing and doping inhibitors are combined with multi-stage cleaning and coating processes, and a protective film is formed by APCVD and LPCVD. The polishing parameters are dynamically adjusted to ensure uniformity and remove impurities.

Benefits of technology

Effectively suppress the autodoping effect, improve the edge quality of silicon wafers, ensure that subsequent processes are not contaminated, and enhance product performance and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses an edge polishing method for inhibiting the self-doping effect of a super back sealing product, and particularly relates to the technical field of semiconductor manufacturing, and the method specifically comprises the following steps: S1, pretreatment, S2, edge polishing, S3, post-treatment, S4, film coating after polishing, and S5, doping detection. According to the edge polishing method for inhibiting the self-doping effect of the super back sealing product, the edge of the silicon wafer is polished by using proper edge polishing equipment and polishing liquid, the polishing time and the removal amount are controlled, and the defects such as edge impurities and damaged layers can be effectively removed. And the subsequent cleaning and drying step further removes the residual polishing solution and impurities on the surface. And after edge polishing treatment, a required thin film layer and a required polycrystalline film layer are prepared to obtain a flatter and smoother chamfer surface, so that the self-doping effect is effectively inhibited, and the performance and the reliability of the device are improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor material manufacturing, in particular to an edge polishing method for suppressing the self-doping effect of super back-sealed products. Background Art

[0002] In the semiconductor manufacturing industry, the surface quality and edge integrity of silicon wafers are crucial to the performance of the final product. However, in the prior art, problems often arise during the edge polishing of silicon wafers after the chemical vapor deposition process, especially in the edge areas of the silicon wafers. These problems are mainly manifested as follows: 1. The chamfered surface is rough before film deposition, resulting in a rough surface after film deposition; 2. The silicon dioxide film is first deposited on the chamfered surface, and then the polycrystalline film is deposited, and then the edge polishing is performed, which will cause the polycrystalline to be removed, and the residual silicon dioxide film is easily damaged, which cannot protect the silicon wafer from suppressing the self-doping effect; edge polishing after CVD can easily lead to rough edges and mechanical damage to the silicon wafer, thereby leading to the formation of epitaxial slip lines.

[0003] In addition, in the super back-sealing process, the silicon wafer undergoes two CVD processes and then edge polishing, which will leave defects on the surface. Subsequent polishing cannot remove them, reducing the yield of the final product. Summary of the Invention

[0004] The main purpose of the present invention is to provide an edge polishing method for suppressing the self-doping effect of super back-sealed products, which can effectively solve the problems mentioned in the background technology.

[0005] To achieve the above object, the technical solution adopted by the present invention is:

[0006] A method for edge polishing to suppress the self-doping effect of super back-sealed products comprises the following steps:

[0007] S1, pretreatment: plasma cleaning of the edge area of ​​the silicon wafer;

[0008] S2, edge polishing: using chemical mechanical polishing process, polishing liquid containing doping inhibitor is used to perform directionally polishing on the edge area;

[0009] S3, post-processing: multi-stage cleaning and drying of the polished edge area;

[0010] S4, lamination after polishing: The polished silicon wafers are laminated according to the following two processes:

[0011] Processing the silicon wafer by an APCVD process to form a silicon dioxide film covering the edge of the silicon wafer;

[0012] Processing the polished silicon wafer by an LPCVD process to form a polysilicon film covering the silicon dioxide film;

[0013] S5, doping detection: detect the doping concentration in the edge area by secondary ion mass spectrometry.

[0014] Preferably, the S2 edge polishing specifically includes the following sub-steps:

[0015] S2a, polishing liquid coating: the polishing liquid is coated on the edge area by centrifugal rotation of the porous polishing disk at a coating rate of 0.5-1.5 mL / min;

[0016] S2b, dynamic pressure adjustment: based on real-time polishing thickness feedback, the polishing pressure is dynamically adjusted to 0.5-2.0 psi and the polishing disk speed is 30-80 rpm;

[0017] S2c, polishing path control: the polishing head moves along a spiral track in the edge area, the track spacing is 0.1-0.3 mm, and the polishing time is 20-60 s;

[0018] S2d, thickness monitoring: real-time monitoring of polishing thickness using laser interferometer.

[0019] Preferably, the S3 post-processing specifically includes the following steps:

[0020] S3a, initial ultrapure water rinse: rinse at a flow rate of 1.0-3.0 L / min for 30-60 s, with the water temperature controlled at 25°C;

[0021] S3b, nitrogen purge: use a pulsed nitrogen spray gun with a pressure of 0.1-0.5 MPa and a purge angle of 45°-60° to the edge for 10-20 seconds;

[0022] S3c, secondary ultrapure water rinse: repeat S3a and add ultrasonic assisted cleaning, frequency 40kHz, power 50-100W;

[0023] S3d, nitrogen drying: drying the edge area in a clean nitrogen environment, humidity s10%, time 30 to 120 s;

[0024] S3e, residual detection: the number of surface particles is detected by a laser particle counter;

[0025] S3f, polishing liquid cleaning: Use ultrapure water, SC1 and HF solution to clean the silicon wafer after edge polishing to remove the polishing liquid and impurities remaining on the surface, and then dry it through drying equipment.

[0026] Preferably, the doping inhibitor of the polishing liquid in S2a is a complex of a fluorine-containing surfactant and a chelating agent, wherein the concentration of the fluorine-containing surfactant is 0.01-0.1 wt%, the chelating agent is ethylenediaminetetraacetic acid, the concentration is 0.05-0.5 wt%, and the pH value of the polishing liquid is 9.0-12.

[0027] Preferably, the dynamic pressure regulation in S2b is integrated with a closed-loop control system through a pressure sensor, with a response time of ≤0.1s and a polishing thickness uniformity deviation of ≤5%.

[0028] Preferably, the movement speed of the polishing head in the spiral track in S2c is 2-5 mm / s, and the distance between the polishing disc and the edge of the super back seal product is constantly controlled to be 0.05-0.15 mm.

[0029] Preferably, the transducer array for ultrasonic-assisted cleaning in S3c is distributed in a ring shape along the edge area with a spacing of 10 to 20 mm, and the uniformity of the sound intensity distribution is ≥90%.

[0030] Preferably, the oxygen content of the clean nitrogen environment in S3d is ≤10ppm, and the surface temperature of the super back-sealed product is maintained at 25°C during the drying process. The detection resolution of the laser particle counter in S3e is 0.1um, and the detection area covers the full range of the edge polishing width of 0.5 to 2.0mm.

[0031] Preferably, the plasma cleaning in S1 uses a mixture of argon and hydrogen with a volume ratio of 5:1, a radio frequency power of 200 to 500 W, a processing time of 30 to 120 s, and a chamber vacuum of ≤1×10 -3 Pa.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] 1. The present invention lays the foundation for polishing through pretreatment: plasma cleaning removes surface oxides and organic pollutants through the dual effects of physical bombardment and chemical reduction, thereby improving surface energy. By combining coating with dynamic adjustment, the polishing pressure and rotation speed are dynamically adjusted to avoid over- or under-polishing due to uneven material hardness, thereby ensuring polishing quality. It can also cooperate with the spiral trajectory to eliminate polishing blind spots and improve uniformity. Through multi-stage cleaning, polishing liquid residues and nano-scale particles are removed layer by layer to achieve surface particle stripping while blowing out dead corners in the grooves. It can also prevent metal oxidation and ensure that subsequent processes are not affected by contamination.

[0034] 2. This invention effectively removes defects such as edge impurities and damaged layers by polishing the edges of silicon wafers using appropriate edge polishing equipment and polishing fluid, controlling the polishing time and removal volume. Subsequent cleaning and drying steps further remove residual polishing fluid and impurities from the surface. After edge polishing, the desired LTO thin film layer and polycrystalline film layer are then prepared, resulting in a flatter and smoother chamfered surface, effectively suppressing the autodoping effect and improving device performance and reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a schematic diagram of the overall process of the present invention. DETAILED DESCRIPTION

[0036] In order to make the technical means, creative features, objectives and effects achieved by the present invention easier to understand, the present invention is further described below in conjunction with specific implementation methods.

[0037] Example 1, as Figure 1 As shown, this embodiment provides an edge polishing method for suppressing the auto-doping effect of super back-sealed products. The polishing object in this embodiment is a silicon wafer, including the following steps:

[0038] S1, pretreatment: plasma cleaning the edge area of ​​the silicon wafer to remove surface oxides and organic pollutants;

[0039] The plasma cleaning method uses a mixture of argon and hydrogen in a volume ratio of 5:1. The surface adsorbents are removed by physical bombardment, and the hydrogen decomposes the organic pollutants through a reduction reaction. The RF power is 400W, the processing time is 120s, and the chamber vacuum is ≤1×10 -3 Pa;

[0040] After cleaning, the surface energy is improved, which enhances the contact performance between the subsequent polishing liquid and the edge;

[0041] S2, edge polishing: using chemical mechanical polishing process, polishing liquid containing doping inhibitor is used to perform directionally polishing on the edge area;

[0042] The S2 edge polishing specifically includes the following sub-steps:

[0043] S2a, polishing liquid coating: the polishing liquid is evenly coated on the edge area by centrifugal rotation of the porous polishing disk at a coating rate of 1.0 mL / min;

[0044] The doping inhibitor of the polishing liquid in S2a is a complex of a fluorinated surfactant and a chelating agent, wherein the fluorinated surfactant concentration is 0.1 wt %, the chelating agent is ethylenediaminetetraacetic acid (EDTA) at a concentration of 0.5 wt %, and the pH value of the polishing liquid is 9.0;

[0045] Utilize composite polishing liquid, compound complexing metal ions, fluorine surfactant to reduce surface tension, reduce impurity residue, and inhibit the adsorption of impurity ions (such as metal ions);

[0046] Specific centrifugal coating flow control model:

[0047] Q=k·ω·r 2 ·η -1

[0048] Where Q represents the coating rate (mL / min);

[0049] ω represents the angular velocity of the disk (rad / s);

[0050] r represents the radius of the disk (m);

[0051] η represents the viscosity of the polishing liquid (Pa·s).

[0052] S2b, dynamic pressure regulation: Based on the real-time polishing thickness feedback, the PID controller is fed back to dynamically adjust the polishing pressure to 1.8psi and the polishing disk speed to 60rpm. This prevents over- or under-polishing due to uneven material hardness. Through real-time feedback control, the polishing depth error is controlled within ±5nm.

[0053] The dynamic pressure regulation in S2b is integrated with the closed-loop control system through a pressure sensor, with a response time of ≤0.1s and a polishing thickness uniformity deviation of ≤5%;

[0054] PID control equation:

[0055]

[0056] Where u(t) represents the control output (pressure or speed);

[0057] e(t) represents the thickness error;

[0058] Kp, K, Ka represent the proportional, integral, and differential coefficients respectively.

[0059] S2c, polishing path control: the polishing head moves along a spiral track in the edge area, the track spacing is 0.2 mm, and the polishing time is 60 s;

[0060] The polishing head movement speed of the spiral trajectory in S2c is 4mm / s, and the distance between the polishing disc and the edge of the super back seal is constantly controlled at 0.1mm; the spiral path avoids repeated tracks, eliminates polishing blind spots, and the constant distance prevents the polishing disc from colliding with the edge of the wafer;

[0061] Spiral trajectory parametric equation (polar coordinates):

[0062] r(θ)=r0+kθ

[0063] where r θ represents the initial radius;

[0064] k represents the pitch coefficient;

[0065] θ represents an angle (rad).

[0066] S2d, thickness monitoring: uses laser to measure the polishing thickness in real time through the change of interference fringes, with an accuracy of ±5nm, ensuring the polishing depth is 0.8um to avoid excessive material removal.

[0067] Relationship between interference fringe spacing and thickness:

[0068]

[0069] Where Δh represents the thickness change;

[0070] λ represents the laser wavelength;

[0071] n represents the refractive index of the medium;

[0072] N represents the number of fringe shifts.

[0073] S3, post-processing: multi-stage cleaning and drying of the polished edge area;

[0074] The S3 post-processing specifically includes the following steps:

[0075] S3a, initial ultrapure water rinse: rinse at a flow rate of 2.0 L / min for 50 seconds, with the water temperature controlled at 25°C; the high-speed water flow flushes away polishing fluid residue and loose particles;

[0076] S3b, nitrogen purging: Use a pulsed nitrogen spray gun with a pressure of 0.3 MPa, with a purge angle of 45° to 60° to the edge, for 20 seconds; purge dead corners of the groove at an inclined angle, and pulse airflow to avoid splashing of droplets;

[0077] S3c, secondary ultrapure water rinse: Repeat S3a and add ultrasonic assisted cleaning at a frequency of 40kHz and a power of 80W; the cavitation effect is used, i.e., ultrasonic waves generate microbubbles that burst and remove nanoparticles on the surface;

[0078] Cavitation threshold formula:

[0079]

[0080] Where Po represents the hydrostatic pressure;

[0081] σ represents the surface tension of the liquid;

[0082] p represents the density of the liquid;

[0083] Rc represents the critical radius of the bubble.

[0084] The transducer array for ultrasonic-assisted cleaning in S3c is distributed in a ring along the edge area with a spacing of 18 mm, and the uniformity of sound intensity distribution is ≥90%;

[0085] S3d, nitrogen drying: drying the edge area in a clean nitrogen environment, humidity s10%, time 120s;

[0086] The oxygen content of the clean nitrogen environment in the S3d is ≤10ppm, and the surface temperature of the super back-sealed product is maintained at 25°C during the drying process; the low oxygen environment prevents oxidation of the metal edge, and the humidity is controlled to avoid water stains.

[0087] S3e, Residue detection: Use a laser particle counter to detect the number of particles on the surface and ensure that particles with a diameter of ≥0.1μm are ≤5 particles / cm 2 ;

[0088] The detection resolution of the laser particle counter in the S3e is 0.1 μm, and the detection area covers the entire range of the edge polishing width of 1.6 mm, ensuring that no particle contamination is introduced into subsequent processes;

[0089] S3f, polishing liquid cleaning: Use ultrapure water, SC1 and HF solution to clean the silicon wafer after edge polishing to remove the polishing liquid and impurities remaining on the surface, and then dry it through drying equipment.

[0090] S4, lamination after polishing: The polished silicon wafers are laminated according to the following two processes:

[0091] The silicon wafer is processed by an APCVD process to form a silicon dioxide film covering the edge of the silicon wafer. The specific operation is to place the cleaned and dried silicon wafer into an AMAX800 device, and perform chemical vapor deposition according to predetermined process parameters at a temperature of 500-700°C, a pressure of 150-200 kPa, and a reaction gas of silane and oxygen to prepare an LTO thin film layer with a thickness of 0.5-1.0 microns.

[0092] The polished silicon wafer is processed by the LPCVD process to form a polysilicon film covering the silicon dioxide film; the specific operation is to place the silicon wafer with the LTO film deposited on the back into the DJ-853V-8BL3LP furnace equipment, and perform chemical vapor deposition according to predetermined process parameters at a temperature of 580-620°C, a pressure of 10-40kPa, and reaction gases of silane and oxygen to deposit a polysilicon film with a thickness of 0.3-1.5 microns on the surface of the silicon wafer.

[0093] S5, doping detection: The doping concentration in the edge area is detected by secondary ion mass spectrometry (SIIMS) to ensure that it is lower than the preset threshold.

[0094] The above thresholds are a combination of device performance requirements, process capabilities, and experimental data. The preset threshold is 1×10 15 atoms / cm 3 , which not only ensures reliability but also has technical feasibility.

[0095] By polishing the silicon wafer edge using appropriate edge polishing equipment and polishing fluid, and controlling the polishing time and removal volume, defects such as edge impurities and damaged layers can be effectively removed. Subsequent cleaning and drying steps further remove residual polishing fluid and impurities from the surface. After edge polishing, the desired LTO thin film and polycrystalline film layers are then applied, resulting in a flatter and smoother chamfered surface, effectively suppressing autodoping and improving device performance and reliability.

[0096] In Example 2, based on Example 1, to verify the inhibitory effect of the fluorosurfactant and chelating agent concentrations in the polishing solution on the autodoping effect, the polishing solution formula was changed to 0.01 wt % fluorosurfactant and 0.05 wt % EDTA. The remaining steps were the same as in Example 1. The same multiple silicon wafers were polished according to the method described in Example 1. After polishing, the test results were tested. The specific test results are shown in the table below:

[0097] index Example 2 Example 1 <![CDATA[Doping concentration (atoms / cm 3 )]]> <![CDATA[2.5×10 15 ]]> <![CDATA[5×10 14 ]]> Surface metal residue (ppm) 12 3 Surface roughness Ra (μm) 0.018 0.012 Process time (seconds / piece) 190 185

[0098] By enhancing the chemical inhibition and surface modification capabilities, the self-doping concentration is controlled at 5×10 14 atoms / cm 3 , significantly lower than the threshold (1×10 15 atoms / cm 3 ), and the surface roughness and metal residue have reached the industry-leading level.

[0099] Comparative Example: This comparative example provides a traditional mechanical polishing method. The polishing effect of traditional mechanical polishing without dynamic adjustment and ultrasonic cleaning is as follows:

[0100] Pretreatment: only wipe with alcohol, no plasma cleaning;

[0101] Edge polishing: fixed pressure 2.0 psi, speed 80 rpm, no path planning, polishing time 60 seconds;

[0102] Post-processing: Only rinse with pure water, no nitrogen purging and ultrasonic cleaning.

[0103] The same number of silicon wafers were processed using the polishing method of Example 1 and the traditional polishing method. After the processing, they were tested respectively. The test results are shown in the following table:

[0104] index Comparative Example Example 1 Surface roughness Ra (μm) 0.08 0.015 <![CDATA[Doping concentration (atoms / cm 3 )]]> <![CDATA[5×10 16 ]]> <![CDATA[8×10 14 ]]> <![CDATA[Particle residue (particles / cm 2 )]]> 25 (particle size ≥ 0.1 μm) ≤3 Process stability Multiple pieces have edge cracking No damage

[0105] Due to the lack of dynamic pressure regulation and fine cleaning, the traditional method has high surface roughness and doping concentration, serious particle residue, and poor process stability, which verifies the necessity of the present invention in key steps (such as plasma cleaning and closed-loop control).

[0106] During the operation of this embodiment, pretreatment is used to lay the foundation for polishing: plasma cleaning removes surface oxides and organic pollutants through the dual effects of physical bombardment and chemical reduction, thereby improving surface energy. By combining coating with dynamic adjustment, the polishing pressure and rotation speed are dynamically adjusted to avoid over- or under-polishing due to uneven material hardness, thereby ensuring polishing quality. It can also cooperate with the spiral trajectory to eliminate polishing blind spots and improve uniformity. Through multi-stage cleaning, polishing liquid residues and nano-scale particles are removed layer by layer to achieve stripping of surface particles while blowing out dead corners in the grooves. It can also prevent metal oxidation and ensure that subsequent processes are not affected by contamination.

[0107] The basic principles, main features, and advantages of the present invention are shown and described above. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and modifications are intended to fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for polishing the edge of a super back-sealed product to suppress the self-doping effect, characterized in that: The following steps are involved: S1, pretreatment: plasma cleaning of the edge area of ​​the silicon wafer; S2, edge polishing: using chemical mechanical polishing process, polishing liquid containing doping inhibitor is used to perform directionally polishing on the edge area; S3, post-processing: multi-stage cleaning and drying of the polished edge area; S4, lamination after polishing: The polished silicon wafers are laminated according to the following two processes: Processing the silicon wafer by an APCVD process to form a silicon dioxide film covering the edge of the silicon wafer; Processing the polished silicon wafer by an LPCVD process to form a polysilicon film covering the silicon dioxide film; S5, doping detection: detect the doping concentration in the edge area by secondary ion mass spectrometry.

2. The edge polishing method for suppressing the self-doping effect of super back-sealed products according to claim 1, characterized in that: The S2 edge polishing specifically includes the following sub-steps: S2a, polishing liquid coating: the polishing liquid is coated on the edge area by centrifugal rotation of the porous polishing disk at a coating rate of 0.5-1.5 mL / min; S2b, dynamic pressure adjustment: based on real-time polishing thickness feedback, the polishing pressure is dynamically adjusted to 0.5-2.0 psi and the polishing disk speed is 30-80 rpm; S2c, polishing path control: the polishing head moves along a spiral track in the edge area, the track spacing is 0.1-0.3 mm, and the polishing time is 20-60 s; S2d, thickness monitoring: real-time monitoring of polishing thickness using laser interferometer.

3. The edge polishing method for suppressing the self-doping effect of super back-sealed products according to claim 1, characterized in that: The S3 post-processing specifically includes the following steps: S3a, initial ultrapure water rinse: rinse at a flow rate of 1.0-3.0 L / min for 30-60 s, with the water temperature controlled at 25°C; S3b, nitrogen purge: use a pulsed nitrogen spray gun with a pressure of 0.1-0.5 MPa and a purge angle of 45°-60° to the edge for 10-20 seconds; S3c, secondary ultrapure water rinse: repeat S3a and add ultrasonic assisted cleaning, frequency 40kHz, power 50-100W; S3d, nitrogen drying: drying the edge area in a clean nitrogen environment, humidity s10%, time 30 to 120 s; S3e, residual detection: the number of surface particles is detected by a laser particle counter; S3f, polishing liquid cleaning: Use ultrapure water, SC1 and HF solution to clean the silicon wafer after edge polishing to remove the polishing liquid and impurities remaining on the surface, and then dry it through drying equipment.

4. The edge polishing method for suppressing the self-doping effect of super back-sealed products according to claim 2, characterized in that: The doping inhibitor of the polishing liquid in S2a is a complex of a fluorine-containing surfactant and a chelating agent, wherein the concentration of the fluorine-containing surfactant is 0.01-0.1wt%, the chelating agent is ethylenediaminetetraacetic acid, the concentration is 0.05-0.5wt%, and the pH value of the polishing liquid is 9.0-12.

5. The edge polishing method for suppressing the self-doping effect of super back-sealed products according to claim 2, characterized in that: The dynamic pressure regulation in S2b is integrated with the closed-loop control system through a pressure sensor, with a response time of ≤0.1s and a polishing thickness uniformity deviation of ≤5%.

6. The edge polishing method for suppressing the self-doping effect of super back-sealed products according to claim 2, characterized in that: The movement speed of the polishing head in the spiral track in S2c is 2-5 mm / s, and the distance between the polishing disc and the edge of the super back seal product is constantly controlled at 0.05-0.15 mm.

7. The edge polishing method for suppressing the self-doping effect of super back-sealed products according to claim 3, characterized in that: The transducer array for ultrasonic-assisted cleaning in S3c is distributed in a ring shape along the edge area with a spacing of 10 to 20 mm, and the uniformity of sound intensity distribution is ≥90%.

8. The edge polishing method for suppressing the self-doping effect of super back-sealed products according to claim 3, characterized in that: The oxygen content of the clean nitrogen environment in S3d is ≤10ppm, and the surface temperature of the super back-sealed product is maintained at 25°C during the drying process. The detection resolution of the laser particle counter in S3e is 0.1um, and the detection area covers the full range of the edge polishing width of 0.5 to 2.0mm.

9. The edge polishing method for suppressing the self-doping effect of super back-sealed products according to claim 1, characterized in that: The plasma cleaning in S1 uses a mixed gas of argon and hydrogen with a volume ratio of 5:1, a radio frequency power of 200-500W, a processing time of 30-120s, and a chamber vacuum of ≤1×10 -3 Pa.