Resistance test unit and test method thereof

Abstract

The embodiment of the invention provides a resistance test unit and a test method thereof. The resistance test unit comprises a substrate; a plurality of resistance test structures located on the substrate; the conductive connecting layer stretches across the resistance testing structures and is connected with the resistance testing structures through the via holes in a one-to-one correspondence manner; each resistance test structure comprises a first semiconductor layer and a second semiconductor layer, the first to-be-tested semiconductor layers are positioned on the first semiconductor layers in a one-to-one correspondence manner and are in contact with the first semiconductor layers; the first voltage test terminal is coupled with the first end of the first semiconductor layer to be tested; the second terminal of the current loop is coupled with the second end of the first semiconductor layer to be tested; the current loop first terminal is coupled with the first end of the conductive connecting layer; the second voltage testing terminal is coupled with the second end of the conductive connecting layer; each resistance test structure multiplexes the current loop first terminal and the voltage test second terminal, and by adopting the resistance test unit provided by the invention, the wafer area utilization rate can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a resistance testing unit and a testing method thereof. Background Art

[0002] A test key (TSK) is a structure used to analyze whether device performance is normal and whether various device parameters meet standards. By testing the electrical parameters of specific test structures on the wafer, the quality and stability of the semiconductor manufacturing process are evaluated.

[0003] However, the existing semiconductor device layout design has the problem of reduced wafer area utilization. Therefore, how to optimize the layout design to improve the wafer area utilization has become a technical problem that those skilled in the art need to solve urgently. Summary of the Invention

[0004] The technical problem solved by the present invention is to optimize the layout design and improve the wafer area utilization rate by providing a resistance testing unit and a testing method thereof.

[0005] In order to solve the above problems, an embodiment of the present invention provides a resistance testing unit, comprising: a substrate; a plurality of resistance testing structures located on the substrate; a conductive connection layer, spanning the plurality of resistance testing structures and connected to each resistance testing structure through a via hole in a one-to-one correspondence; wherein a first end of the conductive connection layer is connected to a first constant current, and a second end is connected to a second constant current, and the first constant current is greater than the second constant current; a first end of each resistance testing structure is connected to a constant current, and a second end is connected to a constant voltage; wherein each resistance testing structure comprises: a respective first semiconductor layer located on the substrate; a respective first semiconductor layer to be tested, located in a one-to-one correspondence between the first semiconductor layer and the second semiconductor layer; On the body layer, and in contact with the corresponding first semiconductor layer; the voltage test first terminal is coupled to the first end of the first semiconductor layer to be tested; the current loop second terminal is coupled to the second end of the first semiconductor layer to be tested; the current loop first terminal is coupled to the first end of the conductive connection layer; the voltage test second terminal is coupled to the second end of the conductive connection layer; wherein the voltage test first terminal and the voltage test second terminal and the portion therebetween form a via contact resistance test structure, and the current loop second terminal and the voltage test first terminal and the portion therebetween form a block resistance test structure; each resistance test structure reuses the current loop first terminal and the voltage test second terminal.

[0006] Optionally, the resistance test structure satisfies one or more of the following: the second constant current is 0 A;

[0007] The constant current is 0A; the constant voltage is 0V.

[0008] Optionally, the first resistance test structure includes: a P-type well located in the substrate; the first semiconductor layer is of N-type doping type and has a first doping concentration, and is in contact with the P-type well; the first semiconductor layer to be tested is of N-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration; wherein the first terminal of the current loop is connected to the first constant current; the second terminal of the current loop is connected to a constant voltage of 0V; the first terminal of the voltage test of the first resistance test structure is connected to a constant current of 0A; the second terminal of the voltage test of the first resistance test structure is connected to a constant current of 0A.

[0009] Optionally, the second resistance testing unit includes: an N-type well located in the substrate; the first semiconductor layer is of P-type doping type and has a first doping concentration, and is in contact with the N-type well; the first semiconductor layer to be tested is of N-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration; wherein the first terminal of the current loop is connected to the first constant current; the second terminal of the current loop is connected to a constant voltage of 0V; the first terminal of the voltage test of the second resistance testing structure is connected to a constant current of 0A; the second terminal of the voltage test of the second resistance testing structure is connected to a constant current of 0A.

[0010] Optionally, the third resistance testing unit includes: a P-type well located in the substrate; the first semiconductor layer is of N-type doping type and has a first doping concentration, and is in contact with the P-type well; the first semiconductor layer to be tested is of P-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration; wherein the first terminal of the current loop is connected to the first constant current; the second terminal of the current loop is connected to a constant voltage of 0V; the first terminal of the voltage test of the third resistance testing structure is connected to a constant current of 0A; the second terminal of the voltage test of the third resistance testing structure is connected to a constant current of 0A.

[0011] Optionally, the fourth resistance testing unit includes: an N-type well located in the substrate; the first semiconductor layer is of P-type doping type and has a first doping concentration, and is in contact with the N-type well; the first semiconductor layer to be tested is of P-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration; wherein the first terminal of the current loop is connected to the first constant current; the second terminal of the current loop is connected to a constant voltage of 0V; the first terminal of the voltage test of the fourth resistance testing structure is connected to a constant current of 0A; the second terminal of the voltage test of the fourth resistance testing structure is connected to a constant current of 0A.

[0012] Optionally, the material of the conductive connection layer includes one or more of copper, aluminum, tungsten, titanium, and indium tin oxide.

[0013] Optionally, each resistance testing structure extends along a first direction and is arranged along a second direction, and the first direction is perpendicular to the second direction.

[0014] Accordingly, the present application also provides a test, which is applied to the resistance testing unit described in any of the aforementioned items, including: providing a resistance test structure to be measured; setting the first terminal of the current loop to the first constant current, the second terminal of the voltage test of the resistance test structure to be measured to the second constant current, the first terminal of the voltage test of the resistance test structure to be measured to a constant current, and the second terminal of the current loop to a constant voltage; testing the voltage between the first voltage test terminal and the second voltage test terminal to determine the via contact resistance of the resistance test structure to be measured; testing the resistance between the second terminal of the current loop and the first voltage test terminal as the block resistance of the resistance test structure to be measured.

[0015] Optionally, for other resistance test structures except the resistance test structure to be tested, the terminals coupled to the first end of the resistance test structure are all set to be suspended, and the terminals coupled to the second end of the resistance test structure are all set to be suspended.

[0016] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0017] An embodiment of the present invention provides a resistance testing unit, comprising: a substrate; multiple resistance testing structures located on the substrate; a conductive connection layer spanning the multiple resistance testing structures and connected to each resistance testing structure through a via hole; each resistance testing structure comprising: a respective first semiconductor layer; a respective first semiconductor layer to be tested, located on the first semiconductor layer in a one-to-one correspondence and in contact with the first semiconductor layer; a first voltage testing terminal coupled to a first end of the first semiconductor layer to be tested; a second current loop terminal coupled to a second end of the first semiconductor layer to be tested; the first current loop terminal coupled to a first end of the conductive connection layer; and a second voltage testing terminal coupled to a second end of the conductive connection layer; each resistance testing structure reuses the first current loop terminal and the second voltage testing terminal, thereby reducing the number of terminals, saving wafer area, and improving wafer area utilization; in addition, a resistance testing structure capable of testing multiple resistance types is formed, wherein the first end of the conductive connection layer is connected to a first constant current, and the second end is connected to a second constant current. Each resistance testing structure has a first end connected to a constant current and a second end connected to a constant voltage, thereby reducing the number of terminals while maintaining the accuracy of via contact resistance and sheet resistance testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings in the following description are merely embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without any creative work.

[0019] Figures 1 to 4 It is a schematic diagram of the structure of a semiconductor device test key;

[0020] Figures 5 and 6 is a structural diagram of a resistance testing unit according to an embodiment of the present application;

[0021] Figure 7 It is a flow chart of the test method of the embodiment of the present application. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0023] As can be seen from the background technology, the problem of reduced wafer area utilization exists in the layout design of existing semiconductor devices. The reasons for the reduced wafer area utilization are analyzed below.

[0024] refer to Figures 1 to 4 , which is a structural diagram of a semiconductor device test key.

[0025] The semiconductor device test key structure includes: a semiconductor layer block resistance test structure and a via contact resistance test structure.

[0026] like Figure 1 As shown, Figure 1 include Figure 1 (a) and Figure 1 (b); Figure 1 (a) is a schematic diagram of a semiconductor layer square resistance test structure, comprising: a semiconductor layer 100, a semiconductor layer to be tested 101 located on the semiconductor layer 100, a first terminal 102 connected to one end of the semiconductor layer to be tested 101, and a second terminal 103 connected to the other end of the semiconductor layer to be tested 101. The square resistance of the semiconductor layer to be tested 101 is tested through the first terminal 102 and the second terminal 103; Figure 1(b) is a schematic diagram of a via contact resistance test structure, comprising: a semiconductor layer 100, a semiconductor layer to be tested 101 located on the semiconductor layer 100, a metal layer MT connected to the semiconductor layer to be tested 101, a first terminal 105 connected to the semiconductor layer to be tested 101, and a second terminal 104 connected to the metal layer MT. The via contact resistance between the metal layer MT and the semiconductor layer to be tested 101 at the via 106 is tested through the first terminal 105 and the second terminal 104.

[0027] It should be noted that Figure 1 The test of the semiconductor layer square resistance and the via contact resistance requires a total of four terminals, namely the first terminal 102, the second terminal 103, the first terminal 105 and the second terminal 104; the semiconductor layer 100 is N-type heavily doped, and the semiconductor layer to be tested 101 is N-type doped.

[0028] like Figure 2 As shown, Figure 2 include Figure 2 (a) and Figure 2 (b); Figure 2 (a) is a schematic diagram of a semiconductor layer square resistance test structure, comprising: a semiconductor layer 200, a semiconductor layer 201 to be tested located on the semiconductor layer 200, a first terminal 202 connected to one end of the semiconductor layer 201 to be tested, and a second terminal 203 connected to the other end of the semiconductor layer 201 to be tested. The square resistance of the semiconductor layer 201 to be tested is tested through the first terminal 202 and the second terminal 203; Figure 2 (b) is a schematic diagram of a via contact resistance test structure, comprising: a semiconductor layer 200, a semiconductor layer to be tested 201 located on the semiconductor layer 200, a metal layer MT connected to the semiconductor layer 201 to be tested, a first terminal 205 connected to the semiconductor layer 201 to be tested, and a second terminal 204 connected to the metal layer MT. The via contact resistance between the metal layer MT and the semiconductor layer to be tested 201 at the via 206 is tested through the first terminal 205 and the second terminal 204.

[0029] It should be noted that the Figure 2 The test of the semiconductor layer sheet resistance and the via contact resistance requires a total of four terminals, namely the first terminal 202, the second terminal 203, the first terminal 205 and the second terminal 204; the semiconductor layer 200 is heavily doped with P type, and the semiconductor layer to be tested 201 is N type doped.

[0030] like Figure 3 As shown, Figure 3 include Figure 3 (a) and Figure 3 (b); Figure 3(a) is a schematic diagram of a semiconductor layer sheet resistance test structure, comprising: a semiconductor layer 300, a semiconductor layer to be tested 301 located on the semiconductor layer 300, a first terminal 302 connected to one end of the semiconductor layer to be tested 301, and a second terminal 303 connected to the other end of the semiconductor layer to be tested 301. The sheet resistance of the semiconductor layer to be tested 301 is tested through the first terminal 302 and the second terminal 303; Figure 3 (b) is a schematic diagram of a via contact resistance test structure, comprising: a semiconductor layer 300, a semiconductor layer to be tested 301 located on the semiconductor layer 300, a metal layer MT connected to the semiconductor layer to be tested 301, a first terminal 305 connected to the semiconductor layer to be tested 301, and a second terminal 304 connected to the metal layer MT. The via contact resistance between the metal layer MT and the semiconductor layer to be tested 301 at the via 306 is tested through the first terminal 305 and the second terminal 304.

[0031] It should be noted that the Figure 3 The test of the semiconductor layer sheet resistance and the via contact resistance requires a total of four terminals, namely the first terminal 302, the second terminal 303, the first terminal 305 and the second terminal 304; the semiconductor layer 300 is heavily N-type doped, and the semiconductor layer to be tested 301 is P-type doped.

[0032] like Figure 4 As shown, Figure 4 include Figure 4 (a) and Figure 4 (b); Figure (a) is a schematic diagram of a semiconductor layer block resistance test structure, comprising: a semiconductor layer 400, and a semiconductor layer to be tested 401 located on the semiconductor layer 400, a first terminal 402 connected to one end of the semiconductor layer 401 to be tested, and a second terminal 403 connected to the other end of the semiconductor layer 401 to be tested, and the block resistance of the semiconductor layer 401 to be tested is tested through the first terminal 402 and the second terminal 403; Figure (b) is a schematic diagram of a via contact resistance test structure, comprising: a semiconductor layer 400, and a semiconductor layer to be tested 401 located on the semiconductor layer 400, a metal layer MT connected to the semiconductor layer 401 to be tested, a first terminal 405 connected to the semiconductor layer 401 to be tested, and a second terminal 404 connected to the metal layer MT, and the via contact resistance between the metal layer MT and the semiconductor layer 401 to be tested at the via 406 is tested through the first terminal 405 and the second terminal 404.

[0033] It should be noted that the Figure 4 The test of the semiconductor layer sheet resistance and the via contact resistance requires a total of four terminals, namely the first terminal 402, the second terminal 403, the first terminal 405 and the second terminal 404; the semiconductor layer 400 is heavily doped with P type, and the semiconductor layer to be tested 401 is doped with P type.

[0034] Continue to refer Figures 1 to 4 Different types of semiconductor layer block resistance tests and via contact resistance tests require a total of 16 terminals. With the advanced development of process technology, the device feature size is continuously reduced, and more chips are manufactured on the same wafer. This requires the design of more test keys, which further increases the number of terminals and causes the problem of reduced wafer area utilization.

[0035] In order to solve the technical problem, an embodiment of the present invention provides a resistance testing unit, comprising: a substrate; a plurality of resistance testing structures located on the substrate; a conductive connection layer, spanning the plurality of resistance testing structures and connected to each resistance testing structure through a via hole in a one-to-one correspondence; wherein the first end of the conductive connection layer is connected to a first constant current, and the second end is connected to a second constant current, and the first constant current is greater than the second constant current; the first end of each resistance testing structure is connected to a constant current, and the second end is connected to a constant voltage; wherein each resistance testing structure comprises: a respective first semiconductor layer located on the substrate; a respective first semiconductor layer to be tested, located in a one-to-one correspondence with the first semiconductor layer; On the conductor layer, and in contact with the corresponding first semiconductor layer; the voltage test first terminal is coupled to the first end of the first semiconductor layer to be tested; the current loop second terminal is coupled to the second end of the first semiconductor layer to be tested; the current loop first terminal is coupled to the first end of the conductive connection layer; the voltage test second terminal is coupled to the second end of the conductive connection layer; wherein the voltage test first terminal and the voltage test second terminal and the portion therebetween form a via contact resistance test structure, and the current loop second terminal and the voltage test first terminal and the portion therebetween form a block resistance test structure; each resistance test structure reuses the current loop first terminal and the voltage test second terminal.

[0036] By adopting the above-mentioned resistance test unit, the first terminal of the current loop and the second terminal of the voltage test are reused by each resistance test structure, thereby reducing the number of terminals, saving wafer area, and improving wafer area utilization; in addition, a resistance test structure capable of testing multiple resistance types is formed, and the first end of the conductive connection layer is connected to a first constant current, and the second end is connected to a second constant current. The first end of each resistance test structure is connected to a constant current, and the second end is connected to a constant voltage. While reducing the number of terminals, the accuracy of the via contact resistance and block resistance tests is maintained.

[0037] To make the above-mentioned objects, features, and advantages of the present invention more clearly understood, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. It is apparent that the described embodiments are only a portion of the embodiments of the present invention, not all of them. The following embodiments and features thereof may be combined with each other unless there is a conflict.

[0038] refer to Figures 5 and 6 , is a schematic diagram of the structure of the resistance test unit of the embodiment of the present application, wherein Figure 6 yes Figure 5 Cross-sectional view along dotted line A1A2.

[0039] refer to Figure 5 , the resistance testing unit includes: a substrate 500.

[0040] The substrate 500 is used to provide a process platform for forming the resistance testing unit.

[0041] In this embodiment, the substrate 500 is a silicon substrate 500, and the material of the substrate 500 is single crystal silicon. In other embodiments, the material of the substrate 500 can also be one or more of germanium, silicon germanium, silicon carbide, gallium nitride, gallium arsenide, and indium gallium. The substrate 500 can also be a silicon-on-insulator substrate 500 or a germanium-on-insulator substrate 500, or other types of substrates 500.

[0042] The resistance testing unit includes: a plurality of resistance testing structures located on the substrate 500 .

[0043] The various resistance test structures are used to test the via contact resistance and the sheet resistance of the semiconductor layer.

[0044] Each resistance test structure includes: a respective first semiconductor layer, located on the substrate 500; a respective first semiconductor layer to be tested, located one-to-one on the first semiconductor layer and in contact with the corresponding first semiconductor layer; a first voltage test terminal, coupled to the first end of the first semiconductor layer to be tested; a second current loop terminal, coupled to the second end of the first semiconductor layer to be tested; the first current loop terminal, coupled to the first end of the conductive connection layer; and the second voltage test terminal, coupled to the second end of the conductive connection layer; wherein the first voltage test terminal and the second voltage test terminal and the portion therebetween form a via contact resistance test structure, and the second current loop terminal and the first voltage test terminal and the portion therebetween form a block resistance test structure; each resistance test structure reuses the first current loop terminal and the second voltage test terminal.

[0045] To facilitate understanding of the present application, there are four of the multiple resistance test structures, namely the first resistance test structure, the second resistance test structure, the third resistance test structure and the fourth resistance test structure, but this does not limit the present application.

[0046] Each resistance test structure extends along a first direction X and is arranged along a second direction Y, wherein the first direction X is perpendicular to the second direction Y. In this embodiment, the first resistance test structure, the second resistance test structure, the third resistance test structure, and the fourth resistance test structure all extend along the first direction X and are arranged along the second direction Y, wherein the first direction X is perpendicular to the second direction Y, and both the first direction X and the second direction Y are parallel to the surface of the substrate 500.

[0047] Continue to refer Figure 5 and Figure 6 , the first resistance test structure includes:

[0048] A first semiconductor layer, located on the substrate 500;

[0049] a first semiconductor layer to be tested, located on the first semiconductor layer and in contact with the first semiconductor layer;

[0050] The P-type well located in the substrate 500 is used to block the test signal from flowing to the substrate 500 or other film layers when testing the block resistance or via contact resistance of the first semiconductor layer to be tested, that is, to isolate the first semiconductor layer to be tested from other film layers, thereby improving the accuracy of testing the block resistance of the first semiconductor layer to be tested.

[0051] The first semiconductor layer is of N-type doping type and has a first doping concentration, and is in contact with the P-type well;

[0052] The first semiconductor layer to be tested is of N-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration;

[0053] a first voltage testing terminal coupled to the first end of the first semiconductor layer to be tested;

[0054] a second terminal of the current loop, coupled to the second end of the first semiconductor layer to be tested;

[0055] a first current loop terminal 506 coupled to the first end of the conductive connection layer 900;

[0056] a voltage test second terminal 507 coupled to the second end of the conductive connection layer 900;

[0057] The first voltage test terminal, the second voltage test terminal 507 and the portion therebetween form a via contact resistance test structure, and the second current loop terminal, the first voltage test terminal and the portion therebetween form a block resistance test structure.

[0058] For the sake of simplicity and convenience, the names of the layers and terminals in this embodiment are described as follows:

[0059] The first semiconductor layer of the first resistance test structure is called the NN first semiconductor layer 501;

[0060] The first semiconductor layer to be tested in the first resistance test structure is called the NN first semiconductor layer to be tested 502;

[0061] The P-type well of the first resistance test structure is called an NNP-type well 503;

[0062] The voltage test first terminal of the first resistance test structure is called the NN voltage test first terminal 504;

[0063] The second terminal of the current loop of the first resistance test structure is called the NN current loop second terminal 505;

[0064] In this embodiment, the NN voltage test first terminal 504 and the voltage test second terminal 507 and the portion therebetween form an NN via 508 contact resistance test structure to test the via contact resistance at the NN via 508; the NN current loop second terminal 505 and the NN voltage test first terminal 504 and the portion therebetween form an NN block resistance test structure to test the block resistance of the NN first semiconductor layer 502 to be tested.

[0065] In this embodiment, the NN voltage test first terminal 504 is electrically connected to the first end of the NN first semiconductor layer to be tested 502 through the metal lead JSX and the contact hole JCK; the NN current loop second terminal 505 is coupled to the second end of the NN first semiconductor layer to be tested 502 through the metal lead JSX and the contact hole JCK; the current loop first terminal 506 is coupled to the first end of the conductive connection layer 900; the voltage test second terminal 507 is coupled to the second end of the conductive connection layer 900.

[0066] The material of the NN voltage test first terminal 504 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the NN current loop second terminal 505 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the NN voltage test first terminal 504 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the current loop first terminal 506 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the voltage test second terminal 507 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; in this embodiment, the materials of the NN voltage test first terminal 504, the NN current loop second terminal 505, the current loop first terminal 506 and the voltage test second terminal 507 are all copper.

[0067] The shape of the NN voltage test first terminal 504 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the NN current loop second terminal 505 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the current loop first terminal 506 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the voltage test second terminal 507 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; in this embodiment, the shapes of the NN voltage test first terminal 504, the NN current loop second terminal 505, the current loop first terminal 506 and the voltage test second terminal 507 are all squares, and the length and width of each square are equal.

[0068] Continue to refer Figure 5 and Figure 6 , the second resistance test structure includes:

[0069] A first semiconductor layer, located on the substrate 500;

[0070] a first semiconductor layer to be tested, located on the first semiconductor layer and in contact with the first semiconductor layer;

[0071] The N-type well located in the substrate 500 is used to block the test signal from flowing to the substrate 500 or other film layers when testing the block resistance or via contact resistance of the first semiconductor layer to be tested, that is, to isolate the first semiconductor layer to be tested from other film layers, thereby improving the accuracy of testing the block resistance of the first semiconductor layer to be tested.

[0072] The first semiconductor layer is of P-type doping type and has a first doping concentration, and is in contact with the N-type well;

[0073] The first semiconductor layer to be tested is of N-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration;

[0074] a first voltage testing terminal coupled to the first end of the first semiconductor layer to be tested;

[0075] a second terminal of the current loop, coupled to the second end of the first semiconductor layer to be tested;

[0076] a first terminal of the current loop, coupled to the first end of the conductive connection layer;

[0077] a second voltage test terminal coupled to the second end of the conductive connection layer;

[0078] The first voltage test terminal, the second voltage test terminal and the portion therebetween form a via contact resistance test structure, and the second current loop terminal, the first voltage test terminal and the portion therebetween form a block resistance test structure.

[0079] For the sake of simplicity and convenience, the names of the layers and terminals in this embodiment are described as follows:

[0080] The first semiconductor layer of the second resistance test structure is called the NP first semiconductor layer 601;

[0081] The first semiconductor layer to be tested in the second resistance test structure is called NP first semiconductor layer to be tested 602;

[0082] The P-type well of the second resistance test structure is called an NPP-type well 603;

[0083] The voltage test first terminal of the second resistance test structure is called the NP voltage test first terminal 604;

[0084] The second terminal of the current loop of the second resistance test structure is called the NP current loop second terminal 605;

[0085] In this embodiment, the NP voltage test first terminal 604 and the voltage test second terminal 507 and the portion therebetween form an NP via 608 contact resistance test structure to test the via contact resistance at the NP via 608; the NP current loop second terminal 605 and the NP voltage test first terminal 604 and the portion therebetween form an NP square resistance test structure to test the square resistance of the NP first semiconductor layer 602 to be tested.

[0086] In this embodiment, the NP voltage test first terminal 604 is electrically connected to the first end of the NP first semiconductor layer to be tested 602 through the metal lead JSX and the contact hole JCK; the NP current loop second terminal 605 is coupled to the second end of the NP first semiconductor layer to be tested 602 through the metal lead JSX and the contact hole JCK; the current loop first terminal 506 is coupled to the first end of the conductive connection layer 900; and the voltage test second terminal 507 is coupled to the second end of the conductive connection layer 900.

[0087] The material of the NP voltage test first terminal 604 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the NP current loop second terminal 605 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the current loop first terminal 506 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the voltage test second terminal 507 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; in this embodiment, the materials of the NP voltage test first terminal 604, the NP current loop second terminal 605, the current loop first terminal 506, and the voltage test second terminal 507 are all copper.

[0088] The shape of the NP voltage test first terminal 604 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the NP current loop second terminal 605 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the current loop first terminal 506 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the voltage test second terminal 507 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; in this embodiment, the shapes of the NP voltage test first terminal 604, the NP current loop second terminal 605, the current loop first terminal 506 and the voltage test second terminal 507 are all squares, and the length and width of each square are equal.

[0089] Continue to refer Figure 5 and Figure 6 , the third resistance test structure includes:

[0090] A first semiconductor layer, located on the substrate 500;

[0091] a first semiconductor layer to be tested, located on the first semiconductor layer and in contact with the first semiconductor layer;

[0092] The P-type well located in the substrate 500 is used to block the test signal from flowing to the substrate 500 or other film layers when testing the block resistance or via contact resistance of the first semiconductor layer to be tested, that is, to isolate the first semiconductor layer to be tested from other film layers, thereby improving the accuracy of testing the block resistance of the first semiconductor layer to be tested.

[0093] The first semiconductor layer is of N-type doping type and has a first doping concentration, and is in contact with the P-type well;

[0094] The first semiconductor layer to be tested is of P-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration;

[0095] a first voltage testing terminal coupled to the first end of the first semiconductor layer to be tested;

[0096] a second terminal of the current loop, coupled to the second end of the first semiconductor layer to be tested;

[0097] a first terminal of the current loop, coupled to the first end of the conductive connection layer;

[0098] a second voltage test terminal coupled to the second end of the conductive connection layer;

[0099] The first voltage test terminal, the second voltage test terminal and the portion therebetween form a via contact resistance test structure, and the second current loop terminal, the first voltage test terminal and the portion therebetween form a block resistance test structure.

[0100] For the sake of simplicity and convenience, the names of the layers and terminals in this embodiment are described as follows:

[0101] The first semiconductor layer of the third resistance test structure is called a PN first semiconductor layer 701;

[0102] The first semiconductor layer to be tested in the third resistance test structure is called a PN first semiconductor layer to be tested 702;

[0103] The P-type well of the third resistance test structure is called a PNP-type well 703;

[0104] The voltage test first terminal of the third resistance test structure is called the PN voltage test first terminal 704;

[0105] The second terminal of the current loop of the third resistance test structure is called the PN current loop second terminal 705;

[0106] In this embodiment, the PN voltage test first terminal 704 and the voltage test second terminal 507 and the portion therebetween form a PN via 708 contact resistance test structure to test the via contact resistance at the PN via 708; the PN current loop second terminal 705 and the PN voltage test first terminal 704 and the portion therebetween form a PN block resistance test structure to test the block resistance of the PN first semiconductor layer 702 to be tested.

[0107] In this embodiment, the PN voltage test first terminal 704 is electrically connected to the first end of the PN first semiconductor layer to be tested 702 through the metal lead JSX and the contact hole JCK; the PN current loop second terminal 705 is coupled to the second end of the PN first semiconductor layer to be tested 702 through the metal lead JSX and the contact hole JCK; the current loop first terminal 506 is coupled to the first end of the conductive connection layer 900; the voltage test second terminal 507 is coupled to the second end of the conductive connection layer 900.

[0108] The material of the PN voltage test first terminal 704 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the PN current loop second terminal 705 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the current loop first terminal 506 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the voltage test second terminal 507 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; in this embodiment, the materials of the PN voltage test first terminal 704, the PN current loop second terminal 705, the current loop first terminal 506 and the voltage test second terminal 507 are all copper.

[0109] The shape of the PN voltage test first terminal 704 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the PN current loop second terminal 705 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the current loop first terminal 506 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; the shape of the voltage test second terminal 507 includes one or more of a square, a circle, an ellipse, a triangle and a polygon; in this embodiment, the shapes of the PN voltage test first terminal 704, the PN current loop second terminal 705, the current loop first terminal 506 and the voltage test second terminal 507 are all squares, and the length and width of each square are equal.

[0110] Continue to refer Figure 5 and Figure 6 , the fourth resistance test structure includes:

[0111] A first semiconductor layer, located on the substrate 500;

[0112] a first semiconductor layer to be tested, located on the first semiconductor layer and in contact with the first semiconductor layer;

[0113] The N-type well located in the substrate 500 is used to block the test signal from flowing to the substrate 500 or other film layers when testing the block resistance or via contact resistance of the first semiconductor layer to be tested, that is, to isolate the first semiconductor layer to be tested from other film layers, thereby improving the accuracy of testing the block resistance of the first semiconductor layer to be tested.

[0114] The first semiconductor layer is of P-type doping type and has a first doping concentration, and is in contact with the N-type well;

[0115] The first semiconductor layer to be tested is of P-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration;

[0116] a first voltage testing terminal coupled to the first end of the first semiconductor layer to be tested;

[0117] a second terminal of the current loop, coupled to the second end of the first semiconductor layer to be tested;

[0118] a first terminal of the current loop, coupled to the first end of the conductive connection layer;

[0119] a second voltage test terminal coupled to the second end of the conductive connection layer;

[0120] The first voltage test terminal, the second voltage test terminal and the portion therebetween form a via contact resistance test structure, and the second current loop terminal, the first voltage test terminal and the portion therebetween form a block resistance test structure.

[0121] For the sake of simplicity and convenience, the names of the layers and terminals in this embodiment are described as follows:

[0122] The first semiconductor layer of the fourth resistance test structure is called a PP first semiconductor layer 801;

[0123] The first semiconductor layer to be tested of the fourth resistance test structure is called a PP first semiconductor layer to be tested 802;

[0124] The P-type well of the fourth resistance test structure is called a PPP-type well 803;

[0125] The voltage test first terminal of the fourth resistance test structure is called the PP voltage test first terminal 804;

[0126] The second terminal of the current loop of the fourth resistance test structure is called the PP current loop second terminal 805;

[0127] In this embodiment, the PP voltage test first terminal 804 and the voltage test second terminal 507 and the portion therebetween form a PP via 808 contact resistance test structure to test the via contact resistance at the PP via 808; the PP current loop second terminal 805 and the PP voltage test first terminal 804 and the portion therebetween form a PP square resistance test structure to test the square resistance of the PP first semiconductor layer to be tested 802.

[0128] In this embodiment, the PP voltage test first terminal 804 is electrically connected to the first end of the PP first semiconductor layer to be tested 802 through the metal lead JSX and the contact hole JCK; the PP current loop second terminal 805 is coupled to the second end of the PP first semiconductor layer to be tested 802 through the metal lead JSX and the contact hole JCK; the current loop first terminal 506 is coupled to the first end of the conductive connection layer 900; and the voltage test second terminal 507 is coupled to the second end of the conductive connection layer 900.

[0129] The material of the PP voltage test first terminal 804 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the PP current loop second terminal 805 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the current loop first terminal 506 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; the material of the voltage test second terminal 507 includes: one or more of copper, aluminum, tungsten, titanium, and indium tin oxide; in this embodiment, the materials of the PP voltage test first terminal 804, the PP current loop second terminal 805, the current loop first terminal 506, and the voltage test second terminal 507 are all copper.

[0130] The shape of the PP voltage test first terminal 804 includes one or more of a square, a circle, an ellipse, a triangle, and a polygon; the shape of the PP current loop second terminal 805 includes one or more of a square, a circle, an ellipse, a triangle, and a polygon; the shape of the current loop first terminal 506 includes one or more of a square, a circle, an ellipse, a triangle, and a polygon; the shape of the voltage test second terminal 507 includes one or more of a square, a circle, an ellipse, a triangle, and a polygon; in this embodiment, the shapes of the PP voltage test first terminal 804, the PP current loop second terminal 805, the current loop first terminal 506, and the voltage test second terminal 507 are all squares, and the length and width of each square are equal.

[0131] Each resistance test structure reuses the current loop first terminal and the voltage test second terminal. In this embodiment, the first resistance test structure, the second resistance test structure, the third resistance test structure and the fourth resistance test structure all use the current loop first terminal 506 and the voltage test second terminal 507 when testing the via contact resistance in their respective resistance structures, using a total of 10 terminals, which reduces the number of terminals, saves wafer area, and improves wafer area utilization.

[0132] It should be noted that the doping type, the first doping concentration and the second doping concentration can be selected according to actual needs and are not intended to limit this application.

[0133] Continue to refer Figure 5 and Figure 6 The resistance testing unit includes: a conductive connection layer 900.

[0134] The conductive connection layer 900 spans across multiple resistance test structures and is connected to each resistance test structure through vias in a one-to-one correspondence, which can reduce the number of terminals, save wafer area, and improve wafer area utilization.

[0135] Continue to refer Figure 6 The substrate is further covered with a dielectric layer 901. Those skilled in the art may set the covering position of the dielectric layer 901 according to actual needs, and this is not intended to limit the present application.

[0136] In this embodiment, the conductive connection layer 900 spans the first resistance test structure, the second resistance test structure, the third resistance test structure and the fourth resistance test structure, and the conductive connection layer 900 is connected to the NN first semiconductor layer to be tested 502 through the NN via 508, the conductive connection layer 900 is connected to the NP first semiconductor layer to be tested 602 through the NP via 608, the conductive connection layer 900 is connected to the PN first semiconductor layer to be tested 702 through the PN via 708, and the conductive connection layer 900 is connected to the PP first semiconductor layer to be tested 802 through the PP via 808.

[0137] The material of the conductive connection layer 900 includes one or more of copper, aluminum, tungsten, titanium, and indium tin oxide. In this embodiment, the material of the conductive connection layer 900 is copper.

[0138] To maintain the accuracy of via contact resistance and sheet resistance testing, the current and voltage at the terminals in various resistance test structures are set.

[0139] The first end of the conductive connection layer 900 is connected to a first constant current, and the second end is connected to a second constant current, wherein the first constant current is greater than the second constant current;

[0140] In this embodiment, the first end of the conductive connection layer 900 is connected to the first constant current (connected to the first constant current source) through the current loop first terminal 506, and the second end of the conductive connection layer 900 is connected to the second constant current (connected to the second constant current source) through the voltage test second terminal 507.

[0141] In this embodiment, the first constant current is greater than the second constant current.

[0142] Each resistance test structure has a first end connected to a constant current and a second end connected to a constant voltage. The resistance test structure satisfies one or more of the following conditions: the second constant current is 0A; the constant current is 0A; and the constant voltage is 0V.

[0143] In the first resistance test structure, the first current loop terminal is connected to the first constant current, the second current loop terminal is connected to a constant voltage of 0V, the first voltage test terminal of the first resistance test structure is connected to a constant current of 0A, and the second voltage test terminal of the first resistance test structure is connected to a constant current of 0A. In this embodiment, the first current loop terminal 506 is connected to the first constant current, the second NN current loop terminal 505 is connected to a constant voltage of 0V, the first NN voltage test terminal 504 of the first resistance test structure is connected to a constant current of 0A, and the second voltage test terminal 507 of the first resistance test structure is connected to a constant current of 0A.

[0144] In the second resistance test structure, the first terminal of the current loop is connected to the first constant current; the second terminal of the current loop is connected to a constant voltage of 0V; the first terminal of the voltage test of the second resistance test structure is connected to a constant current of 0A; and the second terminal of the voltage test of the second resistance test structure is connected to a constant current of 0A. In this embodiment, the first terminal 506 of the current loop is connected to the first constant current; the second terminal 605 of the NP current loop is connected to a constant voltage of 0V; the first terminal 604 of the NP voltage test of the second resistance test structure is connected to a constant current of 0A; and the second terminal 507 of the voltage test of the second resistance test structure is connected to a constant current of 0A.

[0145] In the third resistance test structure, the first terminal of the current loop is connected to the first constant current; the second terminal of the current loop is connected to a constant voltage of 0V; the first terminal of the voltage test of the third resistance test structure is connected to a constant current of 0A; and the second terminal of the voltage test of the third resistance test structure is connected to a constant current of 0A. In this embodiment, the first terminal 506 of the current loop is connected to the first constant current; the second terminal 705 of the PN current loop is connected to a constant voltage of 0V; the first terminal 704 of the PN voltage test of the third resistance test structure is connected to a constant current of 0A; and the second terminal 507 of the voltage test of the third resistance test structure is connected to a constant current of 0A.

[0146] In the fourth resistance test structure, the first current loop terminal is connected to the first constant current; the second current loop terminal is connected to a 0V constant voltage; the first voltage test terminal of the fourth resistance test structure is connected to a 0A constant current; and the second voltage test terminal of the fourth resistance test structure is connected to a 0A constant current. In this embodiment, the first current loop terminal 506 is connected to the first constant current; the second PP current loop terminal 805 is connected to a 0V constant voltage; the first PP voltage test terminal 804 of the fourth resistance test structure is connected to a 0A constant current; and the second voltage test terminal 507 of the fourth resistance test structure is connected to a 0A constant current.

[0147] It should be noted that the second constant current is 0A, and the first constant current is greater than the second constant current, that is, the first constant current is greater than 0A, providing a constant current for each resistance test structure when testing the via contact resistance to maintain the accuracy of the via contact resistance test.

[0148] It should be noted that the first constant current is greater than 0A and the constant voltage is 0V, providing a first constant current loop for each resistance test structure when testing the via contact resistance, so that the first constant current flows through the via corresponding to the via contact resistance to be tested in each resistance test structure, so as to maintain the accuracy of the via contact resistance test.

[0149] It should be noted that when each resistance test structure tests the corresponding via contact resistance, a constant current source is used to provide current I to the via corresponding to each via contact resistance to be tested through the first terminal 506 of the current loop and the second terminal of each current loop. A voltmeter is used to test the voltage U at both ends of the via corresponding to each via contact resistance to be tested through the voltage test first terminal and the voltage test second terminal in each resistance test structure, and the via contact resistance Rc is obtained based on the voltage U and the current I.

[0150] It should be noted that the second constant current is 0A. When the constant current is 0A, when each resistance test structure tests the via contact resistance, the probability of the current brought by the above-mentioned voltmeter itself being applied to the via corresponding to each via contact resistance to be tested is greatly reduced, thereby obtaining a more accurate via contact resistance.

[0151] It should be noted that, for example, the test leads of a multimeter are inserted into the first voltage test terminal and the second current loop terminal to test the sheet resistance of the first semiconductor layer to be tested in each resistance test structure.

[0152] It should be noted that the via contact resistance tested in each resistance test structure of the present application adopts the Kelvin four-wire resistance test principle to obtain a more accurate via contact resistance.

[0153] It should be noted that, in other embodiments, the first end of each resistance test structure is disconnected from a constant current, and the second end of the conductive connection layer 900 is disconnected from a second constant current, that is, the first end of each resistance test structure does not provide a constant current, and the second end of the conductive connection layer 900 does not provide a second constant current.

[0154] It should be noted that, in some embodiments, the current loop first terminal 506, the NN voltage test first terminal 504, the NP voltage test first terminal 604, the PN voltage test first terminal 704, the PP voltage test first terminal 804, the voltage test second terminal 507, the PP current loop second terminal 805, the PN current loop second terminal 705, the NP current loop second terminal 605 and the NN current loop second terminal 505 are all the same size and shape, and the bottom of each terminal is located on the same straight line, and the spacing between each terminal is equal, which is conducive to saving wafer space.

[0155] It should be noted that, in some embodiments, the length and width of the current loop first terminal 506, the NN voltage test first terminal 504, the NP voltage test first terminal 604, the PN voltage test first terminal 704, the PP voltage test first terminal 804, the voltage test second terminal 507, the PP current loop second terminal 805, the PN current loop second terminal 705, the NP current loop second terminal 605 and the NN current loop second terminal 505 can all be the width of the metal lead JSX.

[0156] It should be noted that a first constant current source is used to provide a first constant current, a second constant current source is used to provide a second constant current and a constant current, and a constant voltage source is used to provide a constant voltage. When testing the via contact resistance of each resistance test structure, it is beneficial to stabilize the current at the via of each resistance test structure to obtain a more accurate via contact resistance.

[0157] To facilitate understanding of the present invention, this application provides a testing method corresponding to the resistance testing structure.

[0158] refer to Figure 7 , is a flow chart of the test method of the embodiment of the present application.

[0159] The testing method includes: providing a resistance test structure to be measured; setting the first terminal of the current loop to the first constant current, the second terminal of the voltage test of the resistance test structure to be measured to the second constant current, the first terminal of the voltage test of the resistance test structure to be measured to a constant current, and the second terminal of the current loop to a constant voltage; testing the voltage between the first voltage test terminal and the second voltage test terminal to determine the contact resistance of the resistance test structure to be measured; and testing the resistance between the second terminal of the current loop and the first voltage test terminal as the block resistance of the resistance test structure to be measured.

[0160] The first end of the conductive connection layer is connected to a first constant current, the second end is connected to a second constant current, the first end of each resistance test structure is connected to a constant current, and the second end is connected to a constant voltage, which can maintain the accuracy of the via contact resistance and square resistance tests.

[0161] For ease of understanding, in this embodiment, the via contact resistance and block resistance tested by the first resistance test structure are taken as an example for illustration. Those skilled in the art can derive the corresponding via contact resistance and block resistance in the tests of the second resistance test structure, the third resistance test structure and the fourth resistance test structure based on the test method of the via contact resistance and block resistance tested by the first resistance test structure, without limiting the present application accordingly.

[0162] The first resistance test structure for testing via contact resistance and sheet resistance test method includes:

[0163] Step S11: providing a resistance test structure to be tested;

[0164] In this embodiment, the resistance test structure to be tested is a first resistance test structure.

[0165] For the description of the first resistance test structure, reference may be made to the description of the first resistance test structure in the aforementioned embodiment, which will not be repeated here.

[0166] In this embodiment, it is necessary to test the sheet resistance of the NN first semiconductor layer 502 when the first semiconductor layer is provided, and the via contact resistance between the conductive connection layer 900 and the NN via 508 .

[0167] Step S12: setting the first terminal of the current loop to the first constant current, the second terminal of the voltage test of the resistance test structure to be measured to the second constant current, the first terminal of the voltage test of the resistance test structure to be measured to the constant current, and the second terminal of the current loop to the constant voltage;

[0168] In this embodiment, a first constant current source is electrically connected to the first terminal 506 of the current loop to set the first terminal 506 of the current loop to the first constant current I1, a second constant current source is electrically connected to the second voltage test terminal 507 of the first resistance test structure to set the second voltage test terminal 507 to the second constant current 0A, a second constant current source or a third constant current source is electrically connected to the NN voltage test first terminal 504 of the first resistance test structure to set the NN voltage test first terminal 504 to the constant current 0A, and a constant voltage source is electrically connected to the second terminal 505 of the NN current loop to set the second terminal 505 of the NN current loop to the constant voltage 0V.

[0169] Step S13: testing the voltage between the first voltage test terminal and the second voltage test terminal to determine the via contact resistance of the resistance test structure to be measured;

[0170] In this embodiment, the voltage U1 between the second voltage test terminal 507 and the first NN voltage test terminal 504 is measured by a voltmeter, and the via contact resistance of the first resistance test structure is determined to be R according to the voltage U1 and the first constant current I1 in step S11. C1 .

[0171] It should be noted that, for other resistance test structures except the resistance test structure to be tested, the terminals coupled to the first end of the resistance test structure are all set to be suspended, and the terminals coupled to the second end of the resistance test structure are all set to be suspended.

[0172] In this embodiment, when testing the via contact resistance of the first resistance test structure, the NP voltage test first terminal 604 and the NP current loop second terminal 605 of the second resistance test structure are both set to be suspended, and the PN voltage test first terminal 704 and the PN current loop second terminal 705 of the third resistance test structure are both set to be suspended, and the PP voltage test first terminal 804 and the PP current loop second terminal 805 of the fourth resistance test structure are both set to be suspended.

[0173] Step S14: testing the resistance between the second terminal of the current loop and the first terminal of the voltage test as the sheet resistance of the resistance test structure to be measured.

[0174] In this embodiment, a resistance tester is electrically connected to the NN current loop second terminal 505 and the NN voltage test first terminal 504 to test the resistance between the NN current loop second terminal 505 and the NN voltage test first terminal 504, which is used as the square resistance R of the resistance test structure to be tested (i.e., the NN first semiconductor layer to be tested 502). f, that is, the sheet resistance R of the first semiconductor layer 502 to be tested as NN f .

[0175] It should be noted that, for other resistance test structures except the resistance test structure to be tested, the terminals coupled to the first end of the resistance test structure are all set to be suspended, and the terminals coupled to the second end of the resistance test structure are all set to be suspended.

[0176] In this embodiment, when testing the block resistance of the first resistance test structure, the current loop first terminal 506 and the voltage test second terminal 507 are set to be suspended, and the NP voltage test first terminal 604 and the NP current loop second terminal 605 of the second resistance test structure are both set to be suspended, and the PN voltage test first terminal 704 and the PN current loop second terminal 705 of the third resistance test structure are both set to be suspended, and the PP voltage test first terminal 804 and the PP current loop second terminal 805 of the fourth resistance test structure are both set to be suspended.

[0177] It should be noted that the via contact resistance in the first resistance test structure can be tested first, and then the block resistance of the NN first semiconductor layer to be tested 502 can be tested, or the block resistance of the NN first semiconductor layer to be tested 502 can be tested first, and then the via contact resistance in the first resistance test structure can be tested. After testing the via contact resistance and block resistance in the first resistance test structure, the via contact resistance and block resistance in the second resistance test structure can be tested, and then the via contact resistance and block resistance in the third resistance test structure can be tested, and finally the via contact resistance and block resistance in the fourth resistance test structure can be tested. Those skilled in the art can adjust the test order of the first resistance test structure, the second resistance test structure, the third resistance test structure, and the fourth resistance test structure according to actual needs, and this does not limit the present application.

[0178] Although the present invention has been disclosed above in terms of preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can use the methods and technical contents disclosed above to make possible changes, modifications and combinations of the technical solutions of the present invention without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A resistance testing unit, characterized in that: include: substrate; a plurality of resistance test structures located on the substrate; The conductive connection layer spans across the multiple resistance test structures and is connected to each resistance test structure through vias in a one-to-one correspondence; The first end of the conductive connection layer is connected to a first constant current, the second end is connected to a second constant current, and the first constant current is greater than the second constant current; the first end of each resistance test structure is connected to a constant current, and the second end is connected to a constant voltage; Among them, each resistance test structure includes: a respective first semiconductor layer located on the substrate; The respective first semiconductor layers to be tested are located on the first semiconductor layer in a one-to-one correspondence and in contact with the corresponding first semiconductor layer; a first voltage testing terminal coupled to the first end of the first semiconductor layer to be tested; a second terminal of the current loop, coupled to the second end of the first semiconductor layer to be tested; a first terminal of the current loop, coupled to the first end of the conductive connection layer; a second voltage test terminal coupled to the second end of the conductive connection layer; Among them, the first voltage test terminal and the second voltage test terminal and the part therebetween form a via contact resistance test structure, and the second current loop terminal and the first voltage test terminal and the part therebetween form a block resistance test structure; each resistance test structure reuses the first current loop terminal and the second voltage test terminal.

2. The resistance testing unit according to claim 1, wherein: The resistance test structure satisfies one or more of the following: The second constant current is 0A; The constant current is 0A; The constant voltage is 0V.

3. The resistance testing unit according to claim 1, wherein: The first resistance test structure includes: a P-type well located in the substrate; The first semiconductor layer is of N-type doping type and has a first doping concentration, and is in contact with the P-type well; The first semiconductor layer to be tested is of N-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration; wherein the first terminal of the current loop is connected to the first constant current; The second terminal of the current loop is connected to a constant voltage of 0V; The first voltage test terminal of the first resistance test structure is connected to a 0A constant current; The second voltage test terminal of the first resistance test structure is connected to a 0A constant current.

4. The resistance testing unit according to claim 1, wherein: The second resistance test unit includes: an N-type well located in the substrate; The first semiconductor layer is of P-type doping type and has a first doping concentration, and is in contact with the N-type well; The first semiconductor layer to be tested is of N-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration; Wherein, the first terminal of the current loop is connected to the first constant current; The second terminal of the current loop is connected to a constant voltage of 0V; The first voltage test terminal of the second resistance test structure is connected to a 0A constant current; The second voltage test terminal of the second resistance test structure is connected to a 0A constant current.

5. The resistance testing unit according to claim 1, wherein: The third type of resistance test unit includes: a P-type well located in the substrate; The first semiconductor layer is of N-type doping type and has a first doping concentration, and is in contact with the P-type well; The first semiconductor layer to be tested is of P-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration; Wherein, the first terminal of the current loop is connected to the first constant current; The second terminal of the current loop is connected to a constant voltage of 0V; The first voltage test terminal of the third resistance test structure is connected to a 0A constant current; The second voltage test terminal of the third resistance test structure is connected to a 0A constant current.

6. The resistance testing unit according to claim 1, wherein: The fourth resistance test unit includes: an N-type well located in the substrate; The first semiconductor layer is of P-type doping type and has a first doping concentration, and is in contact with the N-type well; The first semiconductor layer to be tested is of P-type doping type and has a second doping concentration, and the first doping concentration is greater than the second doping concentration; Wherein, the first terminal of the current loop is connected to the first constant current; The second terminal of the current loop is connected to a constant voltage of 0V; The first voltage test terminal of the fourth resistance test structure is connected to a 0A constant current; The second voltage test terminal of the fourth resistance test structure is connected to a 0A constant current.

7. The resistance testing unit according to claim 1, wherein: The material of the conductive connection layer includes one or more of copper, aluminum, tungsten, titanium, and indium tin oxide.

8. The resistance testing unit according to claim 1, wherein: Each resistance testing structure extends along a first direction and is arranged along a second direction, wherein the first direction is perpendicular to the second direction.

9. A testing method, characterized in that: The resistance testing structure according to any one of claims 1 to 8 comprises: Provide a resistance test structure to be tested; Set the first terminal of the current loop to the first constant current, the second terminal of the voltage test of the resistance test structure to be measured to the second constant current, the first terminal of the voltage test of the resistance test structure to be measured to the constant current, and the second terminal of the current loop to the constant voltage; Testing the voltage between the first voltage test terminal and the second voltage test terminal to determine the via contact resistance of the resistance test structure to be measured; The resistance between the second terminal of the current loop and the first terminal of the voltage test is tested as the sheet resistance of the resistance test structure to be measured.

10. The testing method according to claim 9, wherein: For other resistance test structures except the resistance test structure to be tested, the terminals coupled to the first end of the resistance test structure are all set to be suspended, and the terminals coupled to the second end of the resistance test structure are all set to be suspended.

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