Seven-level inverter and modulation method thereof

Abstract

The invention discloses a seven-level inverter and a modulation method thereof. The seven-level inverter comprises a load end, a first direct-current voltage source, a second direct-current voltage source and a third direct-current voltage source, the first switching tube is arranged between the anode of the second direct-current voltage source and the cathode of the third direct-current voltage source; the second switching tube is arranged between the anode of the first direct-current voltage source and the cathode of the second direct-current voltage source; the third switching tube is arranged between the anode of the third direct-current voltage source and the cathode of the first direct-current voltage source; the fourth switch tube is arranged between the positive electrode of the third direct-current voltage source and the positive electrode of the load end; the fifth switch tube is arranged between the positive electrode of the first direct-current voltage source and the negative electrode of the load end; the sixth switch tube is arranged between the negative electrode of the second direct-current voltage source and the positive electrode of the load end; and the seventh switch tube is arranged between the negative electrode of the first direct-current voltage source and the negative electrode of the load end. By configuring on-off of the switches in different level states, the number of the switches is reduced on the premise of ensuring that the inverter realizes multi-level output and stable operation. By using a low-frequency modulation method, the excellent characteristic of the output voltage of the inverter can be ensured and the switching loss can be reduced.

Description

Technical Field

[0001] The present invention relates to a seven-level inverter and a modulation method thereof, and belongs to the technical field of power electronics application. Background Art

[0002] Multilevel inverters are widely used in many fields due to their flexible control methods, low switching stress, and high output voltage waveform quality. In particular, they have great development prospects in the field of new energy.

[0003] The inverter topology directly impacts the quality of the output voltage waveform and system performance. In the multilevel inverter field, mainstream topologies face significant technical bottlenecks: The NPC (Neutral Point Clamped) topology suffers from structural complexity and topological scalability limitations, leading to challenges with DC capacitor voltage balancing. The FC (Flying Capacitor) topology requires multiple energy storage capacitors, but also faces difficulties in voltage balancing control and the increased cost associated with the addition of a pre-charge circuit. The CHB (Cascaded H-Bridge) architecture suffers from device redundancy, significantly increasing system losses and size. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a seven-level inverter and a modulation method thereof, which can reduce the number of switching tubes while avoiding the use of switching capacitors.

[0005] The present invention adopts the following technical solutions to solve the above technical problems:

[0006] A seven-level inverter, comprising: a load terminal on an AC side, and first to third DC voltage sources on a DC side, wherein the voltages of the first, second, and third DC voltage sources are equal;

[0007] The seven-level inverter also includes: first to seventh switching tubes; the source of the first switching tube is connected to the negative electrode of the third DC voltage source, and the drain is connected to the positive electrode of the second DC voltage source; the source of the second switching tube is connected to the negative electrode of the second DC voltage source, and the drain is connected to the positive electrode of the first DC voltage source; the source of the third switching tube is connected to the negative electrode of the first DC voltage source, and the drain is connected to the positive electrode of the third DC voltage source; the source of the fourth switching tube is connected to the positive electrode of the load end, and the drain is connected to the positive electrode of the third DC voltage source; the source of the fifth switching tube is connected to the negative electrode of the load end, and the drain is connected to the positive electrode of the first DC voltage source; the source of the sixth switching tube is connected to the negative electrode of the second DC voltage source, and the drain is connected to the positive electrode of the load end; the source of the seventh switching tube is connected to the negative electrode of the first DC voltage source, and the drain is connected to the negative electrode of the load end.

[0008] Compared with the prior art, the present invention adopts the above technical solution and has the following technical effects:

[0009] 1. The present invention simplifies the topology while ensuring circuit stability and output voltage quality through optimization of the inverter design, reduces the number of switches and avoids the use of switching capacitors.

[0010] 2. The present invention uses a low-frequency modulation method, which can ensure the excellent characteristics of the inverter output voltage and reduce switching losses. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 1 is a topological diagram of a seven-level inverter circuit of the present invention;

[0012] Figure 2 1 is the operating mode diagram of the seven-level inverter of the present invention at different output levels, where (a)-(h) correspond to the output levels of +3E, +2E, +E, 0, 0, -E, -2E and -3E respectively;

[0013] Figure 3 This is a schematic diagram of the relationship between the switch conduction angle and the output level in the inverter modulation method;

[0014] FIG4( a ) is a waveform diagram of the load voltage and current at the output of the inverter, FIG4( b ) is a spectrum diagram of the load voltage, and FIG4( c ) is a spectrum diagram of the load current;

[0015] Figure 5 It is the dynamic performance diagram of the inverter output. DETAILED DESCRIPTION

[0016] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be interpreted as limiting the present invention.

[0017] like Figure 1 As shown, the present invention proposes a seven-level inverter, comprising: an AC-side load output; three DC voltage source inputs E1, E2, and E3 (E1=E2=E3=E) with equal voltages on the DC side; and seven switching transistors. The positive electrode of the DC voltage source E2 is connected to the negative electrode of E3 via a switching transistor S1; the positive electrode of the DC voltage source E1 is connected to the negative electrode of E2 via a switching transistor S2; the positive electrode of the DC voltage source E3 is connected to the negative electrode of E1 via a switching transistor S3; the positive electrode of the DC voltage source E3 is connected to the positive electrode of the load via a switching transistor S4; the positive electrode of the DC voltage source E1 is connected to the negative electrode of the load via a switching transistor S5; the negative electrode of the DC voltage source E2 is connected to the positive electrode of the load via a switching transistor S6; and the negative electrode of the DC voltage source E1 is connected to the negative electrode of the load via a switching transistor S7. Switches S1, S2, S3, S4, S5, S6, and S7 are all insulated gate bipolar transistors.

[0018] like Figure 2As shown in (a)-(h) in the figure, by controlling the on and off of the switch tube, three different power supply combinations can be realized: E1, E2+E3, and E1+E2+E3. Thus, seven different output levels, 0, ±E, ±2E, and ±3E, can be output at the load end. The switch states under different output levels are also different, and their corresponding relationships are shown in Table 1:

[0019] Table 1

[0020]

[0021]

[0022] In the table, 1 indicates that the switch is on, and 0 indicates that the switch is off.

[0023] The inverter output voltage is modulated using SHEPWM low-frequency modulation technology to eliminate specified harmonics. The seven-point flat inverter topology has three degrees of freedom, and two specified harmonics can be eliminated by establishing three nonlinear equations. Usually, the fifth and seventh harmonics are eliminated first.

[0024] In the modulation method, the expression of the modulation wave is:

[0025]

[0026] Where V r is the modulated wave, ω is the fundamental angular frequency, t is the time variable, is the initial phase angle;

[0027] The three switch conduction angles are determined by three nonlinear equations:

[0028]

[0029] Where α1, α2, and α3 are the three switch conduction angles, expressed in radians, and 0<α1≤α2≤α3<π / 2, M a is the modulation index, i and j represent the i-th harmonic and j-th harmonic to be eliminated respectively, and both i and j are odd numbers greater than 1;

[0030] Determine 6 comparison potentials based on 3 switch conduction angles:

[0031]

[0032] In the formula, +V1 and -V1 represent the first group of comparison potentials with opposite values, +V2 and -V2 represent the second group of comparison potentials with opposite values, and +V3 and -V3 represent the third group of comparison potentials with opposite values.

[0033] When V r >+V3, U o=3E, the control signals of the switches S1, S2, S4, and S7 are high, and the control signals of the switches S3, S5, and S6 are low;

[0034] When V r <-V3, U o =-3E, the control signals of the switches S1, S3, S5, and S6 are high, and the control signals of the switches S2, S4, and S7 are low;

[0035] When +V2<V r ≤+V3, U o =2E, the control signals of the switches S1, S2, S4, and S5 are high, and the control signals of the switches S3, S6, and S7 are low;

[0036] When -V3≤V r When <-V2, U o =-2E, the control signals of the switches S1, S3, S6, and S7 are high, and the control signals of the switches S2, S4, and S5 are low;

[0037] When +V1<V r When ≤+V2, U o =E, the control signals of the switches S2, S6, and S7 are high, and the control signals of the switches S1, S3, S4, and S5 are low;

[0038] When -V2≤V r <-V1, U o =-E, the control signals of the switches S3, S4, and S5 are high, and the control signals of the switches S1, S2, S6, and S7 are low;

[0039] When -V1≤V r ≤+V1, and V r When the value of U decreases, o In the first zero-level state, the control signals of the switches S2, S5, and S6 are high, and the control signals of the switches S1, S3, S4, and S7 are low.

[0040] When -V1≤V r ≤+V1, and V r When the value of U increases, o In the second zero-level state, the control signals of the switches S3, S4, and S7 are at a high level, and the control signals of the switches S1, S2, S5, and S6 are at a low level.

[0041] According to the above modulation method, the output voltage U o It will show the shape of a step wave, and its relationship with the three switch conduction angles α1, α2, and α3 is as follows Figure 3 shown.

[0042] Example

[0043] The seven-level inverter was simulated in MATLAB / Simulink, with the DC voltage source in the simulation model set to 12V. For the operation of the seven-level inverter, the system load resistance was set to 10Ω, and the load inductance was set to 5mH. The modulation method adopted the low-frequency modulation technique SHEPWM, with a modulation wave frequency of 50Hz. In this embodiment, the fifth and seventh harmonics in the output voltage were eliminated.

[0044] Figure 4(a)-Figure 4(c) The steady-state performance of the inverter is demonstrated. When the modulation index is 1, solving the nonlinear equations yields the three switch conduction angles: α1 = 0.2039, α2 = 0.5442, and α3 = 1.0224. Figure 4(a) shows the waveforms of the load voltage and current at the inverter output under these modulation parameters, Figure 4(b) shows the load voltage spectrum, and Figure 4(c) shows the load current spectrum. It can be seen that the inverter output voltage is a symmetrical seven-level staircase wave, achieving the basic function of this topology. The voltage spectrum does not contain the fifth and seventh harmonics, and the amplitude of the output voltage fundamental component is approximately 36V, consistent with theoretical analysis. The load inductor acts as a filter, reducing the harmonic distortion rate of the load current.

[0045] Figure 5 The dynamic performance of the inverter's load-side output voltage and current is demonstrated. Between 0s and 0.05s, the modulation index is 0.6, the modulation wave frequency is 50Hz, the load resistance is 130Ω, and the load inductance is 5mH. At the end of 0.05s, a load jump occurs. From 0.05s to 0.1s, the modulation index remains constant at 0.6, the modulation wave frequency remains constant at 50Hz, the load resistance changes to 30Ω, and the load inductance changes to 5.5mH. At the end of 0.1s, a modulation index jump occurs. From 0.1s to 0.15s, the modulation index changes to 1, the modulation wave frequency remains constant at 50Hz, the load resistance remains constant at 30Ω, and the load inductance remains constant at 5.5mH. At the end of 0.15s, a modulation wave frequency jump occurs. From 0.15s to 0.2s, the modulation index remains constant at 1, the modulation wave frequency changes to 150Hz, the load resistance remains constant at 30Ω, and the load inductance remains constant at 5.5mH. It can be seen that the inverter has good dynamic characteristics and can keep up with the changes of instantaneous disturbances in time.

[0046] The basic principles, main features, and advantages of the present invention are shown and described above. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention, and such changes and modifications fall within the scope of the invention as claimed.

Claims

1. A seven-level inverter, characterized in that: The seven-level inverter comprises: a load end on the AC side, and first to third DC voltage sources on the DC side, wherein the voltages of the first, second and third DC voltage sources are equal; The seven-level inverter also includes: first to seventh switching tubes; the source of the first switching tube is connected to the negative electrode of the third DC voltage source, and the drain is connected to the positive electrode of the second DC voltage source; the source of the second switching tube is connected to the negative electrode of the second DC voltage source, and the drain is connected to the positive electrode of the first DC voltage source; the source of the third switching tube is connected to the negative electrode of the first DC voltage source, and the drain is connected to the positive electrode of the third DC voltage source; the source of the fourth switching tube is connected to the positive electrode of the load end, and the drain is connected to the positive electrode of the third DC voltage source; the source of the fifth switching tube is connected to the negative electrode of the load end, and the drain is connected to the positive electrode of the first DC voltage source; the source of the sixth switching tube is connected to the negative electrode of the second DC voltage source, and the drain is connected to the positive electrode of the load end; the source of the seventh switching tube is connected to the negative electrode of the first DC voltage source, and the drain is connected to the negative electrode of the load end.

2. The seven-level inverter according to claim 1, characterized in that: The first to seventh switching transistors are all insulated gate bipolar transistors.

3. The seven-level inverter according to claim 1, characterized in that: The voltages of the first, second and third DC voltage sources are all E. By controlling the on and off of the first to seventh switching tubes, seven different level outputs are achieved at the load end. The seven levels output at the load end are: U o ={0, ±E, ±2E, ±3E}.

4. The seven-level inverter according to claim 3, characterized in that: Different output levels correspond to different switch states. The corresponding levels and switch states are as follows: U o =3E, the first, second, fourth and seventh switch tubes are turned on, and the third, fifth and sixth switch tubes are turned off; U o =2E, the first, second, fourth and fifth switch tubes are turned on, and the third, sixth and seventh switch tubes are turned off; U o =E, the second, sixth and seventh switch tubes are turned on, and the first, third, fourth and fifth switch tubes are turned off; U o =-E, the third, fourth and fifth switch tubes are turned on, and the first, second, sixth and seventh switch tubes are turned off; U o =-2E, the first, third, sixth and seventh switch tubes are turned on, and the second, fourth and fifth switch tubes are turned off; U o =-3E, the first, third, fifth and sixth switches are turned on, and the second, fourth and seventh switches are turned off; U o =0, there are two different switching states, which appear in the two processes of output voltage changing from positive to negative and from negative to positive; The first state is that the second, fifth and sixth switch tubes are turned on, and the first, third, fourth and seventh switch tubes are turned off. This state occurs when the output voltage changes from positive to negative. The second state is that the third, fourth and seventh switch tubes are turned on, and the first, second, fifth and sixth switch tubes are turned off. This state occurs when the output voltage changes from negative to positive.

5. The modulation method of the seven-level inverter according to any one of claims 1 to 4, characterized in that: The SHEPWM low-frequency modulation technology is used to eliminate the specified harmonics of the inverter output voltage, as follows: The seven-level inverter has three degrees of freedom, and eliminates two specified harmonics by establishing three nonlinear equations; The expression of the modulation wave in the modulation method is: Where V r is the modulated wave, ω is the fundamental angular frequency, t is the time variable, is the initial phase angle; The three switch conduction angles in the modulation method are determined by the following nonlinear equations: Where α1, α2, and α3 are the three switch conduction angles, and 0<α1≤α2≤α3<π / 2, M a is the modulation index, i and j represent the i-th harmonic and j-th harmonic to be eliminated respectively, and both i and j are odd numbers greater than 1; The six comparison potentials in the modulation method are determined by the three switch conduction angles: In the formula, +V1 and -V1 represent the first group of comparison potentials with opposite values, +V2 and -V2 represent the second group of comparison potentials with opposite values, and +V3 and -V3 represent the third group of comparison potentials with opposite values.

6. The modulation method according to claim 5, characterized in that: The control signals of the switch tube corresponding to different output levels are as follows: When V r >+V3, U o =3E, the control signals of the first, second, fourth and seventh switch tubes are high level, and the control signals of the third, fifth and sixth switch tubes are low level; When V r <-V3, U o =-3E, the control signals of the first, third, fifth and sixth switch tubes are high level, and the control signals of the second, fourth and seventh switch tubes are low level; When +V2<V r ≤+V3, U o =2E, the control signals of the first, second, fourth and fifth switch tubes are high level, and the control signals of the third, sixth and seventh switch tubes are low level; When -V3≤V r When <-V2, U o =-2E, the control signals of the first, third, sixth and seventh switch tubes are high level, and the control signals of the second, fourth and fifth switch tubes are low level; When +V1<V r When ≤+V2, U o =E, the control signals of the second, sixth and seventh switch tubes are high level, and the control signals of the first, third, fourth and fifth switch tubes are low level; When -V2≤V r <-V1, U o =-E, the control signals of the third, fourth and fifth switch tubes are high level, and the control signals of the first, second, sixth and seventh switch tubes are low level; When -V1≤V r ≤+V1, and V r When the value of U decreases, o =0, the control signals of the second, fifth and sixth switch tubes are high level, and the control signals of the first, third, fourth and seventh switch tubes are low level; When -V1≤V r ≤+V1, and V r When the value of U increases, o =0, the control signals of the third, fourth and seventh switch tubes are high level, and the control signals of the first, second, fifth and sixth switch tubes are low level.

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