A power switching device with a floating field plate

Abstract

This invention belongs to the field of semiconductor technology, specifically disclosing a power switching device with a floating field plate. The device includes a floating field plate, a second field plate, a vertical extension region of the floating field plate, and a vertical extension region of the second field plate. The floating field plate is located in a second dielectric layer, and the second field plate is located in a third dielectric layer. The floating field plate is located on the side of the second field plate away from the drain electrode. The orthographic projections of the floating field plate and the second field plate on the horizontal plane overlap. The vertical extension region of the floating field plate overlaps with the vertical extension region of the second field plate and the orthographic projection of the second field plate on the vertical plane. A gap exists between the vertical extension regions of the floating field plate and the second field plate. A first connection structure is provided between the vertical extension region of the second field plate and the gate structure, or a second connection structure is provided between the vertical extension region of the second field plate and the source electrode. In this power switching device, the floating field plate can generate an additional electric field gradient when the device is turned off and subjected to high voltage, which is beneficial for increasing the reliability of the device under high voltage.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, and specifically relates to a power switching device with a floating field plate. Background Technology

[0002] For lateral devices such as GaN HEMT, due to chip size limitations, the distance between the drain electrode and the source electrode needs to be shortened. This will cause a large electric field spike between the gate electrode and the drain electrode. Currently, multi-field plates are used to weaken the electric field spike.

[0003] In the existing technology, there are mainly multiple gate field plates connected to the gate, multiple source field plates connected to the source, and field plates with tilted structures that can also achieve electric field modulation. There are also floating field plates with continuous intervals that are suitable for microwave devices, which use the coupling between multiple floating field plates to modulate the electric field.

[0004] Multi-field plate (MFPC) processes often require a separate photomask for each MFPC layer due to their varying heights, leading to complex manufacturing processes. Furthermore, since each MFPC has a fixed height and potential difference, it can only withstand relatively low voltages, with the remaining high voltage distributed between the MFPC ends and the drain electrode, negatively impacting device reliability under high voltage. Inclined MFPC processes are difficult to implement and struggle to form stable structures, exhibiting similar problems and detrimental to device reliability under high voltage. The electric field distribution formed by multiple continuously spaced floating MFPCs is influenced by numerous factors, potentially causing inconsistencies in device performance. Summary of the Invention

[0005] In view of this, in order to overcome the shortcomings of the prior art, the purpose of this invention is to provide a power switching device with a floating field plate, which can increase the reliability of the device under high voltage and simplify the process.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] A power switching device with a floating field plate includes a substrate, a stacked structure, a first dielectric layer, a second dielectric layer, and a third dielectric layer arranged sequentially from bottom to top. An active electrode, a drain electrode, and a gate structure are disposed on the side of the stacked structure away from the substrate. The stacked structure contains a two-dimensional electron gas. The gate structure includes a gate electrode and a first field plate. The power switching device further includes a floating field plate, a second field plate, a vertically extending region of the floating field plate above the floating field plate, and a vertically extending region of the second field plate above the second field plate. The floating field plate... Located in the second dielectric layer, the second field plate is located in the third dielectric layer, the floating field plate is located on the side of the second field plate away from the drain electrode, the top of the vertical extension region of the floating field plate and the top of the vertical extension region of the second field plate both pass through the top of the third dielectric layer, the floating field plate and the second field plate overlap in the horizontal plane, the vertical extension region of the floating field plate overlaps with the vertical extension region of the second field plate and the vertical projection region of the second field plate, and there is a gap between the vertical extension region of the floating field plate and the vertical extension region of the second field plate;

[0008] A first connection structure is provided between the vertical extension region of the second field plate and the gate structure to connect the second field plate to the gate electrode, or a second connection structure is provided between the vertical extension region of the second field plate and the source electrode to connect the second field plate to the source electrode; wherein, when the second field plate is connected to the gate electrode, the second field plate is equivalent to the gate field plate; when the second field plate is connected to the source electrode, the second field plate is equivalent to the source field plate.

[0009] By setting up a floating field plate, a vertical extension region of the floating field plate, a second field plate, and a vertical extension region of the second field plate, and using a first or second connection structure to connect the second field plate to the gate electrode or source electrode, a floating field plate is inserted between the source field plate and the two-dimensional electron gas below it, or between the gate field plate and the two-dimensional electron gas below it. The orthographic projections of the floating field plate and the second field plate on the horizontal plane overlap, and the floating field plate is located on the side of the second field plate away from the drain electrode. By adjusting the spacing and overlap area between the fixed potential field plate (second field plate) and the floating field plate, the potential below the floating field plate can be adjusted. When the device is turned off and subjected to high voltage, the floating field plate generates an additional electric field gradient, which helps to increase the reliability of the device under high voltage. In addition, since the floating field plate is implemented under the same photomask as other field plates, the device fabrication process can be effectively simplified.

[0010] According to some preferred embodiments of the present invention, the vertical extension region of the floating field plate is parallel to the vertical extension region of the second field plate, and the vertical extension region of the floating field plate is located between the vertical extension region of the second field plate and the gate structure.

[0011] According to some preferred embodiments of the present invention, let the bottom area of ​​the floating field plate be S1, let the overlapping area of ​​the orthographic projection of the floating field plate and the second field plate on the horizontal plane be S2, let the overlapping area of ​​the vertical extension area of ​​the floating field plate and the vertical extension area of ​​the second field plate and the orthographic projection of the second field plate on the vertical plane be S3, let the distance from the top surface of the first dielectric layer to the top surface of the two-dimensional electron gas be d1, let the thickness of the second dielectric layer be d2, and let the distance between the vertical extension area of ​​the floating field plate and the vertical extension area of ​​the second field plate be d3, then (S2×d3+S3×d2)>S1×d3.

[0012] According to some preferred embodiments of the present invention, the second field plate includes an independent portion and a coupling portion, the independent portion being located on the side of the floating field plate near the drain electrode and having a gap between the independent portion and the ends of the floating field plate that are close to each other, the coupling portion being located above the independent portion, and the bottom of the end of the coupling portion near the drain electrode being connected to the top of the end of the independent portion away from the drain electrode.

[0013] According to some preferred embodiments of the present invention, the independent part and the orthographic projection of the floating field plate on the horizontal plane do not overlap, the coupling part and the orthographic projection of the floating field plate on the horizontal plane partially overlap and the overlap area is S2, and S3 is the overlap area of ​​the orthographic projection of the vertical extension area of ​​the floating field plate, the vertical extension area of ​​the second field plate and the coupling part on the vertical plane.

[0014] According to some preferred embodiments of the present invention, in the horizontal direction, the side of the floating field plate near the gate structure is located between the side of the gate structure near the floating field plate and the end of the coupling portion away from the drain electrode.

[0015] In this invention, the design of the second field plate and the floating field plate, and their interaction, are equivalent to forming a structure of two capacitors connected in series. The lower capacitor is formed by the floating field plate and the two-dimensional electron gas directly below it, while the upper capacitor is formed by the coupling portion (the overlapping portion of the floating field plate's orthographic projection on the horizontal plane) between the floating field plate and the second field plate above it. Furthermore, a capacitor is also formed between the vertical extension region of the floating field plate and the vertical extension region of the second field plate, which increases the capacitance of the upper capacitor formed between the floating field plate and the coupling portion above it.

[0016] Specifically, in some embodiments of the present invention, let the non-overlapping area of ​​the independent portion of the second field plate and the orthographic projection of the floating field plate on the horizontal plane be S4, let the potential of the floating field plate at high voltage equilibrium be V1, let the potential of the second field plate at high voltage equilibrium be V2, let the potential of the two-dimensional electron gas below the floating field plate at high voltage equilibrium be V3, and let the potential of the two-dimensional electron gas below the second field plate at high voltage equilibrium be V4. Then the potential equilibrium formula of the floating field plate is: V3-V1=Q1 / C1=(n×q×S1) / (ε×ε0×S1 / d1)=n×q×d1 / (ε×ε0), and the potential equilibrium formula of the second field plate is: V4-V2=Q2 / C2=(n×q×S4) / [ε×ε0×S4 / (d1+d2)]=n×q×( d1+d2) / (ε×ε0), where Q1 is the amount of charge stored in the capacitor formed by the floating field plate and the two-dimensional electron gas directly below it, C1 is the capacitance formed by the floating field plate and the two-dimensional electron gas below it, Q2 is the amount of charge stored in the capacitor formed by the independent part of the second field plate and the two-dimensional electron gas directly below it, C2 is the capacitance formed by the independent part of the second field plate and the two-dimensional electron gas directly below it, n is the number of free electrons per unit volume, q is the charge of a single electron, ε0 is the vacuum permittivity, and ε is the relative permittivity of the medium used in the first dielectric layer. In this invention, to simplify the calculation process, the relative permittivity of the medium used in the first dielectric layer is made equal to the relative permittivity of the medium used in the second dielectric layer, and both are represented by ε.

[0017] Further, the voltage divider formula for the upper and lower capacitors formed by the floating field plate is derived as: (V1-V2) / (V3-V1)=C1 / C3=(S1×d2×d3) / [(S2×d3+S3×d2)×d1], where C3 is the capacitance formed between the coupling part of the floating field plate and the second field plate, and between the vertical extension region of the floating field plate and the vertical extension region and coupling part of the second field plate. From this, the potential of the floating field plate at high voltage equilibrium can be derived as V1=V2+n×q / (ε×ε0)×(S1×d2×d3) / The potential V3 of the two-dimensional electron gas below the floating field plate at high-pressure equilibrium is V2 + n × q / (ε × ε0) × [(S1 × d2 × d3) / (S2 × d3 + S3 × d2) + d1]. The potential V4 of the two-dimensional electron gas below the second field plate at high-pressure equilibrium is V2 + n × q / (ε × ε0) × (d1 + d2). Therefore, it can be seen that the potential below the floating field plate can be adjusted by controlling S1, S2, and S3 and / or d1, d2, and d3. Furthermore, since V4 > V3 is required, (S2 × d3 + S3 × d2) is designed to be > S1 × d3, and the value of S1 × d3 / (S2 × d3 + S3 × d2) is 10% to 90%, preferably 40% to 50%.

[0018] According to some preferred embodiments of the present invention, the bottom surface of the floating field plate is attached to the top surface of the first dielectric layer, the bottom surface of the second field plate is attached to the top surface of the second dielectric layer, the vertical extension region of the floating field plate is located on the side of the floating field plate near the gate structure and the bottom surface of the vertical extension region of the floating field plate is connected to the top surface of the floating field plate, and the vertical extension region of the second field plate is located at the end of the coupling portion away from the drain electrode and the bottom surface of the vertical extension region of the second field plate is connected to the top surface of the coupling portion.

[0019] According to some preferred embodiments of the present invention, the first field plate is located on the side of the gate electrode near the drain electrode, the first field plate and the floating field plate have the same thickness and are located on the same plane.

[0020] According to some preferred embodiments of the present invention, the first connection structure includes a first vertical connection portion and a first horizontal connection portion that are perpendicular to each other. The first vertical connection portion is parallel to the vertical extension region of the second field plate and extends through the thickness direction of the second dielectric layer and the third dielectric layer. The first horizontal connection portion is located on the side of the third dielectric layer away from the second dielectric layer and the bottom surface of the first horizontal connection portion is in contact with the top surface of the third dielectric layer.

[0021] According to some preferred embodiments of the present invention, the bottom surface of the first vertical connecting portion is connected to the top surface of the gate electrode, the top end of the first vertical connecting portion is connected to the end of the first horizontal connecting portion away from the vertical extension region of the second field plate, and the end of the first horizontal connecting portion away from the first vertical connecting portion is connected to the top end of the vertical extension region of the second field plate.

[0022] According to some preferred embodiments of the present invention, the second connection structure includes a second vertical connection portion and a second horizontal connection portion that are perpendicular to each other. The second vertical connection portion is parallel to the vertical extension region of the second field plate and extends through the thickness direction of the second dielectric layer and the third dielectric layer. The second horizontal connection portion is located on the side of the third dielectric layer away from the second dielectric layer and the bottom surface of the second horizontal connection portion is in contact with the top surface of the third dielectric layer.

[0023] According to some preferred embodiments of the present invention, the bottom surface of the second vertical connection portion is connected to the top surface of the source electrode, the top surface of the second vertical connection portion is connected to the end of the second horizontal connection portion away from the vertical extension region of the second field plate, and the end of the second horizontal connection portion away from the second vertical connection portion is connected to the top surface of the vertical extension region of the second field plate.

[0024] In some embodiments of the present invention, the first connection structure and the second connection structure are both made of metal. The first connection structure enables the gate electrode to be short-circuited with the second field plate, making the second field plate equivalent to the gate field plate. The second connection structure enables the source electrode to be short-circuited with the second field plate, making the second field plate equivalent to the source field plate.

[0025] Compared to existing technologies, the advantages of this invention, based on the above technical solutions, are as follows: In this power switching device with a floating field plate, a floating field plate is inserted between the source field plate and the two-dimensional electron gas below it, or between the gate field plate and the two-dimensional electron gas below it. By adjusting the spacing and overlap area between the second field plate and the floating field plate, the potential below the floating field plate can be adjusted. This allows the floating field plate to generate an additional electric field gradient when the device is turned off and subjected to high voltage, which helps increase the reliability of the device under high voltage. Furthermore, since the floating field plate is implemented under the same photomask as other field plates, the device fabrication process can be effectively simplified. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a top view of the power switching device in Embodiment 1 of the present invention;

[0028] Figure 2 for Figure 1 A cross-sectional view of the structure along the direction of the dashed line A;

[0029] Figure 3 for Figure 1 A cross-sectional view of the structure along the direction of dashed line B;

[0030] Figure 4 This is a top view of the power switching device in Embodiment 2 of the present invention;

[0031] Figure 5 for Figure 4 A cross-sectional view of the structure along the direction of dashed line C;

[0032] Figure 6 for Figure 4 A cross-sectional view of the structure along the direction of the dashed line D;

[0033] The attached figures are labeled as follows:

[0034] Substrate-1, nucleation layer-21, buffer layer-22, channel layer-23, barrier layer-24, capping layer-25, first dielectric layer-3, second dielectric layer-4, third dielectric layer-5, source electrode-6, drain electrode-7, gate structure-8, gate electrode-81, first field plate-82, floating field plate-9, second field plate-10, independent part-101, coupling part-102, vertical extension region of floating field plate-11, vertical extension region of second field plate-12, first connection structure-13, first vertical connection part-131, first horizontal connection part-132, second connection structure-14, second vertical connection part-141, second horizontal connection part-142. Detailed Implementation

[0035] To enable those skilled in the art to better understand the technical solutions of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0036] Example 1: This example provides a power switching device, such as... Figures 1 to 3 As shown, the structure includes a source electrode 6, a drain electrode 7, a gate structure 8, a floating field plate 9, a second field plate 10, a vertical extension region 11 of the floating field plate above the floating field plate 9, a vertical extension region 12 of the second field plate above the second field plate 10, and a substrate 1, a stacked structure, a first dielectric layer 3, a second dielectric layer 4, and a third dielectric layer 5 arranged sequentially from bottom to top. The source electrode 6, the drain electrode 7, and the gate structure 8 are located on the side of the stacked structure away from the substrate 1, and the second dielectric layer 4 covers the source electrode 6, the drain electrode 7, and the gate structure 8.

[0037] Specifically, the stacked structure includes a nucleation layer 21, a buffer layer 22, a channel layer 23, a barrier layer 24, and a capping layer 25 arranged sequentially from bottom to top. The heterojunction interface between the channel layer 23 and the barrier layer 24 has a two-dimensional electron gas. The source electrode 6 and the drain electrode 7 are both located in the barrier layer 24, the capping layer 25, the first dielectric layer 3, and the second dielectric layer 4. The gate structure 8 includes a gate electrode 81 and a first field plate 82. The first field plate 82 is located on the side of the gate electrode 81 near the drain electrode 7. The gate electrode 81 is located in the first dielectric layer 3 and the second dielectric layer 4. The first field plate 82 is located in the second dielectric layer 4. The floating field plate 9 is located in the second dielectric layer 4. The second field plate 10 is located in the third dielectric layer 5. The first field plate 82 and the floating field plate 9 have the same thickness and are located on the same plane.

[0038] Furthermore, such as Figure 2As shown, the floating field plate 9 is located on the side of the second field plate 10 away from the drain electrode 7. The second field plate 10 includes an independent portion 101 and a coupling portion 102. The independent portion 101 is located on the side of the floating field plate 9 near the drain electrode 7, and there is a gap between the ends of the independent portion 101 and the floating field plate 9 that are close to each other. The coupling portion 102 is located above the independent portion 101, and the bottom of the end of the coupling portion 102 near the drain electrode 7 is connected to the top of the end of the independent portion 101 away from the drain electrode 7. In the horizontal direction, the side of the floating field plate 9 near the gate structure 8 is located between the side of the gate structure 8 near the floating field plate 9 and the end of the coupling portion 102 away from the drain electrode 7. The orthographic projections of the independent portion 101 and the floating field plate 9 on the horizontal plane do not overlap, while the orthographic projections of the coupling portion 102 and the floating field plate 9 on the horizontal plane partially overlap.

[0039] The bottom surface of the floating field plate 9 is attached to the top surface of the first dielectric layer 3, and the bottom surface of the second field plate 10 is attached to the top surface of the second dielectric layer 4. The vertical extension region 11 of the floating field plate is located on the side of the floating field plate 9 close to the gate structure 8, and the bottom surface of the vertical extension region 11 of the floating field plate is connected to the top surface of the floating field plate 9. The vertical extension region 12 of the second field plate is located at the end of the coupling portion 102 away from the drain electrode 7, and the bottom surface of the vertical extension region 12 of the second field plate is connected to the top surface of the coupling portion 102. The top of the vertical extension region 11 of the floating field plate and the top of the vertical extension region 12 of the second field plate both pass through the top of the third dielectric layer 5. The vertical extension region 11 of the floating field plate is parallel to the vertical extension region 12 of the second field plate. The vertical extension region 11 of the floating field plate is located between the vertical extension region 12 of the second field plate and the gate structure 8. There is a gap between the vertical extension region 11 of the floating field plate and the vertical extension region 12 of the second field plate. The vertical projections of the vertical extension region 11 of the floating field plate, the vertical extension region 12 of the second field plate, and the coupling portion 102 on the vertical plane overlap.

[0040] Furthermore, let the bottom area of ​​the floating field plate 9 be S1, the overlapping area of ​​the orthographic projection of the floating field plate 9 and the coupling part 102 on the horizontal plane be S2, the overlapping area of ​​the orthographic projection of the vertical extension area 11 of the floating field plate, the vertical extension area 12 of the second field plate, and the coupling part 102 on the vertical plane be S3, the distance from the top surface of the first dielectric layer 3 to the top surface of the two-dimensional electron gas be d1, the thickness of the second dielectric layer 4 be d2, and the spacing between the vertical extension area 11 of the floating field plate and the vertical extension area 12 of the second field plate be d3. In this embodiment, since the potential of the two-dimensional electrons below the second field plate 10 at high voltage equilibrium is greater than the potential of the two-dimensional electrons below the floating field plate 9 at high voltage equilibrium, (S2×d3+S3×d2)>S1×d3, and the value of S1×d3 / (S2×d3+S3×d2) is preferably 40%~50%.

[0041] Furthermore, such as Figure 3As shown, in this embodiment, a first connection structure 13 is provided between the vertical extension region 12 of the second field plate and the gate structure 8. The first connection structure 13 includes a first vertical connection portion 131 and a first horizontal connection portion 132 that are perpendicular to each other. The first vertical connection portion 131 is parallel to the vertical extension region 12 of the second field plate and penetrates through the thickness direction of the second dielectric layer 4 and the third dielectric layer 5. The first horizontal connection portion 132 is located on the side of the third dielectric layer 5 away from the second dielectric layer 4, and the bottom surface of the first horizontal connection portion 132 is in contact with the top surface of the third dielectric layer 5. The bottom surface of the first vertical connection portion 131 is connected to the top surface of the gate electrode 81, the top surface of the first vertical connection portion 131 is connected to the end of the first horizontal connection portion 132 away from the vertical extension region 12 of the second field plate, and the end of the first horizontal connection portion 132 away from the first vertical connection portion 131 is connected to the top surface of the vertical extension region 12 of the second field plate. The first connection structure 13 is used to connect the second field plate 10 to the gate electrode 81, so that the second field plate 10 is equivalent to the gate field plate, and thus the floating field plate 9 in this embodiment is equivalent to being inserted between the gate field plate and the two-dimensional electron gas below it. When the device is turned off and subjected to high voltage, the floating field plate 9 generates an additional electric field gradient, which is beneficial to increasing the reliability of the device under high voltage.

[0042] In this embodiment, by setting a floating field plate 9 between the gate field plate and the two-dimensional electron gas, the potential below the floating field plate 9 can be adjusted by reasonably controlling the overlapping area of ​​the orthographic projection of the floating field plate 9 and the coupling part 102 in the upper second field plate 10 on the horizontal plane, the overlapping area of ​​the floating field plate 9 and the two-dimensional electron gas below (equivalent to the bottom area of ​​the floating field plate 9 itself), the overlapping area of ​​the orthographic projection of the vertical extension area 11 of the floating field plate, the vertical extension area 12 of the second field plate, and the coupling part 102 on the vertical plane, the distance from the top surface of the first dielectric layer 3 to the top surface of the two-dimensional electron gas, the thickness of the second dielectric layer 4, and the spacing between the vertical extension area 11 of the floating field plate and the vertical extension area 12 of the second field plate.

[0043] This embodiment also provides a method for fabricating the above-mentioned power switching device, which specifically includes the following steps:

[0044] Step 1: Nitride epitaxial growth is performed on substrate 1, sequentially forming a nucleation layer 21, a buffer layer 22, a channel layer 23, a barrier layer 24, and a capping layer 25. The materials include Group III nitride materials such as GaN, AlGaN, AlN, AlGaNInN, and SiN. The nucleation layer 21, buffer layer 22, channel layer 23, barrier layer 24, and capping layer 25 form a stacked structure, thereby constituting a complete semiconductor epitaxial layer structure. A high concentration of two-dimensional electron gas can be formed at the heterojunction interface between the channel layer 23 and the barrier layer 24, generating a conductive channel. Substrate 1 is one or a combination of silicon, gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, gallium arsenide, silicon carbide, diamond, sapphire, germanium, or any other material capable of growing Group III nitride materials.

[0045] Step 2: Deposit one or more combinations of SiN, SiO2, SiON, and Al2O3 above the capping layer 25 to form the first dielectric layer 3, and etch source electrode vias and drain electrode vias through the first dielectric layer 3, the capping layer 25, and the barrier layer 24 respectively; and photolithography is used to etch gate trenches through the first dielectric layer 3 again.

[0046] Step 3: Fill the source electrode via and the drain electrode via with metal to form source electrode 6 and drain electrode 7 respectively, and perform annealing treatment so that source electrode 6 and drain electrode 7 form ohmic contact with the epitaxial material below them respectively.

[0047] Step 4: Fill metal above the first dielectric layer 3 and etch to form the gate structure 8 and the floating field plate 9. Since the depth of the gate trench etching is shallow, the gate structure 8 will not form an ohmic contact with the epitaxial material below. The gate structure 8 is divided into the gate electrode 81 inside the gate trench and the first field plate 82 outside the gate trench near the drain electrode 7.

[0048] Step 5: Deposit one or more combinations of SiN, SiO2, SiON, and Al2O3 above the gate structure 8 and the floating field plate 9 to form the second dielectric layer 4.

[0049] Step 6: Fill metal above the second dielectric layer 4 and etch to form a second field plate 10. The second field plate 10 includes an independent portion 101 and a coupling portion 102 (longitudinal capacitive coupling region). The coupling portion 102 is located above the independent portion 101. The independent portion 101 is the part that is close to the drain electrode 7 and does not overlap with the orthographic projection of the floating field plate 9 on the horizontal plane. The coupling portion 102 overlaps with the orthographic projection of the floating field plate 9 on the horizontal plane.

[0050] Step 7: Deposit one or more combinations of SiN, SiO2, SiON, and Al2O3 above the second field plate 10 to form a third dielectric layer 5. Then, etch a first via, a first through-hole, and a second through-hole downward from the top surface of the third dielectric layer 5, corresponding to the gate electrode 81, the side of the floating field plate 9 near the gate structure 8, and the side of the coupling portion 102 near the gate structure 8. The first via and the first through-hole both penetrate the second dielectric layer 4 and the third dielectric layer 5, and the second through-hole penetrates the third dielectric layer 5.

[0051] Step 8: Fill the area above the third dielectric layer 5 and the first through hole, the first through slot and the second through slot with metal and etch to form the first connection structure 13, the vertical extension area 11 of the floating field plate and the vertical extension area 12 of the second field plate. The second field plate 10 and the gate electrode 81 are electrically connected through the vertical extension area 12 of the second field plate and the first connection structure 13, so that the second field plate 10 is equivalent to the gate field plate, and the power switching device with the floating field plate 9 in this embodiment is obtained. In this embodiment, the floating field plate 9 is equivalent to being inserted between the gate field plate and the two-dimensional electron gas.

[0052] Example 2: The power switching device in this example includes, for example, Figures 4 to 6 As shown, the structure includes a source electrode 6, a drain electrode 7, a gate structure 8, a floating field plate 9, a second field plate 10, a vertical extension region 11 of the floating field plate above the floating field plate 9, a vertical extension region 12 of the second field plate above the second field plate 10, and a substrate 1, a stacked structure, a first dielectric layer 3, a second dielectric layer 4, and a third dielectric layer 5 arranged sequentially from bottom to top. The source electrode 6, the drain electrode 7, and the gate structure 8 are located on the side of the stacked structure away from the substrate 1, and the second dielectric layer 4 covers the source electrode 6, the drain electrode 7, and the gate structure 8.

[0053] Specifically, the stacked structure includes a nucleation layer 21, a buffer layer 22, a channel layer 23, a barrier layer 24, and a capping layer 25 arranged sequentially from bottom to top. The heterojunction interface between the channel layer 23 and the barrier layer 24 has a two-dimensional electron gas. The source electrode 6 and the drain electrode 7 are both located in the barrier layer 24, the capping layer 25, the first dielectric layer 3, and the second dielectric layer 4. The gate structure 8 includes a gate electrode 81 and a first field plate 82. The first field plate 82 is located on the side of the gate electrode 81 near the drain electrode 7. The gate electrode 81 is located in the first dielectric layer 3 and the second dielectric layer 4. The first field plate 82 is located in the second dielectric layer 4. The floating field plate 9 is located in the second dielectric layer 4. The second field plate 10 is located in the third dielectric layer 5. The first field plate 82 and the floating field plate 9 have the same thickness and are located on the same plane.

[0054] Furthermore, such as Figure 5As shown, the floating field plate 9 is located on the side of the second field plate 10 away from the drain electrode 7. The second field plate 10 includes an independent portion 101 and a coupling portion 102. The independent portion 101 is located on the side of the floating field plate 9 near the drain electrode 7, and there is a gap between the ends of the independent portion 101 and the floating field plate 9 that are close to each other. The coupling portion 102 is located above the independent portion 101, and the bottom of the end of the coupling portion 102 near the drain electrode 7 is connected to the top of the end of the independent portion 101 away from the drain electrode 7. In the horizontal direction, the side of the floating field plate 9 near the gate structure 8 is located between the side of the gate structure 8 near the floating field plate 9 and the end of the coupling portion 102 away from the drain electrode 7. The orthographic projections of the independent portion 101 and the floating field plate 9 on the horizontal plane do not overlap, while the orthographic projections of the coupling portion 102 and the floating field plate 9 on the horizontal plane partially overlap.

[0055] The bottom surface of the floating field plate 9 is attached to the top surface of the first dielectric layer 3, and the bottom surface of the second field plate 10 is attached to the top surface of the second dielectric layer 4. The vertical extension region 11 of the floating field plate is located on the side of the floating field plate 9 close to the gate structure 8, and the bottom surface of the vertical extension region 11 of the floating field plate is connected to the top surface of the floating field plate 9. The vertical extension region 12 of the second field plate is located at the end of the coupling portion 102 away from the drain electrode 7, and the bottom surface of the vertical extension region 12 of the second field plate is connected to the top surface of the coupling portion 102. The top of the vertical extension region 11 of the floating field plate and the top of the vertical extension region 12 of the second field plate both pass through the top of the third dielectric layer 5. The vertical extension region 11 of the floating field plate is parallel to the vertical extension region 12 of the second field plate. The vertical extension region 11 of the floating field plate is located between the vertical extension region 12 of the second field plate and the gate structure 8. There is a gap between the vertical extension region 11 of the floating field plate and the vertical extension region 12 of the second field plate. The vertical projections of the vertical extension region 11 of the floating field plate, the vertical extension region 12 of the second field plate, and the coupling portion 102 on the vertical plane overlap.

[0056] Furthermore, let the bottom area of ​​the floating field plate 9 be S1, the overlapping area of ​​the orthographic projection of the floating field plate 9 and the coupling part 102 on the horizontal plane be S2, the overlapping area of ​​the orthographic projection of the vertical extension area 11 of the floating field plate, the vertical extension area 12 of the second field plate, and the coupling part 102 on the vertical plane be S3, the distance from the top surface of the first dielectric layer 3 to the top surface of the two-dimensional electron gas be d1, the thickness of the second dielectric layer 4 be d2, and the spacing between the vertical extension area 11 of the floating field plate and the vertical extension area 12 of the second field plate be d3. In this embodiment, since the potential of the two-dimensional electrons below the second field plate 10 at high voltage equilibrium is greater than the potential of the two-dimensional electrons below the floating field plate 9 at high voltage equilibrium, (S2×d3+S3×d2)>S1×d3, and the value of S1×d3 / (S2×d3+S3×d2) is preferably 40%~50%.

[0057] Furthermore, such as Figure 6As shown, in this embodiment, a second connection structure 14 is provided between the second field plate vertical extension region 12 and the source electrode 6. The second connection structure 14 includes a second vertical connection portion 141 and a second horizontal connection portion 142 that are perpendicular to each other. The second vertical connection portion 141 is parallel to the second field plate vertical extension region 12 and penetrates through the thickness direction of the second dielectric layer 4 and the third dielectric layer 5. The second horizontal connection portion 142 is located on the side of the third dielectric layer 5 away from the second dielectric layer 4, and the bottom surface of the second horizontal connection portion 142 is in contact with the top surface of the third dielectric layer 5. The bottom surface of the second vertical connection portion 141 is connected to the top surface of the source electrode 6, the top surface of the second vertical connection portion 141 is connected to the end of the second horizontal connection portion 142 away from the second field plate vertical extension region 12, and the end of the second horizontal connection portion 142 away from the second vertical connection portion 141 is connected to the top surface of the second field plate vertical extension region 12. The second connection structure 14 is used to connect the second field plate 10 to the source electrode 6, so that the second field plate 10 is equivalent to the source field plate, and thus the floating field plate 9 in this embodiment is equivalent to being inserted between the source field plate and the two-dimensional electron gas below it. When the device is turned off and subjected to high voltage, the floating field plate 9 generates an additional electric field gradient, which is beneficial to increasing the reliability of the device under high voltage.

[0058] In this embodiment, by setting a floating field plate 9 between the source field plate and the two-dimensional electron gas, the potential below the floating field plate 9 can be adjusted by reasonably controlling the overlapping area of ​​the orthographic projection of the floating field plate 9 and the coupling part 102 in the upper second field plate 10 on the horizontal plane, the overlapping area of ​​the floating field plate 9 and the two-dimensional electron gas below (equivalent to the bottom area of ​​the floating field plate 9 itself), the overlapping area of ​​the orthographic projection of the vertical extension area 11 of the floating field plate, the vertical extension area 12 of the second field plate, and the coupling part 102 on the vertical plane, the distance from the top surface of the first dielectric layer 3 to the top surface of the two-dimensional electron gas, the thickness of the second dielectric layer 4, and the spacing between the vertical extension area 11 of the floating field plate and the vertical extension area 12 of the second field plate.

[0059] This embodiment also provides a method for fabricating the above-mentioned power switching device, which specifically includes the following steps:

[0060] Step 1: Nitride epitaxial growth is performed on substrate 1, sequentially forming a nucleation layer 21, a buffer layer 22, a channel layer 23, a barrier layer 24, and a capping layer 25. The materials include Group III nitride materials such as GaN, AlGaN, AlN, AlGaNInN, and SiN. The nucleation layer 21, buffer layer 22, channel layer 23, barrier layer 24, and capping layer 25 form a stacked structure, thereby constituting a complete semiconductor epitaxial layer structure. A high concentration of two-dimensional electron gas can be formed at the heterojunction interface between the channel layer 23 and the barrier layer 24, generating a conductive channel. Substrate 1 is one or a combination of silicon, gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, gallium arsenide, silicon carbide, diamond, sapphire, germanium, or any other material capable of growing Group III nitride materials.

[0061] Step 2: Deposit one or more combinations of SiN, SiO2, SiON, and Al2O3 above the capping layer 25 to form the first dielectric layer 3, and etch source electrode vias and drain electrode vias through the first dielectric layer 3, the capping layer 25, and the barrier layer 24 respectively; and photolithography is used to etch gate trenches through the first dielectric layer 3 again.

[0062] Step 3: Fill the source electrode via and the drain electrode via with metal to form source electrode 6 and drain electrode 7 respectively, and perform annealing treatment so that source electrode 6 and drain electrode 7 form ohmic contact with the epitaxial material below them respectively.

[0063] Step 4: Fill metal above the first dielectric layer 3 and etch to form the gate structure 8 and the floating field plate 9. Since the depth of the gate trench etching is shallow, the gate structure 8 will not form an ohmic contact with the epitaxial material below. The gate structure 8 is divided into the gate electrode 81 inside the gate trench and the first field plate 82 outside the gate trench near the drain electrode 7.

[0064] Step 5: Deposit one or more combinations of SiN, SiO2, SiON, and Al2O3 above the gate structure 8 and the floating field plate 9 to form the second dielectric layer 4.

[0065] Step 6: Fill metal above the second dielectric layer 4 and etch to form a second field plate 10. The second field plate 10 includes an independent portion 101 and a coupling portion 102 (longitudinal capacitive coupling region). The coupling portion 102 is located above the independent portion 101. The independent portion 101 is the part that is close to the drain electrode 7 and does not overlap with the orthographic projection of the floating field plate 9 on the horizontal plane. The coupling portion 102 overlaps with the orthographic projection of the floating field plate 9 on the horizontal plane.

[0066] Step 7: Deposit one or more combinations of SiN, SiO2, SiON, and Al2O3 above the second field plate 10 to form a third dielectric layer 5. Then, etch a second via, a first through-hole, and a second through-hole from the top surface of the third dielectric layer 5, corresponding to the source electrode 6, the side of the floating field plate 9 near the gate structure 8, and the side of the coupling portion 102 near the gate structure 8. The second via and the first through-hole both penetrate the second dielectric layer 4 and the third dielectric layer 5, and the second through-hole penetrates the third dielectric layer 5.

[0067] Step 8: Fill the third dielectric layer 5 and the second through hole, the first through slot and the second through slot with metal and etch to form the second connection structure 14, the vertical extension region 11 of the floating field plate and the vertical extension region 12 of the second field plate. The second field plate 10 and the source electrode 6 are electrically connected through the vertical extension region 12 of the second field plate and the second connection structure 14, so that the second field plate 10 is equivalent to the source field plate, and the power switching device with the floating field plate 9 in this embodiment is obtained. In this embodiment, the floating field plate 9 is equivalent to being inserted between the source field plate and the two-dimensional electron gas.

[0068] In the power switching device of the present invention, a floating field plate 9 is inserted between the source field plate or the gate field plate and the two-dimensional electron gas. By adjusting the spacing and overlap area between the second field plate 10 and the floating field plate 9, the potential below the floating field plate 9 can be adjusted, so that when the device is turned off and subjected to high voltage, the floating field plate 9 will generate an additional electric field gradient, which is beneficial to increasing the reliability of the device under high voltage. In addition, as can be seen from the preparation methods in the above embodiments 1 and 2, the floating field plate 9 is obtained under the same photomask as other field plates, which is beneficial to simplifying the device preparation process.

[0069] The above embodiments of the present invention are only for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A power switching device with a floating field plate, comprising a substrate, a stacked structure, a first dielectric layer, a second dielectric layer, and a third dielectric layer arranged sequentially from bottom to top, wherein an active electrode, a drain electrode, and a gate structure are disposed on the side of the stacked structure away from the substrate, the stacked structure having a two-dimensional electron gas, and the gate structure comprising a gate electrode and a first field plate, characterized in that, The power switching device further includes a floating field plate, a second field plate, a vertical extension region of the floating field plate located above the floating field plate, and a vertical extension region of the second field plate located above the second field plate. The floating field plate is located in a second dielectric layer, and the second field plate is located in a third dielectric layer. The floating field plate is located on the side of the second field plate away from the drain electrode. The top of the vertical extension region of the floating field plate and the top of the vertical extension region of the second field plate both pass through the top of the third dielectric layer. The orthographic projection of the floating field plate and the second field plate on the horizontal plane overlaps. The vertical extension region of the floating field plate overlaps with the vertical extension region of the second field plate and the orthographic projection of the second field plate on the vertical plane. There is a gap between the vertical extension region of the floating field plate and the vertical extension region of the second field plate. A first connection structure is provided between the vertical extension region of the second field plate and the gate structure to connect the second field plate to the gate electrode, or a second connection structure is provided between the vertical extension region of the second field plate and the source electrode to connect the second field plate to the source electrode.

2. The power switching device with a floating field plate according to claim 1, characterized in that, The vertical extension region of the floating field plate is parallel to the vertical extension region of the second field plate, and the vertical extension region of the floating field plate is located between the vertical extension region of the second field plate and the gate structure.

3. The power switching device with a floating field plate according to claim 2, characterized in that, Let the bottom area of ​​the floating field plate be S1, the overlapping area of ​​the orthographic projection of the floating field plate and the second field plate on the horizontal plane be S2, the overlapping area of ​​the vertical extension area of ​​the floating field plate, the vertical extension area of ​​the second field plate, and the orthographic projection of the second field plate on the vertical plane be S3, the distance from the top surface of the first dielectric layer to the top surface of the two-dimensional electron gas be d1, the thickness of the second dielectric layer be d2, and the distance between the vertical extension area of ​​the floating field plate and the vertical extension area of ​​the second field plate be d3. Then (S2×d3+S3×d2)>S1×d3.

4. The power switching device with a floating field plate according to claim 3, characterized in that, The second field plate includes an independent part and a coupling part. The independent part is located on the side of the floating field plate near the drain electrode and there is a gap between the ends of the independent part and the floating field plate that are close to each other. The coupling part is located above the independent part, and the bottom of the end of the coupling part near the drain electrode is connected to the top of the end of the independent part away from the drain electrode.

5. The power switching device with a floating field plate according to claim 4, characterized in that, The independent part and the orthographic projection of the floating field plate on the horizontal plane do not overlap. The coupling part and the orthographic projection of the floating field plate on the horizontal plane partially overlap, and the overlapping area is S2. S3 is the overlapping area of ​​the orthographic projection of the vertical extension area of ​​the floating field plate, the vertical extension area of ​​the second field plate, and the coupling part on the vertical plane.

6. The power switching device with a floating field plate according to claim 5, characterized in that, Along the horizontal direction, the side of the floating field plate near the gate structure is located between the side of the gate structure near the floating field plate and the end of the coupling portion away from the drain electrode.

7. The power switching device with a floating field plate according to claim 5, characterized in that, The bottom surface of the floating field plate is attached to the top surface of the first dielectric layer, and the bottom surface of the second field plate is attached to the top surface of the second dielectric layer. The vertical extension region of the floating field plate is located on the side of the floating field plate close to the gate structure and the bottom surface of the vertical extension region of the floating field plate is connected to the top surface of the floating field plate. The vertical extension region of the second field plate is located at the end of the coupling portion away from the drain electrode and the bottom surface of the vertical extension region of the second field plate is connected to the top surface of the coupling portion.

8. The power switching device with a floating field plate according to claim 1, characterized in that, The first field plate is located on the side of the gate electrode closer to the drain electrode. The first field plate and the floating field plate have the same thickness and are located on the same plane.

9. The power switching device with a floating field plate according to claim 1, characterized in that, The first connection structure includes a first vertical connection portion and a first horizontal connection portion that are perpendicular to each other. The first vertical connection portion is parallel to the vertical extension region of the second field plate and extends through the thickness direction of the second dielectric layer and the third dielectric layer. The first horizontal connection portion is located on the side of the third dielectric layer away from the second dielectric layer and the bottom surface of the first horizontal connection portion is in contact with the top surface of the third dielectric layer.

10. The power switching device with a floating field plate according to claim 9, characterized in that, The bottom surface of the first vertical connection portion is connected to the top surface of the gate electrode, the top surface of the first vertical connection portion is connected to the end of the first horizontal connection portion away from the vertical extension area of ​​the second field plate, and the end of the first horizontal connection portion away from the first vertical connection portion is connected to the top surface of the vertical extension area of ​​the second field plate.

11. The power switching device with a floating field plate according to claim 1, characterized in that, The second connection structure includes a second vertical connection portion and a second horizontal connection portion that are perpendicular to each other. The second vertical connection portion is parallel to the vertical extension area of ​​the second field plate and extends through the thickness direction of the second dielectric layer and the third dielectric layer. The second horizontal connection portion is located on the side of the third dielectric layer away from the second dielectric layer and the bottom surface of the second horizontal connection portion is in contact with the top surface of the third dielectric layer.

12. The power switching device with a floating field plate according to claim 11, characterized in that, The bottom surface of the second vertical connection portion is connected to the top surface of the source electrode, the top surface of the second vertical connection portion is connected to the end of the second horizontal connection portion away from the vertical extension region of the second field plate, and the end of the second horizontal connection portion away from the second vertical connection portion is connected to the top surface of the vertical extension region of the second field plate.

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