Grid line preparation method, photovoltaic cell preparation method and photovoltaic cell

Abstract

The invention provides a grid line preparation method, a photovoltaic cell preparation method and a photovoltaic cell, and the grid line preparation method comprises the steps: printing seed grid lines on a to-be-manufactured piece of the grid line, the seed grid lines being discontinuous point-shaped grid lines, and the to-be-manufactured piece of the grid line being a semi-finished product of the photovoltaic cell before the preparation of the grid lines; carrying out light enhancement contact optimization process treatment on the seed grid lines; filling grid lines are printed, the filling grid lines are linear grid lines, and the filling grid lines cover the seed grid lines and cover interval sections between the seed grid lines; and performing light enhancement contact optimization process treatment on the filling grid lines, so that the filling grid lines and the seed grid lines are combined to form fine grid lines. By optimizing the preparation mode of the grid lines, especially the fine grid lines, the efficiency of the photovoltaic cell is improved, the grid lines can be prepared by adopting the non-silver paste, and the production / preparation input cost of the cell is reduced.

Description

Technical Field

[0001] The present invention mainly relates to the technical field of photovoltaic cells, and in particular to a grid line preparation method, a photovoltaic cell preparation method and a photovoltaic cell. Background Art

[0002] A photovoltaic cell (or solar cell) is a component that converts solar energy into electrical energy. When sunlight strikes the semiconductor material on the cell's surface, it absorbs the energy of the photons, allowing the electrons in the semiconductor atoms to gain enough energy to be released from their covalent bonds, forming free electrons. These free electrons then separate under the action of the electric field at the PN junction, generating a current that drives the load.

[0003] The application of solar energy is one of the most effective ways to address energy and environmental challenges. The development of photovoltaic cells aims to achieve high conversion efficiency, low cost, and easy industrialization of high-efficiency cell technologies. In recent years, a continuous stream of high-efficiency cell technologies has emerged, from the mass production of BSF (Aluminum Back Surface Field) cells, the success of PREC (Passivated Emitter and Rear Cell) cells, and the rapid rise of TOPCon (Tunnel Oxide Passivated Contact) cells. Once the basic process route is established, optimizing the process, reducing manufacturing costs, and increasing conversion efficiency are key to achieving high performance in photovoltaic cells.

[0004] Silver is commonly used for the grid lines (or electrodes) of photovoltaic cells. While silver has advantages such as high conductivity, it also has some drawbacks. For example, the relatively high price of silver leads to higher costs for photovoltaic cells using silver as grid lines. Silver paste costs account for a significant portion of the total cost of photovoltaic cells, particularly in TOPCon cells, where the proportion of silver paste can reach approximately 15.8%. Silver is also a rare metal with limited resources. For the large-scale photovoltaic industry, over-reliance on silver as a primary material may pose supply risks. Furthermore, silver is difficult to shape, making it difficult to meet increasingly stringent grid line aspect ratio and resistivity requirements. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a grid line preparation method, a photovoltaic cell preparation method and a photovoltaic cell, which can improve the conversion efficiency of the photovoltaic cell and reduce the production / preparation input cost by optimizing the grid line preparation method.

[0006] In order to solve the above technical problems, in the first aspect, the present invention provides a method for preparing grid lines, comprising: printing seed grid lines on a grid line workpiece, wherein the seed grid lines are discontinuous dot-shaped grid lines, and the grid line workpiece is a semi-finished photovoltaic cell before preparing the grid lines; performing a light-enhanced contact optimization process on the seed grid lines; printing filling grid lines, wherein the filling grid lines are linear grid lines, and the filling grid lines cover the seed grid lines and cover the intervals between the seed grid lines; performing a light-enhanced contact optimization process on the filling grid lines so that the filling grid lines are combined with the seed grid lines to form fine grid lines.

[0007] Optionally, the seed grid lines are silver grid lines.

[0008] Optionally, the filling grid lines are copper grid lines or metal alloy grid lines.

[0009] Optionally, during the light-enhanced contact optimization process for the seed lines, the laser pattern used in the light-enhanced contact optimization process overlaps with the printed pattern of the seed lines or the laser pattern is slightly larger than the printed pattern of the seed lines.

[0010] Optionally, during the light-enhanced contact optimization process for the filling grid lines, the laser pattern used in the light-enhanced contact optimization process overlaps with the printed pattern of the filling grid lines or the laser pattern is slightly larger than the printed pattern of the filling grid lines.

[0011] Optionally, the width of the seed grid line is 8um-18um, the thickness is 3um-9um, and the interval between two adjacent sub-grid lines is smaller than the fine grid line spacing; the width of the filling grid line is less than 30un, and the thickness-to-width ratio is greater than 40%.

[0012] Optionally, the applied open circuit voltage of the light-enhanced contact optimization process is 15V-25V.

[0013] Optionally, the method further includes: after forming the fine gate lines, preparing main gate lines, wherein the main gate lines intersect with the fine gate lines.

[0014] In a second aspect, the present invention provides a method for preparing a photovoltaic cell, comprising: providing a substrate, preparing various functional layers and / or dielectric layers on the substrate, and preparing grid lines on the functional layers or the dielectric layers, wherein the grid lines include fine grid lines and main grid lines, and is characterized in that the grid lines are prepared using the grid line preparation method described in the first aspect.

[0015] In a third aspect, the present invention provides a photovoltaic cell comprising: a substrate having a functional layer and / or a dielectric layer, and a grid line located on the outermost layer of the photovoltaic cell, the grid line comprising a fine grid line and a main grid line, wherein the grid line is prepared using the grid line preparation method according to any one of claims 1 to 8.

[0016] Optionally, the substrate is a silicon substrate, the functional layer includes a tunneling layer and a doped silicon layer, and the dielectric layer includes a passivation anti-reflection layer; on one surface of the silicon substrate, the tunneling layer, the doped silicon layer and the passivation anti-reflection layer are sequentially provided in a direction away from the silicon substrate, the surface of the passivation anti-reflection layer has the gate line, and the gate line passes through the passivation anti-reflection layer and is connected to the doped silicon layer.

[0017] Compared with the existing technology, the present invention has the following advantages: seed grid lines are first printed on the grid line workpiece, and then filling grid lines are printed, wherein the filling grid lines cover the seed grid lines and cover the intervals between the seed grid lines. In addition, after printing, the seed grid lines and the filling grid lines are both processed by a light-enhanced contact optimization process, thereby optimizing the preparation method of the fine grid lines, improving the efficiency of the photovoltaic cells, and facilitating the use of non-silver paste to prepare the grid lines, thereby reducing the production / preparation input cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings are included to provide a further understanding of the present application. They are incorporated into and constitute a part of this application. The accompanying drawings illustrate embodiments of the present application and, together with this specification, serve to explain the principles of the present application. In the accompanying drawings:

[0019] Figure 1 1 is a schematic flow chart of a method for preparing a gate line according to an embodiment of the present invention;

[0020] Figure 2 This is a diagram showing various intermediates and products in the process of preparing a gate line according to an embodiment of the present invention;

[0021] Figure 3 Schematic diagram comparing the fine gate lines prepared in one embodiment of the present invention and the traditional fine gate lines;

[0022] Figure 4 It is a structural schematic diagram of a photovoltaic cell according to an embodiment of the present invention.

[0023] In the picture;

[0024] 410-substrate;

[0025] 420-functional layer;

[0026] 430- dielectric layer;

[0027] 440-grid lines. DETAILED DESCRIPTION

[0028] To more clearly illustrate the technical solutions of the embodiments of this application, the following is a brief introduction to the drawings required for describing the embodiments. Obviously, the drawings described below are merely examples or embodiments of this application. Those skilled in the art can apply this application to other similar scenarios based on these drawings without inventive effort. Unless otherwise apparent from the context or otherwise noted, the same reference numerals in the figures represent the same structure or operation.

[0029] As used in this application and the claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not intended to refer to the singular but may include the plural. Generally speaking, the terms "comprises" and "include" only indicate the inclusion of the steps and elements specifically identified, and these steps and elements do not constitute an exclusive list. A method or apparatus may also include other steps or elements.

[0030] Flowcharts are used throughout this application to illustrate operations performed according to embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed in exact order. Instead, the various steps may be performed in reverse order or simultaneously. Furthermore, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0031] With the continuous improvement of crystalline silicon material quality and photovoltaic cell front surface technology, cell efficiency has significantly increased. Among them, gridline preparation technology and pattern design are one of the effective ways to improve cell conversion efficiency and reduce cell costs. The commonly used gridline preparation method currently separates the main gridlines and fine gridlines (auxiliary gridlines) and controls the gridline morphology separately, which can reduce silver paste consumption and improve photovoltaic cell conversion efficiency. Even so, there is still room for optimization of the gridline preparation process.

[0032] refer to Figure 1 and Figure 2 As shown, the grid line preparation method provided in this embodiment mainly includes: S110, printing seed grid lines on the grid line workpiece, wherein the seed grid lines are discontinuous dot grid lines, and the grid line workpiece is a semi-finished photovoltaic cell before the grid lines are prepared. The dot grid lines are a series of small dots or lines arranged according to a certain pattern on the grid line workpiece; S120, performing a laser-enhanced contact optimization (LECO) process on the seed grid lines; S130, printing filling grid lines, wherein the filling grid lines are linear grid lines, and the filling grid lines cover the seed grid lines and cover the intervals between the seed grid lines; S140, performing a laser-enhanced contact optimization process on the filling grid lines, so that the filling grid lines are combined with the seed grid lines to form fine grid lines.

[0033] The existing grid line preparation process (or metallization process) is an important part of reducing the cost and increasing the efficiency of photovoltaic cells. It uses expensive silver as the material for contact and current collection, so there is a lot of room for reducing manufacturing costs.

[0034] In this embodiment, the preparation of the grid lines of the battery mainly includes four steps: 1. Preparation of a part of the fine grid lines, namely seed grid line printing, the purpose is to form contact, so it is necessary to use a printing paste with good contact performance. In the preparation of the seed grid lines, dot printing is used to form dot seed grid lines in order to save paste consumption. Figure 2 As shown in a, the upper surface of the workpiece has an orderly arranged seed grid line structure. Taking one row of seed grid lines as an example, it can be seen that the seed grid lines are discontinuous, forming a dot-shaped seed grid line structure. Because the dot-shaped grid lines do not require high plasticity, the unit consumption can be greatly reduced. Second, the light-enhanced contact optimization method is used for sintering, referring to Figure 2 As shown in b, the photo-enhanced contact optimization process is used to make the seed grid lines form better contacts and reduce the contact resistance. Figure 2 As shown in c, the filling grid line in the figure is a linear grid line. The filling grid line not only covers the surface of the seed grid line, but also covers the interval between adjacent seed grid lines. From a top-down perspective, a fine grid line is formed as a whole. The fine grid line is a combination of the seed grid line and the filling grid line. Since the aforementioned seed grid line forms a good contact, the slurry selection for the filling grid line at this time is diverse, and it only needs to meet the plasticity and current conduction requirements without considering sintering and contact issues. The slurry can be silver paste, copper paste or other low-cost conductive paste, and the purpose is to collect the conduction current. Fourth, the filling grid line is sintered again using a light-enhanced contact optimization, refer to Figure 2 As shown in Figure d, the laser process can enhance the fusion or alloying of the gate metal and strengthen the original semiconductor contact. Figure 2 The metal alloy formed by the seed grid lines and the filling grid lines indicated by the arc shown in d can improve the contact performance between semiconductors.

[0035] refer to Figure 3 As shown in the figure, the left side shows the conventional fine grid line preparation effect. Due to the small width of the fine grid line, the stability of the fine grid line width printed by the conventional method is difficult to control, and the width of the fine grid line is small or even broken. Figure 3 As shown, the right side of the figure shows the effect of preparing the fine grid lines of this embodiment. The fine grid lines of this embodiment are prepared by printing the fine grid lines twice. The width of the fine grid lines formed is controllable, and the width of the fine grid lines is relatively uniform. The effect is equivalent to repairing the situation where the original fine grid line width does not meet the standard, thereby reducing the line resistance and improving the battery performance.

[0036] It should be noted that the LECT process, through high-intensity laser irradiation and the application of a deflection voltage, generates a localized current, which significantly reduces the contact resistance between the metal and semiconductor. This reduced contact resistance improves the conversion efficiency of photovoltaic cells. Furthermore, the LECT process can reduce the amount of gate line paste used, lowering manufacturing costs. Furthermore, due to its precision, it can reduce potential sources of manufacturing error.

[0037] In one example, the seed grid line is a silver grid line. Silver, as a photovoltaic cell grid line, has extremely high conductivity, so when silver is used as a conductive material in the photovoltaic cell grid line, it can effectively reduce resistance loss and improve the conductivity efficiency of the photovoltaic cell. Silver also has good adhesion, which is crucial for ensuring the long-term stability and reliability of the photovoltaic cell. It is also important to note that silver, as a grid line material, has low contact resistance, which helps to reduce the series resistance of the photovoltaic cell, thereby improving the photoelectric conversion efficiency of the photovoltaic cell.

[0038] In one example, the filling grid lines are copper grid lines or metal alloy grid lines.

[0039] In this embodiment, the secondary printing process of the fine grid lines is to form linear filling grid lines. The slurry selection for the filling grid lines is diverse, and it only needs to meet the plasticity and current conduction requirements without considering sintering and contact issues. Theoretically, silver paste can still be used for the filling grid lines, but one of the purposes of the method of this embodiment is to minimize the use of silver paste and reduce manufacturing costs. Therefore, in the case where the seed grid lines can form good contact and optimize the contact resistance, other non-silver grid lines, such as copper grid lines, copper alloy grid lines, etc., can be used for the filling grid lines in this embodiment, thereby reducing manufacturing costs.

[0040] In one example, during the light-enhanced contact optimization process for the seed lines, the laser pattern used in the light-enhanced contact optimization process overlaps with the printed pattern of the seed lines or the laser pattern is slightly larger than the printed pattern of the seed lines.

[0041] In one example, during the light-enhanced contact optimization process for the fill grid lines, the laser pattern used in the light-enhanced contact optimization process overlaps with the printed pattern of the fill grid lines or the laser pattern is slightly larger than the printed pattern of the fill grid lines.

[0042] In this embodiment, whether the LEC process is used to process the seed lines or the fill lines, the laser pattern produced by the LEC process is essentially equal (i.e., overlaps) or slightly larger than the printed pattern. This allows the LEC process to cover all seed lines or fill lines; it also eliminates the need for the laser pattern to be overly large, thereby saving on the amount of slurry used to produce the lines and reducing the cost of photovoltaic cell production. This is due to the LEC process's ability to precisely control the laser pattern, maintaining a size relationship with the printed pattern.

[0043] In one example, the width of the seed grid line is 8um-18um, the thickness is 3um-9um, the interval between two adjacent sub-grid lines is smaller than the fine grid line spacing, the width of the filling grid line is less than 30un, and the thickness-to-width ratio is greater than 40%.

[0044] In one example, the applied open circuit voltage of the light-enhanced contact optimization process is 15V-25V.

[0045] During the light-enhanced contact optimization process, a laser scans the front of the cell, locally exciting photogenerated carriers while simultaneously applying a reverse bias voltage on both sides of the photovoltaic cell, generating a localized high-density current. This high-density current flows through the local contact interface between the gateline and the gateline component, promoting the diffusion of materials between the gateline and the gateline component, significantly reducing their contact resistance while also protecting the passivation structure beneath the gateline area.

[0046] In one example, the method of this embodiment further includes preparing main gate lines after forming the fine gate lines, where the main gate lines intersect with the fine gate lines.

[0047] Busbars direct current from photovoltaic cells and connect directly to the cell's external leads or ribbons. They are responsible for channeling the current generated by the cells to the ribbons so that the generated electricity can be used. The busbars and fine grid lines work together to widen the energy absorption area of ​​the photovoltaic cell, improving its light absorption efficiency and enabling it to better capture and convert light into current. By printing the busbars above the fine grid lines, contact between the busbars and the reaction layer is effectively reduced, reducing losses in the reaction layer and thereby improving the cell's conversion efficiency.

[0048] The width of the main grid line is greater than that of the thin grid line, and the length of the main grid line is greater than the width of the connection structure, ensuring the effect of the thin grid line in collecting current, improving the welding efficiency between the main grid line and the connection structure, and enhancing the stability of the photovoltaic cell.

[0049] In the grid line preparation method of this embodiment, seed grid lines are first printed on the grid line workpiece, and then filling grid lines are printed, wherein the filling grid lines cover the seed grid lines and the intervals between the seed grid lines. In addition, after printing, the seed grid lines and the filling grid lines are both processed through a light-enhanced contact optimization process, thereby optimizing the preparation method of the fine grid lines, improving the efficiency of the photovoltaic cell, and facilitating the use of non-silver paste to prepare the grid lines, thereby reducing the production / preparation input cost.

[0050] Another embodiment of the present invention provides a method for preparing a photovoltaic cell, comprising: providing a substrate, preparing various functional layers and / or dielectric layers on the substrate, preparing gate lines on the functional layers or dielectric layers, and preparing the gate lines using the gate line preparation method as in the above embodiment.

[0051] For other details about the preparation of the gate lines in this embodiment, reference may be made to the aforementioned embodiments and will not be elaborated here.

[0052] Another embodiment of the present invention provides a photovoltaic cell, referring to Figure 4 As shown, it includes: a substrate 410 having a functional layer 420 and / or a dielectric layer 430, and a grid line 440 located on the outermost layer of the photovoltaic cell, wherein the grid line 440 is prepared by the grid line preparation method in the above embodiment.

[0053] In one example, substrate 410 is a silicon substrate, functional layer 420 includes a tunneling layer and a doped silicon layer, and dielectric layer 430 includes a passivation anti-reflection layer. For example, the tunneling layer may be a silicon dioxide tunneling layer, the doped silicon layer may be a p-type doped silicon layer or an n-type doped silicon layer, and the passivation anti-reflection layer may be a silicon nitride layer. On one surface of the silicon substrate, a tunneling layer, a doped silicon layer, and a passivation anti-reflection layer are sequentially formed in a direction away from the silicon substrate. A gate line is formed on the surface of the passivation anti-reflection layer, and the gate line passes through the passivation anti-reflection layer and connects to the doped silicon layer.

[0054] It is understandable that the above photovoltaic cell structure is a feasible cell structure, and according to different functional layers 420 or dielectric layers 430, different front structures and back structures, Figure 4 The photovoltaic cell shown can be expanded to include photovoltaic cells with different structures. For example, this photovoltaic cell structure can be expanded to include PERC cells, other TOPCon cells, HJT cells, and IBC (Interdigitated Back Contact) cells, etc. They all have the same feature of being able to use the same method for preparing the gridlines on their front and / or back surfaces as described in the previous embodiment.

[0055] For other details about the preparation of the gate lines in this embodiment, reference may be made to the aforementioned embodiments and will not be elaborated here.

[0056] The grid line preparation method of the present invention prepares the grid lines through an optimized grid line preparation method, that is, the seed grid lines are first printed on the grid line workpiece, and then the filling grid lines are printed, wherein the filling grid lines cover the seed grid lines and cover the intervals between the seed grid lines. In addition, after printing, the seed grid lines and the filling grid lines are both processed through a light-enhanced contact optimization process, thereby optimizing the preparation method of the fine grid lines, improving the efficiency of the photovoltaic cells, and being conducive to the use of non-silver paste to prepare the grid lines, thereby reducing the production / preparation input cost.

[0057] The basic concepts have been described above. It will be apparent to those skilled in the art that the above disclosures are merely illustrative and do not constitute limitations on this application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and amendments to this application. Such modifications, improvements, and amendments are suggested in this application and remain within the spirit and scope of the exemplary embodiments of this application.

[0058] At the same time, this application uses specific terms to describe the embodiments of this application. For example, "one embodiment," "an embodiment," and / or "some embodiments" refer to a certain feature, structure, or characteristic related to at least one embodiment of this application. Therefore, it should be emphasized and noted that "one embodiment," "an embodiment," or "an alternative embodiment" mentioned twice or multiple times in different locations in this specification does not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of this application may be appropriately combined.

[0059] It should be noted that, in order to simplify the presentation of this disclosure and thus facilitate understanding of one or more embodiments of the invention, the foregoing descriptions of the embodiments of this application sometimes combine multiple features into a single embodiment, figure, or description thereof. However, this disclosure method does not mean that the subject matter of this application requires more features than those recited in the claims. In fact, an embodiment may have fewer features than all of the features of a single embodiment disclosed above.

[0060] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions can be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the scope of the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. A method for preparing a gate line, characterized in that: include: Printing seed grid lines on a grid line workpiece, wherein the seed grid lines are discontinuous dot-shaped grid lines, and the grid line workpiece is a semi-finished photovoltaic cell before the grid lines are prepared; Performing a light-enhanced contact optimization process on the seed grid line; Printing fill lines, wherein the fill lines are linear lines, and the fill lines cover the seed lines and the intervals between the seed lines; The filling grid lines are subjected to a light-enhanced contact optimization process so that the filling grid lines are combined with the seed grid lines to form fine grid lines.

2. The gate line preparation method according to claim 1, wherein: The seed grid lines are silver grid lines.

3. The gate line preparation method according to claim 2, wherein: The filling grid lines are copper grid lines or metal alloy grid lines.

4. The gate line preparation method according to claim 1, wherein: During the light-enhanced contact optimization process for the seed lines, the laser pattern used in the light-enhanced contact optimization process overlaps with the printed pattern of the seed lines or the laser pattern is slightly larger than the printed pattern of the seed lines.

5. The gate line preparation method according to claim 1, wherein: During the light-enhanced contact optimization process for the filling grid lines, the laser pattern used in the light-enhanced contact optimization process overlaps with the printed pattern of the filling grid lines or the laser pattern is slightly larger than the printed pattern of the filling grid lines.

6. The gate line preparation method according to claim 1, wherein: The width of the seed grid line is 8um-18um, the thickness is 3um-9um, and the interval between two adjacent sub-grid lines is smaller than the fine grid line spacing; the width of the filling grid line is less than 30un, and the thickness-to-width ratio is greater than 40%.

7. The gate line preparation method according to claim 1, wherein: The applied open circuit voltage of the light-enhanced contact optimization process is 15V-25V.

8. The gate line preparation method according to any one of claims 1 to 7, characterized in that: Also includes: After the thin gate lines are formed, main gate lines are prepared, where the main gate lines intersect with the thin gate lines.

9. A method for preparing a photovoltaic cell, comprising: A substrate is provided, functional layers and / or dielectric layers are prepared on the substrate, and gate lines are prepared on the functional layers or the dielectric layers, wherein the gate lines include fine gate lines and main gate lines. The gate lines are prepared by the gate line preparation method according to any one of claims 1 to 8.

10. A photovoltaic cell, characterized in that: The invention comprises: a substrate having a functional layer and / or a dielectric layer, and grid lines located on the outermost layer of the photovoltaic cell, wherein the grid lines include fine grid lines and main grid lines, wherein the grid lines are prepared by the grid line preparation method according to any one of claims 1 to 8.

11. The photovoltaic cell according to claim 10, wherein: The substrate is a silicon substrate, the functional layer includes a tunneling layer and a doped silicon layer, and the dielectric layer includes a passivation anti-reflection layer; On one surface of the silicon substrate, the tunneling layer, the doped silicon layer and the passivation anti-reflection layer are sequentially provided in a direction away from the silicon substrate; the gate line is provided on the surface of the passivation anti-reflection layer, and the gate line passes through the passivation anti-reflection layer and is connected to the doped silicon layer.

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