LED chip, preparation method thereof and light-emitting equipment

Abstract

The invention provides an LED chip, a preparation method thereof and light-emitting equipment, and relates to the technical field of semiconductors. The first area of the transparent conductive layer is provided with a plurality of grooves, the transparent conductive layer is thinned, the transmittance of the transparent conductive layer is improved, the depth of the grooves is smaller than the thickness of the transparent conductive layer, so that the bottoms of the grooves are conductive, current can pass through the bottoms of the grooves to reach quantum wells below for composite luminescence, and the luminous efficiency of the LED chip is improved. And the current density of the second region provided with the P electrode is relatively high, so that a spacer region exists between the second region and the first region, and it can be understood that no groove is formed in the position, close to the P electrode, of the transparent conductive layer, so that the influence on the voltage of the LED chip is reduced, and the photoelectric property of the LED chip is further improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to an LED chip, a preparation method thereof, and a light-emitting device. Background Art

[0002] As LED chips become increasingly widely used, improving chip light output efficiency and increasing product competitiveness has become an important research direction within the industry. The addition of a transparent conductive layer made of materials such as ITO within an LED chip significantly impacts its optoelectronic performance.

[0003] Therefore, how to optimize the transparent conductive layer to improve the photoelectric performance of the LED chip is a technical problem that needs to be solved urgently by those skilled in the art. Summary of the Invention

[0004] In view of the above problems, this application provides an LED chip and its preparation method, as well as a light-emitting device, to achieve the purpose of improving the photoelectric performance of the LED chip. The specific solution is as follows:

[0005] In a first aspect, the present application provides an LED chip, comprising:

[0006] substrate;

[0007] an epitaxial structure located on one side of the substrate; the epitaxial structure comprising an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer stacked in a first direction; the first direction being perpendicular to the plane of the substrate and pointing from the substrate to the epitaxial structure;

[0008] a transparent conductive layer located on a side of the P-type semiconductor layer facing away from the substrate; the transparent conductive layer comprising a first region and a second region; the first region having a plurality of grooves, the depth of the grooves being less than the thickness of the transparent conductive layer;

[0009] A P electrode is located on a side of the second region facing away from the substrate; and a spacing region exists between the first region and the second region.

[0010] Preferably, in the above LED chip, the thickness of the transparent conductive layer is D1, and the depth of the groove is D2;

[0011] Among them, D1×20%≤D2≤D1×80%.

[0012] Preferably, in the above LED chip, the width of the spacing region ranges from 30 μm to 60 μm, including the end values.

[0013] Preferably, in the above LED chip, the projection pattern of the groove in the first direction is circular; the diameter of the groove ranges from 0.5 μm to 6 μm, including the end values.

[0014] Preferably, in the above LED chip, the distance between two adjacent grooves is L1, and the diameter of the groove is L2;

[0015] Among them, 1≤L1 / L2≤3.

[0016] Preferably, in the above LED chip, the distance between two adjacent grooves is L1, and the diameter of the groove is L2;

[0017] Among them, L1≥L2.

[0018] Preferably, in the above LED chip, the groove is formed by dry etching.

[0019] A second aspect of the present application provides a method for preparing an LED chip, the method comprising:

[0020] providing a substrate;

[0021] An epitaxial structure is formed on one side of the substrate; the epitaxial structure includes an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer stacked in a first direction; the first direction is perpendicular to the plane of the substrate and points from the substrate to the epitaxial structure;

[0022] forming a transparent conductive layer on a side of the epitaxial structure away from the substrate; the side of the transparent conductive layer away from the P-type semiconductor layer includes a first region and a second region;

[0023] Etching the transparent conductive layer in the first region to form a plurality of grooves, wherein the depth of the grooves is less than the thickness of the transparent conductive layer;

[0024] performing patterning on the transparent conductive layer to retain a portion of the transparent conductive layer on a side of the P-type semiconductor layer facing away from the substrate;

[0025] A P electrode is formed on a side of the second region facing away from the substrate; and a spacing region is present between the first region and the second region.

[0026] Preferably, in the above-mentioned method for preparing the LED chip, etching the transparent conductive layer in the first region to form a plurality of grooves includes:

[0027] The transparent conductive layer in the first region is etched by dry etching to form the plurality of grooves.

[0028] A third aspect of the present application provides a light-emitting device, which includes any one of the above-mentioned LED chips.

[0029] Preferably, in the above-mentioned light-emitting device, the light-emitting device includes a display device.

[0030] By means of the above-described technical solution, the present application provides an LED chip, a method for manufacturing the same, and a light-emitting device. The first region of the transparent conductive layer has multiple grooves, which achieve thinning of the transparent conductive layer and increase its transmittance. Because the depth of the grooves is less than the thickness of the transparent conductive layer, the bottom of the grooves is conductive, allowing current to pass through the bottom of the grooves to the quantum wells below for composite light emission, thereby improving the luminous efficiency of the LED chip. Furthermore, because the current density in the second region where the P electrode is provided is higher, a separation region is created between the second region and the first region. It is understood that grooves are not provided near the P electrode on the transparent conductive layer to reduce the impact on the voltage of the LED chip, thereby improving the photoelectric performance of the LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and other features, advantages, and aspects of the various embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and that the originals and elements are not necessarily drawn to scale.

[0032] Figure 1 A schematic structural diagram of an LED chip provided by an embodiment of the present invention;

[0033] Figure 2 A schematic diagram of a top view of a first region provided in an embodiment of the present invention;

[0034] Figure 3 A schematic flow chart of a method for preparing an LED chip provided in an embodiment of the present invention;

[0035] Figure 4-Figure 9 for Figure 3 Schematic diagram of part of the structure corresponding to the preparation method shown. DETAILED DESCRIPTION

[0036] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation methods of the present application are only used to explain the specific embodiments of the present application and are not intended to limit the present application. It is known to those skilled in the art that with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0037] Based on the content recorded in the background technology, some existing technologies use wet roughening methods, such as roughening the transparent conductive layer of the ITO material in a solution such as BOE (buffered oxide etchant) to increase the light output area; some existing technologies use spin coating or evaporation to produce nanospheres on the surface of the transparent conductive layer of the ITO material, and then etch the transparent conductive layer to roughen its surface; some existing technologies use photolithography to produce patterns on the surface of the transparent conductive layer of the ITO material, and then use wet etching to produce ITO patterns.

[0038] However, when roughening the transparent conductive layer, the particles are generally too small, and in fact, there is no significant improvement in the light output of the LED chip. When using wet etching to create ITO patterns, due to the generally fast etching rate of ITO, the holes produced are larger, and these holes penetrate the transparent conductive layer. Although the transmittance of the transparent conductive layer can be increased, because no ITO material is retained in the hole, the area below the hole is non-conductive, and the current cannot pass through the hole to reach the quantum well below, resulting in less recombination, affecting the brightness of the LED chip. Moreover, because no ITO material is retained in the hole, the overall area of ​​the transparent conductive layer is reduced, which has a greater impact on the voltage of the LED chip.

[0039] Based on this, the present application provides an LED chip and its preparation method, and a light-emitting device. Based on the existing equipment and raw materials for producing LED chips, there is no need to add additional equipment and raw materials. The transparent conductive layer is optimized to achieve the purpose of improving the photoelectric performance of the LED chip.

[0040] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0041] It should be noted that the directional words appearing in the present invention are based on the relative position relationship shown in the drawings and cannot be used as an absolute limitation to the present application.

[0042] refer to Figure 1 , Figure 1 The LED chip provided by the embodiment of the present invention includes: a substrate 11.

[0043] An epitaxial structure located on one side of the substrate 11; the epitaxial structure includes an N-type semiconductor layer 12, a multi-quantum well layer 13 and a P-type semiconductor layer 14 stacked in a first direction X; the first direction X is perpendicular to the plane of the substrate 11 and points from the substrate 11 to the epitaxial structure.

[0044] A transparent conductive layer 15 is located on the side of the P-type semiconductor layer 14 away from the substrate 11 ; the transparent conductive layer 15 includes a first area AA and a second area BB; the first area AA has a plurality of grooves 16 , and the depth of the grooves 16 is less than the thickness of the transparent conductive layer 15 .

[0045] The P electrode 17 is located on the side of the second region BB facing away from the substrate 11 ; a spacing region CC is present between the first region AA and the second region BB.

[0046] Specifically, in the embodiment of the present invention, the N-type semiconductor layer 12 is an N-type doped semiconductor layer, and the P-type semiconductor layer 14 is a P-type doped semiconductor layer. For example, the N-type semiconductor layer 12 may be an N-type doped GaN layer, and the P-type semiconductor layer 14 may be a P-type doped GaN layer. It should be noted that in the embodiment of the present invention, only the GaN layer is used as the semiconductor layer for example. Obviously, the semiconductor layer may also be a semiconductor layer of other semiconductor materials.

[0047] The core structure of an LED chip is a PN junction. When a forward bias is applied to the PN junction, electrons flow from the N-type region to the P-type region, and holes flow from the P-type region to the N-type region. These carriers recombine near the PN junction, releasing energy and generating photons, thereby emitting light. The multi-quantum well layer 13 is a key structure in the LED chip, its function being to improve the recombination efficiency of carriers and the luminous efficiency. The multi-quantum well layer 13 is composed of multiple alternating quantum wells (QWs) and quantum barriers (QBs). Typically, the band gap of the quantum wells is smaller than that of the quantum barriers. This confines electrons and holes within the quantum wells under the action of an external electric field, thereby increasing the probability of electron and hole recombination and, in turn, improving luminous efficiency.

[0048] In the embodiment of the present invention, the transparent conductive layer 15 includes, but is not limited to, an ITO (Indium Tin Oxide) layer. ITO is a transparent material with high conductivity, high visible light transmittance, and good chemical stability. The ITO layer has a high transparency in the visible light range, typically exceeding 80%, and has excellent electrical conductivity. This allows the ITO layer to function as a transparent conductive layer for current transmission in LED chips.

[0049] Due to the aforementioned technical issues with the design of the transparent conductive layer in the prior art, the transparent conductive layer 15 is optimized in the embodiments of the present application, so that the first area AA of the transparent conductive layer 15 has multiple grooves 16. This achieves a thinner transparent conductive layer 15 and further improves its transmittance. Because the depth of the grooves 16 is less than the thickness of the transparent conductive layer 15, the bottom of the grooves 16 is conductive, allowing current to pass through the bottom of the grooves 16 to the quantum well below for recombinant light emission, thereby improving the luminous efficiency of the LED chip. Furthermore, because the current density in the second area BB where the P electrode 17 is provided is higher, a gap area CC is provided between the second area BB and the first area AA. It is understood that the grooves 16 are not provided near the P electrode 17 on the transparent conductive layer 15 to reduce the impact on the LED chip voltage, thereby improving the photoelectric performance of the LED chip.

[0050] It should be noted that if Figure 1 As shown, the LED chip provided in this embodiment of the present invention further includes an N-electrode 18 located on the side of the N-type semiconductor layer 12 facing away from the substrate 11. The materials of the P-electrode 17 and the N-electrode 18 can be the same or different, and this is not limited in this embodiment of the present invention. For example, the materials of the P-electrode 17 and the N-electrode 18 are each metal.

[0051] In an optional embodiment of the present invention, the thickness of the transparent conductive layer 15 is D1, and the depth of the groove 16 is D2;

[0052] Among them, D1×20%≤D2≤D1×80%.

[0053] Specifically, in the embodiment of the present invention, the depth of the groove 16 can be determined based on the actual thickness of the transparent conductive layer 15. In order to ensure the conductive performance and film stability of the transparent conductive layer 15 at the bottom of the groove 16, D2 is set to D1×80% in the embodiment of the present invention to avoid the thickness of the transparent conductive layer 15 at the bottom of the groove 16 being too thin; in order to maximize the transmittance of the transparent conductive layer 15, D1×20% is set to D2 in the embodiment of the present invention to minimize the thinning of the transparent conductive layer 15 to avoid the problem of no significant improvement in light extraction efficiency.

[0054] In an optional embodiment of the present invention, the width of the spacing region CC is in a range of 30 μm to 60 μm, including endpoint values.

[0055] Specifically, in the embodiments of the present invention, the width of the spacing region CC is related to parameters such as the current density of the LED chip and / or the size of the LED chip. For example, the width range of the spacing region CC may vary for LED chips of different sizes. For example, for medium- to large-sized LED chips, the width of the spacing region CC may range from 30 μm to 60 μm.

[0056] Since the current density of the second area BB where the P electrode 17 is provided is relatively high, an interval area CC must be provided between the second area BB and the first area AA in the embodiment of the present invention. It is understandable that the groove 16 is not provided near the P electrode 17 on the transparent conductive layer 15 to reduce the impact on the voltage of the LED chip, thereby improving the photoelectric performance of the LED chip.

[0057] In an optional embodiment of the present invention, the groove 16 is formed by dry etching.

[0058] Specifically, embodiments of the present invention include, but are not limited to, using an ICP (Inductively Coupled Plasma) plasma machine to etch the first area AA of the transparent conductive layer 15 to form the groove 16. The wet etching methods used in existing technologies have excessively high etching rates, failing to retain the desired thickness and pattern size after etching. In contrast, the use of dry etching methods such as ICP in the embodiments of the present invention allows for precise control of the etching rate and depth, while ensuring that the etched pattern size remains unchanged. This more accurately meets the requirement of D1×20%≤D2≤D1×80%, ensuring that the bottom of the groove 16 is conductive, allowing current to pass through the bottom of the groove 16 to the quantum well below for composite light emission, thereby improving the luminous efficiency of the LED chip.

[0059] In an optional embodiment of the present invention, reference Figure 2 , Figure 2 A schematic top view of the first region of an embodiment of the present invention. The projection of the groove 16 in the first direction X is circular; the diameter of the groove 16 ranges from 0.5 μm to 6 μm, inclusive. The spacing between two adjacent grooves 16 is L1, and the diameter of the groove 16 is L2; ​​wherein 1 ≤ L1 / L2 ≤ 3. The spacing between two adjacent grooves 16 is L1, and the diameter of the groove 16 is L2; ​​wherein L1 ≥ L2.

[0060] Specifically, in the embodiment of the present invention, the projection pattern of the groove 16 in the first direction X can also be other shapes such as a rectangle and a triangle. Here, the projection pattern of the groove 16 in the first direction X is a circle as an example for explanation. At this time, the groove 16 can also be understood as a circular hole that does not penetrate the transparent conductive layer 15.

[0061] Table 1

[0062]

[0063] The data in Table 1 were obtained by testing three samples of LED chips with transparent conductive layers 15 having different parameters. Among them, in the sample with sample number (1), the spacing between two adjacent grooves 16 on the transparent conductive layer 15 is 3 μm, and the diameter of the groove 16 is 3 μm; in the sample with sample number (2), the spacing between two adjacent grooves 16 on the transparent conductive layer 15 is 4.5 μm, and the diameter of the groove 16 is 3 μm; in the sample with sample number (3), the spacing between two adjacent grooves 16 on the transparent conductive layer 15 is 6 μm, and the diameter of the groove 16 is 3 μm.

[0064] Analysis of the data in Table 1 shows that when the L1 / L2 ratio is small, the area ratio (the ratio of the area where grooves 16 are located to the total area of ​​the transparent conductive layer 15) is relatively large, indicating that the conductive area of ​​the transparent conductive layer 15 is smaller, which can lead to severe current congestion, reduced quantum well recombination efficiency, high voltage, and high brightness. When the L1 / L2 ratio is large, the thinned area of ​​the transparent conductive layer 15 is small, resulting in reduced brightness.

[0065] Therefore, in the embodiment of the present invention, when the groove 16 is a circular hole, the diameter range of the groove 16 is set to 0.5μm-6μm, 1≤L1 / L2≤3, and L1≥L2. At this time, the current expansion is less affected and the voltage rises less, thereby improving the photoelectric performance of the LED chip.

[0066] Based on the above embodiment of the present invention, another embodiment of the present invention further provides a method for preparing an LED chip, referring to Figure 3 , Figure 3 A schematic flow chart of a method for manufacturing an LED chip according to an embodiment of the present invention. The method for manufacturing an LED chip according to an embodiment of the present invention comprises:

[0067] S101: If Figure 4 As shown, a substrate 11 is provided.

[0068] S102: Figure 5 and Figure 6 As shown, an epitaxial structure is formed on one side of the substrate 11; the epitaxial structure includes an N-type semiconductor layer 12, a multi-quantum well layer 13 and a P-type semiconductor layer 14 stacked in a first direction X; the first direction X is perpendicular to the plane of the substrate 11 and points from the substrate 11 to the epitaxial structure.

[0069] Specifically, this step includes but is not limited to using a mixed liquid of sulfuric acid and hydrogen peroxide to Figure 5 The structure shown is cleaned to improve the adhesion of subsequent film layers.

[0070] based on Figure 5 The structure shown includes but is not limited to defining the etching area by photolithography, such as in Figure 5 The surface of the structure shown is coated with photoresist, and is exposed to ultraviolet light using a micron-level photoresist template. The structure is then placed in a developer for development, and then baked.

[0071] Afterwards, the etching process is performed including but not limited to using a plasma reactor, and the substrate is placed in a degumming solution to remove the degumming agent to expose a portion of the N-type semiconductor layer 12 and the cutting path 19, such as Figure 6 shown.

[0072] S103: If Figure 7 As shown, a transparent conductive layer 15 is formed on the side of the epitaxial structure away from the substrate 11 ; the side of the transparent conductive layer 15 away from the P-type semiconductor layer 14 includes a first region AA and a second region BB.

[0073] Specifically, this step includes but is not limited to using equipment such as RPD (reactive plasma deposition), SPT (sputtering), and E-GUN (electron beam evaporation system) to form a transparent conductive layer 15 on the side of the epitaxial structure away from the substrate 11.

[0074] S104: Figure 8 As shown, the transparent conductive layer 15 in the first area AA is etched to form a plurality of grooves 16 , and the depth of the grooves 16 is less than the thickness of the transparent conductive layer 15 .

[0075] Specifically, in this step, based on Figure 7 The structure shown includes but is not limited to defining the etching area by photolithography, such as in Figure 7 The surface of the structure shown is coated with photoresist, and is exposed to ultraviolet light using a micron-level photoresist template. The structure is then placed in a developer for development, and then baked.

[0076] Afterwards, a plasma reactor is used for etching, including but not limited to, placing the substrate in a degumming solution to remove the adhesive so as to form a plurality of grooves 16 in the first area AA, such as Figure 8 shown.

[0077] It should be noted that this step includes, but is not limited to, etching the first area AA of the transparent conductive layer 15 using an ICP plasma machine to form a groove 16. The wet etching method used in the prior art has an etching rate that is too fast and cannot retain the required thickness and pattern size after etching. In the embodiment of the present invention, the use of dry etching such as ICP can accurately control the etching rate and etching depth, and can ensure that the size of the etched pattern remains unchanged, thereby more accurately meeting the requirement of D1×20%≤D2≤D1×80%, ensuring that the bottom of the groove 16 is conductive, and the current can pass through the bottom of the groove 16 to reach the quantum well below for composite light emission, thereby improving the luminous efficiency of the LED chip.

[0078] S105: If Figure 9 As shown, the transparent conductive layer 15 is patterned to retain a portion of the transparent conductive layer 15 on the side of the P-type semiconductor layer 14 facing away from the substrate 11 .

[0079] Specifically, in this step, based on Figure 8 The structure shown includes but is not limited to defining the etching area by photolithography, such as in Figure 8 The surface of the structure shown is coated with photoresist, and is exposed to ultraviolet light using a micron-level photoresist template. The structure is then placed in a developer for development, and then baked.

[0080] After that, it is placed in an ITO etching solution for etching, and placed in a debonding solution for debonding, leaving only the transparent conductive layer 15 on the side of the P-type semiconductor layer 14 facing away from the substrate 11 .

[0081] It should be noted that in this step, the transparent conductive layer 15 is an ITO layer, so an ITO etching solution is selected for etching. If the transparent conductive layer 15 is made of other materials, an etching solution of the corresponding material can be selected.

[0082] S106: If Figure 1 As shown, a P electrode 17 is formed on the side of the second region BB facing away from the substrate 11 ; and a spacing region CC exists between the first region AA and the second region BB.

[0083] Specifically, in this step, based on Figure 9 The structure shown includes but is not limited to defining the electrode area by photolithography, for example, Figure 9 The surface of the structure shown is coated with photoresist, and is exposed to ultraviolet light using a micron-level photoresist template. The structure is then placed in a developer for development, and then baked.

[0084] Afterwards, the substrate is placed in a metal evaporation machine to deposit electrodes, and then placed in a debonding solution to remove the adhesive, forming a P electrode 17 on the side of the second region BB facing away from the substrate 11 .

[0085] It should be noted that the N-electrode 18 can be prepared simultaneously during the process of forming the P-electrode 17. In other words, the P-electrode 17 and the N-electrode 18 are prepared in the same process. It should be further noted that the P-electrode 17 and the N-electrode 18 can also be prepared in two different processes, for example, preparing the P-electrode 17 first and then the N-electrode 18, or preparing the N-electrode 18 first and then the P-electrode 17.

[0086] It should be noted that the order of processing the transparent conductive layer 15 to form the groove 16 and the order of exposing a portion of the N-type semiconductor layer 12 and forming the cutting street 19 can be interchanged, and is not limited here.

[0087] As can be seen from the above description, the first region AA of the transparent conductive layer 15 in the LED chip fabricated according to the embodiment of the present invention has multiple grooves 16, which achieves thinning of the transparent conductive layer 15 and improves its transmittance. Because the depth of the grooves 16 is less than the thickness of the transparent conductive layer 15, the bottom of the grooves 16 is conductive, allowing current to flow through the bottom of the grooves 16 to the quantum well below for recombinant light emission, thereby improving the luminous efficiency of the LED chip. Furthermore, because the current density in the second region BB, where the P electrode 17 is provided, is higher, a gap region CC is provided between the second region BB and the first region AA. It is understood that the grooves 16 are not provided near the P electrode 17 on the transparent conductive layer 15 to reduce the impact on the LED chip voltage, thereby improving the photoelectric performance of the LED chip.

[0088] Based on the above embodiments of the present invention, another embodiment of the present invention further provides a light-emitting device, which includes the LED chip described in the above embodiments. The light-emitting device includes but is not limited to lighting devices such as lighting fixtures, and may also include a display device.

[0089] The above is a detailed introduction to an LED chip, a preparation method thereof, and a light-emitting device provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the ideas of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.

[0090] It should be noted that each embodiment in this specification focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referenced to each other.

[0091] It should also be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that the process, method, article, or apparatus comprising a series of elements inherent to the elements, or also including elements inherent to these processes, methods, articles, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

[0092] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that: The LED chip includes: substrate; an epitaxial structure located on one side of the substrate; the epitaxial structure comprising an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer stacked in a first direction; the first direction being perpendicular to the plane of the substrate and pointing from the substrate to the epitaxial structure; a transparent conductive layer located on a side of the P-type semiconductor layer facing away from the substrate; the transparent conductive layer comprising a first region and a second region; the first region having a plurality of grooves, the depth of the grooves being less than the thickness of the transparent conductive layer; A P electrode is located on a side of the second region facing away from the substrate; and a spacing region exists between the first region and the second region.

2. The LED chip according to claim 1, wherein: The thickness of the transparent conductive layer is D1, and the depth of the groove is D2; Among them, D1×20%≤D2≤D1×80%.

3. The LED chip according to claim 1, wherein: The width of the spacer region is in the range of 30 μm to 60 μm, both inclusive.

4. The LED chip according to claim 1, wherein The projection pattern of the groove in the first direction is circular; the diameter of the groove ranges from 0.5 μm to 6 μm, including the end value.

5. The LED chip according to claim 4, characterized in that The distance between two adjacent grooves is L1, and the diameter of the groove is L2; Among them, 1≤L1 / L2≤3.

6. The LED chip according to claim 4, characterized in that The distance between two adjacent grooves is L1, and the diameter of the groove is L2; Among them, L1≥L2.

7. The LED chip according to claim 1, wherein: The groove is formed by dry etching.

8. A method for preparing an LED chip, characterized in that: The method for preparing the LED chip comprises: providing a substrate; An epitaxial structure is formed on one side of the substrate; the epitaxial structure includes an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer stacked in a first direction; the first direction is perpendicular to the plane of the substrate and points from the substrate to the epitaxial structure; forming a transparent conductive layer on a side of the epitaxial structure away from the substrate; the side of the transparent conductive layer away from the P-type semiconductor layer includes a first region and a second region; Etching the transparent conductive layer in the first region to form a plurality of grooves, wherein the depth of the grooves is less than the thickness of the transparent conductive layer; performing patterning on the transparent conductive layer to retain a portion of the transparent conductive layer on a side of the P-type semiconductor layer facing away from the substrate; A P electrode is formed on a side of the second region facing away from the substrate; and a spacing region is present between the first region and the second region.

9. The method for preparing an LED chip according to claim 8, wherein: The etching process of the transparent conductive layer in the first region to form a plurality of grooves includes: The transparent conductive layer in the first region is etched by dry etching to form the plurality of grooves.

10. A light emitting device, characterized in that: The light-emitting device comprises the LED chip according to any one of claims 1 to 7.

11. The light emitting device according to claim 10, characterized in that The light emitting device includes a display apparatus.

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