Voltage-controlled temperature measuring gate chip
The DFN-8 packaging structure of the voltage-controlled temperature measurement gate chip, combined with the circuit design of analog electronic switches and thermistors, solves the problems of complex wiring and high cost in a small space in traditional temperature measurement methods, and realizes high-density, fast-response multi-point temperature measurement, which is suitable for high-temperature environments.
Patent Information
- Application Number
- CN202510796117.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-13
- Publication Date
- 2025-09-23
AI Technical Summary
The traditional multi-point temperature measurement method is complex, costly, and difficult to construct when laying sensor cables in a small space. Traditional chips cannot be densely distributed in a small space, resulting in inaccurate temperature measurement and slow response. It cannot adapt to the temperature field measurement needs of complex environments such as high-temperature pipelines and inside robots.
It adopts a voltage-controlled temperature measurement gate chip and a circuit composed of an analog electronic switch, a diode, a thermistor and a resistor in a DFN-8 package structure. It realizes temperature point detection through voltage control. The package is compact and can be densely arranged to achieve multi-point temperature field measurement.
It realizes high-density, low-cost, and simple-construction multi-point temperature measurement in a small space. It has a fast response speed and is suitable for high-temperature environments and meets the needs of temperature field measurement in a small space.
Smart Images
Figure CN120685215A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of integrated circuit technology, and in particular to a voltage-controlled temperature measurement gate chip. Background Art
[0002] Traditional multi-point temperature measurement methods include analog signal multiplexing, digital bus addressing, distributed independent sensor system, multi-point infrared measurement, and mechanical multi-point recorder.
[0003] Analog signal multiplexing uses a multi-way switch (such as an analog switch chip) to sequentially switch analog signals from multiple sensors, using a single analog-to-digital converter to collect data. However, this method requires a large number of cables when using a large number of sensors, resulting in complex and bulky wiring. This makes installation difficult in narrow, long-distance, multi-point measurement environments, such as long-distance electric heating pipeline construction.
[0004] The digital bus addressing method converts temperature signals from multiple addresses into digital information, then connects them in parallel to a data bus, such as an RS485 communication line, allowing a host computer to poll each node for data. During manufacturing and construction, this method requires the deployment of several sensors and digital-to-analog conversion communication chip modules along the communication line. The sensors convert the collected analog temperature signals into digital form. Each communication node is assigned a unique communication address, and the host computer then polls each temperature measurement point to obtain temperature data. While this method solves the complex and cumbersome installation of multiple sensor cables, the digital-to-analog conversion communication modules are limited by temperature and size, making them impractical for dense deployment within confined spaces, such as inside a robot arm or within a temperature-controlled process pipeline. The limited space and temperature constraints make it impossible to accommodate multiple digital-to-analog conversion communication modules. Complex digital-to-analog conversion communication buses are unsuitable for scenarios such as measuring continuously changing temperature fields within a machine or pipeline, and determining energy transfer relationships based on temperature changes at multiple points. Some simple communication bus temperature control chips, such as DS18B20, are bus-mode temperature measurement chips. However, due to the current limit triggered by the pull-up resistor, it is impossible to connect too many temperature control chips in parallel. Performance parameters determine that a maximum of 8 DS18B20s can be connected in parallel. The temperature measurement response in the single-line queuing inspection mode of communication data is slow, which can easily lead to communication interruption. In addition, the operating current of DS18B20 is at the milliampere level. Since the parallel pull-up resistor needs to be small enough to provide sufficient current, the heat generated by the chip itself will also affect the temperature measurement.
[0005] In a distributed independent sensor system, each sensor is independently connected to a data acquisition module and transmits data via parallel lines. However, this approach also suffers from the complexity and bulk of wiring required for a large number of sensors.
[0006] Multi-point infrared measurement uses an infrared sensor array or mechanical scanning probe to non-contactly measure the temperature of multiple points on an object's surface. Its advantages include convenient temperature field analysis and rapid assessment of regional temperature differences and energy transfer. However, this method is susceptible to degradation in accuracy due to dust, steam, or strong light, and is not suitable for continuous measurement over large areas or over long distances within an aircraft.
[0007] Mechanical temperature switches use the mechanical deformation of thermal expansion bimetal to control temperature. They are large in size, have inaccurate temperature measurement, large temperature inertia, and complex multi-point measurement construction and wiring.
[0008] Mechanical multi-point temperature recorders use a robotic arm or rotating probe to sequentially contact multiple temperature measurement points to record temperature data. Because mechanical switching is time-consuming, slow to respond, and cumbersome, they are only used in special situations.
[0009] In summary, multi-point temperature sensing systems used inside high-temperature pipelines, insulation production equipment, and robotic bodies to measure temperature field gradients and energy transfer directions suffer from numerous drawbacks. 1. When measuring continuously changing temperature fields within machinery and pipelines and determining energy transfer relationships based on multi-point temperature changes, the long distances, confined spaces, and temperature constraints of internal locations preclude the deployment of numerous sensor cables and digital-to-analog conversion communication modules. 2. Traditional multi-point temperature measurement requires the deployment of numerous sensors, chips, and host computers, resulting in high costs and complex, difficult-to-operate, error-prone, and damage-prone on-site installation. Summary of the Invention
[0010] The purpose of this application is to provide a voltage-controlled temperature measurement gate chip that can realize the voltage-controlled temperature point detection function.
[0011] To achieve the above objectives, this application provides the following solutions:
[0012] The present application provides a voltage-controlled temperature measurement gate chip, which adopts a DFN-8 packaging structure; the voltage-controlled temperature measurement gate chip includes: an analog electronic switch, a diode, a thermistor, a first resistor, a second resistor and a third resistor;
[0013] One end of the thermistor is connected to the normally closed end of the analog electronic switch and the output bus respectively, and one end of the second resistor is connected to the enable end of the analog electronic switch; the other end of the thermistor is connected to the ground bus; and the other end of the second resistor is connected to the power supply bus;
[0014] One end of the first resistor is connected to the trigger end of the analog electronic switch; the cathode of the diode is respectively connected to the other end of the first resistor and one end of the third resistor, and the other end of the third resistor is connected to the ground end of the analog electronic switch; the ground end of the analog electronic switch is connected to the ground bus; and the anode of the diode is connected to the trigger bus.
[0015] Optionally, when there are multiple voltage-controlled temperature measurement gate chips, the other end of the first resistor in the i-th voltage-controlled temperature measurement gate chip is connected to the positive electrode of the diode in the (i+1)-th voltage-controlled temperature measurement gate chip;
[0016] The normally open end of the analog electronic switch in the i-th voltage-controlled temperature measurement gate chip is connected to the other end of the thermistor in the i+1-th voltage-controlled temperature measurement gate chip; the common end of the analog electronic switch in the j-th voltage-controlled temperature measurement gate chip is connected to the output bus, where j is an odd number; the common end of the analog electronic switch in the j+1-th voltage-controlled temperature measurement gate chip is connected to the ground bus;
[0017] The other end of the thermistor in the first voltage-controlled temperature measurement gate chip is connected to the ground bus; the anode of the diode in the first voltage-controlled temperature measurement gate chip is connected to the trigger bus.
[0018] Optionally, the analog electronic switch is a voltage-triggered electronic switch.
[0019] Optionally, the thermistor is a 3950 type 10KΩ thermistor.
[0020] Optionally, the DFN-8 package structure adopts a lead-free flat pin design.
[0021] Optionally, the analog electronic switch has an on-resistance of 2.5Ω and an operating temperature range of -50°C to 150°C.
[0022] Optionally, the diode is a germanium diode, and when the trigger voltage is greater than 0.3V, the germanium diode is turned on.
[0023] Optionally, the resistance of the first resistor is 680KΩ.
[0024] Optionally, the resistance of the second resistor is 1 MΩ.
[0025] Optionally, the resistance of the third resistor is 1 MΩ.
[0026] According to the specific embodiments provided in this application, this application has the following technical effects:
[0027] This application provides a voltage-controlled temperature measurement gate chip. The chip includes an analog electronic switch, a diode, a thermistor, a first resistor, a second resistor, and a third resistor. The first resistor is connected to the trigger terminal of the analog electronic switch via a diode. A trigger voltage triggers the diode to conduct, controlling the connection or disconnection of the analog electronic switch within the voltage-controlled temperature measurement gate chip, thereby realizing a voltage-controlled temperature point detection function. The chip adopts a DFN-8 packaging structure, which is compact and capable of independent temperature measurement. Multiple voltage-controlled temperature measurement gate chips can also be deployed according to the density of temperature measurement points to complete multi-point temperature field measurement. The chip is simple to operate, convenient to construct, and easy to install and disassemble. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0029] Figure 1 This is a diagram of the packaging structure of a voltage-controlled temperature measurement gate chip in one embodiment of the present application;
[0030] Figure 2 A schematic diagram of the application principle of a voltage-controlled temperature measurement gate chip provided in one embodiment of the present application;
[0031] Figure 3 A schematic diagram of an analog electronic switch structure provided in one embodiment of the present application.
[0032] Figure numerals: first resistor-R1, second resistor-R2, third resistor-R3, thermistor-NTC, diode-D, analog electronic switch-S, ground bus-G, output bus-AO, power supply bus-VCC, trigger bus-V1, trigger terminal-a, enable terminal-b, ground terminal-c, normally closed terminal-d, common terminal-e, normally open terminal-f. DETAILED DESCRIPTION
[0033] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0034] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0035] In an exemplary embodiment, a voltage-controlled temperature measurement gate chip is provided. The voltage-controlled temperature measurement gate chip adopts a DFN-8 package structure and includes: an analog electronic switch S, a diode D, a thermistor NTC, a first resistor R1, a second resistor R2, and a third resistor R3.
[0036] One end of the thermistor NTC is connected to the normally closed terminal of the analog electronic switch S and the output bus, respectively. One end of the second resistor R2 is connected to the enable terminal of the analog electronic switch S. The other end of the thermistor NTC is connected to the ground bus. The other end of the second resistor R2 is connected to the power supply bus.
[0037] One end of the first resistor R1 is connected to the trigger terminal of the analog electronic switch S. The cathode of the diode D is connected to the other end of the first resistor R1 and one end of the third resistor R3, respectively. The other end of the third resistor R3 is connected to the ground terminal of the analog electronic switch S. The ground terminal of the analog electronic switch S is connected to the ground bus. The anode of the diode D is connected to the trigger bus.
[0038] For example, Figure 1 As shown, the voltage-controlled temperature measurement gate chip adopts the DFN-8 package, and the package size can be 4mm×5mm. There are two rows of parallel flat pins on the bottom of the package chip, with a total of 8 pins. DFN-8 is a surface mount technology integrated circuit package. One end of the first resistor R1 is connected to the trigger terminal a of the analog electronic switch S, and the other end of the first resistor R1 serves as pin 1 of the voltage-controlled temperature measurement gate chip. One end of the second resistor R2 is connected to the enable terminal b of the analog electronic switch S, and the other end of the second resistor R2 serves as pin 2 of the voltage-controlled temperature measurement gate chip and is connected to the power supply bus VCC ( Figure 1 The cathode of the diode D is connected to the other end of the first resistor R1 and one end of the third resistor R3, respectively. The anode of the diode D serves as pin 4 of the voltage-controlled temperature measurement gate chip. The other end of the third resistor R3 is connected to the ground terminal c of the analog electronic switch S. The ground terminal c of the analog electronic switch S serves as pin 6 of the voltage-controlled temperature measurement gate chip and is connected to the ground bus G ( Figure 1 (not shown). One end of the thermistor NTC is connected to the normally closed terminal d of the analog electronic switch S, and the other end of the thermistor NTC serves as pin 5 of the voltage-controlled temperature measurement gate chip. The common terminal e of the analog electronic switch S serves as pin 7 of the voltage-controlled temperature measurement gate chip, and the normally open terminal f of the analog electronic switch S serves as pin 8 of the voltage-controlled temperature measurement gate chip.
[0039] As an optional implementation, the DFN-8 package structure of the voltage-controlled temperature gate chip can adopt a lead-free flat pin design. This eliminates exposed pins and external leads, allowing for closer pin spacing (typically 0.5mm). This not only reduces the package size and ensures a more compact structure, facilitating temperature measurement installation in confined spaces and achieving higher temperature measurement density, but also has lower parasitic inductance and capacitance. An exposed heat transfer element is located in the center of the package bottom, allowing for direct soldering to the PCB's heat conduction plane, providing excellent thermal conductivity and temperature measurement conditions for better temperature sensing performance.
[0040] Furthermore, diode D may be a germanium diode, which has a forward voltage drop of 0.3V. When the trigger voltage is greater than 0.3V, the germanium diode (i.e., diode D) conducts. The resistance of the first resistor R1 may be 680KΩ. The resistance of the second resistor R2 may be 1MΩ. The resistance of the third resistor R3 may be 1MΩ.
[0041] As an optional implementation, when multiple voltage-controlled temperature measurement gate chips are connected in sequence to measure the temperature of multiple temperature fields, the other end of the first resistor in the i-th voltage-controlled temperature measurement gate chip is connected to the positive electrode of the diode in the i+1-th voltage-controlled temperature measurement gate chip.
[0042] The normally-open terminal f of the analog electronic switch in the i-th voltage-controlled temperature measurement gate chip is connected to the other end of the thermistor in the i+1-th voltage-controlled temperature measurement gate chip. The common terminal e of the analog electronic switch in the j-th voltage-controlled temperature measurement gate chip is connected to the output bus, where j is an odd number. The common terminal e of the analog electronic switch in the j+1-th voltage-controlled temperature measurement gate chip is connected to the ground bus.
[0043] The other end of the thermistor in the first voltage-controlled temperature measurement gate chip is connected to the ground bus. The anode of the diode in the first voltage-controlled temperature measurement gate chip is connected to the trigger bus.
[0044] In an exemplary embodiment, in combination with the voltage-controlled temperature measurement gate chip in the above embodiment, the working principle of the voltage-controlled temperature measurement gate chip is described by taking the example of multiple voltage-controlled temperature measurement gate chips connected in sequence to measure the temperature of multiple temperature fields. Figure 2 As shown in the figure, the first four of the multiple voltage-controlled temperature measurement gate chips connected in sequence are used as an example for explanation. T1, T2, T3 and T4 are Figure 2 The code of the voltage-controlled temperature measurement gate chip connected from right to left in the figure. The structure of the analog electronic switch S is as follows Figure 3 shown.
[0045] Pin 2 of chips T1, T2, T3, and T4 is connected to the power bus VCC (supply voltage is +5V). Pin 6 of chips T1, T2, T3, and T4 is connected to the ground bus G. After power is applied to both the power bus VCC and the ground bus G, the enable terminal b (V+) of analog electronic switch S is connected to power, and the ground terminal c (GND) of analog electronic switch S is connected to ground, placing analog electronic switch S in an enabled standby state. Pin 1 of chips T1, T2, T3, and T4 is connected in series with pin 4 of the next chip, and pin 5 of chips T1, T2, T3, and T4 is connected in series with pin 8 of the next chip. Pin 4 of chip T1 is connected to the trigger bus V1. Pin 5 of chip T1 is connected to the ground bus G. Pin 7 of odd-numbered chips T1 and T3 is connected to the output bus AO. Pin 7 of odd-numbered chips T2 and T4 is connected to the ground bus G. This connection scheme can be repeated for each of the TN chips. When the trigger voltage VF on the trigger bus V1 is lower than the conduction voltage of diode D (0.3V in this embodiment), the diode D of chip T1 does not conduct, and the analog electronic switch S in T1 is not triggered. The output bus AO is connected to the normally closed terminal d(NC) of the internal analog electronic switch S and the NTC of chip T1 through pin 7 of chip T1. The other end of the NTC is connected to the ground bus G. At this time, the resistance between the output bus AO and the ground bus G is the resistance generated by the NTC of chip T1 and the normally closed terminal d(NC) of the analog electronic switch S. In the embodiment provided in this application, the NTC is a 10KΩ thermistor NTC. Temperature changes have a significant impact on the resistance. The conduction resistance of the normally closed terminal d(NC) of the analog electronic switch S (typically 2Ω) can be ignored or compensated by sampling through the host computer, thereby completing the reading of the NTC temperature of the T1 chip. The output bus AO synthesizes the voltage of the T1 NTC to form a voltage value, which can then be calculated by the host computer algorithm to obtain the synchronous temperature value of the corresponding measurement point of the T1 chip.
[0046] When the trigger voltage VF exceeds 0.3V, the diode D of chip T1 conducts, and the trigger voltage is applied to the trigger terminal a (IN) of the analog electronic switch S in chip T1. The analog electronic switch S in chip T1 is triggered, and the common terminal e (COM) of the analog electronic switch S is disconnected from the normally closed terminal d (NC), and the common terminal e (COM) is connected to the normally open terminal f (NO). At this time, the NTC of chip T1 is disconnected, and the NTC of chip T2 is connected to pin 7 of chip T1 through pin 5 of chip T2 and pin 8 of chip T1, and thus connected to the output bus AO. The NTC of chip T2 is already connected to the ground bus G through the normally closed terminal d (NC) of the analog electronic switch S of chip T2 and then through pin 7 of chip T2. Therefore, when the trigger voltage VF is slightly higher than 0.3V, once the analog electronic switch S of chip T1 is triggered, the resistance between the output bus AO and the ground bus G is the resistance of the NTC of chip T2, not the resistance of the NTC of chip T1. Similarly, the switching point internal resistance (generally no more than 5Ω) of the analog electronic switch S of the chips T1 and T2 can be ignored or compensated by the host computer.
[0047] When the trigger voltage VF is slightly higher than 0.6V, the diode D of chip T2 conducts, and the trigger voltage is applied to the trigger terminal a (IN) of the analog electronic switch S of chip T2. The analog electronic switch S of chip T2 is triggered, and the common terminal e (COM) of the analog electronic switch S of chip T2 is disconnected from the normally closed terminal d (NC), and the common terminal e (COM) is connected to the normally open terminal f (NO). At this time, the NTC of chip T2 is disconnected, and the NTC of chip T3 is connected to pin 7 of chip T2 and ground bus G through pin 5 of chip T3 and pin 8 of chip T2. The NTC of chip T3 is connected to the output bus AO through the normally closed terminal d (NC) of the analog electronic switch S of chip T3 and then through pin 7 of chip T3. Therefore, when the trigger voltage VF is higher than a certain value of 1.4V, once the analog electronic switch S of chip T2 is triggered, the resistance between the output bus AO and the ground bus G is the resistance of the NTC of chip T3, not the resistance of the NTC of chip T2. Similarly, the internal resistance of the switch node of the analog electronic switch S of the chips T2 and T3 (generally not exceeding 5Ω) can be ignored or corrected by the host computer.
[0048] Similarly, when the trigger voltage VF continues to rise, each increase of 0.3V (as an example, the actual application can be determined according to needs) will trigger the next voltage-controlled temperature measurement gate chip Tn, and then sequentially transfer the resistance performance of the NTC in a chip between the output bus AO and the ground bus G. Assuming that when the VF voltage is repeatedly triggered from 0 to 24V, and the chipset is triggered in a sawtooth wave cycle, the resistance voltage between the output bus AO and the ground bus G is the voltage generated by the NTC temperature resistance that appears alternately in all the voltage-controlled temperature measurement gate chips and is the only one that does not appear at the same time. This voltage curve (i.e. Figure 2AO curve) period and trigger voltage waveform (ie Figure 2 The VF sawtooth waveform in the image (shown in Figure 1) matches the periodicity of the AO voltage. The voltage fluctuations generated within one cycle of the AO voltage correspond to the NTC temperature voltage fluctuations at all the temperature measurement points of the voltage-controlled temperature measurement gate chip, thus achieving voltage-controlled continuous temperature measurement by sequentially triggering diode D. This voltage curve can be synchronously restored and recorded by a host computer to record the temperature value corresponding to each trigger voltage point. The curve can also be used to analyze the target object being measured, providing information on the temperature field and energy transfer direction along its length, plane extension, and spatial distribution points, similar to the temperature field imaging effect of an infrared thermometer.
[0049] As an optional implementation, the analog electronic switch S can be a voltage-triggered electronic switch, and the thermistor NTC can be a 3950 10kΩ thermistor, which features fast response, high sensitivity, and excellent temperature measurement accuracy over a range of -50°C to 150°C. The 10kΩ resistance of the NTC thermistor is much greater than the internal resistance of the electronic switch, making it suitable for voltage-triggered electronic switch voltage-controlled measurement. When the control point temperature rises, the energy of the electrons in the NTC thermistor increases, intensifying their motion and causing a change in resistance.
[0050] The analog electronic switch adopts current conventional technology and is manufactured based on the production process of industrial-grade or military-grade analog electronic switches. In this embodiment, the analog electronic switch with a single power supply is taken as an example. It can operate in the temperature range of -50℃ to 150℃, has a low on-resistance performance of 2.5Ω, and has a negligible impact on the temperature resistance of the thermal resistor. It can also prevent the voltage-controlled temperature measurement gate chip from interfering with the measurement of the test point temperature due to its own heating. The switching time tON of the analog electronic switch S is 11ns and the tOFF is 30ns. The nanosecond fast switching response can adapt to extremely short trigger cycles and ensure extremely fast temperature measurement response speed. The input current of the analog electronic switch S is 0.1~0.01μA, which ensures performance under low power consumption conditions, the power consumption is less than 0.01μW, and the heat generated by itself can be ignored.
[0051] When the trigger voltage on the trigger bus connected to the voltage-controlled temperature measurement gate chip is set to 24V, commonly used in industrial environments, each 0.3V increase triggers the next voltage-controlled temperature measurement gate chip in sequence. In this case, 80 chips can be triggered in series. The maximum cumulative trigger current of diode D is tens of microamperes, and the maximum power that diode D can withstand does not exceed 100μW. Therefore, the heat generated by multiple voltage-controlled temperature measurement gate chips is negligible and insufficient to affect NTC temperature measurement. In addition, the internal packaging design of the voltage-controlled temperature measurement gate chip keeps the NTC away from surrounding components that may generate heat, or the NTC chip is installed externally. Therefore, the impact of the voltage-controlled temperature measurement gate chip's own heat on NTC temperature measurement can be eliminated.
[0052] In all embodiments provided herein, the diodes exhibit high-temperature resistance, military-grade performance, low forward voltage drop, and low reverse leakage current. When the trigger voltage VF exceeds 0.3V (0.3V in the embodiments provided herein), the diode's PN junction conducts, triggering the analog electronic switch S.
[0053] The packaging of the voltage-controlled temperature measurement gate chip can adopt high-temperature resistant and military-grade packaging technology, which makes the application range of the voltage-controlled temperature measurement gate chip wider.
[0054] As an optional implementation, the voltage-controlled temperature gate chip can utilize other suitable packaging structures, not limited to packages of other structural shapes or smaller volumes. The packaging of the NTC thermistor is not limited to external mounting using unused pads on the chip, and is not limited to NTCs. Other temperature measurement components, such as PTCs (thermistors) and PT1000s (platinum resistance thermometers), can also be used. The diode in the voltage-controlled temperature gate chip can also be replaced with a Zener diode or other method, with slight circuit adjustments to achieve the same purpose with varying step voltage differences.
[0055] Combined with the above embodiments, the advantage of the voltage-controlled temperature measurement gate chip in the present application is that it is packaged with a DFN-8 (4mm×5mm) package structure chip, which is small in size and can complete temperature measurement independently. It can also imitate the advantages of the communication bus temperature measurement method. After all the temperature measurement chips are connected in series and parallel on one bus, the trigger voltage is converted into one cycle each time, so that all temperature measurement elements complete a temperature measurement output in sequence and continuously, realizing high-density and multi-point temperature detection on one bus. It has the characteristics of plasticity and scalability, and solves the problems of complex wiring, high cost, and poor synchronization of traditional temperature measurement methods. It has the advantages of low application cost, low power consumption, simple installation and disassembly, and high deployment density. As the trigger voltage changes, it can sense the temperature of multiple points, and can measure the temperature at multiple points over a long distance, or measure the temperature of a fixed point with a fixed voltage. Its voltage control function and temperature measurement technology are simple and reliable, with low power consumption, which not only ensures real-time performance, but also has the characteristics of high deployment density. Especially in the interior of moving devices, machine bodies, and process pipelines, it is necessary to measure continuously changing temperature fields and determine energy transfer relationships through multi-point temperature changes. Due to the limitations of long distances, narrow spaces, and high temperatures inside the measured objects, it is impossible to deploy a large number of sensor cables and digital-to-analog conversion communication modules.
[0056] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0057] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above examples is only intended to help understand the method and core concept of this application. At the same time, for those skilled in the art, based on the concept of this application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.
Claims
1. A voltage-controlled temperature measurement gate chip, characterized in that: The voltage-controlled temperature measurement gate chip adopts a DFN-8 packaging structure; the voltage-controlled temperature measurement gate chip includes: an analog electronic switch, a diode, a thermistor, a first resistor, a second resistor and a third resistor; One end of the thermistor is connected to the normally closed end of the analog electronic switch and the output bus respectively, and one end of the second resistor is connected to the enable end of the analog electronic switch; the other end of the thermistor is connected to the ground bus; and the other end of the second resistor is connected to the power supply bus; One end of the first resistor is connected to the trigger end of the analog electronic switch; the cathode of the diode is respectively connected to the other end of the first resistor and one end of the third resistor, and the other end of the third resistor is connected to the ground end of the analog electronic switch; the ground end of the analog electronic switch is connected to the ground bus; and the anode of the diode is connected to the trigger bus.
2. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: When there are multiple voltage-controlled temperature measurement gate chips, the other end of the first resistor in the i-th voltage-controlled temperature measurement gate chip is connected to the positive electrode of the diode in the (i+1)-th voltage-controlled temperature measurement gate chip; The normally open end of the analog electronic switch in the i-th voltage-controlled temperature measurement gate chip is connected to the other end of the thermistor in the i+1-th voltage-controlled temperature measurement gate chip; the common end of the analog electronic switch in the j-th voltage-controlled temperature measurement gate chip is connected to the output bus, where j is an odd number; the common end of the analog electronic switch in the j+1-th voltage-controlled temperature measurement gate chip is connected to the ground bus; The other end of the thermistor in the first voltage-controlled temperature measurement gate chip is connected to the ground bus; the anode of the diode in the first voltage-controlled temperature measurement gate chip is connected to the trigger bus.
3. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: The analog electronic switch is a voltage-triggered electronic switch.
4. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: The thermistor is a 3950 type 10KΩ thermistor.
5. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: The DFN-8 package structure adopts a lead-free flat pin design.
6. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: The analog electronic switch has an on-resistance of 2.5Ω and an operating temperature range of -50°C to 150°C.
7. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: The diode is a germanium diode, and when the trigger voltage is greater than 0.3V, the germanium diode is turned on.
8. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: The resistance of the first resistor is 680KΩ.
9. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: The resistance of the second resistor is 1 MΩ.
10. The voltage-controlled temperature measurement gate chip according to claim 1, characterized in that: The resistance of the third resistor is 1 MΩ.