High-precision current detection circuit of BUCK circuit

Abstract

The invention relates to the field of integrated circuits, and provides a high-precision current detection circuit of a BUCK circuit, and the circuit comprises a sampling circuit which is used for collecting an inductive current of a power tube under the BUCK circuit and converting the inductive current into a sampling voltage; the sampling hold circuit is used for averaging the sampling voltage corresponding to the inductive current in the starting stage of the power tube under the BUCK circuit and outputting the average voltage; the average voltage is used for representing the average value of the inductive current of the power tube under the BUCK circuit. The average current mode is adopted to improve the current detection precision, and the detection response speed of the load current is high. Meanwhile, the detected average current is not influenced by inductive current ripples, namely, is not influenced by peripheral devices and the like.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular to a high-precision current detection circuit for a BUCK circuit. Background Art

[0002] High-precision current sensing technology plays a key role in power management chips. It not only improves the accuracy and efficiency of power management, but also enhances system stability and security, extends battery life, and supports more advanced features. Through high-precision current sensing, power management chips can accurately monitor current changes in the system in real time, enabling timely adjustments to power supply strategies, optimizing power distribution, and improving overall power management efficiency. High-precision current sensing also helps the power management chip quickly respond to current fluctuations and take timely measures such as current limiting and voltage reduction to maintain stable system operation and prevent system crashes or damage caused by sudden current changes. Through high-precision current sensing, power management chips can effectively identify and handle abnormal conditions such as overloads and short circuits, providing timely protection mechanisms to ensure device safety.

[0003] Although high-precision current sensing ICs offer significant advantages in many applications, the limitations and challenges of power management ICs with a buck circuit structure, such as current error, overload protection, power supply interference, low-current detection accuracy, cost, and complexity, still require attention.

[0004] Currently, power management chips with buck circuit structures commonly use peak current mode detection. However, because the load current is the average current of the inductor current, and the inductor current is a sawtooth current with ripple, the ripple level of the inductor current is affected by the surrounding inductor components. If peak current detection is used, the load current will vary due to the different current ripples under the condition of a constant peak current. In other words, peak current detection cannot accurately reflect the load current value. Summary of the Invention

[0005] In order to solve the problems existing in the prior art, a high-precision current detection circuit of a BUCK circuit is provided, which improves the average current detection accuracy of the inductor current by adopting an average current detection mode.

[0006] The technical solution adopted by the present invention is as follows: a high-precision current detection circuit for a BUCK circuit, comprising: The sampling circuit is used to collect the inductor current of the power tube under the buck circuit and convert it into a sampling voltage; The sample-and-hold circuit is used to average the sampled voltages corresponding to the inductor current of the power tube in the buck circuit during the on-phase, and output an average voltage; the average voltage is used to represent the average value of the inductor current of the power tube in the buck circuit.

[0007] As a preferred solution, the sampling circuit includes: The current sampling circuit is used to collect the inductor current of the power tube under the buck circuit; The conversion circuit is used to amplify the collected inductor current and convert it into a sampling voltage after amplification processing.

[0008] As a preferred solution, the sample-and-hold circuit includes: The voltage averaging and holding circuit is used to collect the maximum and minimum sampling voltages corresponding to the inductor current during the power tube on phase of the buck circuit, and average and hold them to obtain the average voltage. The filter circuit is used for filtering the average voltage and then outputting it.

[0009] As a preferred solution, the current sampling circuit includes: a first bias current source, a second bias current source, a third bias current source, a first resistor, a second resistor, a third resistor, a first power tube, a second power tube, a power tube under the buck circuit, a third power tube, and a comparator; wherein, The first bias current source is connected to the first end of the first power tube; the second bias current source is connected to the first end of the first power tube via the first resistor, and the second end of the first power tube is grounded; The third bias current source is connected to the first end of the second power tube via the second resistor, the second end of the second power tube is connected to the first end of the lower power tube of the buck circuit, and the second end of the lower power tube of the buck circuit is grounded; The control terminals of the first power tube and the second power tube are both connected to a control voltage; The first input of the comparator is connected to the common node of the second bias current source and the first resistor, the second input of the comparator is connected to the common node of the third bias current source and the second resistor, the output of the comparator is connected to the control terminal of the third power tube, the first terminal of the third power tube is connected to the conversion circuit, and the second terminal of the third power tube is connected to the common node of the second resistor and the second power tube via the third resistor.

[0010] As a preferred solution, the first power tube and the second power tube have the same size, and the types of the first power tube and the second power tube are the same as those of the power tubes in the BUCK circuit.

[0011] As a preferred solution, the magnitude of the current output by the first bias current source is controlled by an external digital circuit, and the second bias current source and the second bias current source provide a fixed current of the same magnitude.

[0012] As a preferred solution, the conversion circuit includes a fourth power tube, a fifth power tube and a fourth resistor; wherein, The first end of the fourth power tube is connected to the first end of the fifth power tube, the control end of the fourth power tube is connected to the control end of the fifth power tube and the second end of the fourth power tube, the second end of the fourth power tube is connected to the first end of the third power tube, and the second end of the fifth power tube is grounded via a fourth resistor; a sampling voltage is derived from a common node of the fifth power tube and the fourth resistor; and a size ratio of the fourth power tube to the fifth power tube is 1:K, where K is greater than 1.

[0013] As a preferred solution, the voltage averaging and holding circuit includes a first switch, a second switch, a third switch, a fourth switch, a first capacitor, a second capacitor and a third capacitor, wherein: A first end of the third switch receives the sampled voltage, a second end of the third switch is connected to a first end of the fourth switch, a second end of the fourth switch is connected to a first end of a third capacitor, and a second end of the third capacitor is grounded; a first end of the first capacitor is connected to a common node between the third switch and the fourth switch; The first end of the second switch is connected to the first end of the third switch, the second end of the second switch is connected to the first end of the first switch, the second end of the first switch is connected to a common node of the third capacitor and the fourth switch; the first end of the second capacitor is connected to a common node of the second switch and the first switch; A common node between the third capacitor and the fourth switch provides an average voltage.

[0014] As a preferred solution, the filtering circuit includes a buffer, a fifth resistor and a filtering capacitor, wherein: The first input terminal of the buffer receives the average voltage, the second input terminal of the buffer is connected to the output terminal of the buffer, the output terminal of the buffer is connected to the first terminal of the filter capacitor via the fifth resistor, and the second terminal of the filter capacitor is grounded; the common node between the filter capacitor and the fifth resistor provides the filtered average voltage.

[0015] As a preferred solution, in the voltage averaging and holding circuit, the first switch is closed before the power tube is turned on in the buck circuit; when the power tube is turned on in the buck circuit, the first switch is opened and the second switch is closed; after the second switch is closed for a preset time, the second switch is opened, and then the third and fourth switches are closed; when the power tube is turned off in the buck circuit, the third and fourth switches are opened, and the first switch is opened.

[0016] Compared with existing technologies, the above technical solution has the following advantages: the average current mode has higher current detection accuracy and faster load current detection response speed than the peak current mode. Furthermore, the detected average current is not affected by inductor current ripple, that is, it is not affected by peripheral components. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1Schematic diagram of a high-precision current detection circuit of a BUCK circuit in an embodiment of the present application.

[0018] Figure 2 This is a schematic diagram of a high-precision current detection circuit of a BUCK circuit in an embodiment of the present application.

[0019] Figure 3 This is a switch control timing diagram in the sample and hold circuit in an embodiment of the present application. DETAILED DESCRIPTION

[0020] The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar modules or modules with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application. On the contrary, the embodiments of the present application include all changes, modifications, and equivalents that fall within the spirit and scope of the appended claims.

[0021] To address the problem of peak current mode detection, where detection results are easily affected by peripheral inductors, leading to insufficient detection accuracy, this embodiment of the present application proposes a high-precision current detection circuit for a buck circuit. This circuit uses average current mode detection, resulting in high detection accuracy and a fast load current detection response speed. Furthermore, the detected average current is unaffected by inductor current ripple, i.e., unaffected by peripheral components.

[0022] Please refer to Figure 1 The high-precision current detection circuit of the buck circuit mainly includes two parts: a sampling circuit and a sample-and-hold circuit. The sampling circuit is used to collect the inductor current of the power tube under the buck circuit and convert it into a sampled voltage; the sample-and-hold circuit is used to average the sampled voltages corresponding to the inductor current of the power tube under the buck circuit during the start-up phase and output an average voltage; the average voltage is used to represent the average value of the inductor current of the power tube under the buck circuit.

[0023] Specifically, the sampling circuit includes a current sampling circuit and a conversion circuit, wherein the current sampling circuit is used to collect the inductor current of the power tube under the BUCK circuit; the conversion circuit is used to amplify the collected inductor current and convert it into a sampling voltage after amplification.

[0024] Please refer to Figure 2 , the embodiment of the present application provides an implementation method of a current sampling circuit and a conversion circuit.

[0025] The current sampling circuit includes a first bias current source IS1, a second bias current source IS2, a third bias current source IS3, a first resistor R1, a second resistor R2, a third resistor R3, a first power tube M1, a second power tube M2, a power tube MP under the buck circuit, a third power tube M3, and a comparator; wherein the first bias current source IS1 is connected to the first end of the first power tube M1; the second bias current source IS2 is connected to the first end of the first power tube M1 via the first resistor R1, and the second end of the first power tube M1 is grounded; the third bias current source IS3 is connected to the first end of the second power tube M2 via the second resistor R2, and the second end of the second power tube M2 is grounded. The two terminals are connected to the first terminal of the power tube MP in the buck circuit, and the second terminal of the power tube MP in the buck circuit is grounded; the control terminals of the first power tube M1 and the second power tube M2 are both connected to the control voltage Vb; the first input terminal of the comparator is connected to the common node of the second bias current source IS2 and the first resistor R1, the second input terminal of the comparator is connected to the common node of the third bias current source IS3 and the second resistor R2, the output terminal of the comparator is connected to the control terminal of the third power tube M3, the first terminal of the third power tube M3 is connected to the conversion circuit, and the second terminal of the third power tube M3 is connected to the common node of the second resistor R2 and the second power tube M2 via the third resistor R3.

[0026] In this embodiment of the present application, the first power transistor M1 and the second power transistor M2 used in the current sampling circuit are of the same type as the power transistor MP in the buck circuit. Using the same type of power transistors to sample the current of the power transistor MP effectively improves sampling accuracy. In one embodiment, the first power transistor M1 and the second power transistor M2 are of the same size. The current output by the first bias current source IS1 can be controlled by an external digital circuit. The second bias current source IS2 and the third bias current source IS3 provide fixed and equal currents.

[0027] The conversion circuit includes a fourth power tube M4, a fifth power tube M5, and a fourth resistor R4; wherein the first end of the fourth power tube M4 is connected to the first end of the fifth power tube M5, the control end of the fourth power tube M4 is connected to the control end of the fifth power tube M5 and the second end of the fourth power tube M4, the second end of the fourth power tube M4 is connected to the first end of the third power tube M3, and the second end of the fifth power tube M5 is grounded via the fourth resistor R4; the common node of the fifth power tube M5 and the fourth resistor R4 is connected to extract the sampling voltage The size ratio of the fourth power tube M4 to the fifth power tube M5 is 1:K2, where K2 is greater than 1.

[0028] Through the cooperation of the current sampling circuit and the conversion circuit, the collected inductor current of the lower power tube MP can be amplified and converted into a sampling voltage Characterization is performed to make the sampling circuit more accurate in sampling small currents.

[0029] The following combination Figure 2 The working process of the current sampling circuit and conversion circuit of this application is explained.

[0030] Assume that the on-resistance of the lower power tube MP is , then the on-resistance of the first power tube M1 and the second power tube M2 are both , the first bias current source IS1 provides a value of Common reference current. The comparator in the current sampling circuit can and the second input clamped to the same voltage, and the currents of the second bias current source IS2 and the third bias current source IS3 are ,but .

[0031] because , , , , substitute it into , you can get .

[0032] Also because , , then the value of Is is substituted into the formula to obtain the sampling voltage From this formula we can see that the sampling voltage It's a become times, voltage bias OFFSET is linear relationship.

[0033] Sampling voltage The voltage bias OFFSET in the chip can be used to make the fourth power tube M4 and the fifth power tube M5 in the saturation region when the chip works in the low current mode. Magnification Stable and does not change with the current. Zoom in In the process, skipped 、 The end zone and sub-domain state make Convert to The response speed is faster. The current of the first bias current source is and parameters The digital circuit configuration can be adjusted to eliminate the deviation caused by chip technology and power supply voltage deviation, making the current detection more accurate. Adding voltage bias to the curve can effectively improve sampling accuracy and sampling speed.

[0034] When the sampling voltage is collected After that, a sample-hold circuit is required to sample the voltage Perform average calculation and keep average output. Please continue to refer to Figure 2 The sampling and holding circuit includes a voltage averaging and holding circuit and a filtering circuit. The voltage averaging and holding circuit is used to collect the maximum and minimum sampling voltages corresponding to the inductor current of the power tube MP in the BUCK circuit during the on-stage, and average the voltages to obtain the average voltage. ; The filter circuit is used to average the voltage Output after filtering.

[0035] Please continue to refer to Figure 2 , the embodiment of the present application also provides an implementation of a voltage averaging and holding circuit and a filtering circuit.

[0036] The voltage averaging and holding circuit includes a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a first capacitor C1, a second capacitor C_sns and a third capacitor C_hold, wherein the first end of the third switch S3 receives the sampling voltage The second end of the third switch S3 is connected to the first end of the fourth switch S4, the second end of the fourth switch S4 is connected to the first end of the third capacitor C_hold, and the second end of the third capacitor C_hold is grounded; the first end of the first capacitor C1 is connected to the common node of the third switch S3 and the fourth switch S4; the first end of the second switch S2 is connected to the first end of the third switch S3, the second end of the second switch S2 is connected to the first end of the first switch S1, and the second end of the first switch S1 is connected to the common node of the third capacitor C_hold and the fourth switch S4; the first end of the second capacitor C_sns is connected to the common node of the second switch S2 and the first switch S1; the common node of the third capacitor C_hold and the fourth switch S4 provides an average voltage By performing voltage averaging on the sampled voltage, the sampling accuracy is improved and the influence of temperature can be eliminated. In this embodiment, the second capacitor C_sns and the third capacitor C_hold have the same capacitance value.

[0037] The filter circuit includes a buffer, a fifth resistor R5 and a filter capacitor C2, wherein the first input terminal of the buffer receives the average voltage The second input terminal of the buffer is connected to the output terminal of the buffer, the output terminal of the buffer is connected to the first terminal of the filter capacitor C2 via the fifth resistor R5, and the second terminal of the filter capacitor C2 is grounded; the common node of the filter capacitor C2 and the fifth resistor R5 provides the filtered average voltage .

[0038] In practical applications, the sampling voltage can be realized by controlling the closing and opening of the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 according to the opening condition of the lower power tube MP. average processing.

[0039] The following combination Figure 2 and Figure 3 The working process of the voltage averaging and holding circuit and the filtering circuit is explained as follows: Please refer to Figure 3 , when the power tube MP is turned on in the BUCK circuit, the inductor current IL decreases linearly with time, and the sampling voltage When the lower power tube MP is turned on, the sampling and holding circuit collects the highest and lowest points of the sampling voltage through the switch capacitor, and then averages the output to obtain the average voltage. , which can represent the average current of the lower tube during the turn-on phase.

[0040] Specifically, the first switch S1 is closed before the power tube MP is turned on in the BUCK circuit. When the power tube MP is turned on in the BUCK circuit, the first switch S1 is opened and the second switch S2 is closed. After the second switch S2 is closed for a preset time (generally a short time), the second switch S2 is opened. When the second switch S2 is opened, the voltage on the second capacitor C_sns is the sampling voltage The highest point voltage After the second switch S2 is opened, the third switch S3 and the fourth switch S4 are closed until the lower power tube MP is turned off, and then the third switch S3 and the fourth switch S4 are opened. At this time, the third capacitor C_hold collects the lowest point of the inductor current falling stage, that is, the sampling voltage The lowest point , then close the first switch S1, since the capacitance values ​​of the second capacitor C_sns and the third capacitor C_hold are equal, the voltages on the second capacitor C_sns and the third capacitor C_hold are averaged to obtain the sampling voltage midpoint of the curve , the voltage value is based on The curve relationship also represents the average value of the corresponding inductor current. In the subsequent stage when the lower power tube MP is turned off and the upper power tube is turned on, the average voltage Just keep it Finally, the average voltage after filtering is converted to Output to the next stage.

[0041] The current sensing circuit of this application uses an average current mode, which offers higher accuracy than the traditional peak current mode. It also responds quickly to load current detection, and the detected average current is unaffected by inductor current ripple. The current sampling circuit uses the same type of device as the lower power transistor for sampling, resulting in higher sampling accuracy. Furthermore, when amplifying the sampled current, a bias current is added to the sampling curve, further enhancing the sampling circuit's accuracy for low-current sampling.

[0042] Those skilled in the art will understand the specific meanings of the above terms in the present invention in specific circumstances. The drawings in the embodiments are used to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0043] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A high-precision current detection circuit for a BUCK circuit, characterized in that: include: The sampling circuit is used to collect the inductor current of the power tube under the buck circuit and convert it into a sampling voltage; The sample-and-hold circuit is used to average the sampled voltages corresponding to the inductor current of the power tube in the buck circuit during the on-phase, and output an average voltage; the average voltage is used to represent the average value of the inductor current of the power tube in the buck circuit.

2. The high-precision current detection circuit of the BUCK circuit according to claim 1, characterized in that: The sampling circuit comprises: The current sampling circuit is used to collect the inductor current of the power tube under the buck circuit; The conversion circuit is used to amplify the collected inductor current and convert it into a sampling voltage after amplification processing.

3. The high-precision current detection circuit of the BUCK circuit according to claim 1 or 2, characterized in that: The sample-and-hold circuit comprises: The voltage averaging and holding circuit is used to collect the maximum and minimum sampling voltages corresponding to the inductor current during the power tube on phase of the buck circuit, and average and hold them to obtain the average voltage. The filter circuit is used for filtering the average voltage and then outputting it.

4. The high-precision current detection circuit of the BUCK circuit according to claim 2, characterized in that: The current sampling circuit includes: a first bias current source, a second bias current source, a third bias current source, a first resistor, a second resistor, a third resistor, a first power tube, a second power tube, a BUCK circuit lower power tube, a third power tube and a comparator; wherein, The first bias current source is connected to the first end of the first power tube; the second bias current source is connected to the first end of the first power tube via the first resistor, and the second end of the first power tube is grounded; The third bias current source is connected to the first end of the second power tube via the second resistor, the second end of the second power tube is connected to the first end of the lower power tube of the buck circuit, and the second end of the lower power tube of the buck circuit is grounded; The control terminals of the first power tube and the second power tube are both connected to a control voltage; The first input of the comparator is connected to the common node of the second bias current source and the first resistor, the second input of the comparator is connected to the common node of the third bias current source and the second resistor, the output of the comparator is connected to the control terminal of the third power tube, the first terminal of the third power tube is connected to the conversion circuit, and the second terminal of the third power tube is connected to the common node of the second resistor and the second power tube via the third resistor.

5. The high-precision current detection circuit of the BUCK circuit according to claim 4, characterized in that: The first power tube and the second power tube have the same size, and the types of the first power tube and the second power tube are the same as those of the power tubes in the BUCK circuit.

6. The high-precision current detection circuit of the BUCK circuit according to claim 4 or 5, characterized in that: The magnitude of the current output by the first bias current source is controlled by an external digital circuit, and the second bias current source and the second bias current source provide a fixed current with the same magnitude.

7. The high-precision current detection circuit of the BUCK circuit according to claim 4, characterized in that: The conversion circuit includes a fourth power tube, a fifth power tube and a fourth resistor; wherein, The first end of the fourth power tube is connected to the first end of the fifth power tube, the control end of the fourth power tube is connected to the control end of the fifth power tube and the second end of the fourth power tube, the second end of the fourth power tube is connected to the first end of the third power tube, and the second end of the fifth power tube is grounded via a fourth resistor; a sampling voltage is derived from a common node of the fifth power tube and the fourth resistor; and a size ratio of the fourth power tube to the fifth power tube is 1:K, where K is greater than 1.

8. The high-precision current detection circuit of the BUCK circuit according to claim 3, characterized in that: The voltage averaging and holding circuit includes a first switch, a second switch, a third switch, a fourth switch, a first capacitor, a second capacitor, and a third capacitor, wherein: A first end of the third switch receives the sampled voltage, a second end of the third switch is connected to a first end of the fourth switch, a second end of the fourth switch is connected to a first end of a third capacitor, and a second end of the third capacitor is grounded; a first end of the first capacitor is connected to a common node between the third switch and the fourth switch; The first end of the second switch is connected to the first end of the third switch, the second end of the second switch is connected to the first end of the first switch, the second end of the first switch is connected to a common node of the third capacitor and the fourth switch; the first end of the second capacitor is connected to a common node of the second switch and the first switch; A common node between the third capacitor and the fourth switch provides an average voltage.

9. The high-precision current detection circuit of the BUCK circuit according to claim 8, characterized in that: The filtering circuit includes a buffer, a fifth resistor and a filtering capacitor, wherein: The first input terminal of the buffer receives the average voltage, the second input terminal of the buffer is connected to the output terminal of the buffer, the output terminal of the buffer is connected to the first terminal of the filter capacitor via the fifth resistor, and the second terminal of the filter capacitor is grounded; the common node between the filter capacitor and the fifth resistor provides the filtered average voltage.

10. The high-precision current detection circuit of the BUCK circuit according to claim 9, characterized in that: In the voltage averaging and holding circuit, the first switch is closed before the power tube is turned on in the buck circuit. When the power tube is turned on in the buck circuit, the first switch is opened and the second switch is closed. After the second switch is closed for a preset time, the second switch is opened, and then the third and fourth switches are closed. When the power tube is turned off in the buck circuit, the third and fourth switches are opened, and the first switch is opened.

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