A large dynamic range charge time measurement circuit, device and system

Abstract

The application discloses a large dynamic range charge time measurement circuit, device and system, a front-end shunt circuit divides and outputs an input large dynamic range electric signal with different gains; a total of N filter shaping circuits are used for amplifying, filter shaping and outputting signals with different gains output by the front-end shunt circuit, and the N filter shaping circuits output a plurality of peak position staggered quasi-Gaussian waveforms; a switch switching circuit receives the N amplified and shaped waveforms, and switches the switch between different filter shaping circuits under the control of a control signal, so that one of the shaped waveforms is selected and output through a driver; and a digitizing circuit quantizes the output analog waveform of the switch switching circuit, and is used for data analysis to obtain charge time information. The circuit switches between shaped waveforms with different time constants through the switch, selects one of the outputs, completes large dynamic range signal measurement, multiplexes the digitizing circuit, and reduces resource consumption.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, in particular to a large dynamic range charge time measurement circuit, device and system. BACKGROUND

[0002] In high-energy physics experiments, a detector is used to detect particles, and the detector outputs an electrical signal carrying information such as the charge time of the particles. The readout electronics system receives and processes the electrical signal, converts it into a digital signal, and transmits it to the data processing system to obtain information such as the charge time. In many experiments, it is required to electronically read out the large dynamic range signal output by the detector. One type of large dynamic range detector is a photomultiplier tube (PMT, Photon Multiplier Tube), which converts optical signals into current signals for output. The dynamic range requirement covers thousands of photoelectrons (PE, Photoelectron). A scheme based on analog amplification filtering shaping combined with digital circuit quantization technology is widely used in charge time measurement of large dynamic range PMT signals. The digitized waveform can be processed to obtain information such as the charge amount and arrival time of the signal.

[0003] In order to realize the measurement of large dynamic range signals, the traditional scheme is to use a segmented measurement technology, which divides the PMT signal into multiple signals with different gains. Each signal is equipped with a separate amplification shaping circuit and digital circuit. This scheme uses multiple channels to measure a signal, which has high complexity and increases the chip complexity, area and power consumption in the field of application specific integrated circuits (ASIC, Application Specific integrated Circuit). SUMMARY

[0004] The purpose of the present application is to provide a large dynamic range charge time measurement circuit, device and system. The circuit switches between shaped waveforms with different time constants through a switch and selects one output, thereby completing large dynamic range signal measurement, multiplexing digital circuits and reducing resource consumption.

[0005] The purpose of the present application is achieved by the following technical solutions:

[0006] A large dynamic range charge time measurement circuit, the circuit comprising a front-end shunt circuit, a filter shaping circuit, a switch circuit and a digitizing circuit, wherein:

[0007] The front-end shunt circuit outputs the input large dynamic range electrical signal with different gains;

[0008] The filter shaping circuit has N paths in total, corresponding to the front-end shunt circuit, and is configured to amplify and filter shape signals of different gains output by the front-end shunt circuit, and output multiple quasi-Gaussian waveforms with peak positions staggered.

[0009] The switch switching circuit receives the N amplified and shaped waveforms, and switches the switch between the filter shaping circuits with different time constants under the control of a control signal, so as to select one of the shaped waveforms to be output by a driver.

[0010] The digitizing circuit quantizes the output analog waveform of the switch switching circuit, for subsequent data analysis to obtain charge time information.

[0011] As can be seen from the technical solutions provided by the above-mentioned application, the above-mentioned circuit switches between shaped waveforms with different time constants through a switch, and selects one of the waveforms to be output, thereby completing large dynamic range signal measurement, multiplexing a digitizing circuit, reducing resource consumption, and providing a widely used and practical solution for charge time measurement of large dynamic range signals in high-energy physics experiments. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0013] Figure 1 The structure diagram of the large dynamic range charge time measurement circuit provided by the embodiment of the present application is shown.

[0014] Figure 2 The overall circuit structure diagram of the example provided by the present application is shown.

[0015] Figure 3 The output waveform simulation diagram under the input signal of the example 21PE provided by the present application is shown.

[0016] Figure 4 The output waveform simulation diagram under the input signal of the example 2000PE provided by the present application is shown. DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, but not all the embodiments of the present application, which do not constitute a limitation on the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0018] As Figure 1 The application provides a structure diagram of a large dynamic range charge time measurement circuit, which comprises a front-end branching circuit, a filter shaping circuit, a switch switching circuit and a digitizing circuit, wherein:

[0019] The front-end branching circuit branches and outputs inputted large dynamic range electrical signals at different gains to meet the requirement of large dynamic range;

[0020] The filter shaping circuit has N paths in total, corresponding to the front-end branching circuit, and is used for amplifying and filter shaping signals at different gains outputted by the front-end branching circuit, and outputting multiple quasi-Gaussian waveforms with peak positions staggered;

[0021] The switch switching circuit receives N amplified and shaped waveforms, and switches the switch between filter shaping circuits with different time constants under the control of a control signal, and selects one shaped waveform to be outputted by a driver;

[0022] The digitizing circuit quantitatively processes the outputted analog waveform of the switch switching circuit, and is used for subsequent data analysis to obtain charge time information.

[0023] In the specific implementation, the front-end branching circuit receives large dynamic range electrical signals of a detector, and outputs N signals at different gains, from the first path to the Nth path, with the gain from high to low.

[0024] In addition, the filter shaping circuit adopts RC (Resistance and Capacitance) low-pass filtering, and uses a closed-loop operational amplifier for gain compensation after each stage of filtering, and the RC time constant of each filter shaping circuit is different, from the first path to the Nth path, with the RC time constant from small to large.

[0025] As Figure 1 The switch switching circuit comprises a comparator, a switch control circuit, a switch and a driver, wherein:

[0026] Except for the last filter shaping circuit, the rest of the filter shaping circuits are connected with a comparator, one input end of each comparator is connected with the output of the corresponding filter shaping circuit, and the other input end is connected with an adjustable potential, and the output ends of all the comparators are connected to the switch control circuit;

[0027] The control signal outputted by the switch control circuit is connected to the enable end of the switch;

[0028] The input end of the switch is connected with the output of all the filter shaping circuits, and the output end is connected with the input end of the driver;

[0029] The output end of the driver is connected to the input end of the digitizing circuit.

[0030] In a specific implementation, the switch control circuit in the switch switching circuit receives the signal output by the comparator and outputs the signal after signal expansion for controlling the switching of the switch. The specific process of the switching of the switch is as follows:

[0031] When the first comparator does not flip, the switch is connected to the output of the first filter shaping circuit;

[0032] When the first comparator flips, the control signal output by the switch control circuit makes the switch switch from the output of the first filter shaping circuit to the output of the second filter shaping circuit;

[0033] When the second comparator flips, the control signal output by the switch control circuit makes the switch switch from the output of the second filter shaping circuit to the output of the third filter shaping circuit;

[0034] The switching is sequentially cycled, and finally the switch switches to the output of the Nth filter shaping circuit.

[0035] In addition, the signal expansion time of the switch control circuit is designed to be adjustable, so as to ensure the integrity of the trailing edge of the waveform signal after the switching of the switch.

[0036] In a specific implementation, the input end of the digitizing circuit receives the output of the switch switching circuit, the output end outputs a quantized digital signal, and the quantized digital signal is sent to a data processing system to analyze and acquire charge time information.

[0037] It is worth noting that the contents not described in detail in the embodiments of the present application belong to the prior art known to those skilled in the art. For example, although the embodiments can provide parameter demonstrations containing specific values, the parameters do not need to be exactly equal to the corresponding values, but can be approximately equal to the corresponding values within an acceptable error tolerance or design constraint.

[0038] Based on the above-mentioned circuit, the embodiments of the present application further provide an electronic device comprising the above-mentioned circuit.

[0039] The embodiments of the present application further provide an integrated circuit system, wherein the above-mentioned circuit is integrated.

[0040] The circuit described in the embodiments of the present application is illustrated below with a specific example. The example is a complete example based on a 180 nm CMOS process and can complete the charge and time measurement of a PMT signal with a dynamic range of 2000 PE.

[0041] As Figure 2The whole circuit structure of the example of the present application is shown in the schematic diagram. In the example, the front-end shunt circuit receives PMT current signal input and shunts two high and low gain current signals. The mirror ratio of the high gain output current is 1:1, and the mirror ratio of the low gain output current is 20:1. The high and low gain output currents are converted into voltage signals through 50Ω and 150Ω pull-up resistors, respectively, and are sent to the high and low gain filter shaping circuits.

[0042] The high gain filter shaping circuit completes 1-20 PE dynamic range signal measurement, and the low gain filter shaping circuit completes 20-2000 PE dynamic range signal measurement.

[0043] The high gain filter shaping circuit adopts two-stage 10kΩ resistors and 2pF capacitors to form a second-order RC filter circuit with a time constant of 20ns, and the low gain filter shaping circuit adopts two-stage 10kΩ resistors and 5pF capacitors to form a second-order RC filter circuit with a time constant of 50ns. Different time constants can make the peak positions of the two shaping outputs staggered, so that there is enough low gain waveform information on the waveform after the switch is switched.

[0044] In the switch switching circuit, the threshold end of the comparator is configured using an 8bit, 1.8V DAC. One end of the comparator is a high gain shaped negative pulse signal with a baseline of about 1.4V, and the other end of the comparator is set to 0.3V by adjusting the DAC, which is called the threshold voltage. When the signal input does not exceed 20PE, the high gain shaped negative pulse signal will not be lower than the threshold voltage, the comparator will not flip, and the output will be low. When the input signal exceeds 20PE, when the high gain shaped negative pulse signal crosses the threshold (from higher than the threshold voltage to lower than the threshold voltage), the comparator flips and the output jumps to high. When the switch enable end is low, it is connected to the high gain shaping output, and when the enable end is high, it is connected to the low gain shaping output. The switch switching control circuit uses a monostable circuit to expand the high level output by the comparator to about 600ns and uses this signal to control the switch switching. The expansion time can be adjusted by changing the delay of each delay unit in the monostable circuit, so that the high level duration can cover the trailing edge of the low gain shaped waveform after the switch is switched.

[0045] In the monostable circuit, the clock end of the D flip-flop receives the output of the comparator, the D end receives 1.8V high level, and the Q end outputs the switch enable control signal. After low level reset, the monostable circuit starts to work, at this time, the Q end outputs low level, that is, the switch enable end is low level, and the switch is connected to the high gain shaping output. When the rising edge of the comparator output signal comes, the Q end jumps to high level following the D end, and the switch switches to the low gain shaping output. At the same time, the Q end is connected to the reset end of the D flip-flop through the combination logic circuit, so as to delay a certain time after the Q end jumps to high level, and make the Q end return to low level through reset, so that the switch is reconnected to the high gain shaping output, and the circuit can adjust the delay time by changing the bias current of the delay unit.

[0046] In the digitizing circuit, the ADC is used for quantization processing of the analog waveform, and the output data is sent to the data processing system for analysis to obtain the charge time information.

[0047] In this example, a PMT waveform is used as input, as shown in the following figure: Figure 3 As shown in the following figure, the output waveform simulation diagram under the input signal of 21PE of the example of the application is shown, as shown in the following figure: Figure 4 As shown in the following figure, the output waveform simulation diagram under the input signal of 2000PE of the example of the application is shown, from the waveform simulation result, it can be seen that the switch completes switching, and the low gain shaping waveform part after switching is relatively complete, and can complete the charge time information measurement.

[0048] In summary, the circuit described in the embodiment of the application uses a single channel to process a signal with a large dynamic range and sends it into a single digitizing circuit for quantization. Compared with the traditional circuit using multiple channels to complete the measurement of a signal with a large dynamic range, the quantization circuit is multiplexed, the circuit structure is simplified, the area and power consumption are reduced, and a widely and practical solution for the charge time measurement of a signal with a large dynamic range in high energy physics experiments is provided.

[0049] The above description is only the preferred embodiment of the application, but the protection scope of the application is not limited to this. Any changes or replacements within the technical range disclosed in the application can be easily thought by those skilled in the art, which should be covered in the protection scope of the application. Therefore, the protection scope of the application should be subject to the protection scope of the claims. The information disclosed in the background section of this document is only intended to deepen the understanding of the general background of the application, and should not be regarded as acknowledging or implying in any form that the information constitutes the prior art known by those skilled in the art.

Claims

1. A large dynamic range charge time measurement circuit, characterized by, The circuit comprises a front-end branching circuit, a filter shaping circuit, a switch switching circuit and a digitizing circuit, wherein: The front-end branching circuit branches and outputs inputted electrical signals with large dynamic range at different gains; The filter shaping circuit has N branches in total, corresponding to the front-end branching circuit, and is used to amplify and filter shape signals with different gains outputted by the front-end branching circuit, and output multiple quasi-Gaussian waveforms with peak positions staggered; The switch switching circuit receives the amplified and shaped waveforms of the N branches, and switches the switch between filter shaping circuits with different time constants under the control of a control signal, so as to select one of the shaped waveforms to pass through a driver for output; The digitizing circuit quantizes the output analog waveform of the switch switching circuit, and is used for subsequent data analysis to obtain charge time information.

2. The large dynamic range charge time measurement circuit according to claim 1, wherein: The front-end branching circuit receives electrical signals with large dynamic range of a detector, and outputs N signals with different gains, from the 1st branch to the Nth branch, with the gain from high to low.

3. The large dynamic range charge time measurement circuit according to claim 1, wherein: The filter shaping circuit adopts RC low-pass filtering, and uses a closed-loop operational amplifier for gain compensation after each level of filtering, and the RC time constant of each filter shaping circuit is different, from the 1st branch to the Nth branch, with the RC time constant from small to large.

4. The large dynamic range charge time measurement circuit of claim 1, wherein, The switch switching circuit comprises a comparator, a switch control circuit, a switch and a driver, wherein: Except for the last filter shaping circuit, the rest of the filter shaping circuits are connected with a comparator, one input end of each comparator is connected with the output of the corresponding filter shaping circuit, and the other input end is connected with an adjustable potential, and the output ends of all the comparators are connected to the switch control circuit; The control signal outputted by the switch control circuit is connected to the enable end of the switch; The input end of the switch is connected to the output of all the filter shaping circuits, and the output end is connected to the input end of the driver; The output end of the driver is connected to the input end of the digitizing circuit.

5. The large dynamic range charge time measurement circuit of claim 4, wherein, The switch control circuit in the switch switching circuit receives the signal outputted by the comparator, and outputs the signal for controlling the switching of the switch.

6. The large dynamic range charge time measurement circuit of claim 5, wherein, The specific process of the switch switching is as follows: When the 1st comparator does not flip, the switch is connected to the output of the 1st filter shaping circuit; When the 1st comparator flips, the control signal outputted by the switch control circuit makes the switch switch from the output of the 1st filter shaping circuit to the output of the 2nd filter shaping circuit; When the 2nd comparator flips, the control signal outputted by the switch control circuit makes the switch switch from the output of the 2nd filter shaping circuit to the output of the 3rd filter shaping circuit; The switch is switched to the output of the Nth filter shaping circuit in turn.

7. The large dynamic range charge time measurement circuit of claim 5, wherein, The signal widening time of the switch control circuit is designed to be adjustable, so as to ensure the completeness of the trailing edge of the waveform signal after the switch switching.

8. The large dynamic range charge time measurement circuit according to claim 1, wherein: The input of the digitizing circuit receives the output of the switch switching circuit, and the output is a quantized digital signal, which is sent to a data processing system to analyze and obtain charge time information.

9. An electronic device, comprising: The electronic device comprises the circuit according to any one of claims 1-8.

10. An integrated circuit system, characterized by The circuit according to any one of claims 1-8 is integrated in the integrated circuit system.

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