Symbol timing synchronization method and system for Multi-h CPM modulation signal

Abstract

The invention discloses a multi-h CPM modulation signal symbol timing synchronization method and system, and relates to signal processing, and the method comprises the steps: inputting an information bit sequence into an LDPC encoder, and processing an output sequence to obtain a sending signal; receiving the digital intermediate frequency modulation signal, performing orthogonal down-conversion processing to obtain a baseband signal, and performing symbol difference processing on the baseband signal; performing interpolation processing by using an interpolation filter; according to the obtained interpolation output result, a timing error estimation value is obtained through detection based on an early-late gate method; and enabling the timing error estimation value to pass through a loop filter, and controlling an NCO module to adjust the interpolation moment according to a loop filtering result, thereby realizing symbol timing synchronization. The method provided by the invention has the characteristics of high precision and high robustness, and the overall performance and communication reliability of the system can be improved.

Description

Technical Field

[0001] The present application relates to the technical fields of signal processing and data processing, and in particular to a symbol timing synchronization method and system for a Multi-h CPM modulated signal. Background Art

[0002] Continuous Phase Modulation (CPM) is a modulation scheme widely used in wireless communication systems. Due to its advantages such as constant envelope, high spectral efficiency, and excellent noise immunity, it is particularly suitable for communication scenarios with strict requirements on power amplifier nonlinearity and spectrum utilization. As the transmission rates of communication systems continue to increase, CPM modulation schemes are also evolving. Multi-h CPM, as an extension of CPM modulation, introduces different modulation indices in multiple symbol periods, achieving higher spectral efficiency and stronger anti-interference capabilities. In recent years, it has attracted widespread attention in military communications, satellite communications, deep space communications, and other fields.

[0003] However, the complex structure of Multi-h CPM modulated signals, coupled with the periodic variations in the modulation index, disrupts the consistent phase smoothness characteristic of conventional CPM modulation, posing new challenges for synchronization processing at the receiver. In particular, due to the diversity of the modulation index and the constraints of phase continuity, traditional CPM synchronization algorithms are difficult to directly apply to Multi-h CPM signals, often resulting in degraded synchronization performance, increased system bit error rates, and even demodulation failure.

[0004] Existing symbol timing synchronization methods are mostly based on maximum likelihood estimation, non-data-assisted algorithms, or frequency-domain processing. These methods perform well when processing CPM signals with a constant modulation index, but often suffer from slow convergence, high algorithmic complexity, and sensitivity to channel conditions when dealing with Multi-h CPM signals. Furthermore, while some improved schemes are compatible with multiple modulation indices, their designs still fail to fully consider the impact of modulation parameter variations on synchronization accuracy in Multi-h structures, making them difficult to meet the practical application requirements in complex environments with high dynamic ranges and low signal-to-noise ratios. Summary of the Invention

[0005] The embodiments of the present application provide a symbol timing synchronization method and system for a Multi-h CPM modulated signal, which effectively addresses the characteristics of Multi-h CPM signals, has the characteristics of high precision and high robustness, and improves the overall system performance and communication reliability.

[0006] The embodiment of the present application provides a symbol timing synchronization method for a Multi-h CPM modulated signal, including: The K-bit long information bit sequence Input LDPC encoder and process the output sequence to obtain the transmitted signal ; In the sending signal After passing through the AWGN channel, the digital intermediate frequency modulated signal is received, and orthogonal down-conversion processing is performed to obtain the baseband signal, and the baseband signal is subjected to N-symbol differential processing; The signal after N symbol differential processing is interpolated by using an interpolation filter to obtain interpolation output results of the leading branch, the aligning branch and the lagging branch; According to the obtained interpolation output result, the timing error estimation value is obtained based on the early-late gate method detection; The timing error estimate is passed through a loop filter, and the NCO module is controlled to adjust the interpolation time according to the loop filtering result to achieve symbol timing synchronization; After symbol timing synchronization and signal delay elimination, demodulation symbols are obtained through maximum likelihood sequence detection based on the grid state after differential processing; The demodulated symbols are mapped into data bits to achieve symbol timing synchronization.

[0007] An embodiment of the present application further provides a symbol timing synchronization system for a Multi-h CPM modulated signal, including a processor and a memory, wherein the memory stores a computer program. When the computer program is executed by the processor, the steps of the symbol timing synchronization method for a Multi-h CPM modulated signal are implemented.

[0008] The embodiments of the present application focus on symbol timing synchronization of Multi-h CPM modulated signals, can perfectly eliminate the impact of time delay, effectively address the characteristics of Multi-h CPM signals, and have the characteristics of high precision and high robustness, thereby improving the overall system performance and communication reliability.

[0009] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present application. The same reference symbols are used throughout the drawings to represent the same components. In the drawings: Figure 1This is a schematic diagram of the basic process of the symbol timing synchronization method of the Multi-h CPM modulation signal according to an embodiment of the present application; Figure 2 Schematic diagram of a Multi-h CPM synchronization system model of concatenated LDPC codes used in the method of this embodiment; Figure 3 Schematic diagram of the symbol timing synchronization process used in the method of this embodiment; Figure 4 This is a comparison of the performance of the method of this embodiment in dealing with different delay errors after symbol timing synchronization; Figure 5 This is a comparison of the performance of resisting different Doppler frequency offsets after symbol timing synchronization in the method of this embodiment.

[0011] from Figure 3 It can be seen that no matter how much the timing error is, the impact can be eliminated well after synchronization through this solution, and the demodulation performance is consistent. Figure 4 It can be seen that this solution can also effectively counteract the impact of some Doppler frequency offsets on the system, with only partial performance loss. DETAILED DESCRIPTION

[0012] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0013] The embodiment of the present application provides a method for symbol timing synchronization of a Multi-h CPM modulated signal, such as Figure 1 As shown, including: In step S101, the K-bit information bit sequence is Input LDPC encoder and process the output sequence to obtain the transmitted signal , where the code rate of the LDPC encoder is K / N.

[0014] In step S102, the sending signal After passing through the AWGN channel, the digital intermediate frequency modulated signal is received, orthogonal down-conversion is performed to obtain a baseband signal, and the baseband signal is subjected to N-symbol differential processing. In some embodiments, after the baseband signal is subjected to N-symbol differential processing, the grid state after the N-symbol differential processing is calculated.

[0015] In step S103, the signal after the N-symbol differential processing is interpolated using an interpolation filter to obtain interpolation output results of three paths: an advance branch, an alignment branch, and a lag branch.

[0016] In step S104, according to the obtained interpolation output result, a timing error estimation value is obtained based on the early-late gate method detection.

[0017] In step S105, the timing error estimation value is passed through a loop filter, and the NCO module is controlled to adjust the interpolation time according to the loop filtering result to achieve symbol timing synchronization.

[0018] In step S106, the symbol timing is synchronized and the signal after delay is eliminated is demodulated by maximum likelihood sequence detection according to the grid state after differential processing to obtain demodulation symbols.

[0019] In step S107, the demodulated symbols are mapped into data bits to complete symbol timing synchronization.

[0020] In some embodiments, the output sequence is processed to obtain the transmit signal include: The N-bit codeword output by the LDPC encoder , the codeword After the bit interleaver is interleaved, the interleaved sequence Mapping and then up-conversion through the Multi-h CPM modulator to obtain the transmitted signal .

[0021] In some embodiments, performing N-symbol differential processing on the baseband signal includes: Using the Lagrange cubic interpolation filter, the data obtained after the baseband signal is fitted by the interpolation filter is the leading branch data ; Leading branch data Delay Get alignment branch data ; Align the branch data Delay Get the lagging branch data .

[0022] In some embodiments, obtaining a timing error estimate based on an early-late gate method according to the obtained interpolation output result includes: The received complex baseband signal is defined as: in, is the timing deviation, r(t) is the complex baseband signal, and n(t) is the noise caused by the AWGN channel; Using the Viterbi algorithm to get The cumulative metric of the maximum surviving path at time: Where T represents the symbol period, Indicates the time interval between different branches, 、 Represents the cumulative measurement values ​​at time n and time n-1 respectively; The received signal r(t) is advanced and delayed respectively The interpolation of is: Normalized to get the timing error err: .

[0023] In some embodiments, passing the timing error estimate through a loop filter, and controlling the NCO module to adjust the interpolation time according to the loop filtering result includes: The second-order IIR filter is used to meet the following requirements: in, represents the input signal of the loop filter, represents the intermediate variable, represents the output signal of the loop filter; The NCO module is controlled by the accumulator. The operating frequency of the accumulator is configured to be equal to the symbol sampling rate. The accumulator satisfies: Among them, w is the control word of the NCO module, It is the output of the timing error err after being controlled by the loop filter. represents the control amount of the accumulator, mod(1) represents the modulo-one calculation; The derived equations for the variables satisfy: .

[0024] In some embodiments, passing the timing error estimate through a loop filter, and controlling the NCO module to adjust the interpolation time according to the loop filtering result further includes: Further deduction to obtain the optimal sampling interval satisfy: .

[0025] The present application also proposes an implementation case of a symbol timing synchronization method for a Multi-h CPM modulated signal. Figure 2 The block diagram of the Multi-h CPM synchronization system model of the concatenated LDPC code used in this example. Without loss of generality, the modulation order , memory length , differential interval , the frequency pulse waveform is RC waveform, the modulation index is selected Taking the Multi-h CPM modulation signal as an example, the data processing flow of the Multi-h CPM synchronization system is introduced: Step 1: First, convert the 7136-bit information bit sequence It is sent to the LDPC encoder with a code rate of 7136 / 8160, and a codeword of 8160 bits is obtained. , and then the codeword is interleaved through the bit interleaver, and then the interleaved sequence Mapping and then up-conversion through Multi-h CPM modulator to obtain the transmitted signal : Step 2: After passing through the AWGN channel, receive the digital intermediate frequency modulated signal, perform orthogonal down-conversion processing to obtain the baseband signal, perform 1-symbol differential processing on the baseband signal, and calculate the grid state after 1-symbol differential processing. The differential signal expression is as follows: in, is the residual carrier frequency offset The introduced residual carrier phase deviation; is the noise term generated after the difference.

[0026] Step 3: Use an interpolation filter to interpolate the signal after the 1-symbol differential processing to obtain three interpolation output results of the leading branch, the alignment branch and the lagging branch; Step 4: Based on the obtained three-way interpolation output, use the early-late gate idea to perform timing error detection to obtain the timing error estimate; Step 5: Figure 3 As shown, the timing error estimate is then passed through a loop filter, and the NCO module is controlled to adjust the interpolation time according to the loop filtering result to achieve symbol timing synchronization. The parameters of the loop filter are calculated as follows: Step 6: Demodulate the signal after symbol timing synchronization and delay elimination by performing maximum likelihood sequence detection based on the grid state after differential processing to obtain demodulated symbols; Step 7: Map the demodulated symbols into data bits.

[0027] The embodiment of the present application also proposes another simulation case of a symbol timing synchronization method for a Multi-h CPM modulated signal, and the simulation parameters are shown in Table 1.

[0028] Table 1 Simulation parameters of the symbol timing synchronization scheme of the present invention parameter value Encoding LDPC codes Modulation order Tier 4 Molded Wave 3RC waveform Differential interval 1 symbol differential Modulation Index 9 / 16、10 / 16 Channel AWGN Delay Error No delay, delay T / 32, delay T / 16, delay 3T / 32, delay T / 8, delay T / 4 Doppler frequency shift 10KHz, 20KHz, 30KHz, 40KHz Simulation results and analysis Figure 4 The black line marked with a triangle in the figure represents the bit error performance under the AWGN channel with no delay error.

[0029] Figure 4 The dark blue line marked by a triangle in the figure represents the bit error performance under the AWGN channel with a delay error of T / 32.

[0030] Figure 4 The light blue line marked by a triangle in the figure represents the bit error performance under the AWGN channel with a delay error of T / 16.

[0031] Figure 4 The purple line marked with a triangle in the figure represents the bit error performance under the AWGN channel with a delay error of 3T / 32.

[0032] Figure 4 The brown line marked with a triangle in the figure represents the bit error performance under the AWGN channel with a delay error of T / 8.

[0033] Figure 4 The green line marked with a triangle in the figure represents the bit error performance under the AWGN channel with a delay error of T / 4.

[0034] Figure 5 The black dotted line marked by a circle in the figure represents the bit error performance in the AWGN channel with zero Doppler frequency offset.

[0035] Figure 5 The red solid line marked by a square in the figure represents the bit error performance in an AWGN channel with a Doppler frequency offset of 10 kHz.

[0036] Figure 5 The dark blue solid line marked by a triangle in the figure represents the bit error performance in an AWGN channel with a Doppler frequency offset of 20 kHz.

[0037] Figure 5 The green solid line marked with a diamond in the figure represents the bit error performance in an AWGN channel with a Doppler frequency deviation of 30 kHz.

[0038] Figure 5 The light blue solid line marked with a star in the figure represents the bit error performance in an AWGN channel with a Doppler frequency deviation of 40 kHz.

[0039] From the simulation performance point of view, the synchronization performance of the system under different delays is consistent with the performance without delay, with almost no loss, which shows that the symbol timing synchronization scheme can effectively eliminate the delay and complete the symbol timing synchronization function. At the same time, it can resist the Doppler frequency deviation of about 20KHz. If it is larger, the performance will be greatly lost.

[0040] The embodiments of the present application focus on symbol timing synchronization of Multi-h CPM modulated signals, can perfectly eliminate the impact of time delay, effectively address the characteristics of Multi-h CPM signals, and have the characteristics of high precision and high robustness, thereby improving the overall system performance and communication reliability.

[0041] The present application also provides a symbol timing synchronization system for a Multi-h CPM modulated signal, including a processor and a memory. The memory stores a computer program. When the computer program is executed by the processor, the steps of the aforementioned symbol timing synchronization method for a Multi-h CPM modulated signal are implemented.

[0042] It should be noted that, in the various embodiments of the present application, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0043] The serial numbers of the above embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0044] Through the description of the above embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a more preferred embodiment. Based on this understanding, the technical solution of this application, or the part that contributes to the existing technology, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in each embodiment of this application.

[0045] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are protected by this application.

Claims

1. A symbol timing synchronization method for a Multi-h CPM modulated signal, characterized in that: include: Will bit-length information bit sequence Input LDPC encoder and process the output sequence to obtain the transmitted signal ; In the sending signal After passing through the AWGN channel, the digital intermediate frequency modulated signal is received, and orthogonal down-conversion processing is performed to obtain the baseband signal, and the baseband signal is subjected to N-symbol differential processing; The signal after N symbol differential processing is interpolated by using an interpolation filter to obtain interpolation output results of the leading branch, the aligning branch and the lagging branch; According to the obtained interpolation output result, the timing error estimation value is obtained based on the early-late gate method detection; The timing error estimate is passed through a loop filter, and the NCO module is controlled to adjust the interpolation time according to the loop filtering result to achieve symbol timing synchronization.

2. The symbol timing synchronization method for a Multi-h CPM modulated signal according to claim 1, wherein: Process the output sequence to obtain the send signal include: The N-bit codeword output by the LDPC encoder , the codeword Interleaving is performed by a bit interleaver; The interleaved sequence Mapping and then up-conversion through the Multi-h CPM modulator to obtain the transmitted signal .

3. The symbol timing synchronization method for a Multi-h CPM modulated signal according to claim 1, wherein: Performing N-symbol differential processing on the baseband signal includes: Using the Lagrange cubic interpolation filter, the data obtained after the baseband signal is fitted by the interpolation filter is the leading branch data ; Leading branch data Delay Get alignment branch data ; Align the branch data Delay Get the lagging branch data .

4. The symbol timing synchronization method for a Multi-h CPM modulated signal according to claim 3, wherein: After performing N-symbol differential processing on the baseband signal, the grid state after the N-symbol differential processing is calculated.

5. The symbol timing synchronization method for a Multi-h CPM modulated signal according to claim 3, wherein: According to the obtained interpolation output result, the timing error estimation value is obtained based on the early-late gate method detection, including: The received complex baseband signal is defined as: in, is the timing deviation, r(t) is the complex baseband signal, and n(t) is the noise caused by the AWGN channel; The Viterbi algorithm is used to obtain the cumulative metric of the maximum surviving path at time n: Where T represents the symbol period, Indicates the time interval between different branches, 、 Represents the cumulative measurement values ​​at time n and time n-1 respectively, represents the conjugate of the received signal, Represents the received sequence at time n The corresponding cumulative measurement value, represents the real part of the signal; Receive signal Lead and lag The interpolation of is: Normalized to get the timing error err: 。 6. The symbol timing synchronization method for a Multi-h CPM modulated signal according to claim 5, wherein: The timing error estimate is passed through a loop filter, and the NCO module is controlled to adjust the interpolation time based on the loop filtering result. The steps include: The second-order IIR filter is used to meet the following requirements: Among them, represents the input signal of the loop filter, represents the intermediate variable, represents the output signal of the loop filter; The NCO module is controlled by the accumulator. The operating frequency of the accumulator is configured to be equal to the symbol sampling rate. The accumulator satisfies: Among them, w is the control word of the NCO module, It is the output of the timing error err after being controlled by the loop filter. represents the control amount of the accumulator, mod(1) represents the modulo-one calculation; The derived equations for the variables satisfy: 。 7. The symbol timing synchronization method for a Multi-h CPM modulated signal according to claim 6, wherein: Passing the timing error estimate through a loop filter, controlling the NCO module, and adjusting the interpolation time based on the loop filtering result also includes: Further deduction to obtain the optimal sampling interval satisfy: 。 8. The symbol timing synchronization method for a Multi-h CPM modulated signal according to any one of claims 1 to 7, wherein: Also includes: After symbol timing synchronization and signal delay elimination, demodulation symbols are obtained through maximum likelihood sequence detection based on the grid state after differential processing; Map the demodulated symbols into data bits.

9. A symbol timing synchronization system for a Multi-h CPM modulated signal, characterized in that: The method comprises a processor and a memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the steps of the symbol timing synchronization method of the Multi-h CPM modulated signal are implemented as described in any one of claims 1 to 8.

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