High-precision wide-voltage-domain current mirror system
Through a high-precision wide-voltage-range current mirror system, using shared transistor voltage and operational amplifiers, the balance problem between the output voltage dynamic range and accuracy of the current mirror system is solved, and high-precision current mirroring and wide-voltage-range applications are achieved.
Patent Information
- Application Number
- CN202510892646.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-30
- Publication Date
- 2025-09-26
AI Technical Summary
Existing current mirror systems have difficulty balancing the output voltage dynamic range and accuracy, and have significant shortcomings, especially in low-voltage applications or wide dynamic range scenarios.
A high-precision, wide-voltage-range current mirror system is used. By sharing the gate and source voltages of transistors, combined with operational amplifiers and depletion-mode MOS tubes, accurate replication of the reference current and stable mirroring of the output current are achieved. The voltage follower module ensures that the drain potentials of the current mirror transistors are equal to isolate load changes.
It achieves the same maximum output voltage operating range as the traditional architecture while ensuring the mirror accuracy of the output current and the reference current. The reference current module can be adjusted arbitrarily, improving the integrity and accuracy of current transmission.
Smart Images
Figure CN120704467A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of integrated circuits and relates to a high-precision wide-voltage-range current mirror system. Background Art
[0002] Current mirrors, a core module in analog integrated circuit design, can be categorized into PMOS-dominated current sources and NMOS-dominated current sinks based on their operating characteristics. Their circuit architectures are symmetrical. Their core operating mechanism is based on the saturation characteristics of MOS transistors. To optimize the trade-off between accuracy and output voltage dynamic range, existing technical solutions have evolved into three typical architectures: Basic architecture (dual-transistor structure): This architecture uses the minimum number of transistors and has the widest output voltage range. However, due to the channel length modulation effect, its output current deviates significantly from the reference current.
[0003] Cascode architecture: This architecture introduces cascaded transistors to force potential matching at key nodes, effectively suppressing the channel length modulation effect and significantly improving current replication accuracy. However, this comes at the cost of significantly increasing the lower output voltage limit (due to the additional voltage drop introduced by the cascode transistors), sacrificing some of the output dynamic range (the voltage range over which the circuit can operate), limiting its suitability for low-voltage applications or scenarios requiring a wide dynamic range.
[0004] Improved cascode architecture: Based on the traditional cascode structure, a linearizing resistor element is introduced. This resistor effectively reduces the drain-source operating voltage (Vds) of the matching transistor (usually the common-gate transistor) through its voltage-limiting effect, thereby reducing the lower limit of the output voltage to a lower level. Although this architecture extends the operating range of the circuit, its dynamic range is still reduced compared to the basic architecture. In addition, this architecture must meet strict constraints: the product of the current source value and the resistance value of the resistor must remain a fixed constant (usually selected as 200mV). This means that when the resistance value is determined, the current is uniquely determined. Summary of the Invention
[0005] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a high-precision wide-voltage range current mirror system, in which the output voltage operating range is consistent with the maximum dynamic range of a traditional current mirror, the output current and the reference current exhibit precise mirror matching characteristics, and the set value of the reference current can be arbitrarily adjusted according to application requirements.
[0006] To achieve the above object, the present invention is implemented by adopting the following technical solutions: A high-precision wide-voltage range current mirror system, the current mirror system comprising: A reference current module, wherein the reference current module is used to generate a reference current; a current mirror module, the current mirror module being connected to the reference current module and configured to replicate the reference current to generate an output current; A voltage follower module is connected to the current mirror module and the reference current module respectively, and is used to make the voltages of the output terminals of the current mirror module equal.
[0007] Optionally, the current mirror module includes a first transistor and a second transistor, the gate of the first transistor and the gate of the second transistor are respectively connected to the reference current module, the source of the first transistor and the source of the second transistor are externally connected to the circuit power supply voltage, and the drain of the first transistor and the drain of the second transistor are respectively connected to the voltage follower module.
[0008] Optionally, the voltage follower module includes a first operational amplifier and a third transistor, the drain of the first transistor is respectively connected to the inverting input terminal of the first operational amplifier, the source and substrate of the third transistor, the drain of the second transistor is connected to the non-inverting input terminal of the first operational amplifier, the output terminal of the first operational amplifier is connected to the gate of the third transistor, and the drain of the third transistor is connected to the reference current module.
[0009] Optionally, the reference current module includes a first resistor and a second operational amplifier, the drain of the third transistor is respectively connected to one end of the first resistor and the non-inverting input end of the second operational amplifier, the other end of the first resistor is grounded, the inverting input end of the second operational amplifier is externally connected to a reference voltage, and the output end of the second operational amplifier is respectively connected to the gate of the first transistor and the second transistor.
[0010] Optionally, the first transistor and the second transistor are respectively P-type MOS transistors; and the third transistor is a depletion-type PMOS transistor.
[0011] Optionally, the current mirror module includes a fourth transistor and a fifth transistor, the gate of the fourth transistor and the gate of the fifth transistor are respectively connected to the reference current module, the source of the fourth transistor and the source of the fifth transistor are grounded, and the drain of the fourth transistor and the drain of the fifth transistor are respectively connected to the voltage follower module.
[0012] Optionally, the voltage follower module includes a third operational amplifier and a sixth transistor, the drain of the fourth transistor is respectively connected to the inverting input terminal of the third operational amplifier, the source and substrate of the sixth transistor, the drain of the fifth transistor is connected to the non-inverting input terminal of the third operational amplifier, the output terminal of the third operational amplifier is connected to the gate of the sixth transistor, and the drain of the sixth transistor is connected to the reference current module.
[0013] Optionally, the reference current module includes a second resistor and a fourth operational amplifier, the drain of the sixth transistor is respectively connected to one end of the second resistor and the in-phase input terminal of the fourth operational amplifier, the other end of the second resistor is externally connected to the circuit power supply voltage, the inverting input terminal of the fourth operational amplifier is externally connected to the reference voltage, and the output terminal of the fourth operational amplifier is respectively connected to the gate of the fourth transistor and the fifth transistor.
[0014] Optionally, the fourth transistor and the fifth transistor are respectively N-type MOS transistors; and the sixth transistor is a depletion-type NMOS transistor.
[0015] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a high-precision, wide-voltage-range current mirror system. The current mirror module achieves accurate replication of the reference current by sharing the gate voltage and source voltage of the transistor, outputting a stable mirror current. The reference current module provides a high-precision, stable reference current source that is independent of the power supply voltage and load. The voltage follower module ensures that the drain potentials of the current mirror transistors are equal to improve accuracy, while isolating the interference of output load changes on the reference current source. The present invention achieves the same maximum output voltage operating range as the traditional architecture, and achieves complete matching of the mirror image accuracy of the output current and the reference current, effectively ensuring the integrity of current transmission; within the current carrying capacity of the MOS tube, the reference current can be arbitrarily adjusted through the reference current module. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 This is a schematic diagram of a high-precision, wide-voltage-range current mirror system according to an embodiment of the present invention; Figure 2 Schematic diagram of a high-precision, wide-voltage-range current mirror system according to an embodiment of the present invention. DETAILED DESCRIPTION
[0017] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention.
[0018] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.
[0019] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances. Example 1
[0020] like Figure 1 As shown, a high-precision wide-voltage range current mirror system includes a current mirror module, a voltage follower module and a reference current module.
[0021] The current mirror module includes a first transistor P1 and a second transistor P2. The gate of the first transistor P1 and the gate of the second transistor P2 are respectively connected to the reference current module. The source of the first transistor P1 and the source of the second transistor P2 are externally connected to the circuit power supply voltage VIN. The drain of the first transistor P1 and the drain of the second transistor P2 are respectively connected to the voltage follower module. The current mirror module is used to copy the reference current I generated by the reference current module. REF , to generate an output current I OUT .
[0022] The voltage follower module includes a first operational amplifier EA1 and a third transistor P3. The drain of the first transistor P1 is connected to the inverting input terminal of the first operational amplifier EA1, the source and substrate of the third transistor P3, respectively. The drain of the second transistor P2 is connected to the non-inverting input terminal of the first operational amplifier EA1. The output terminal of the first operational amplifier EA1 is connected to the gate of the third transistor P3. The drain of the third transistor P3 is connected to the reference current module. The first operational amplifier EA1 is an error amplifier. Due to the "virtual ground" principle of the error amplifier, the voltage follower module makes the drain of the first transistor P1 ( Figure 1 Point A) and the drain of the second transistor P2 ( Figure 1 The voltage at point B in the middle is equal. Since the sources of the first transistor P1 and the second transistor P2 are short-circuited, the gates of the first transistor P1 and the second transistor P2 are also short-circuited, so that the three terminals of the first transistor P1 and the second transistor P2 are in the same voltage state.
[0023] The reference current module includes a first resistor R1 and a second operational amplifier EA2. The drain of the third transistor P3 is connected to one end of the first resistor R1 and the non-inverting input of the second operational amplifier EA2 respectively. The other end of the first resistor R1 is grounded. The inverting input of the second operational amplifier EA2 is externally connected to the reference voltage VREF. The output of the second operational amplifier EA2 is connected to the gates of the first transistor P1 and the second transistor P2 respectively. The drain reference current I of the first transistor P1 is REF = VREF / R1, the drain output current of the second transistor P2, I OUT =I REF =VREF / R1, where VREF is the voltage value of the reference voltage, R1 is the resistance value of the first resistor R1, and the first resistor R1 can be a fixed resistor or an internal or external adjustable resistor.
[0024] Both the first transistor P1 and the second transistor P2 utilize P-channel MOSFETs, while the third transistor P3 utilizes a depletion-mode PMOS device. By properly configuring the reference voltage VREF parameters and utilizing the error amplifier's "virtual ground" characteristic, the drain potential of the third transistor P3 can be precisely tracked by the reference voltage VREF (set to 100mV). By selecting a transistor size with appropriate drive capability, the minimum source-drain voltage of the third transistor P3 can be kept below 100mV during actual operation, thereby reducing its source voltage to below 0.2V. With this configuration, the minimum operating potential of the drain of the first transistor P1 can also be kept below 0.2V, fully meeting the system's required 0.2V output voltage limit.
[0025] Theoretical analysis and experimental verification show that when the system output voltage operates in a wide range from 0.2V to (VIN-0.2V), the source, drain and gate terminals of the first transistor P1 and the second transistor P2 are all in an equipotential state. This state ensures that the output current I OUT With the reference current I REF The source and gate of the first transistor P1 and the gate of the second transistor P2 are short-circuited to achieve equal potential, while the drains are equalized by a voltage follower module composed of the first operational amplifier EA1 and the third transistor P3.
[0026] It's important to note that if the third transistor P3 were a conventional enhancement-mode PMOS transistor, due to its threshold voltage (typically 0.8-0.9V in standard CMOS processes), even if the gate voltage dropped to ground (GND), its source voltage would still be unable to fall below the threshold voltage. This would prevent the system from achieving the 0.2V output voltage limit. Therefore, using a depletion-mode PMOS device is key to achieving this low output voltage limit. Example 2
[0027] like Figure 2 As shown, a high-precision wide-voltage range current mirror system includes a current mirror module, a voltage follower module and a reference current module.
[0028] The current mirror module includes a fourth transistor N1 and a fifth transistor N2, the gate of the fourth transistor N1 and the gate of the fifth transistor N2 are respectively connected to the reference current module, the source of the fourth transistor N1 and the source of the fifth transistor N2 are grounded, and the drain of the fourth transistor N1 and the drain of the fifth transistor N2 are respectively connected to the voltage follower module; the current mirror module is used to copy the reference current I generated by the reference current module REF , generating an output current I OUT .
[0029] The voltage follower module includes a third operational amplifier EA3 and a sixth transistor N3. The drain of the fourth transistor N1 is connected to the inverting input terminal of the third operational amplifier EA3, the source and substrate of the sixth transistor N3 respectively. The drain of the fifth transistor N2 is connected to the non-inverting input terminal of the third operational amplifier EA3. The output terminal of the third operational amplifier EA3 is connected to the gate of the sixth transistor N3. The drain of the sixth transistor N3 is connected to the reference current module. The third operational amplifier EA3 is an error amplifier. Due to the "virtual ground" principle of the error amplifier, the voltage follower module makes the drain of the fourth transistor N1 ( Figure 2 Point A) and the drain of the fifth transistor N2 ( Figure 2Since the sources of the fourth transistor N1 and the fifth transistor N2 are short-circuited, the gates of the fourth transistor N1 and the fifth transistor N2 are also short-circuited, so that the three terminals of the fourth transistor N1 and the fifth transistor N2 are in the same voltage state.
[0030] The reference current module includes a second resistor R2 and a fourth operational amplifier EA4. The drain of the sixth transistor N3 is connected to one end of the second resistor R2 and the non-inverting input of the fourth operational amplifier EA4 respectively. The other end of the second resistor R2 is externally connected to the circuit power supply voltage VIN. The inverting input of the fourth operational amplifier EA4 is externally connected to the reference voltage VREF. The output of the fourth operational amplifier EA4 is connected to the gates of the fourth transistor N1 and the fifth transistor N2 respectively. The drain reference current I REF = VREF / R2, the drain output current of the fifth transistor N2 is I OUT =I REF =VREF / R2, where VREF is the voltage value of the reference voltage, R2 is the resistance value of the second resistor R2, and the second resistor R2 can be a fixed resistor or an internal or external adjustable resistor.
[0031] Both the fourth transistor N1 and the fifth transistor N2 utilize N-channel MOSFETs, while the sixth transistor N3 utilizes a depletion-mode NMOS. By properly configuring the reference voltage parameters and utilizing the error amplifier's "virtual ground" characteristic, the drain potential of the sixth transistor N3 can be precisely aligned with the reference voltage VREF (set to VIN - 100mV). By selecting a transistor size with appropriate drive capability, the minimum voltage across the source and drain of the sixth transistor N3 can be kept within 100mV during actual operation, allowing its source voltage to reach a maximum of VIN - 0.2V or higher. With this configuration, the maximum operating potential of the drain of the fourth transistor N1 can also reach above VIN - 0.2V, fully meeting the system's required output voltage upper limit of VIN - 0.2V.
[0032] Theoretical analysis and experimental verification show that when the system output voltage operates in a wide range from 0.2V to (VIN-0.2V), the source, drain and gate terminals of the fourth transistor N1 and the fifth transistor N2 are all in an equipotential state. This state ensures that the output current I OUT With the reference current I REF The sources and gates of the fourth transistor N1 and the fifth transistor N2 are short-circuited to achieve equal potential, while the drains are equalized by a voltage follower module composed of the third operational amplifier EA3 and the sixth transistor N3.
[0033] It's important to note that if the sixth transistor N3 were a conventional enhancement-mode NMOS transistor, limited by its threshold voltage (typically 0.7-0.8V in a standard CMOS process), even if its gate voltage were applied to the maximum circuit supply voltage VIN, its maximum source voltage would be unable to exceed the difference between the circuit supply voltage VIN and the threshold voltage of the sixth transistor N3. This would result in its maximum source voltage being limited to approximately VIN-0.7V, failing to meet the system's required output voltage cap of VIN-0.2V. Therefore, the use of a depletion-mode NMOS device is crucial to achieving this high output voltage cap.
[0034] How the embodiment works: In the first embodiment, the reference current module is composed of a first resistor R1, a second operational amplifier EA2, and a reference voltage VREF. The first operational amplifier EA1 and the third transistor P3 form a voltage follower module, which is used to ensure that the drain potential of the first transistor P1 and the drain potential of the second transistor P2 are equal. At the same time, the source and gate of the first transistor P1 and the second transistor P2 are short-circuited to achieve equal potential. Therefore, the source, drain, and gate ports of the first transistor P1 and the second transistor P2 are all in an equal potential state, thereby ensuring that the output current I OUT With the reference current I REF The depletion-type PMOS device is used as the third transistor P3, which widens the system output voltage range to a wide range from 0.2V to (VIN-0.2V).
[0035] In the second embodiment, the reference current module is composed of a second resistor R2, a fourth operational amplifier EA4, and a reference voltage VREF. The third operational amplifier EA3 and the sixth transistor N3 form a voltage follower module, which is used to ensure that the drain potential of the fourth transistor N1 and the drain potential of the fifth transistor N2 are equal. At the same time, the source and gate of the fourth transistor N1 and the fifth transistor N2 are short-circuited to achieve equal potential. Therefore, the source, drain, and gate ports of the fourth transistor N1 and the fifth transistor N2 are all in an equal potential state, thereby ensuring that the output current I OUT With the reference current I REF The depletion-type NMOS device is used as the sixth transistor N3, so that the system output voltage range can be extended to a wide range from 0.2V to (VIN-0.2V).
[0036] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A high-precision wide-voltage-range current mirror system, characterized in that: The current mirror system includes: A reference current module, used for generating a reference current; a current mirror module, configured to replicate the reference current to generate an output current; The voltage follower module is used to make the voltages at the output terminals of the current mirror module equal.
2. The high-precision wide-voltage-range current mirror system according to claim 1, wherein: The current mirror module includes a first transistor and a second transistor, the gate of the first transistor and the gate of the second transistor are respectively connected to the reference current module, the source of the first transistor and the source of the second transistor are externally connected to the circuit power supply voltage, and the drain of the first transistor and the drain of the second transistor are respectively connected to the voltage follower module.
3. The high-precision wide-voltage-range current mirror system according to claim 2, wherein: The voltage follower module includes a first operational amplifier and a third transistor, the drain of the first transistor is respectively connected to the inverting input terminal of the first operational amplifier, the source and substrate of the third transistor, the drain of the second transistor is connected to the non-inverting input terminal of the first operational amplifier, the output terminal of the first operational amplifier is connected to the gate of the third transistor, and the drain of the third transistor is connected to the reference current module.
4. The high-precision wide-voltage-range current mirror system according to claim 3, wherein: The reference current module includes a first resistor and a second operational amplifier, the drain of the third transistor is respectively connected to one end of the first resistor and the non-inverting input end of the second operational amplifier, the other end of the first resistor is grounded, the inverting input end of the second operational amplifier is externally connected to a reference voltage, and the output end of the second operational amplifier is respectively connected to the gate of the first transistor and the second transistor.
5. The high-precision wide-voltage-range current mirror system according to claim 3, wherein: The first transistor and the second transistor are respectively P-type MOS transistors; the third transistor is a depletion-type PMOS transistor.
6. The high-precision wide-voltage-range current mirror system according to claim 1, wherein: The current mirror module includes a fourth transistor and a fifth transistor, the gate of the fourth transistor and the gate of the fifth transistor are respectively connected to the reference current module, the source of the fourth transistor and the source of the fifth transistor are grounded, and the drain of the fourth transistor and the drain of the fifth transistor are respectively connected to the voltage follower module.
7. The high-precision wide-voltage-range current mirror system according to claim 6, wherein: The voltage follower module includes a third operational amplifier and a sixth transistor, the drain of the fourth transistor is respectively connected to the inverting input terminal of the third operational amplifier, the source and substrate of the sixth transistor, the drain of the fifth transistor is connected to the non-inverting input terminal of the third operational amplifier, the output terminal of the third operational amplifier is connected to the gate of the sixth transistor, and the drain of the sixth transistor is connected to the reference current module.
8. The high-precision wide-voltage-range current mirror system according to claim 7, wherein: The reference current module includes a second resistor and a fourth operational amplifier, the drain of the sixth transistor is respectively connected to one end of the second resistor and the non-inverting input end of the fourth operational amplifier, the other end of the second resistor is externally connected to the circuit power supply voltage, the inverting input end of the fourth operational amplifier is externally connected to the reference voltage, and the output end of the fourth operational amplifier is respectively connected to the gates of the fourth transistor and the fifth transistor.
9. The high-precision wide-voltage-range current mirror system according to claim 7, wherein: The fourth transistor and the fifth transistor are respectively N-type MOS transistors; the sixth transistor is a depletion-type NMOS transistor.