Power distribution automation terminal automatic batch commissioning system and method

Abstract

The present application relates to the field of power system automation, in particular to a kind of power distribution automation terminal automatic batch commissioning system and method.The present application includes: batch commissioning task scheduling unit, the batch commissioning task scheduling unit is based on the terminal point table file of power distribution automation master station Generation Standardized Commissioning Task Sequence, through 4G communication file service protocol Distribution Task To Multi-device Cooperative Control Unit;Multi-device cooperative control unit;Analog precision generation unit;Communication link fault-tolerant unit;Test data verification unit.The present application is through the binding mapping mechanism of IP address and physical port, combined with multi-task concurrent scheduling algorithm, multi-device cooperative control unit can accurately analyze task instruction, drive multiple point debugging device synchronous output analog quantity and switch quantity signal;Clock synchronization calibration mechanism further guarantees signal time consistency, effectively avoids the signal conflict when multiple terminals are parallelly debugged.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power system automation, in particular to a power distribution automation terminal automatic batch debugging system and method. BACKGROUND

[0002] With the rapid increase of power distribution automation coverage, the debugging workload of power distribution automation terminals is growing exponentially. The traditional debugging mode relies on manual operation of each terminal, and the master station and the on-site personnel need to repeatedly check the telemetry / remote signaling / remote control signals through the telephone. The debugging of a single terminal takes as long as 2-3 hours. In addition, the point table format, communication protocol and debugging software of terminals from different manufacturers differ significantly, resulting in fragmented debugging process and lagging data verification, which makes it difficult to meet the efficiency and accuracy requirements of large-scale terminal centralized debugging. Therefore, how to realize multi-device collaborative debugging, dynamic resource scheduling and rapid fault positioning has become a technical problem to be solved in the field of power distribution automation.

[0003] For example, Chinese patent CN202310470219.7 discloses a complete function self-adaptive debugging system and method for all types of power distribution automation equipment, which includes a debugging device for sending a debugging request to a power distribution automation master station, receiving a debugging instruction sent by the power distribution automation master station, and sending voltage, current and switching value signals to the power distribution automation terminal. The power distribution automation master station is used to receive the debugging request sent by the debugging device, send the debugging instruction to the debugging device, receive the debugging result information sent by the power distribution automation terminal, and send the debugging success or failure information to the debugging device. The power distribution automation terminal is used to receive voltage, current and switching value signals, obtain debugging result information, and send the debugging result information to the power distribution automation master station. The present application effectively improves the point debugging efficiency of the power distribution terminal, realizes the early detection and rapid elimination of power distribution network faults, greatly improves the field operation and maintenance efficiency, and ensures the safe and reliable operation of the power distribution network. For example, Chinese patent CN202411564831.1 discloses an IEC104 power distribution automation terminal debugging system and method, which includes selecting a manufacturer name through the manufacturer selection module, inputting the IP address, port number and channel address of the device as parameters, transmitting IEC104 message data information through the message communication module, message sending module and message receiving module, and displaying the original message and the meaning of each byte of each original message through the man-machine interface. Finally, the information value in the parsed IEC104 message can be matched with the transformer substation point table to realize real-time feedback and display of data. The present application can receive telemetry and remote signaling messages sent by terminal devices and record debugging logs at the same time. It is also suitable for multiple manufacturers, which realizes the use of the same software to debug terminal devices from different manufacturers. It solves the problem of using multiple sets of software to debug multiple manufacturers' devices and improves the work efficiency.

[0004] Although the above prior art improves the efficiency of power distribution terminal debugging, it still has the following core defects: first, the multi-device cooperative regulation capability is insufficient: the joint debugging device of CN202310470219.7 adopts a single device signal output mode, neither establishes an IP address and physical port binding mapping mechanism, nor introduces a clock synchronization calibration strategy, and when multiple terminals are debugged in parallel, conflicts are easily caused by signal trigger time sequence disorder; CN202411564831.1 realizes multi-manufacturer protocol adaptation, but does not design a multi-task concurrent scheduling algorithm, and cannot dynamically allocate hardware channel resources such as analog quantity generation and switch quantity control, so that when a large number of terminals are batch debugged, resource competition is intensified, and signal time synchronization error will amplify data checking deviation, resulting in a decrease in the reliability of the debugging result; second, the communication link fault tolerance strategy is rigid: CN202310470219.7 only relies on a simple retry mechanism to restore the 4G link, and does not build a dynamic interruption discrimination module, so it cannot identify the hierarchical characteristics of network delay and packet loss (such as the difference between instantaneous jitter and continuous interruption); CN202411564831.1 can transmit messages based on the IEC104 protocol, but does not perform differential fault tolerance combined with the business priority of telemetry upload and remote control issuance, so that key debugging tasks (such as fault addressing logic verification) are easily interrupted by sudden link interruption, resulting in a broken debugging process that requires manual intervention to restart, significantly reducing work efficiency; third, the intelligent verification of test data is missing: the master station of CN202310470219.7 only makes a rough comparison of the debugging result, does not introduce a time sequence correlation verification algorithm to eliminate the time offset between terminal sampling and master station reception, and cannot distinguish between "true error" and "time stamp deviation"; CN202411564831.1 can analyze IEC104 messages, but does not build an error interval discrimination model, so it cannot automatically identify data anomalies such as telemetry overshoot and remote signal malfunction, and it is also difficult to locate the fault channel (such as the failed node in the topology link), still relying on manual checking of waveforms and point tables, resulting in a lag in test report generation and low fault diagnosis efficiency, making it difficult to support closed-loop management of large-scale debugging. In view of this, we propose a power distribution automation terminal automatic batch debugging system and method. SUMMARY

[0005] The purpose of the present application is to provide a power distribution automation terminal automatic batch debugging system and method to solve the problems of insufficient multi-device cooperative regulation capability, rigid communication link fault tolerance strategy, and missing intelligent verification of test data in the background art.

[0006] To solve the above technical problems, one of the purposes of the present application is to provide a power distribution automation terminal automatic batch debugging system, which comprises:

[0007] The batch commissioning task arrangement unit generates a standardized commissioning task sequence based on a terminal point table file of the power distribution automation master station, distributes the task to the multi-device cooperative control unit through a 4G communication file service protocol, and adopts a multi-task concurrent scheduling algorithm to realize dynamic management of the commissioning task;

[0008] The multi-device cooperative control unit is used for cooperatively driving multiple point commissioning devices to synchronously output analog signals, resolving task instructions through a binding and mapping mechanism of IP addresses and physical ports, and integrating a clock synchronization calibration mechanism to ensure time consistency of output signals of the multiple point commissioning devices, and real-time sampling of voltage, current output and switch state data of the multiple point commissioning devices;

[0009] The analog quantity precision generation unit is used for generating high-precision analog and switch signals meeting the test requirements of the power distribution terminal, adopting a heterogeneous hardware architecture module of ARM main control+FPGA signal processing, and realizing multi-interval configuration of the current output channel through a relay group dynamic switching circuit;

[0010] The communication link fault tolerance unit is used for guaranteeing continuous transmission of commissioning data of the 4G communication link, integrating a dynamic interruption discrimination module based on an IEC104 protocol stack, and coping with signal instantaneous interruption through setting of a communication interruption tolerance mechanism;

[0011] The test data verification unit is used for comparing the data collected by the power distribution master station with the reference value of the commissioning signal, and automatically generating a test report containing fault location relying on a time sequence correlation verification algorithm and an error interval discrimination model.

[0012] As a further improvement of the technical solution, the batch commissioning task arrangement unit comprises a point table analysis module, a task sequence generation module and a resource scheduling module, wherein:

[0013] The point table analysis module is used for analyzing the terminal point table file of the power distribution automation master station, identifying telemetry points, telesignaling points and remote control points in the file, and extracting attribute parameters (including point type, range and communication protocol) of each point;

[0014] The task sequence generation module generates a standardized commissioning task sequence containing test item priority and test parameter range based on the point information extracted by the point table analysis module, and the task sequence supports differentiated commissioning requirements of multiple types of power distribution terminals;

[0015] The resource scheduling module adopts a multi-task concurrent scheduling algorithm, dynamically adjusts the commissioning order of multiple power distribution terminals based on a task execution time estimation model and a resource conflict detection mechanism, and realizes maximum commissioning efficiency.

[0016] As a further improvement of the technical solution, the execution of the multi-task concurrent scheduling algorithm comprises the following steps:

[0017] S130.1, obtain historical debugging basic data:

[0018] Query the historical average debugging time of the same type and the same point number from the historical debugging database , as the benchmark value of the estimated time.

[0019] S130.2, obtain historical debugging basic data:

[0020] Statistical current available debugging resource quantity (such as analog quantity generating unit, communication link), calculate resource availability rate ;

[0021] ;

[0022] Based on the historical reliability data of the debugging device (such as failure rate, maintenance time), determine the resource availability influence factor , used to quantify the influence degree of resource shortage on debugging time;

[0023] Calculate the influence term of resource availability on time: ;

[0024] S130.3, evaluate the communication quality influence term:

[0025] Real-time monitoring of 4G network signal strength and packet loss rate, and generating communication quality score through preset algorithm (The value range is 0~1, the higher the score, the better the communication quality);

[0026] According to the historical packet loss rate data of 4G network, determine the communication quality influence factor , used to quantify the influence degree of communication fluctuation on debugging time;

[0027] Calculate the influence term of communication quality on time: ;

[0028] S130.4, integrate basic time and environmental influence:

[0029] Combine the influence terms of the previous two steps with the historical average debugging time , get the preliminary adjusted estimated time ;

[0030] ;

[0031] S130.5, task complexity correction:

[0032] Determine the task complexity correction coefficient according to the terminal type and the number of points (the value range is 0-1), the higher the complexity, the smaller (the typical value of DTU is 0.9, and that of TTU is 0.95); Divide the weight coefficient according to the debugging task type (telemetry / remote signaling / remote control / protection logic)

[0033] (the weight of telemetry test is 0.4, for example), and satisfy , which is used to represent the importance difference of different task types; Extract the historical average time consumption deviation rate of each type of task , which is used to correct the estimation error of the same type of task;

[0034]

[0035] ;

[0036] Correct the influence of task complexity on time through exponential operation to obtain the final estimated time , and complete the debugging time estimation of a single terminal;

[0037]

[0038] S130.6, Opportunity cost calculation in resource conflict scenario:

[0039] When multiple tasks compete for the same resource, the priority decision parameter of the task is calculated as follows:

[0040] Calculate the task priority weight: generate the priority weight of each competing task through a dynamic adaptive priority optimization algorithm , which dynamically derives the weight by integrating the task importance level (such as higher priority for main transformer point tasks than for branch tasks), historical failure probability (higher weight for frequently malfunctioning tasks), and current resource state (prioritize critical tasks when resources are tight); The closer to 1, the higher the task urgency;

[0041] Calculate the resource time difference: obtain the predicted release time of the target resource (deduced from the estimated consumption time of the current occupied task by the resource) and the estimated debugging consumption time of the current task (output by the time estimation model in step S130.5), and calculate the time difference between the two:

[0042] ; ( >0 represents the length of time the task needs to wait; ​​<0 represents the timeout duration of the task after the resource is released)

[0043] Define the resource importance index: pre-configure the resource importance index according to the resource type ; (value range: The larger the value is, the more critical the resource is to the system debugging, for example, the analog quantity generating unit is usually set to 5, and the ordinary communication link = 3);

[0044] Derive the opportunity cost formula: the priority weight of each competing task , time difference , resource importance index , build an opportunity cost model , quantify the resource waste and debugging efficiency loss caused by task delay:

[0045] ;

[0046] S130.7, scheduling decision based on opportunity cost:

[0047] Compare the values of all competing tasks, and execute the task with the highest opportunity cost first (i.e. the task with the largest delay loss);

[0048] Use Markov chain model to predict the task scheduling sequence after the current resource is released, dynamically adjust the subsequent task order, and realize conflict resolution.

[0049] As a further improvement of the technical solution, the multi-device cooperative control unit parses the task instruction through the binding and mapping mechanism of IP address and physical port, specifically including:

[0050] Pre-store the correspondence between the IP address and the hardware port of each point-to-point debugging device to form a mapping table;

[0051] Perform CRC check on the IP address and hardware port number of the newly connected point-to-point debugging device, and allow access after passing the check;

[0052] According to the target IP in the task instruction, extract the corresponding hardware port number from the mapping table, generate a driving signal and send it to the target point-to-point debugging device.

[0053] As a further improvement of the technical solution, the clock synchronization calibration mechanism of the multi-device cooperative control unit specifically includes:

[0054] Designate one point-to-point debugging device as the master clock source, and the rest as slave clocks. The master clock sends a synchronization pulse signal to the slave clocks through a hardware synchronization line or a network synchronization protocol, establishing an initial clock alignment relationship;

[0055] The time difference between the slave clock and the master clock is periodically collected, and when the time difference exceeds a preset threshold, the signal output timing of the slave clock is automatically adjusted (the trigger is delayed when the time difference is positive, and the trigger is advanced when the time difference is negative);

[0056] The working state of the master clock is monitored in real time, and when the master clock has signal transmission abnormalities or the time deviation exceeds a set threshold, it is determined that the master clock has failed, a synchronization fault-free recording and a clock stability score highest point-to-point debugging device is selected from the remaining slave clocks as a standby master clock, and the master-slave role switching is completed; when the original master clock recovers to normal, it is automatically degraded to a slave clock to rejoin the synchronization queue.

[0057] As a further improvement of the technical solution, the heterogeneous hardware architecture module includes a master control submodule, a signal processing submodule, and an analog quantity conversion submodule, wherein:

[0058] The master control submodule adopts an ARM processor and runs a real-time operating system, is used for receiving host computer instructions, analyzing test parameters, and generating signal configuration instructions based on the test parameters and issuing them to the signal processing submodule;

[0059] The signal processing submodule adopts an FPGA logic circuit, generates digital waveform signals based on the signal configuration instructions issued by the master control submodule through digital frequency synthesis technology, and transmits the digital waveform signals to the analog quantity conversion submodule and the on-off quantity control submodule;

[0060] The analog quantity conversion submodule integrates a digital-to-analog conversion chip, converts the digital waveform signals output by the signal processing submodule into analog voltage signals, and adjusts the amplitude and bias of the analog voltage signals through a signal conditioning circuit to output analog signals that meet the test accuracy requirements.

[0061] As a further improvement of the technical solution, the heterogeneous hardware architecture module further includes a state monitoring submodule and an on-off quantity control submodule, wherein:

[0062] The state monitoring submodule is integrated in the cooperative circuit of the master control submodule and the signal processing submodule, is used for real-time collection of working state parameters of the signal processing submodule and analog signals output by the analog quantity conversion submodule, and generates an abnormal feedback signal when an abnormal state is detected;

[0063] The on-off quantity control submodule is integrated in the logic circuit of the signal processing submodule, generates on-off quantity output instructions based on the digital waveform signals issued by the signal processing submodule, and converts the on-off quantity output instructions into physical signals through a driving circuit to control external switching devices.

[0064] As a further improvement of the technical solution, the dynamic interruption discrimination module comprises a parameter acquisition submodule, a feature extraction submodule, an interruption grading submodule, a service priority submodule and a fault tolerance strategy submodule, wherein:

[0065] The parameter acquisition submodule acquires physical layer parameters, link layer parameters and application layer parameters of the 4G communication link in real time based on the IEC104 protocol stack; the parameters include signal state parameters, message transmission parameters and service response parameters.

[0066] The feature extraction submodule processes the parameters acquired by the parameter acquisition submodule to generate a feature vector containing parameter change trend features, statistical features and parameter correlation features, which are used for feature recognition of communication interruption;

[0067] The interruption grading submodule grades the communication interruption based on the feature vector generated by the feature extraction submodule and the preset multi-level threshold;

[0068] Further, the communication interruption grading specifically includes:

[0069] When the parameter change trend feature exceeds the first preset threshold and the message transmission parameter anomaly reaches the second preset threshold, it is determined as signal degradation;

[0070] When a preset number of heartbeat messages are continuously lost and the interruption duration does not exceed the first preset time length, it is determined as a transient interruption event;

[0071] When the cumulative transient interruption number reaches a preset number or the single interruption duration exceeds the second preset time length, it is determined as a permanent interruption.

[0072] The service priority submodule assigns a priority queue according to the debugging data type, generates a priority identifier corresponding to the data type, and is used for generating a differentiated interruption processing strategy;

[0073] The fault tolerance strategy submodule generates corresponding processing instructions according to the determination result of the interruption grading submodule and the priority identifier generated by the service priority submodule.

[0074] Further, the processing instructions specifically include:

[0075] A retransmission priority control instruction for transient interruption events;

[0076] A backup link switching instruction for permanent interruption;

[0077] A differentiated processing instruction for mixed scenarios.

[0078] As a further improvement of the technical solution, the test data verification unit comprises a data synchronization module, a timing correlation module, an error discrimination module, a fault location module and a report generation module, wherein:

[0079] The data synchronization module synchronizes the real-time collection data of the power distribution master station and the debugging signal reference value based on a unified timestamp mechanism, and performs time window caching on the collection data to ensure consistency of the data time range.

[0080] The time sequence correlation module constructs a time sequence mapping relationship between the master station collection data and the reference value based on the timestamp, eliminates time offset using a time sequence correlation verification algorithm, and generates a correlation data pair set.

[0081] The error discrimination module establishes an error interval discrimination model for different types of test data, calculates the error value of the correlation data pair, compares it with a preset error threshold, identifies the error characteristics, and grades the test data quality.

[0082] The fault positioning module is used to construct a power terminal signal transmission path topology model, combine the error discrimination result, use a fault tracing method to locate possible fault points, and generate a fault positioning probability list.

[0083] The report generation module automatically generates a structured test report (including test overview, error statistics, fault positioning, conclusion and suggestion) based on the error grading result of the error discrimination module and the fault positioning probability list of the fault positioning module, and supports visual display and standard format output of the report.

[0084] The second object of the present application is to provide an automatic batch debugging method for a power distribution automation terminal based on the above-mentioned automatic batch debugging system for a power distribution automation terminal, comprising the following steps:

[0085] S100, task arrangement and distribution: analyzing the terminal point table file of the power distribution automation master station and generating a standardized debugging task sequence based on parameter configuration, distributing the task to the multi-device cooperative control unit through the 4G communication protocol, and dynamically managing the debugging resources using a multi-task concurrent scheduling algorithm;

[0086] S200, multi-device cooperative signal output: analyzing the task instructions through the IP address and physical port binding mapping mechanism, driving multiple point debugging devices to output signals synchronously, and ensuring the time consistency of the signals based on the clock synchronization calibration mechanism, while generating high-precision analog and switching signals;

[0087] S300, communication link interruption fault tolerance processing: real-time monitoring of 4G communication link parameters, hierarchical determination of communication interruption through a dynamic interruption discrimination module, and differential fault tolerance strategy based on business priority;

[0088] S400, test data verification and report generation: synchronously collecting the power distribution master station data and the debugging signal reference value, eliminating time offset using a time sequence correlation verification algorithm, identifying data errors and locating fault points through an error interval discrimination model, and automatically generating a structured test report.

[0089] Compared with the prior art, the present application has the following advantages:

[0090] 1. The present application can accurately analyze task instructions through the binding and mapping mechanism of IP address and physical port, combined with multi-task concurrent scheduling algorithm, and the multi-device cooperative control unit can drive multiple point-to-point debugging devices to output analog and switching signals synchronously; the clock synchronization calibration mechanism further ensures the time consistency of the signals, effectively avoids signal conflicts during multi-terminal parallel debugging, and realizes dynamic allocation and efficient use of debugging resources.

[0091] 2. The present application is aimed at 4G communication link, and real-time monitoring of link parameters is realized through a dynamic interrupt judgment module, and a differentiated fault tolerance strategy is executed based on service priority: a cache retry mechanism is used for regular tasks such as telemetry data uploading, and a rapid reconnection process is triggered for key tasks such as remote control instruction issuing, and the link interruption scene is processed in stages, thereby improving the communication reliability and reducing the interruption probability of the debugging process caused by link abnormalities.

[0092] 3. The present application eliminates the data time offset between the power distribution master station and the debugging terminal by using a time sequence correlation verification algorithm, intelligently identifies data abnormalities such as telemetry out-of-tolerance and remote signal misoperation by combining an error interval judgment model, and a fault positioning module traces the fault channel based on a topology model, and automatically generates a structured test report to record the debugging process and results, thereby realizing high-precision verification of test data and rapid positioning of fault points, and supporting the improvement of the closed-loop management efficiency of the power distribution terminal debugging. BRIEF DESCRIPTION OF DRAWINGS

[0093] Figure 1 is a system framework diagram of the present application;

[0094] Figure 2 is a method step schematic diagram of the present application;

[0095] The meanings of the various reference numerals in the drawings are as follows:

[0096] 100, batch debugging task arrangement unit; 110, point table analysis module; 120, task sequence generation module; 130, resource scheduling module;

[0097] 200, multi-device cooperative control unit;

[0098] 300, analog precision generation unit; 310, heterogeneous hardware architecture module; 311, main control sub-module; 312, signal processing sub-module; 313, analog quantity conversion sub-module; 314, state monitoring sub-module; 315, switching quantity control sub-module;

[0099] 400. Communication Link Fault Tolerance Unit; 410. Dynamic Interruption Detection Module; 411. Parameter Acquisition Submodule; 412. Feature Extraction Submodule; 413. Interruption Classification Submodule; 414. Service Priority Submodule; 415. Fault Tolerance Strategy Submodule;

[0100] 500 Test data verification unit; 510 Data synchronization module; 520 Timing correlation module; 530 Error discrimination module; 540 Fault location module; 550 Report generation module. Detailed Implementation

[0101] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0102] Example 1

[0103] like Figure 1 As shown, this embodiment provides an automatic batch commissioning system for distribution automation terminals, including:

[0104] The batch debugging task orchestration unit 100 generates a standardized debugging task sequence based on the terminal point table file of the power distribution automation master station, distributes the tasks to the multi-device collaborative control unit 200 through the 4G communication file service protocol, and adopts a multi-task concurrent scheduling algorithm to realize the dynamic management of debugging tasks.

[0105] In this step, the batch debugging task orchestration unit 100 includes a point table parsing module 110, a task sequence generation module 120, and a resource scheduling module 130, wherein:

[0106] The point table parsing module 110 is used to parse the terminal point table file of the power distribution automation master station, identify the telemetry point, remote signaling point, and remote control point information in the file, and extract the attribute parameters of each point (including point type, measurement range, and communication protocol).

[0107] The task sequence generation module 120 generates a standardized debugging task sequence containing test item priority and test parameter range based on the point information extracted by the point table parsing module 110. The task sequence supports the differentiated debugging needs of multiple types of power distribution terminals.

[0108] The resource scheduling module 130 adopts a multi-task concurrent scheduling algorithm. Based on the task execution time prediction model and resource conflict detection mechanism, it dynamically adjusts the debugging order of multiple power distribution terminals to maximize debugging efficiency.

[0109] In this step, the execution of the multi-task concurrent scheduling algorithm includes the following steps:

[0110] S130.1, obtain historical debugging basic data:

[0111] Query the historical average debugging time of the same type and the same point number from the historical debugging database as the benchmark value of the estimated time.

[0112] S130.2, obtain historical debugging basic data:

[0113] Statistical current available debugging resource quantity (such as analog quantity generating unit, communication link), calculate resource availability rate ;

[0114] ;

[0115] Based on the historical reliability data of the debugging device (such as failure rate, maintenance time), determine the resource availability influence factor , used to quantify the influence degree of resource shortage on debugging time;

[0116] Calculate the time influence term of resource availability: ;

[0117] S130.3, evaluate the communication quality influence term:

[0118] Real-time monitoring of 4G network signal strength and packet loss rate, and generating communication quality score through preset algorithm (The value range is 0~1, the higher the score, the better the communication quality);

[0119] According to the historical packet loss rate data of 4G network, determine the communication quality influence factor , used to quantify the influence degree of communication fluctuation on debugging time;

[0120] Calculate the time influence term of communication quality: ;

[0121] S130.4, integrate basic time and environmental influence:

[0122] Combine the influence terms of the previous two steps with the historical average debugging time , get the preliminary adjusted estimated time ;

[0123] ;

[0124] S130.5, task complexity correction:

[0125] ​Determine the task complexity correction coefficient according to the terminal type and the number of points (The value range is 0-1), the higher the complexity, the smaller (The typical value of DTU is 0.9, and that of TTU is 0.95); Divide the weight coefficient according to the debugging task type (telemetry / remote signaling / remote control / protection logic)

[0126] (The weight of telemetry test is 0.4, for example), and meet , which is used to represent the importance difference of different task types; Extract the historical average time consumption deviation rate of each type of task , which is used to correct the estimation error of the same type of task;

[0127]

[0128] ;

[0129] Correct the influence of task complexity on time through exponential operation to obtain the final estimated time , and complete the debugging time estimation of a single terminal;

[0130]

[0131] S130.6, Opportunity cost calculation in resource conflict scenario:

[0132] When multiple tasks compete for the same resource, the priority decision parameter of the task is calculated as follows:

[0133] Calculate the task priority weight: generate the priority weight of each competing task through a dynamic adaptive priority optimization algorithm , which dynamically derives the weight by integrating the task importance level (such as higher weight for main transformer point tasks than for branch tasks), historical failure probability (higher weight for frequently malfunctioning tasks), and current resource state (prioritize critical tasks when resources are tight); The closer to 1, the higher the task urgency;

[0134] Calculate the resource time difference: obtain the estimated release time of the target resource (deduced from the estimated consumption time of the current occupied task) and the estimated debugging consumption time of the current task (output by the time estimation model in step S130.5), and calculate the time difference :

[0135] ; ( >0 represents the length of time the task needs to wait; ​​<0 represents the time length of the task still occupying the resource after the resource is released)

[0136] Define the resource importance index: pre-configure the resource importance index according to the resource type ; (value range: The larger the value is, the more critical the resource is to the system debugging, for example, the analog quantity generating unit is usually set to 5, and the ordinary communication link = 3);

[0137] Derive the opportunity cost formula: the priority weight of each competing task , time difference , resource importance index , build an opportunity cost model , quantify the resource waste and debugging efficiency loss caused by task delay:

[0138] ;

[0139] S130.7, scheduling decision based on opportunity cost:

[0140] Compare the values of all competing tasks, and execute the task with the highest opportunity cost first (i.e. the task with the largest delay loss);

[0141] Use Markov chain model to predict the task scheduling sequence after the current resource is released, dynamically adjust the order of subsequent tasks, and realize conflict resolution.

[0142] As a further description of this step, the embodiment collects the signal state and transmission quality in real time through the communication link as a dynamic basis for task scheduling. The specific process is as follows: during the debugging process, the signal strength and packet loss rate of the communication network are monitored at fixed intervals, and the signal strength is converted into a quality score in the range of 0-1 (the higher the value, the better the quality); when the quality score is lower than the preset threshold or the packet loss rate exceeds the limited value, the link retransmission or standby link switching mechanism is triggered.

[0143] The influence of communication quality on debugging time is quantified by a preset influence factor, which is determined by fitting historical packet loss rate data: when the packet loss rate is in the range of 0%-10%, the influence factor increases linearly with the packet loss rate; when it exceeds 10%, it takes a fixed value, which is used to modify the communication influence term in the debugging time estimation model.

[0144] As a further description of this step, when multiple tasks compete for the same resource and cause conflicts, the embodiment dynamically schedules according to the following logic:

[0145] Firstly, resource availability assessment is carried out: the resource availability rate (the ratio of the number of currently unoccupied resources to the total number of resources) is calculated, and the resource availability influence factor (the lower the failure rate, the smaller the influence factor) is determined in combination with the historical failure rate of the equipment, which is used to correct the debugging time estimation model; wherein the historical average debugging time is based on the debugging data of the same type of terminal in the past three months, and samples with abnormal time consumption (such as records with actual time consumption more than three times the historical average) are synchronously excluded.

[0146] On this basis, the task priority weight is dynamically calculated: the priority is composed of the basic weight and the real-time correction term - the basic weight is determined by the task importance level (such as the priority of the main variable related point task is higher than that of the branch task) and the historical failure probability (the weight of the frequently malfunctioning task is adjusted upward); when the resource availability rate is insufficient, the weight is adjusted in real time according to the availability rate (the lower the availability rate, the greater the upward adjustment of the weight).

[0147] Finally, resource conflict decision is executed: the system calculates the priority parameter by comprehensively considering the task priority weight, the time difference between the estimated release time of the resource and the estimated time consumption of the current task, and the resource importance index (such as the importance index of the analog quantity generating unit is higher than that of the ordinary communication link), and the task with the highest priority parameter value is executed first; at the same time, based on the historical scheduling data, the task sequence after the release of the resource is predicted to ensure the continuity and efficiency of the task scheduling after the release of the resource.

[0148] Further, the resource state is divided into S0 (idle), S1 (occupied ≤30% estimated time), and S2 (occupied >30% estimated time) in the embodiment, and the transition probability matrix is Based on the statistical data of 1000 historical scheduling data, the following is generated:

[0149] ;

[0150] For example, when the resource is in the S2 state, the probability of maintaining S2 in the next moment is 0.6, and the probability of transferring to S1 is 0.3. This model is used to dynamically adjust the task scheduling sequence and optimize the resource utilization rate.

[0151] It should be noted that, in order to clarify the quantification logic of the weight , a hierarchical mapping and parameter calibration method is adopted to calculate the task importance, historical failure probability, and resource state, including the following steps:

[0152] Firstly, the task importance is quantified :

[0153] According to the priority of the power distribution terminal debugging function, it is divided into five levels, wherein the protection logic test corresponds to =5, the control strategy verification corresponds to =4, and the state monitoring corresponds to =3. Remote signaling verification correspondence =2. Parameter reading correspondence =1, directly mapped to weight coefficient ;

[0154] Secondly, quantify the historical failure probability. :

[0155] We analyzed fault data from similar devices over the past 12 months and fitted the variation of fault probability with operating time using an exponential distribution: In the formula, The device's operating time (in months). As the initial failure probability baseline value, The failure probability attenuation coefficient can be optimized iteratively using the least squares method.

[0156] right Normalization process to eliminate dimensional differences: In the formula, =0.8、 =0.1, covering 90% of fault scenarios, ensuring Normalize to the interval [0,1];

[0157] Then, quantify the resource status. :

[0158] By load rate ( Such as the CPU utilization of the ARM main control unit) and health status ( When the hardware temperature is ≥80℃ =0, otherwise =1) Weighted calculation: In the formula, The load rate affects the weight. The weighting of health status is set based on the assessment requirements of hardware resources;

[0159] Finally, the scheduling weights are synthesized. :

[0160] Ten typical debugging tasks (covering functions such as protection logic testing and control strategy verification) were selected. Orthogonal experiments were conducted to test the scheduling timeout rate of different parameter combinations, ultimately determining the fusion formula. .

[0161] The multi-device collaborative control unit 200 is used to collaboratively drive multiple point-to-point debugging devices to synchronously output analog signals. It parses task instructions through the binding and mapping mechanism between IP address and physical port, integrates a clock synchronization calibration mechanism to ensure the time consistency of the output signals of multiple point-to-point debugging devices, and collects the voltage, current output and switch status data of multiple point-to-point debugging devices in real time.

[0162] In this step, the multi-device cooperative control unit 200 resolves the task instruction through the binding mapping mechanism of IP address and physical port, specifically including:

[0163] Pre-storing the correspondence between the IP address of each point-to-point debugging device and the hardware port to form a mapping table;

[0164] Performing CRC check on the combination of the IP address and the hardware port number of the newly accessed point-to-point debugging device, and allowing access after passing the check;

[0165] According to the target IP in the task instruction, extracting the corresponding hardware port number from the mapping table, generating a driving signal and sending it to the target point-to-point debugging device.

[0166] In this step, the clock synchronization calibration mechanism of the multi-device cooperative control unit 200 specifically includes:

[0167] Designating one point-to-point debugging device as the master clock source, and the remaining point-to-point debugging devices as slave clocks, the master clock sends a synchronization pulse signal to the slave clocks through a hardware synchronization line or a network synchronization protocol, establishing an initial clock alignment relationship;

[0168] The slave clock periodically collects the time difference between itself and the master clock, and when the difference exceeds a preset threshold, automatically adjusts the signal output timing of the slave clock (positive time difference delays trigger, negative time difference advances trigger);

[0169] Real-time monitoring of the master clock working state, when the master clock appears signal transmission abnormal or time deviation exceeds the set threshold, determine the master clock fault, automatically select the point-to-point debugging device with no synchronization fault record and the highest clock stability score from the remaining slave clocks as the standby master clock, and complete the master-slave role switching; when the original master clock recovers normally, it is automatically degraded to a slave clock and rejoins the synchronization queue.

[0170] As a further description of this step, the multi-device cooperative control unit 200 resolves the task instruction through the binding mapping mechanism of IP address and physical port, and the specific implementation process is as follows:

[0171] In the system initialization stage, pre-store the correspondence between the IP address of each point-to-point debugging device and the hardware port to construct a static mapping table;

[0172] When a new point-to-point debugging device is accessed, perform CRC check on the combination of its IP address and hardware port number, and after passing the check, include the point-to-point debugging device in the mapping table and open the communication right;

[0173] When executing a task, according to the target IP in the instruction, extract the corresponding hardware port number from the mapping table, generate a driving signal and send it to the target point-to-point debugging device.

[0174] Meanwhile, the multi-device cooperative control unit 200 guarantees the consistency of the output timing of the multi-device through a clock synchronization calibration mechanism, and the specific process is as follows:

[0175] First, one point-to-point debugging device is designated as the master clock source, and the remaining point-to-point debugging devices are designated as slave clocks. The master clock sends a synchronization pulse signal to the slave clocks through a hardware synchronization line or a network synchronization protocol to establish an initial time alignment relationship. The slave clocks periodically collect the time difference between themselves and the master clock. When the difference exceeds a preset threshold, the output timing is automatically adjusted (delayed trigger for positive time difference and advanced trigger for negative time difference). The working state of the master clock is continuously monitored. If the master clock has signal transmission abnormalities or the time deviation exceeds the limit, the device with the best clock stability and no synchronization fault record is selected from the remaining slave clocks to switch to the master clock. When the original master clock returns to normal, it is automatically downgraded to a slave clock and rejoins the synchronization queue.

[0176] Based on the above mechanism, the multi-device cooperative control unit 200 can synchronously drive multiple point-to-point debugging devices to output analog signals, while simultaneously collecting voltage, current output, and switch state data from each device in real time, achieving cooperative control and operation state monitoring of multiple devices.

[0177] The analog precision generation unit 300 is used to generate high-precision analog and switch signals that meet the testing needs of power distribution terminals. The heterogeneous hardware architecture module 310 adopts an ARM main control + FPGA signal processing architecture. The current output channel is configured with multiple intervals through a relay group dynamic switching circuit.

[0178] In this step, the heterogeneous hardware architecture module 310 includes a main control submodule 311, a signal processing submodule 312, and an analog conversion submodule 313.

[0179] The main control submodule 311 uses an ARM processor running a real-time operating system to receive host computer instructions, analyze test parameters, and generate signal configuration instructions based on the test parameters, which are then sent to the signal processing submodule 312.

[0180] The signal processing submodule 312 uses an FPGA logic circuit to generate digital waveform signals based on the signal configuration instructions sent by the main control submodule 311 through digital frequency synthesis technology, and transmits the digital waveform signals to the analog conversion submodule 313 and the switch control submodule 315.

[0181] The analog conversion submodule 313 integrates a digital-to-analog conversion chip to convert the digital waveform signals output by the signal processing submodule 312 into analog voltage signals. The analog voltage signals are then adjusted in amplitude and biased through a signal conditioning circuit to output analog signals that meet the testing precision requirements.

[0182] In this step, the heterogeneous hardware architecture module 310 further comprises a state monitoring submodule 314 and a switching value control submodule 315, wherein:

[0183] The state monitoring submodule 314 is integrated in the cooperative circuit of the main control submodule 311 and the signal processing submodule 312, and is used for collecting the working state parameters of the signal processing submodule 312 and the analog signals output by the analog quantity conversion submodule 313 in real time, and generating an abnormal feedback signal when an abnormal state is detected.

[0184] The switching value control submodule 315 is integrated in the logic circuit of the signal processing submodule 312, generates a switching value output instruction based on the digital waveform signal issued by the signal processing submodule 312, and converts the switching value output instruction into a physical signal through a driving circuit to control an external switching device.

[0185] As a further description of this step, the state monitoring submodule 314 in this embodiment is embedded in the cooperative circuit of the main control submodule 311 and the signal processing submodule 312, and collects two types of data in real time: one is the running parameters of the signal processing submodule 312 (such as working temperature and clock state), and the other is the output signals of the analog quantity conversion submodule 313; when the parameters are abnormal (such as temperature overrun and signal deviation abnormality), a feedback signal is immediately generated to trigger the protection at this level or upload to the upper computer.

[0186] As a further description of this step, the analog quantity precision generation unit 300 in this embodiment realizes the multi-interval configuration of the current output channel through the relay group dynamic switching circuit: when the main control submodule 311 receives a “channel switching” instruction, the target relay driving circuit is controlled through the GPIO interface to make the target relay attract or break, switch to the corresponding current output loop (such as a large current, a milliamperes channel), and match the test scene requirements of the power distribution terminal.

[0187] The communication link fault tolerance unit 400 is used for guaranteeing the continuous transmission of the debugging data of the 4G communication link, integrating a dynamic interruption discrimination module 410 based on the IEC104 protocol stack, and responding to signal instantaneous interruption through setting a communication interruption tolerance mechanism.

[0188] In this step, the dynamic interruption discrimination module 410 comprises a parameter acquisition submodule 411, a feature extraction submodule 412, an interruption grading submodule 413, a service priority submodule 414, and a fault tolerance strategy submodule 415, wherein:

[0189] The parameter acquisition submodule 411 acquires the physical layer parameters, the link layer parameters and the application layer parameters of the 4G communication link in real time based on the IEC104 protocol stack; the parameters include signal state parameters, message transmission parameters and service response parameters.

[0190] The feature extraction submodule 412 processes the parameters collected by the parameter collection submodule 411 to generate feature vectors containing parameter change trend features, statistical features, and parameter correlation features, which are used for feature recognition of communication interruption;

[0191] The interruption grading submodule 413 grades the communication interruption based on the feature vectors generated by the feature extraction submodule 412 and the preset multi-level threshold;

[0192] The service priority submodule 414 allocates priority queues according to the debugging data types and generates priority identifiers corresponding to the data types, which are used for generating differentiated interruption handling strategies;

[0193] The fault tolerance strategy submodule 415 generates corresponding handling instructions based on the determination results of the interruption grading submodule 413 and the priority identifiers generated by the service priority submodule 414.

[0194] As a further explanation of this step, the parameter collection submodule 411 in this embodiment collects the following three types of parameters in real time based on the IEC104 protocol stack in a layered architecture:

[0195] Physical layer parameters: Obtain signal state parameters such as signal strength (RSSI) and signal quality (BER) through the AT command interface (such as AT+CSQ) of the 4G module;

[0196] Link layer parameters: Analyze the frame structure of the IEC104 protocol to extract message transmission parameters such as message sending time, receiving time, and retransmission times;

[0197] Application layer parameters: Collect service response parameters such as response timeout times and data anomaly rates based on debugging service types (such as telemetry and remote control).

[0198] As a further explanation of this step, the feature extraction submodule 412 in this embodiment processes the collected multi-dimensional parameters in real time to generate the following three types of feature vectors:

[0199] Parameter change trend features: Calculate the change rate of parameters such as signal strength and signal quality using a sliding window to capture signal mutation characteristics;

[0200] Statistical features: Calculate statistical quantities such as message retransmission rate and heartbeat loss rate per unit time;

[0201] Parameter correlation features: Train the correlation rules between parameters based on historical data to construct a conditional probability matrix.

[0202] As a further explanation of this step, the interruption grading submodule 413 in this embodiment classifies the communication interruption into three levels based on the feature vectors and the preset threshold:

[0203] Signal degradation: when the parameter trend exceeds the first preset threshold and the packet transmission parameter anomaly reaches the second preset threshold, it is determined as signal degradation, triggering early warning;

[0204] Instantaneous interruption: when a preset number of heartbeat messages are continuously lost and the interruption duration does not exceed the first preset time length, it is determined as instantaneous interruption, triggering retransmission strategy;

[0205] Permanent interruption: when the cumulative number of instantaneous interruptions reaches a preset number or the duration of a single interruption exceeds the second preset time length, it is determined as permanent interruption, triggering link switching.

[0206] As a further description of this step, the service priority submodule 414 in the embodiment assigns priorities according to the debugging data types, specifically including:

[0207] High priority: remote control instruction, priority is given to transmission reliability;

[0208] Medium priority: telemetry data, short time delay is allowed but integrity needs to be ensured;

[0209] Low priority: remote signaling data, a certain packet loss rate is tolerated.

[0210] As a further description of this step, the fault tolerance strategy submodule 415 in the embodiment generates three types of processing instructions according to the interruption level and service priority:

[0211] Instantaneous interruption processing: generate fast retransmission instructions for high-priority data, and generate delayed retransmission or selective retransmission instructions for medium and low-priority data;

[0212] Permanent interruption processing: generate standby link switching instructions, switch the access point of the communication link or enable the standby channel to access the standby network;

[0213] Mixed scene processing: for the scene where signal degradation and instantaneous interruption exist at the same time, generate differential processing instructions (such as high-priority data switching link first, medium and low-priority data local caching + delayed retransmission).

[0214] Further, the communication link fault tolerance unit 400 in the embodiment cooperates with multiple submodules of the dynamic interruption discrimination module 410 to implement communication interruption tolerance according to the following process:

[0215] First, the parameter acquisition submodule 411 acquires the physical layer, link layer and application layer parameters (such as signal strength, packet retransmission number) of the communication link at a fixed period (such as 100 ms);

[0216] Subsequently, the feature extraction submodule 412 synchronously performs trend calculation, statistical analysis and association rule matching on the collected parameters, and generates a "signal mutation feature" and a "retransmission rate statistical feature" vector in real time to provide data support for interruption determination.

[0217] Then, the interruption grading submodule 413 compares the feature vector output by the feature extraction submodule 412 with preset threshold values (grading threshold values for signal degradation, instantaneous interruption and permanent interruption) at a set period (such as 500 ms), determines whether the current communication state belongs to "signal degradation", "instantaneous interruption event" or "permanent interruption", and marks the corresponding interruption grade.

[0218] Next, after receiving the interruption grading result, the fault-tolerant strategy submodule 415 combines the debugging data priority (remote control instruction is high priority, telemetric data is medium priority, and telesignaling data is low priority) output by the business priority submodule 414 to dynamically generate a processing instruction.

[0219] If it is an instantaneous interruption event: "fast retransmission" (shortening the retransmission timeout time and increasing the retransmission times) is triggered for high-priority data, and "delayed retransmission" or "selective retransmission" is performed for medium / low-priority data.

[0220] If it is a permanent interruption: a "backup link switching" instruction is immediately generated to switch the access point (such as APN) of the communication link or enable a backup channel to access a preset backup network.

[0221] If it is a mixed scenario (such as signal degradation superimposed with instantaneous interruption): link switching for high-priority data is preferentially guaranteed, and a "local cache + delayed retransmission" strategy is adopted for medium / low-priority data.

[0222] Finally, after switching to the backup link, the fault-tolerant strategy submodule 415 automatically sends an IEC104 protocol test frame (such as an empty frame with a timestamp); if a response frame is received from the link within a set time, it is determined that the backup link is available, and the data transmission queue is immediately restored; if no response is received, secondary switching or fault alarm is triggered to ensure the final recovery of the communication link.

[0223] The test data verification unit 500 is used to compare the power distribution master station collected data with the debugging signal reference value, and automatically generates a test report containing fault location relying on a time sequence correlation verification algorithm and an error interval discrimination model.

[0224] In this step, the test data verification unit 500 includes a data synchronization module 510, a time sequence correlation module 520, an error discrimination module 530, a fault location module 540 and a report generation module 550, wherein:

[0225] The data synchronization module 510 synchronizes the real-time collection data of the power distribution master station and the debugging signal reference value based on a unified timestamp mechanism, and performs time window caching on the collection data to ensure consistency of the data time range.

[0226] The time sequence correlation module 520 constructs a time sequence mapping relationship between the master station collection data and the reference value based on the timestamp, eliminates time offset using a time sequence correlation verification algorithm, and generates a set of correlated data pairs.

[0227] The error discrimination module 530 establishes an error interval discrimination model for different types of test data, calculates the error value of the correlated data pairs, compares it with a preset error threshold, identifies the error characteristics, and classifies the test data quality.

[0228] The fault location module 540 is used to construct a power terminal signal transmission path topology model, combine the error discrimination result, use a fault tracing method to locate possible fault points, and generate a fault location probability list.

[0229] The report generation module 550 automatically generates a structured test report (including test overview, error statistics, fault location, conclusion and suggestion) based on the error classification result of the error discrimination module 530 and the fault location probability list of the fault location module 540, and supports visual display and standard format output of the report.

[0230] As a further description of this step, the data synchronization module 510 in this embodiment realizes data synchronization based on a unified timestamp mechanism through the following steps:

[0231] Multi-source data collection: simultaneously obtain data from the power distribution master station database (such as the historical database and the real-time database) and the debugging signal source (such as the analog quantity precision generation unit), the master station collection data includes telemetry values (voltage, current) and remote signaling states (switch position), and the debugging signal reference value includes standard voltage curves and standard switch action time sequences;

[0232] Timestamp unification: add system timestamps (such as Unix timestamps) to the collected master station data and reference values to ensure consistency of the data time identifiers;

[0233] Time window caching: use a sliding time window (such as 10 minutes) to cache the collection data, the window size can be dynamically adjusted according to the debugging task type (such as steady-state test, dynamic test), and the data time range for comparison is ensured to be consistent.

[0234] As a further description of this step, the time sequence correlation module 520 in this embodiment constructs the time sequence mapping relationship between the data based on the timestamp, specifically including:

[0235] Time sequence mapping construction: taking the timestamp of the reference value as the reference, searching for the corresponding point closest to the timestamp within the time window of the master station collecting data, and constructing a time sequence mapping pair of "reference value-collected value";

[0236] Time offset elimination: for the time offset caused by communication delay, sampling frequency difference and other factors, linear interpolation algorithm (such as Lagrange interpolation) is used to resample the collected data, and the time axis is aligned to the time axis of the reference value;

[0237] Correlation data pair generation: for the master station data and reference value after time axis alignment, a one-to-one corresponding correlation data pair set is generated according to the preset sampling interval (such as 100ms), which is used for subsequent error calculation.

[0238] As a further description of this step, the error discrimination module 530 in this embodiment establishes an error interval discrimination model for different types of test data, including the following steps:

[0239] First, error calculation:

[0240] For the correlation data pair set, the error value is calculated according to the data type:

[0241] For telemetry data (such as voltage): calculate the absolute error (|collected value-reference value|) and the relative error (|collected value-reference value| / reference value);

[0242] For remote signaling data (such as switch status): calculate the state matching degree (match as 0, mismatch as 1);

[0243] Then, error interval modeling:

[0244] Based on the statistical characteristics (such as mean, standard deviation) of historical test data, dynamic error intervals are set for different types of data:

[0245] Telemetry data: error interval= , wherein is the standard deviation of historical error;

[0246] Remote signaling data: error interval=[0,0] (i.e. 100% match is required);

[0247] Finally, error classification:

[0248] Compare the calculated error value with the preset error interval to classify the test data quality into three levels:

[0249] Qualified (A level): the error value is within the error interval, and the data quality meets the standard;

[0250] Abnormal (B level): the error value exceeds the error interval but does not exceed 2 times the upper limit of the interval, and the data has a slight abnormality;

[0251] Fault (C level): error value exceeds 2 times the upper limit of the interval, and the data has a serious deviation.

[0252] As a further description of this step, the fault locating module 540 in this embodiment relies on the topology model of the signal transmission path and the error discrimination result to locate the potential fault point, including the following steps:

[0253] Firstly, based on the physical connection relationship of the power distribution terminal (such as the transmission link of "terminal-communication module-main station") and the communication protocol (such as IEC104, Modbus), a directed graph topology model of the signal transmission path is constructed - the nodes cover terminal devices, communication devices, and main station servers, and the edges map the data flow direction;

[0254] Then, combined with the abnormal results (such as telemetry data deviation, remote state mismatch) output by the error discrimination module 530, the fault probability of each node is calculated through the Bayesian network algorithm: if the downstream data of a node all show abnormalities, and the upstream data state is normal, it is determined that the fault probability of the node is increased; if only a certain type of data (such as voltage telemetry) is abnormal, and other types of data (such as current telemetry) are normal, the fault probability of the collection channel associated with this type of data is increased;

[0255] Finally, the fault point list is generated by sorting the fault probability from high to low, including the fault node name, fault probability, and affected data type (such as "the voltage acquisition module of terminal A, associated with voltage telemetry data abnormality"), which provides a directional basis for fault troubleshooting.

[0256] As a further description of this step, the report generation module 550 in this embodiment constructs a structured test report layer by layer by integrating the error discrimination and fault locating results, including the following steps:

[0257] Firstly, the test task name, time range, number of participating terminals, and data acquisition amount recorded in the data synchronization stage are extracted to form a test overview;

[0258] Subsequently, the hierarchical statistical results of the error discrimination stage are integrated - the number and proportion of A / B / C level data are displayed according to the telemetry and remote types, and a visualization component is called to generate a bar chart (such as terminal-level error level distribution), realizing the graphical presentation of error statistics;

[0259] Then, the nodes with fault probability ≥ 50% in the fault location stage are screened, the fault causes inferred by the topological model (such as "communication module signal weak" associated with telemetry data fluctuation, "terminal sampling circuit abnormality" associated with remote signaling state deviation) are combined, a fault location block is constructed; according to the comprehensive results of error statistics and fault location, the test conclusion ("pass", "partially pass" or "fail") is determined, and the repair suggestions (such as "check the terminal voltage acquisition module wiring", "adjust the communication module antenna position") are output for the high probability fault points, forming the conclusion and suggestions;

[0260] Finally, the report is supported to be exported in PDF, Word or XML format, and the report content is rendered in real time through the Web interface, which is convenient for users to check and analyze.

[0261] It should be noted that in the present embodiment, the multi-device cooperative control unit 200, the analog precision generation unit 300, the communication link fault tolerance unit 400 and the test data verification unit 500 operate cooperatively around the "instruction distribution-signal generation-data transmission-verification closed loop", specifically:

[0262] The host computer sends a debugging task instruction to the multi-device cooperative control unit 200, which analyzes it and, on the one hand, issues a signal configuration instruction to the analog precision generation unit 300 to drive it to generate analog and switching signals, and synchronously collects signal reference values and uploads them to the test data verification unit 500; on the other hand, triggers the measured power distribution terminal to start data collection, real-time back-sampling of terminal voltage, current output and switching state data, and transmits the data to the power distribution master station through the communication link fault tolerance unit 400 relying on the IEC104 protocol stack to ensure transmission continuity in the event of signal instantaneous interruption, degradation and other abnormalities, automatically performs retransmission or link switching, and transmits the data to the power distribution master station; the test data verification unit 500 obtains terminal collection data from the master station, combines the signal reference values of the analog precision generation unit 300 to complete timing correlation, error discrimination and fault location, generates a structured test report, and transmits it back to the host computer, while triggering the multi-device cooperative control unit 200 to perform fault terminal marking, test task suspension and other subsequent actions, forming a debugging closed loop.

[0263] Embodiment 2

[0264] As shown in Figure 2 The present embodiment also provides a power distribution automation terminal automatic batch debugging method based on the power distribution automation terminal automatic batch debugging system of embodiment 1, including the following steps:

[0265] S100, task arrangement and distribution: analyze the terminal point table file of the power distribution automation master station, generate a standardized debugging task sequence based on parameter configuration, distribute the task to the multi-device cooperative control unit 200 through the 4G communication protocol, and dynamically manage the debugging resources by using a multi-task concurrent scheduling algorithm;

[0266] S200, multi-device cooperative signal output: analyze the task instructions through the IP address and physical port binding mapping mechanism, drive multiple point debugging devices to output signals synchronously, ensure the signal time consistency based on the clock synchronization calibration mechanism, and generate high-precision analog and switching signals;

[0267] S300, communication link interruption fault tolerance processing: real-time monitoring of 4G communication link parameters, hierarchical determination of communication interruption through a dynamic interruption determination module 410, and differential fault tolerance strategy based on business priority;

[0268] S400, test data verification and report generation: synchronous acquisition of power distribution master station data and debugging signal reference value, elimination of time offset by using a time sequence correlation verification algorithm, identification of data error and positioning of fault points by using an error interval determination model, and automatic generation of a structured test report.

[0269] Those of ordinary skill in the art can understand that the processes for implementing all or part of the steps of the above embodiments can be completed by hardware, or by programs instructing relevant hardware to complete.

[0270] The basic principles, main features and advantages of the present application are shown and described above. Those skilled in the art should understand that the present application is not limited by the above embodiments, and the above embodiments and descriptions in the specification are only preferred examples of the present application and are not intended to limit the present application. Without departing from the spirit and scope of the present application, various changes and improvements can be made to the present application, and these changes and improvements all fall within the scope of the claimed present application. The scope of protection of the present application is defined by the appended claims and their equivalents.

Claims

1. A power distribution automation terminal automatic batch commissioning system, characterized in that, The batch debugging task arrangement unit (100) generates a standardized debugging task sequence based on a terminal point table file of a power distribution automation master station, distributes tasks to the multi-device cooperative control unit (200) through a 4G communication file service protocol, and realizes dynamic management of the debugging tasks by using a multi-task concurrent scheduling algorithm. In the multi-task concurrent scheduling algorithm, the influence of historical debugging time, resource availability, and communication quality on debugging time is integrated to calculate a preliminary adjusted estimated time, and the calculation formula is: The multi-device cooperative control unit (200) is used for cooperatively driving multiple point debugging devices to synchronously output analog signals, resolving task instructions through a binding and mapping mechanism of IP addresses and physical ports, integrating a clock synchronization calibration mechanism to ensure the time consistency of the output signals of the multiple point debugging devices, and real-time sampling of voltage, current output and switch state data of the multiple point debugging devices. ； represents the estimated time after preliminary adjustment; represents the historical average adjustment time; represents the resource availability rate; represents the resource availability impact factor; represents the communication quality score; communication quality impact factor; The analog quantity precision generation unit (300) is used for generating high-precision analog and switch signals meeting the testing requirements of power distribution terminals, and adopts a heterogeneous hardware architecture module (310) of ARM main control+FPGA signal processing to realize multi-interval configuration of the current output channel through a relay group dynamic switching circuit. The communication link fault tolerance unit (400) is used for ensuring the continuous transmission of debugging data of the 4G communication link, integrating a dynamic interruption discrimination module (410) based on an IEC104 protocol stack, and coping with signal instantaneous interruption through setting a communication interruption tolerance mechanism. The test data verification unit (500) is used for comparing the data collected by the power distribution master station with the debugging signal reference value, and automatically generating a test report containing fault location based on a time sequence correlation verification algorithm and an error interval discrimination model. The batch debugging task arrangement unit (100) includes a point table analysis module (110), a task sequence generation module (120), and a resource scheduling module (130), wherein:

2. The power distribution automation terminal automatic batch commissioning system according to claim 1, wherein, The point table analysis module (110) is used for analyzing the terminal point table file of the power distribution automation master station, identifying the telemetry points, telesignaling points and remote control points in the file, and extracting the attribute parameters of each point; The task sequence generation module (120) generates a standardized debugging task sequence containing test item priority and test parameter range based on the point information extracted by the point table analysis module (110), and the task sequence supports the differentiated debugging requirements of multiple types of power distribution terminals; The resource scheduling module (130) dynamically adjusts the debugging order of multiple power distribution terminals based on a task execution time estimation model and a resource conflict detection mechanism by using a multi-task concurrent scheduling algorithm, so as to maximize the debugging efficiency. The execution of the multi-task concurrent scheduling algorithm includes the following steps:

3. The power distribution automation terminal automatic batch commissioning system according to claim 2, wherein, S130.1, obtaining historical debugging basic data: S130.2, obtaining historical debugging basic data: Querying the historical average debugging time of the same type and the same point quantity from the historical debugging database as the benchmark value of the estimated time S130.3, evaluating the communication quality influence item: Count the number of currently available debugging resources, calculate the resource availability rate ; ； Determining resource availability impact factors based on historical reliability data of the commissioning device for quantifying the degree of impact of resource insufficiency on commissioning time Computing resource availability impact on time term: ; ​ Real-time monitoring of 4G network signal strength and packet loss rate, generating communication quality score through preset algorithm ; determining a communication quality impact factor from 4G network historical packet loss rate data for quantifying the degree of impact of communication fluctuations on debug time; computing the impact term of the communication quality on time: ; S130.4, Integration of basic time and environmental impact: The impact terms of the previous two steps are combined with the historical average debug time to get the preliminary adjusted estimated time ; S130.5, Task complexity correction: Determine the task complexity correction coefficient based on the terminal type and the number of locations. The higher the complexity, the better. The smaller; The weight coefficient is divided according to a debugging task type , and meets , for representing importance difference of different task types extracting a historical average time consumption deviation rate of each type of task for correcting the estimation error of the same type of task ； The final estimated time is obtained by correcting the influence of task complexity on time through exponential operation And the debugging time estimation of single terminal is completed. S130.6, Opportunity cost calculation in resource conflict scenarios: When multiple tasks compete for the same resource, the priority decision parameter of the task is calculated as follows: Computing task priority weight: generating priority weights of each competitive task through a dynamic adaptive priority optimization algorithm , the dynamic adaptive priority optimization algorithm fuses task importance level, historical failure probability and dynamically derived weight of current resource state to quantify task urgency Compute resource time difference: get the estimated release time of the target resource and the estimated debugging time of the current task , compute the time difference between the two ; Define resource importance index: Pre-configure resource importance index according to resource type ; Deriving opportunity cost formula: priority weight of each competing task , time difference , resource importance index , building opportunity cost model , quantifying resource waste and debugging efficiency loss caused by task delay; S130.7, Scheduling decision based on opportunity cost: Comparing the values of all competing tasks, the task with the highest opportunity cost is executed first. Comparing the values of all competing tasks, the task with the highest opportunity cost is executed first. Using Markov chain model to predict the task scheduling sequence after the current resource release, dynamically adjusting the subsequent task order to realize conflict resolution.

4. The power distribution automation terminal automatic batch commissioning system of claim 1, wherein, The multi-device cooperative control unit (200) resolves task instructions through a binding mapping mechanism of IP addresses and physical ports, specifically including: Pre-storing the correspondence between the IP address and the hardware port of each point-to-point debugging device to form a mapping table; Performing CRC check on the IP address and hardware port number of the newly accessed point-to-point debugging device, and allowing access after passing the check; According to the target IP in the task instruction, extracting the corresponding hardware port number from the mapping table, generating a driving signal and sending it to the target point-to-point debugging device.

5. The power distribution automation terminal automatic batch commissioning system according to claim 4, wherein, The clock synchronization calibration mechanism of the multi-device cooperative control unit (200) specifically includes: Designate one point-to-point debugging device as the master clock source, and the remaining point-to-point debugging devices as slave clocks. The master clock sends a synchronization pulse signal to the slave clocks through a hardware synchronization line or a network synchronization protocol to establish an initial clock alignment relationship. The slave clock periodically collects the time difference between itself and the master clock. When the difference exceeds a preset threshold, the slave clock automatically adjusts the signal output timing. Real-time monitoring of the working state of the master clock, when the master clock appears signal transmission abnormal or time deviation exceeds the set threshold, determine the master clock failure, automatically select the point-to-point debugging device without synchronization fault record and the highest clock stability score from the remaining slave clocks as the standby master clock, and complete the master-slave role switching; when the original master clock recovers normally, it is automatically degraded to a slave clock and rejoins the synchronization queue.

6. The power distribution automation terminal automatic batch commissioning system of claim 1, wherein, The heterogeneous hardware architecture module (310) includes a master control submodule (311), a signal processing submodule (312), and an analog conversion submodule (313), wherein: The master control submodule (311) uses an ARM processor to run a real-time operating system, receives host computer instructions, analyzes test parameters, and generates signal configuration instructions based on the test parameters, and sends them to the signal processing submodule (312); The signal processing submodule (312) uses an FPGA logic circuit to generate digital waveform signals based on the signal configuration instructions sent by the master control submodule (311) through digital frequency synthesis technology, and transmits the digital waveform signals to the analog conversion submodule (313) and the on-off control submodule (315); The analog conversion submodule (313) integrates a digital-to-analog conversion chip to convert the digital waveform signals output by the signal processing submodule (312) into analog voltage signals, and adjusts the amplitude and bias of the analog voltage signals through a signal conditioning circuit to output analog signals that meet the test accuracy requirements.

7. The power distribution automation terminal automatic batch commissioning system according to claim 6, wherein, The heterogeneous hardware architecture module (310) also includes a state monitoring submodule (314) and an on-off control submodule (315), wherein: The state monitoring submodule (314) is integrated in the cooperative circuit of the main control submodule (311) and the signal processing submodule (312), and is used for collecting the working state parameters of the signal processing submodule (312) and the analog signal output by the analog quantity conversion submodule (313) in real time, and generating an abnormal feedback signal when an abnormal state is detected; The switch quantity control submodule (315) is integrated in the logic circuit of the signal processing submodule (312), generates a switch quantity output instruction based on the digital waveform signal issued by the signal processing submodule (312), and converts the switch quantity output instruction into a physical signal through a driving circuit to control external switching equipment.

8. The power distribution automation terminal automatic batch commissioning system of claim 1, wherein, The dynamic interruption discrimination module (410) comprises a parameter acquisition submodule (411), a feature extraction submodule (412), an interruption grading submodule (413), a service priority submodule (414) and a fault tolerance strategy submodule (415), wherein: The parameter acquisition submodule (411) collects the physical layer parameters, the link layer parameters and the application layer parameters of the 4G communication link in real time based on the IEC104 protocol stack; The feature extraction submodule (412) processes the parameters collected by the parameter acquisition submodule (411) to generate a feature vector containing parameter change trend features, statistical features and parameter correlation features, which are used for feature recognition of communication interruption; The interruption grading submodule (413) grades the communication interruption based on the feature vector generated by the feature extraction submodule (412) and the preset multi-level threshold; The service priority submodule (414) allocates a priority queue according to the debugging data type, generates a priority identifier corresponding to the data type, and is used for generating a differentiated interruption processing strategy; The fault tolerance strategy submodule (415) generates a corresponding processing instruction according to the determination result of the interruption grading submodule (413) and the priority identifier generated by the service priority submodule (414).

9. The power distribution automation terminal automatic batch commissioning system of claim 1, wherein, The test data verification unit (500) comprises a data synchronization module (510), a time sequence correlation module (520), an error discrimination module (530), a fault location module (540) and a report generation module (550), wherein: The data synchronization module (510) synchronizes the real-time collection data of the power distribution master station and the debugging signal reference value based on a unified timestamp mechanism, and buffers the collection data in a time window to ensure the consistency of the data time range; The time sequence correlation module (520) constructs a time sequence mapping relationship between the master station collection data and the reference value based on the timestamp, eliminates the time offset by using a time sequence correlation verification algorithm, and generates a set of correlated data pairs; The error discrimination module (530) establishes an error interval discrimination model for different types of test data, calculates the error value of the correlated data pairs, compares it with the preset error threshold, identifies the error characteristics, and grades the test data quality; The fault location module (540) is used for constructing a power terminal signal transmission path topology model, combining the error discrimination result, locating the possible fault point by using a fault tracing method, and generating a fault location probability list; The report generation module (550) automatically generates a structured test report based on the error classification result of the error discrimination module (530) and the fault location probability list of the fault location module (540), and supports visual display and standard format output of the report.

10. An automatic batch commissioning method of a power distribution automation terminal, based on the automatic batch commissioning system of the power distribution automation terminal according to any one of claims 1-9, characterized in that, It comprises the following steps: S100, task arrangement and distribution: analyzing the terminal point table file of the power distribution automation master station and generating a standardized debugging task sequence based on parameter configuration, distributing the task to the multi-device cooperative control unit (200) through a 4G communication protocol, and dynamically managing debugging resources using a multi-task concurrent scheduling algorithm; S200, multi-device cooperative signal output: analyzing task instructions through an IP address and physical port binding mapping mechanism, driving multiple point-to-point debugging devices to synchronously output signals, and ensuring signal time consistency based on a clock synchronization calibration mechanism, while generating high-precision analog and switching signals; S300, communication link interruption fault tolerance processing: real-time monitoring of 4G communication link parameters, hierarchical determination of communication interruption through a dynamic interruption discrimination module (410), and execution of differentiated fault tolerance strategies in combination with business priority; S400, test data verification and report generation: synchronous acquisition of power distribution master station data and debugging signal reference values, elimination of time offset using a time sequence correlation verification algorithm, identification of data errors and location of fault points through an error interval discrimination model, and automatic generation of a structured test report.

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