An ultrawideband millimeter-wave amplifier circuit and its control method

By optimizing the fully differential structure and band-depression filter structure, the problem of limited gain of millimeter-wave amplifiers within the operating frequency band was solved, the output power and stability were improved, and higher signal quality and circuit performance were achieved.

CN120729186BActive Publication Date: 2025-11-14UESTC (SHENZHEN) ADVANCED RES INST
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Patent Information

Application Number
CN202511202379.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-08-26
Publication Date
2025-11-14
Estimated Expiration
2045-08-26

AI Technical Summary

Technical Problem

In the existing technology, the overall gain of millimeter-wave amplifiers is limited within the operating frequency band, resulting in a decrease in the output power of broadband power amplifiers and low circuit stability.

Method used

The first-stage driver amplifier and the second-stage power amplifier adopt a fully differential structure. Combined with the first-stage and second-stage band-trap filter structures, the low-frequency stability and gain of the amplifier are optimized by adjusting the external bias voltage of the band-trap filter structure.

Benefits of technology

The overall gain, output power, and low-frequency stability of the power amplifier were improved in broadband conditions. By adjusting the center frequency, band gap depth, and operating range, higher signal quality and circuit stability were achieved.

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Abstract

This invention discloses an ultra-wideband millimeter-wave amplifier circuit and control method. The circuit includes a first-stage input matching circuit, a first-stage driver amplifier circuit, a first-stage inter-stage matching circuit, a second-stage power amplifier circuit, and a second-stage output matching circuit connected in sequence. It also includes a first-stage band-notch filter structure and a second-stage band-notch filter structure. The first-stage driver amplifier circuit receives the differential signal, amplifies it, and then transmits it to the first-stage inter-stage matching circuit. The second-stage power amplifier circuit receives the amplified differential signal, performs power matching on it, and then transmits it to the second-stage output matching circuit. Both the first-stage and second-stage band-notch filter structures are used to introduce the transmission signal of a preset frequency in the amplifier circuit to AC ground. The amplifier of this invention can improve gain, output power, and low-frequency stability.
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Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to an ultra-wideband millimeter-wave amplifier circuit and control method. Background Technology

[0002] Millimeter wave technology refers to the technology that utilizes electromagnetic waves with frequencies between 30 GHz and 300 GHz (corresponding to wavelengths of 1-10 millimeters) for applications such as communication, radar, and imaging. It is widely used in fifth-generation (5G) communication, future satellite communication, radar and sensing, aerospace, and defense. Among the many modules in a millimeter wave front-end system, the power amplifier is a core module and is crucial in determining the quality of wireless communication. The linearity of the power amplifier directly determines the quality of the transmitter's transmitted signal, the efficiency of the power amplifier determines the power consumption of the transceiver, and the output power of the power amplifier determines the communication distance.

[0003] Due to the 3dB bandwidth requirement and the need to ensure gain flatness within the operating frequency band, the overall gain of a power amplifier is limited by high-frequency gain. That is, the maximum and minimum gain within the operating frequency band cannot exceed 3dB, or even less, to achieve a flatter gain profile. Fully differential cathodic structures are commonly used in power amplifiers to suppress common-mode signals, thereby eliminating even-order harmonics at the output and improving output power. MOSFETs, due to parasitic capacitance and resistance, can compromise the stability of power amplifiers. In typical differential amplifier circuit designs, neutralizing capacitors and other techniques are used to ensure stability within the operating frequency band of a single stage amplifier. With proper matching, stability is achieved across the entire operating frequency band. However, due to the roll-off characteristic of transistor gain with increasing frequency, the gain at low frequencies is higher than at high frequencies and more prone to instability. To ensure stability at low frequencies, the neutralizing capacitor requires additional capacitance to maintain the maximum gain of the single-stage amplifier at low frequencies. This additional capacitance leads to a reduction in gain across the entire frequency band, resulting in a decrease in the output power and efficiency of the broadband power amplifier in the operating frequency band. Therefore, there is an urgent need for a power amplifier that improves gain, output power, and low-frequency stability within a wide bandwidth. Summary of the Invention

[0004] The purpose of this invention is to provide an ultra-wideband millimeter-wave amplifier circuit and control method to solve the technical problems existing in the prior art, such as the limited overall gain of the amplifier within the operating frequency band, which easily leads to a decrease in the output power of the broadband power amplifier and low circuit stability. The various technical effects of the preferred solutions among the many technical solutions provided by this invention are detailed below.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] The present invention provides an ultra-wideband millimeter-wave amplifier circuit, comprising a first-stage input matching circuit, a first-stage driver amplifier circuit, a first-stage inter-stage matching circuit, a second-stage power amplifier circuit, and a second-stage output matching circuit connected in sequence, and further comprising a first-stage band-notch filter structure and a second-stage band-notch filter structure, wherein the first-stage band-notch filter structure is connected to the first-stage driver amplifier circuit, and the second-stage band-notch filter structure is connected to the second-stage power amplifier circuit.

[0007] The first-stage input matching circuit is used to receive a single-ended input signal, convert the single-ended input signal into a differential signal, perform impedance matching on the differential signal, and transmit it to the first-stage driver amplifier circuit.

[0008] The first-stage driver amplifier circuit is used to receive the differential signal, amplify the differential signal, and then transmit it to the first-stage interstage matching circuit.

[0009] The first stage interstage matching circuit is used to perform interstage matching between the first stage driver amplifier circuit and the second stage power amplifier circuit, and then transmit the amplified differential signal to the second stage power amplifier circuit.

[0010] The second-stage power amplifier circuit is used to receive the amplified differential signal, perform power matching on the amplified differential signal, and then transmit it to the second-stage output matching circuit.

[0011] The second-stage output matching circuit is used to perform impedance matching on the differential signal after power matching and then output it.

[0012] Both the first-stage band-notch filter structure and the second-stage band-notch filter structure are used to introduce the transmission signal of the preset frequency in the amplifier circuit to AC ground.

[0013] Optionally, the first-stage input matching circuit includes a capacitor C1 and an input balun T1. The first input terminal of the input balun T1 is connected to the first terminal of the capacitor C1, the second input terminal of the input balun T1 is connected to the second terminal of the capacitor C1, and both the second input terminal of the input balun T1 and the second terminal of the capacitor C1 are grounded. The first output terminal of the input balun T1 is connected to the first input terminal of the first-stage driver amplifier circuit, and the second output terminal of the input balun T1 is connected to the second input terminal of the first-stage driver amplifier circuit.

[0014] Optionally, the first-stage driver amplifier circuit includes a first-path driver differential structure, a second-path driver differential structure, a neutralizing capacitor C2, and a neutralizing capacitor C3. The first-path driver differential structure is connected between the first output terminal of the input balun T1 and the first input terminal of the first-stage interstage matching circuit. The second-path driver differential structure is connected between the second output terminal of the input balun T1 and the second input terminal of the first-stage interstage matching circuit. The first-path driver differential structure is connected to the second-path driver differential structure through the neutralizing capacitors C2 and C3.

[0015] Optionally, the first drive differential structure includes transistor M1 and transistor M3, and the second drive differential structure includes transistor M2 and transistor M4. The gate of transistor M1 is connected to the first output terminal of the input balun T1 and the first terminal of the neutralizing capacitor C3. The drain of transistor M1 is connected to the second terminal of the neutralizing capacitor C2 and the source of transistor M3. The gate of transistor M2 is connected to the second output terminal of the input balun T1 and the first terminal of the neutralizing capacitor C2. The drain of transistor M2 is connected to the second terminal of the neutralizing capacitor C3 and the source of transistor M4. The sources of transistor M1 and M2 are both grounded. The gates of transistor M3 and M4 are both connected to the bias voltage VG2. The drain of transistor M3 is connected to the first input terminal of the first stage interstage matching circuit, and the drain of transistor M4 is connected to the second input terminal of the first stage interstage matching circuit.

[0016] The first input terminal of the first-stage driver amplifier circuit includes the gate of the transistor M1 and the first terminal of the neutralizing capacitor C3, and the second input terminal of the first-stage driver amplifier circuit includes the gate of the transistor M2 and the first terminal of the neutralizing capacitor C2.

[0017] Optionally, the first-stage band-notch filter structure includes transistor M5, transistor M6, resistor R4, resistor R5, inductor L1, inductor L2, decoupling capacitor C4, and decoupling capacitor C5.

[0018] The source of transistor M5 is connected to the drain of transistor M1 and the source of transistor M3. The drain of transistor M5 is connected to the first terminal of resistor R4. The second terminal of resistor R4 is connected to the gate of transistor M5 and the first terminal of inductor L1. The second terminal of inductor L1 is connected to the first terminal of decoupling capacitor C4 and bias voltage VX1. The second terminal of decoupling capacitor C4 is grounded.

[0019] The source of transistor M6 is connected to the drain of transistor M2 and the source of transistor M4. The drain of transistor M6 is connected to the first terminal of resistor R5. The second terminal of resistor R5 is connected to the gate of transistor M6 and the first terminal of inductor L2. The second terminal of inductor L2 is connected to the first terminal of decoupling capacitor C5 and bias voltage VX1. The second terminal of decoupling capacitor C5 is grounded.

[0020] Optionally, the second-stage power amplifier circuit includes a first power differential structure, a second power differential structure, a neutralizing capacitor C6, and a neutralizing capacitor C7. The first power differential structure is connected between the first output terminal of the first-stage inter-stage matching circuit and the first input terminal of the second-stage output matching circuit. The second power differential structure is connected between the second output terminal of the first-stage inter-stage matching circuit and the second input terminal of the second-stage output matching circuit. The first power differential structure is connected to the second power differential structure through the neutralizing capacitors C6 and C7.

[0021] Optionally, the first power differential structure includes transistors M7 and M9, and the second power differential structure includes transistors M8 and M9. 10 The gate of transistor M7 is connected to the first output terminal of the first stage interstage matching circuit and the first terminal of neutralizing capacitor C7. The drain of transistor M7 is connected to the second terminal of neutralizing capacitor C6 and the source of transistor M9. The gate of transistor M8 is connected to the second output terminal of the first stage interstage matching circuit and the first terminal of neutralizing capacitor C6. The drain of transistor M8 is connected to the second terminal of neutralizing capacitor C7 and the source of transistor M9. 10 The sources of transistors M7 and M8 are connected together, and the sources of transistors M9 and M8 are connected to ground. 10 The gate of transistor M9 is connected to the bias voltage VG4, and the drain of transistor M9 is connected to the first input terminal of the second-stage output matching circuit. 10 The drain of the circuit is connected to the second input terminal of the second-stage output matching circuit.

[0022] Optionally, the second-stage band-notch filter structure includes transistor M. 11 Transistor M 12 Resistors R6 and R7, inductors L3 and L4, decoupling capacitors C8 and C9;

[0023] The transistor M 11 The source of transistor M1 is connected to the drain of transistor M7 and the source of transistor M9. 11The drain of transistor M is connected to the first terminal of resistor R6, and the second terminal of resistor R6 is connected to transistor M. 11 The gate of the capacitor is connected to the first terminal of the inductor L3, the second terminal of the inductor L3 is connected to the first terminal of the decoupling capacitor C8 and the bias voltage VX2, and the second terminal of the decoupling capacitor C8 is grounded.

[0024] The transistor M 12 The source and drain of transistor M8 and transistor M 10 The source of the transistor M is connected to the source. 12 The drain of transistor M is connected to the first terminal of resistor R7, and the second terminal of resistor R7 is connected to transistor M. 12 The gate of the capacitor is connected to the first terminal of the inductor L4. The second terminal of the inductor L4 is connected to the first terminal of the decoupling capacitor C9 and the bias voltage VX2. The second terminal of the decoupling capacitor C9 is grounded.

[0025] Optionally, the second-stage output matching circuit includes resistor R3 and capacitor C. 10 The output balun T3 is connected to the output balun T3, with the first terminal of resistor R3 connected to the first input terminal of the output balun T3 and the drain of transistor M9. The second terminal of resistor R3 is connected to the second input terminal of the output balun T3 and the drain of transistor M9. 10 The drain of the capacitor C is connected to the capacitor C. 10 The first terminal is connected to the first output terminal of the output balun T3, and the capacitor C 10 The second terminal is connected to ground along with the second output terminal of the output balun T3;

[0026] The first input terminal of the second-stage output matching circuit includes the first terminal of the resistor R3 and the first input terminal of the output balun T3, and the second input terminal of the second-stage output matching circuit includes the second terminal of the resistor R3 and the second input terminal of the output balun T3.

[0027] A control method for an ultra-wideband millimeter-wave amplifier, applied to the ultra-wideband millimeter-wave amplifier circuit as described above, includes:

[0028] Send a single-ended input signal to the first-stage input matching circuit of the ultra-wideband millimeter-wave amplifier circuit;

[0029] After the first-stage input matching circuit converts the single-ended input signal into a differential signal, it performs impedance matching on the differential signal and transmits it to the first-stage driver amplifier circuit.

[0030] The first-stage driver amplifier circuit amplifies the received differential signal, and after introducing the transmission signal of the preset frequency in the differential signal to AC ground through the first-stage band-trap filter structure, the differential signal with the preset frequency transmission signal is transmitted to the first-stage interstage matching circuit.

[0031] The first-stage interstage matching circuit performs interstage matching on the amplified differential signal output from the first-stage driver amplifier circuit and then transmits it to the second-stage power amplifier circuit.

[0032] The second-stage power amplifier circuit performs power matching on the received amplified differential signal, and after introducing the transmission signal of the preset frequency in the received amplified differential signal to AC ground through the second-stage band-trap filter structure, it is transmitted to the second-stage output matching circuit.

[0033] The second-stage output matching circuit performs impedance matching on the differential signal after power matching and then outputs it.

[0034] Implementing one of the above-described technical solutions of the present invention has the following advantages or beneficial effects:

[0035] Both the first-stage driver amplifier circuit and the second-stage power amplifier circuit employ a fully differential structure to suppress common-mode signals, thereby eliminating even-order harmonics at the output and improving output power. The amplifier circuit uses a first-stage band-trapping filter structure and a second-stage band-trapping filter structure to improve the overall gain over a wide bandwidth. Furthermore, the low-frequency stability and low-frequency gain of the amplifier can be adjusted by regulating the external bias voltages of the first and second-stage band-trapping filter structures. Adjusting the parameters of the first and second-stage band-trapping filter structures allows for adjustment of the center frequency, band-trapping depth, and band-trapping range. The amplifier circuit in this embodiment effectively improves the overall gain, output power, and low-frequency stability of the power amplifier under wide bandwidth conditions. Attached Figure Description

[0036] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings:

[0037] Figure 1 This is a circuit diagram of Embodiment 1 of the present invention;

[0038] Figure 2 This is a diagram of the equivalent model of the band-notch filter structure in Embodiment 1 of the present invention (when Vx=1.2);

[0039] Figure 3 This is a diagram of the equivalent model of the band-notch filter structure in Embodiment 1 of the present invention (when Vx=0);

[0040] Figure 4 This is a graph showing the gain of the power stage amplifier versus frequency according to Embodiment 1 of the present invention.

[0041] Figure 5 This is a graph showing the stability curve of the power stage amplifier as a function of frequency (Mu>1 for stability) according to Embodiment 1 of the present invention;

[0042] Figure 6 This is a graph showing the impedance of the power stage amplifier as a function of frequency according to Embodiment 1 of the present invention.

[0043] Figure 7 This is a simulation S21 curve diagram of Embodiment 1 of the present invention. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of the present invention clearer, various exemplary embodiments described below will be referenced to the accompanying drawings, which form part of the exemplary embodiments, illustrating various exemplary embodiments that may be used to implement the present invention. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. It should be understood that they are merely examples of processes, methods, and apparatuses consistent with some aspects of the present invention disclosed as detailed in the appended claims, and other embodiments may be used, or structural and functional modifications may be made to the embodiments listed herein without departing from the scope and spirit of the present invention.

[0045] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," etc., indicate the orientation or positional relationship based on the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the referred element must have a specific orientation, or be constructed and operated in a specific orientation. The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. The term "multiple" means two or more. The terms "connected" and "linked" should be interpreted broadly, for example, they can be fixed connections, detachable connections, integral connections, mechanical connections, electrical connections, communication connections, direct connections, indirect connections through an intermediate medium, and can be the internal connection of two elements or the interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more of the related listed items. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0046] To illustrate the technical solution described in this invention, specific embodiments are described below, showing only the parts related to the embodiments of this invention.

[0047] Example 1:

[0048] like Figure 1 As shown, the present invention provides an ultra-wideband millimeter-wave amplifier circuit, including a first-stage input matching circuit, a first-stage driver amplifier circuit, a first-stage inter-stage matching circuit, a second-stage power amplifier circuit, and a second-stage output matching circuit connected in sequence. It also includes a first-stage band-notch filter structure and a second-stage band-notch filter structure. The first-stage band-notch filter structure is connected to the first-stage driver amplifier circuit, and the second-stage band-notch filter structure is connected to the second-stage power amplifier circuit.

[0049] The first-stage input matching circuit is used to receive single-ended input signals, convert them into differential signals, perform impedance matching on the differential signals, and transmit them to the first-stage driver amplifier circuit.

[0050] The first-stage driver amplifier circuit is used to receive the differential signal, amplify the differential signal, and then transmit it to the first-stage interstage matching circuit.

[0051] The first-stage interstage matching circuit is used to perform interstage matching on the first-stage driver amplifier circuit and the second-stage power amplifier circuit, and then transmit the amplified differential signal to the second-stage power amplifier circuit.

[0052] The second-stage power amplifier circuit is used to receive the amplified differential signal, perform power matching on the amplified differential signal, and then transmit it to the second-stage output matching circuit.

[0053] The second-stage output matching circuit is used to perform impedance matching on the differential signal after power matching and then output it.

[0054] Both the first-stage band-notch filter structure and the second-stage band-notch filter structure are used to introduce the transmission signal of the preset frequency in the amplifier circuit to AC ground.

[0055] Specifically, both the first-stage driver amplifier circuit and the second-stage power amplifier circuit employ a fully differential structure to suppress the common-mode signal output, thereby eliminating even-order harmonics at the output and improving output power. The amplifier circuit uses a first-stage band-trapping filter structure and a second-stage band-trapping filter structure to improve the overall gain over a wide bandwidth. Furthermore, the low-frequency stability and low-frequency gain of the amplifier can be adjusted by regulating the external bias voltages of the first and second-stage band-trapping filter structures. Adjusting the parameters of the first and second-stage band-trapping filter structures allows for adjustment of the center frequency, band-trapping depth, and band-trapping range. The amplifier circuit in this embodiment effectively improves the overall gain, output power, and low-frequency stability of the power amplifier under wide bandwidth conditions.

[0056] As an optional implementation, the first-stage input matching circuit includes a capacitor C1 and an input balun T1. The first input terminal of the input balun T1 is connected to the first terminal of the capacitor C1, and the second input terminal of the input balun T1 is connected to the second terminal of the capacitor C1. Both the second input terminal of the input balun T1 and the second terminal of the capacitor C1 are grounded. The first output terminal of the input balun T1 is connected to the first input terminal of the first-stage driver amplifier circuit, and the second output terminal of the input balun T1 is connected to the second input terminal of the first-stage driver amplifier circuit. Specifically, the first-stage input matching circuit is used to convert the single-ended input signal into a differential signal and perform impedance matching, matching from 50 ohms to the conjugate value of the input impedance of the first-stage driver amplifier circuit to reduce losses. The center tap of the secondary winding of the input balun T1 is connected to the bias voltage VG1 through a resistor. The first input terminal of the input balun T1 and the first terminal of the capacitor C1 are connected to the input terminal IN to receive the single-ended input signal transmitted at the input terminal IN.

[0057] As an optional implementation, the first-stage driver amplifier circuit includes a first-path differential driver structure, a second-path differential driver structure, and neutralizing capacitors C2 and C3. The first-path differential driver structure is connected between the first output terminal of the input balun T1 and the first input terminal of the first-stage interstage matching circuit. The second-path differential driver structure is connected between the second output terminal of the input balun T1 and the second input terminal of the first-stage interstage matching circuit. The first-path differential driver structure is connected to the second-path differential driver structure via neutralizing capacitors C2 and C3. Specifically, neutralizing capacitors C2 and C3 are introduced into the first-stage driver amplifier circuit to improve circuit stability. The first-stage driver amplifier circuit receives the differential signal output from the first-stage input matching circuit and amplifies the received differential signal to meet the input power requirements of the second-stage power amplifier circuit.

[0058] As an optional implementation, the first drive differential structure includes transistors M1 and M3, and the second drive differential structure includes transistors M2 and M4. The gate of transistor M1 is connected to the first output terminal of the input balun T1 and the first terminal of the neutralizing capacitor C3. The drain of transistor M1 is connected to the second terminal of the neutralizing capacitor C2 and the source of transistor M3. The gate of transistor M2 is connected to the second output terminal of the input balun T1 and the first terminal of the neutralizing capacitor C2. The drain of transistor M2 is connected to the second terminal of the neutralizing capacitor C3 and the source of transistor M4. The sources of transistors M1 and M2 are connected to ground. The gates of transistors M3 and M4 are connected to the bias voltage VG2. The drain of transistor M3 is connected to the first input terminal of the first stage interstage matching circuit, and the drain of transistor M4 is connected to the second input terminal of the first stage interstage matching circuit. The first input terminal of the first-stage driver amplifier circuit includes the gate of transistor M1 and the first terminal of neutralizing capacitor C3, and the second input terminal includes the gate of transistor M2 and the first terminal of neutralizing capacitor C2. Specifically, in the first-path differential drive structure, the input signal is connected to the gate of transistor M1, and the drain of transistor M1 is connected to the source of transistor M3. In the second-path power differential structure, the input signal is connected to the gate of transistor M2, and the drain of transistor M2 is connected to the source of transistor M4. The gates of transistors M3 and M4 are connected to a bias voltage VG2, and the drains of transistors M3 and M4 are connected to a supply voltage V through a first-stage inter-stage matching circuit composed of inductors and other components. DD The drain output signal of transistor M3 is connected to a matching network to bias the first power differential structure into Class A operation. Transistors M1, M2, M3, and M4 operate in the center of their linear amplification region. Whether it is the positive or negative half-cycle of the input signal, transistors M1, M2, M3, and M4 are in the conducting state. The signal will not be distorted due to "truncation" or "clipping" effects, so the generated harmonic components are small. While achieving high gain and output power, it reduces the harmonic components caused by amplifier nonlinearity, but has a large DC power consumption.

[0059] More specifically, the drain signal of transistor M1 in the first driving differential structure is introduced to the input terminal of the second driving differential structure (i.e., the gate of transistor M2) through neutralizing capacitor C2, and the drain signal of transistor M2 in the second driving differential structure is introduced to the input terminal of the first driving differential structure (i.e., the gate of transistor M1) through neutralizing capacitor C3, in order to improve the circuit stability of the single pole.

[0060] As an optional implementation, the first-stage band-trap filter structure includes transistors M5 and M6, resistors R4 and R5, inductors L1 and L2, and decoupling capacitors C4 and C5. The source of transistor M5 is connected to the drain of transistor M1 and the source of transistor M3. The drain of transistor M5 is connected to the first terminal of resistor R4. The second terminal of resistor R4 is connected to the gate of transistor M5 and the first terminal of inductor L1. The second terminal of inductor L1 is connected to the first terminal of decoupling capacitor C4 and the bias voltage VX1. The second terminal of decoupling capacitor C4 is grounded. The source of transistor M6 is connected to the drain of transistor M2 and the source of transistor M4. The drain of transistor M6 is connected to the first terminal of resistor R5. The second terminal of resistor R5 is connected to the gate of transistor M6 and the first terminal of inductor L2. The second terminal of inductor L2 is connected to the first terminal of decoupling capacitor C5 and the bias voltage VX1. The second terminal of decoupling capacitor C5 is grounded. Specifically, the first-stage band-trap filter structure introduces the transmission signal at the preset frequency (i.e., the specific frequency that causes circuit instability) of the first-stage driver amplifier circuit into AC ground to reduce the gain of the specific frequency signal in the first-stage driver amplifier circuit. With the selection of the capacitance value of the neutralizing capacitors in the driver stage and power stage, the gain and output power of each stage can be significantly improved in broadband conditions, and the output impedance can be improved to make it easier to achieve broadband matching. By adjusting the external bias voltage of the first-stage band-trap filter structure, the low-frequency stability of each stage amplifier can be improved, and the low-frequency gain of the overall circuit can be reduced. That is, adjusting the external bias voltage of the first-stage and second-stage band-trap filter structures in the later stage can avoid low-frequency instability caused by manufacturing errors, design defects, etc., increase the debugging space of the circuit in the later stage, and ensure the low-frequency stability of the circuit.

[0061] More specifically, the first-stage band-trap filter structure consists of diode connections for transistors M5 and M6, resistors R4 and R5, inductors L1 and L2, and decoupling capacitors C4 and C5. The source of transistor M5 is connected to the drain of transistor M1 in the first-path differential drive structure of the same-side input signal, and the source of transistor M6 is connected to the drain of transistor M2 in the second-path differential drive structure of the same-side input signal. This allows the signal of a specific frequency band of the amplifier to be introduced to AC ground, achieving the band-trap effect of the overall circuit signal. Resistors R4 and R5 can adjust the depth of the band-trap filter. Transistors M5 and M6 in the band-trap filter have parasitic capacitances. By selecting the transistor size, and the sizes of inductors L1, L2, C4, and C5, the center frequency and effective range of the band-trap filter can be adjusted.

[0062] As an optional implementation, the first-stage interstage matching circuit uses transformer T2 to achieve interstage matching, matching the conjugate value of the output impedance of the first-stage driver amplifier circuit to the conjugate value of the input impedance of the second-stage power amplifier circuit, thereby reducing losses.

[0063] As an optional implementation, the second-stage power amplifier circuit includes a first power differential structure, a second power differential structure, and neutralizing capacitors C6 and C7. The first power differential structure is connected between the first output terminal of the first-stage inter-stage matching circuit and the first input terminal of the second-stage output matching circuit. The second power differential structure is connected between the second output terminal of the first-stage inter-stage matching circuit and the second input terminal of the second-stage output matching circuit. The first power differential structure is connected to the second power differential structure via neutralizing capacitors C6 and C7. Specifically, the second-stage power amplifier circuit achieves high output power, and power matching is used at the output terminal. The second-stage power amplifier circuit uses a fully differential structure to suppress the common-mode signal output, thereby eliminating even-order harmonics at the output terminal and improving output power. The use of neutralizing capacitors C6 and C7 in the second-stage power amplifier circuit improves circuit stability.

[0064] As an optional implementation, the first power differential structure includes transistors M7 and M9, and the second power differential structure includes transistors M8 and M9. 10 The gate of transistor M7 is connected to the first output terminal of the first-stage interstage matching circuit and the first terminal of neutralizing capacitor C7. The drain of transistor M7 is connected to the second terminal of neutralizing capacitor C6 and the source of transistor M9. The gate of transistor M8 is connected to the second output terminal of the first-stage interstage matching circuit and the first terminal of neutralizing capacitor C6. The drain of transistor M8 is connected to the second terminal of neutralizing capacitor C7 and the source of transistor M9. 10 The sources of transistors M7 and M8 are connected together, and the source of transistor M9 is connected to ground. 10 The gate of transistor M9 is connected to the bias voltage VG4, and the drain of transistor M9 is connected to the first input terminal of the second-stage output matching circuit. 10 The drain of transistor M7 is connected to the second input terminal of the second-stage output matching circuit. Specifically, in the first power differential structure, the input signal is connected to the gate of transistor M7, and the drain of transistor M7 is connected to the source of transistor M9. In the second power differential structure, the input signal is connected to the gate of transistor M8, and the drain of transistor M8 is connected to the source of transistor M9. 10 The source of transistor M9, the gate of transistor M9, and transistor M 10 The gate is connected to the bias voltage VG4, the drain of transistor M9 and transistor M 10 The drain of the circuit is connected to the supply voltage V via an output balun T3 composed of inductors and other components. DDBy outputting a signal from the drain of transistor M9 or connecting it to a matching network, the first power differential structure is biased into Class A operating mode. Transistors M7, M8, M9, and M... 10 Operating at the center of their linear amplification region, whether in the positive or negative half-cycle of the input signal, transistors M7, M8, M9, and M... 10 Both are in the conducting state, so the signal will not be distorted due to the "truncation" or "clipping" effect. Therefore, the generated harmonic components are small, and while obtaining higher gain and output power, the harmonic components caused by amplifier nonlinearity are reduced, but the DC power consumption is large.

[0065] More specifically, the drain signal of transistor M7, the input signal of the first power differential structure, is introduced to the input terminal of the differential signal of the second power differential structure (i.e., the gate of transistor M8) through neutralizing capacitor C6, and the drain signal of transistor M8, the input signal of the second power differential structure, is introduced to the input terminal of the differential signal of the first power differential structure (i.e., the gate of transistor M7) through neutralizing capacitor C7, in order to improve the circuit stability of the single pole.

[0066] As an optional implementation, the second-stage band-notch filter structure includes transistor M. 11 Transistor M 12 Resistors R6 and R7, inductors L3 and L4, decoupling capacitors C8 and C9, and transistor M. 11 The source of transistor M1 is connected to the drain of transistor M7 and the source of transistor M9. 11 The drain of transistor M is connected to the first terminal of resistor R6, and the second terminal of resistor R6 is connected to transistor M. 11 The gate of transistor M is connected to the first terminal of inductor L3. The second terminal of inductor L3 is connected to the first terminal of decoupling capacitor C8 and the bias voltage VX2. The second terminal of decoupling capacitor C8 is grounded. 12 The source and drain of transistor M8 and transistor M 10 The source of the transistor is connected to the source of the transistor M. 12 The drain of transistor M is connected to the first terminal of resistor R7, and the second terminal of resistor R7 is connected to transistor M. 12The gate of the inductor is connected to the first terminal of the inductor L4. The second terminal of the inductor L4 is connected to the first terminal of the decoupling capacitor C9 and the bias voltage VX2. The second terminal of the decoupling capacitor C9 is grounded. Specifically, the second-stage band-trap filter structure introduces the transmission signal of the second-stage power amplifier circuit at a preset frequency (i.e., a specific frequency) to AC ground, thereby reducing the gain of the specific frequency signal in the second-stage power amplifier circuit. With the selection of the capacitance values ​​of the neutralizing capacitors in the driver stage and power stage, the gain and output power of each stage can be significantly improved in a wideband environment, and the output impedance can be improved to make it easier to achieve wideband matching. By adjusting the external bias voltage of the second-stage band-trap filter structure, the low-frequency stability of each stage amplifier can be improved, and the low-frequency gain of the overall circuit can be reduced.

[0067] More specifically, transistor M 11 The source of the transistor is connected to the drain of the first drive differential structure transistor M7 on the same side as the input signal. 12 The source of the transistor is connected to the drain of the second-path differential transistor M8, which drives the input signal on the same side. This allows the signal of a specific frequency band of the amplifier to be introduced to AC ground, achieving a band-trap effect for the overall circuit signal. Resistors R6 and R7 can adjust the depth of the band-trap filter. The band-trap filter transistor M... 11 and transistor M 12 The filter itself has parasitic capacitance. By selecting the size of the tube, inductor L3, inductor L4, decoupling capacitor C8, and decoupling capacitor C9, the center frequency of the band trap filter and the effective range can be adjusted.

[0068] As an optional implementation, the second-stage output matching circuit includes resistor R3 and capacitor C. 10 The first terminal of resistor R3 is connected to the first input terminal of output balun T3 and the drain of transistor M9, and the second terminal of resistor R3 is connected to the second input terminal of output balun T3 and the drain of transistor M9. 10 The drain is connected, and the capacitor C 10 The first terminal is connected to the first output terminal of the output balun T3, and capacitor C 10The second terminal of the output balun T3 is connected to ground along with the second output terminal of the output balun T3. Specifically, the first input terminal of the second-stage output matching circuit includes the first terminal of resistor R3 and the first input terminal of the output balun T3, and the second input terminal of the second-stage output matching circuit includes the second terminal of resistor R3 and the second input terminal of the output balun T3. The second-stage output matching circuit is used to convert the differential signal to a single-ended output signal and to achieve impedance transformation for power matching, matching the load impedance of the second-stage power amplifier circuit to 50 ohms. The differential input port of the output balun T3 is connected to the differential signal output terminal of the second-stage power amplifier circuit, and a resistor R3 is connected in parallel between the first and second input terminals of the output balun T3 to reduce the reflection coefficient S22 of the single-ended output signal of the output balun T3. A capacitor C is connected in parallel between the first and second output terminals of the output balun T3 and the single-ended ground. 10 This achieves broadband impedance matching. The first output terminal of the output balun T3 and capacitor C... 10 The first terminal is connected to the output terminal OUT, and is used to output a single-ended output signal.

[0069] More specifically, in this embodiment, transistors M1, M2, M3, M4, M5, M6, M7, M8, M9, and M... 10 M 11 M 12 All are MOSFETs.

[0070] An equivalent model analysis of the small-signal band-notch filter structure is performed to derive the center frequency f0 and the conduction frequency range of the band-notch filter. The equivalent model is as follows: Figure 2 and Figure 3 As shown. The signal travels from the source of the MOSFET through the gate-source capacitance C. gs The main path is to the gate of the MOSFET. The signal also flows through the drain-source resistor R. o and drain-source parasitic capacitance C ds Parallel circuit, or through drain-source resistor R off and drain-source parasitic capacitance C off The parallel circuit reaches the drain of the MOSFET, and then passes through resistor R1 and the parasitic capacitance C between the drain and gate of the MOSFET. gd The current reaches the gate of the MOSFET and is then connected to the external bias potential Vx via an inductor. A decoupling capacitor is connected to ground near the inductor at this node, thus forming a current path that allows only signals of a specific frequency to pass through. Because C gs >C ds >C off Therefore, the current is mainly affected by the capacitance C. gs And the influence of inductor L1. When the external gate voltage Vx of the MOSFET in the filter structure is 1.2V, the MOSFET in the filter network has an operating state and parasitic parameter relationship. The gate-source capacitance C of the MOSFET under this voltage is...gs The magnitude is relatively large, which is the main factor affecting performance, and the on-resistance R of the MOSFET is also significant. o The current flows through R when the on-resistance is small. o The original equivalent model was transformed into a series-parallel model and analyzed. The center frequency f0 of the filter network was obtained using the formula for an LC filter network: f0 = 1 / [2π√(LC)], and the influence of each component on the frequency range of the filter was also analyzed. The operating range of this power amplifier is 20GHz~40GHz. Different positions of the center frequency f0 of the filter network will have different effects; placing it in the lower sideband or outside the lower sideband will yield the best results. This design places the center frequency of the filter network slightly below the lower sideband, which can be adjusted back to the lower sideband later by adjusting the bias voltage Vx. The function of this filter network and the maximum gain change of the circuit after being connected to the power stage amplifier circuit are shown in the attached figure. Figure 4 As shown, the maximum usable gain range of an amplifier circuit after using a neutralizing capacitor should generally cover the operating frequency band, ensuring that the inflection point of unusable gain is outside the lower sideband. For example, if the lower sideband of this circuit is 20GHz, and the normal inflection point of unusable gain is 18GHz, this circuit sets the inflection point of unusable gain after using a neutralizing capacitor at 38GHz. The effect is an increase in gain across the entire frequency band, but this can lead to single-stage amplifier instability, i.e., excessive gain within the operating range causing oscillations. By introducing the filtering effect of this filter network and adjusting the circuit parameters, the center frequency f0 of the filter network is set near the lower sideband of the operating frequency band, which in this case is 18GHz. Furthermore, by adjusting the inductor... The frequency range is adjusted by modifying the size of the MOSFET, and the depth of the band-trap filter is adjusted by modifying the resistor. Ultimately, the band-trap filter structure removes excess signals, filtering out unwanted gain that could cause circuit instability. This achieves gain stability within the operating frequency band, improving the amplifier's low-frequency stability. Furthermore, compared to traditional power amplifiers without a filter network, the gain is higher. Finally, the gain and output power across the entire operating frequency band are improved when a load is connected. According to the power-added efficiency formula: Power-added efficiency = (Output power - Input power) / DC power, the power-added efficiency also increases due to the increased output power and gain, while the DC power remains constant. The final results are shown in the attached figure. Figure 4 and Figure 5 As shown.

[0071] The filtering structure can make the lower and upper sideband impedance values ​​of the output impedance of the differential structure of the second-stage power amplifier circuit close, such as... Figure 6 As shown, this reduces low-frequency loss and prevents significant drop in low-frequency gain when the amplifier performs output impedance matching.

[0072] When the external gate voltage Vx of the MOSFET in the filter structure decreases from 1.2V to 0V, the gate-source capacitance C of the MOSFET... gsThis will decrease significantly, becoming the main influencing factor. Furthermore, the on-resistance of the MOSFET will decrease from R... o Change to R off When the resistance value increases, the drain-source parasitic capacitance of the MOSFET changes from C. ds Change to C off However, the drain-source parasitic capacitance C off The capacitance is very small, and the parasitic capacitance C off The connection and the parasitic gate-drain capacitance C of the MOS transistor that originally existed in the path gd The series connection reduces the current in the circuit to a negligible level. Using the formula for an LC filter network: f0 = 1 / [2π√(LC)], the center frequency f0 of the filter network increases. This shifts the original center frequency of the filter network from outside the low-frequency band of the operating frequency band (18GHz) to the low-frequency sideband of the operating frequency band (20GHz). By adjusting the external voltage Vx of the filter structure, the low-frequency gain of the single-stage amplifier and the overall circuit is reduced, improving the stability of the single-stage amplifier and the overall circuit at low frequencies in the operating frequency band. This achieves the function of controlling low-frequency gain and low-frequency stability, as shown in the attached figure. Figure 7 As shown. The overall circuit has a 3dB bandwidth of 22~41GHz and a peak gain of 23.2dB. The circuit is stable across the entire frequency band during simulation and actual testing, and the filter network ensures the amplifier is stable within the operating frequency band.

[0073] The embodiment is merely a specific example and does not indicate that this is the only way to implement the present invention.

[0074] Example 2:

[0075] An ultra-wideband millimeter-wave amplifier control method, applied to the ultra-wideband millimeter-wave amplifier circuit as shown in Embodiment 1, includes:

[0076] Send a single-ended input signal to the first-stage input matching circuit of the ultra-wideband millimeter-wave amplifier circuit;

[0077] The first-stage input matching circuit converts the single-ended input signal into a differential signal, performs impedance matching on the differential signal, and transmits it to the first-stage driver amplifier circuit.

[0078] The first-stage driver amplifier circuit amplifies the received differential signal and introduces the transmission signal of the preset frequency in the differential signal to AC ground through the first-stage band-trap filter structure. Then, the differential signal with the preset frequency transmission signal is transmitted to the first-stage interstage matching circuit.

[0079] The first-stage interstage matching circuit performs interstage matching on the amplified differential signal output from the first-stage driver amplifier circuit and then transmits it to the second-stage power amplifier circuit.

[0080] The second-stage power amplifier circuit performs power matching on the received amplified differential signal, and then introduces the transmission signal of the preset frequency in the received amplified differential signal to AC ground through the second-stage band-trap filter structure, before transmitting it to the second-stage output matching circuit.

[0081] The second-stage output matching circuit performs impedance matching on the differential signal after power matching and outputs it. Specifically, the first-stage band-trap filter structure can extract the preset frequency signals that cause circuit instability in the first-stage driver amplifier circuit, and the second-stage band-trap filter structure can extract the preset frequency signals that cause circuit instability in the second-stage power amplifier circuit, so as to stabilize the gain of the amplifier circuit within the operating frequency band and improve the stability of the amplifier at low and medium frequencies.

[0082] The above description is merely a preferred embodiment of the present invention. Those skilled in the art will understand that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the present invention. Furthermore, under the teachings of the present invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the protection scope of the present invention.

Claims

1. An ultra-wideband millimeter-wave amplifier circuit, characterized in that, It includes a first-stage input matching circuit, a first-stage driver amplifier circuit, a first-stage inter-stage matching circuit, a second-stage power amplifier circuit, and a second-stage output matching circuit connected in sequence. It also includes a first-stage band-notch filter structure and a second-stage band-notch filter structure. The first-stage band-notch filter structure is connected to the first-stage driver amplifier circuit, and the second-stage band-notch filter structure is connected to the second-stage power amplifier circuit. The first-stage input matching circuit is used to receive a single-ended input signal, convert the single-ended input signal into a differential signal, perform impedance matching on the differential signal, and transmit it to the first-stage driver amplifier circuit. The first-stage driver amplifier circuit is used to receive the differential signal, amplify the differential signal, and then transmit it to the first-stage interstage matching circuit. The first stage interstage matching circuit is used to perform interstage matching between the first stage driver amplifier circuit and the second stage power amplifier circuit, and then transmit the amplified differential signal to the second stage power amplifier circuit. The second-stage power amplifier circuit is used to receive the amplified differential signal, perform power matching on the amplified differential signal, and then transmit it to the second-stage output matching circuit. The second-stage output matching circuit is used to perform impedance matching on the differential signal after power matching and then output it. Both the first-stage band-notch filter structure and the second-stage band-notch filter structure are used to introduce the transmission signal of the preset frequency in the amplifier circuit to AC ground; The first-stage input matching circuit includes an input balun T1. The first-stage driver amplifier circuit includes a first-path differential driver structure, a second-path differential driver structure, a neutralizing capacitor C2, and a neutralizing capacitor C3. The first-path differential driver structure includes transistors M1 and M3, and the second-path differential driver structure includes transistors M2 and M4. The gate of transistor M1 is connected to the first output terminal of the input balun T1 and the first terminal of the neutralizing capacitor C3. The drain of transistor M1 is connected to the second terminal of the neutralizing capacitor C2 and the source of transistor M3. The gate of transistor M2 is connected to the second output terminal of the input balun T1 and the first terminal of the neutralizing capacitor C2. The drain of transistor M2 is connected to the second terminal of the neutralizing capacitor C3 and the source of transistor M4. The sources of transistor M1 and M2 are connected to ground. The gates of transistor M3 and M4 are connected to the bias voltage VG2. The drain of transistor M3 is connected to the first input terminal of the first stage interstage matching circuit. The drain of transistor M4 is connected to the second input terminal of the first stage interstage matching circuit. The first input terminal of the first-stage driver amplifier circuit includes the gate of the transistor M1 and the first terminal of the neutralizing capacitor C3, and the second input terminal of the first-stage driver amplifier circuit includes the gate of the transistor M2 and the first terminal of the neutralizing capacitor C2.

2. The ultra-wideband millimeter-wave amplifier circuit according to claim 1, characterized in that, The first-stage input matching circuit further includes a capacitor C1. The first input terminal of the input balun T1 is connected to the first terminal of the capacitor C1. The second input terminal of the input balun T1 is connected to the second terminal of the capacitor C1. Both the second input terminal of the input balun T1 and the second terminal of the capacitor C1 are grounded. The first output terminal of the input balun T1 is connected to the first input terminal of the first-stage driver amplifier circuit. The second output terminal of the input balun T1 is connected to the second input terminal of the first-stage driver amplifier circuit.

3. The ultra-wideband millimeter-wave amplifier circuit according to claim 2, characterized in that, The first drive differential structure is connected between the first output terminal of the input balun T1 and the first input terminal of the first stage interstage matching circuit, and the second drive differential structure is connected between the second output terminal of the input balun T1 and the second input terminal of the first stage interstage matching circuit. The first drive differential structure is connected to the second drive differential structure through the neutralizing capacitor C2 and the neutralizing capacitor C3.

4. The ultra-wideband millimeter-wave amplifier circuit according to claim 1, characterized in that, The first-stage band-notch filter structure includes transistor M5, transistor M6, resistor R4, resistor R5, inductor L1, inductor L2, decoupling capacitor C4, and decoupling capacitor C5. The source of transistor M5 is connected to the drain of transistor M1 and the source of transistor M3. The drain of transistor M5 is connected to the first terminal of resistor R4. The second terminal of resistor R4 is connected to the gate of transistor M5 and the first terminal of inductor L1. The second terminal of inductor L1 is connected to the first terminal of decoupling capacitor C4 and bias voltage VX1. The second terminal of decoupling capacitor C4 is grounded. The source of transistor M6 is connected to the drain of transistor M2 and the source of transistor M4. The drain of transistor M6 is connected to the first terminal of resistor R5. The second terminal of resistor R5 is connected to the gate of transistor M6 and the first terminal of inductor L2. The second terminal of inductor L2 is connected to the first terminal of decoupling capacitor C5 and bias voltage VX1. The second terminal of decoupling capacitor C5 is grounded.

5. The ultra-wideband millimeter-wave amplifier circuit according to claim 1, characterized in that, The second-stage power amplifier circuit includes a first power differential structure, a second power differential structure, a neutralizing capacitor C6, and a neutralizing capacitor C7. The first power differential structure is connected between the first output terminal of the first-stage interstage matching circuit and the first input terminal of the second-stage output matching circuit. The second power differential structure is connected between the second output terminal of the first-stage interstage matching circuit and the second input terminal of the second-stage output matching circuit. The first power differential structure is connected to the second power differential structure through the neutralizing capacitors C6 and C7.

6. The ultra-wideband millimeter-wave amplifier circuit according to claim 5, characterized in that, The first power differential structure includes transistors M7 and M9, and the second power differential structure includes transistors M8 and M9. 10 The gate of transistor M7 is connected to the first output terminal of the first stage interstage matching circuit and the first terminal of neutralizing capacitor C7. The drain of transistor M7 is connected to the second terminal of neutralizing capacitor C6 and the source of transistor M9. The gate of transistor M8 is connected to the second output terminal of the first stage interstage matching circuit and the first terminal of neutralizing capacitor C6. The drain of transistor M8 is connected to the second terminal of neutralizing capacitor C7 and the source of transistor M9. 10 The sources of transistors M7 and M8 are connected together, and the sources of transistors M9 and M8 are connected to ground. 10 The gate of transistor M9 is connected to the bias voltage VG4, and the drain of transistor M9 is connected to the first input terminal of the second-stage output matching circuit. 10 The drain of the circuit is connected to the second input terminal of the second-stage output matching circuit.

7. The ultra-wideband millimeter-wave amplifier circuit according to claim 6, characterized in that, The second-stage band-notch filter structure includes transistor M. 11 Transistor M 12 Resistors R6 and R7, inductors L3 and L4, decoupling capacitors C8 and C9; The transistor M 11 The source of transistor M1 is connected to the drain of transistor M7 and the source of transistor M9. 11 The drain of transistor M is connected to the first terminal of resistor R6, and the second terminal of resistor R6 is connected to transistor M. 11 The gate of the capacitor is connected to the first terminal of the inductor L3, the second terminal of the inductor L3 is connected to the first terminal of the decoupling capacitor C8 and the bias voltage VX2, and the second terminal of the decoupling capacitor C8 is grounded. The transistor M 12 The source and drain of transistor M8 and transistor M 10 The source of the transistor M is connected to the source. 12 The drain of transistor M is connected to the first terminal of resistor R7, and the second terminal of resistor R7 is connected to transistor M. 12 The gate of the capacitor is connected to the first terminal of the inductor L4. The second terminal of the inductor L4 is connected to the first terminal of the decoupling capacitor C9 and the bias voltage VX2. The second terminal of the decoupling capacitor C9 is grounded.

8. The ultra-wideband millimeter-wave amplifier circuit according to claim 6, characterized in that, The second-stage output matching circuit includes resistor R3 and capacitor C. 10 The output balun T3 is connected to the output balun T3, with the first terminal of resistor R3 connected to the first input terminal of the output balun T3 and the drain of transistor M9. The second terminal of resistor R3 is connected to the second input terminal of the output balun T3 and the drain of transistor M9. 10 The drain of the capacitor C is connected to the capacitor C. 10 The first terminal is connected to the first output terminal of the output balun T3, and the capacitor C 10 The second terminal is connected to ground along with the second output terminal of the output balun T3; The first input terminal of the second-stage output matching circuit includes the first terminal of the resistor R3 and the first input terminal of the output balun T3, and the second input terminal of the second-stage output matching circuit includes the second terminal of the resistor R3 and the second input terminal of the output balun T3.

9. A control method for an ultra-wideband millimeter-wave amplifier, characterized in that, The circuit applied to the ultra-wideband millimeter-wave amplifier circuit as described in any one of claims 1-8 includes: Send a single-ended input signal to the first-stage input matching circuit of the ultra-wideband millimeter-wave amplifier circuit; After the first-stage input matching circuit converts the single-ended input signal into a differential signal, it performs impedance matching on the differential signal and transmits it to the first-stage driver amplifier circuit. The first-stage driver amplifier circuit amplifies the received differential signal, and after introducing the transmission signal of the preset frequency in the differential signal to AC ground through the first-stage band-trap filter structure, the differential signal with the preset frequency transmission signal is transmitted to the first-stage interstage matching circuit. The first-stage interstage matching circuit performs interstage matching on the amplified differential signal output from the first-stage driver amplifier circuit and then transmits it to the second-stage power amplifier circuit. The second-stage power amplifier circuit performs power matching on the received amplified differential signal, and after introducing the transmission signal of the preset frequency in the received amplified differential signal to AC ground through the second-stage band-trap filter structure, it is transmitted to the second-stage output matching circuit. The second-stage output matching circuit performs impedance matching on the differential signal after power matching and then outputs it.

Citation Information

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