A three-state XOR XNOR gate based on probabilistic devices and its modulation method

Abstract

This invention provides a three-state XOR / XNOR gate based on probabilistic devices and its modulation method, relating to the field of semiconductor device technology. The three-state XOR / XNOR gate comprises multiple probabilistic devices connected in series. The resistive state of each probabilistic device exhibits either a high-resistance state or a low-resistance state depending on the input pulse current density. By inputting multiple pulse currents of different current densities, the total voltage across the series connection of the multiple probabilistic devices reaches different voltage ranges, corresponding to logic values ​​1, 1 / 2, and 0, respectively, thus realizing a three-state XOR and XNOR gate. The application of this three-state XOR / XNOR gate is expected to overcome the performance bottleneck of traditional binary circuits and become a key component in AI acceleration, fault-tolerant computing, and novel computing architectures.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor devices, in particular to a three-state XOR / XNOR gate based on a probabilistic device and a modulation method thereof. BACKGROUND

[0002] The probabilistic device can have a deterministic magnetization flip under an out-of-plane magnetic field when a varying pulse current is injected, and the thermal stability can cause the magnetic layer in the probabilistic device to have a random magnetization flip when the current is injected. This phenomenon, which is based on the spin-orbit torque effect (SOT) or the spin transfer torque effect (STT), is called the bounce-back phenomenon.

[0003] The probabilistic device has the above characteristics, and the three-state XOR / XNOR gate design can be realized. SUMMARY

[0004] The present application provides a three-state XOR / XNOR gate based on a probabilistic device and a modulation method thereof, in which multiple probabilistic devices are connected in series, different pulse current density values are input multiple times, the total voltage of the entire circuit reaches different voltage ranges, and the three-state XOR / XNOR gate design is realized.

[0005] To solve the above technical problems, the present application provides the following technical solutions.

[0006] In one aspect, a three-state XOR / XNOR gate based on a probabilistic device is provided, which includes multiple probabilistic devices connected in series. The resistance state of the probabilistic device can be in a high resistance state or a low resistance state according to different input pulse current densities. By inputting pulse currents with different current densities multiple times, the total voltage of the multiple probabilistic devices connected in series reaches different voltage ranges, which correspond to logic values 1, 1 / 2 and 0, respectively, to realize the three-state XOR / XNOR gate.

[0007] Optionally, the probabilistic device is a magnetic tunnel junction device or a Hall bar device.

[0008] Optionally, the magnetic tunnel junction device includes, from bottom to top, a substrate, a spin current generation layer, a ferromagnetic layer, an intermediate non-magnetic insulating barrier layer, a magnetic pinning layer and a readout electrode layer.

[0009] Optionally, the Hall bar device includes, from bottom to top, a substrate, a first spin current generation layer, a second spin current generation layer, a ferromagnetic layer and a cover layer.

[0010] Optionally, the probabilistic device has different magnetization flips for different pulse current densities.

[0011] When the input pulse current density is greater than the critical flipping current density and less than the first threshold current density J0, a deterministic flipping occurs; when the input pulse current density is greater than the first threshold current density J0, a probabilistic flipping occurs; when the input pulse current density continues to increase and is greater than the second threshold current density J1, a random flipping occurs, that is, the flipping probabilities of the magnetization state upward and downward are both 50%.

[0012] Optionally, when the deterministic flipping occurs, the input pulse current density is 10*10 10 A·m -2 ~20*10 10 A·m -2 ; when the probabilistic flipping occurs, the input pulse current density is 20*10 10 A·m -2 ~30*10 10 A·m -2 ; when the random flipping occurs, the input pulse current density is greater than 30*10 10 A·m -2 , and less than the maximum current density that the probabilistic device can withstand.

[0013] In another aspect, a modulation method based on the ternary XOR or XNOR gate of any one of the above is provided, and the method comprises:

[0014] Pulse currents with different current densities are input to the plurality of probabilistic devices in series, so that the total voltage of the plurality of probabilistic devices in series reaches different voltage ranges, respectively corresponding to logic values 1, 1 / 2 and 0, so as to realize the ternary XOR gate and XNOR gate.

[0015] Optionally, the logic values 1, 1 / 2 and 0 are realized respectively by the following methods:

[0016] A pulse current density satisfying downward deterministic flipping is input to the plurality of probabilistic devices in series, so that the plurality of probabilistic devices present a high resistance state, and the total voltage of the plurality of probabilistic devices in series at this time corresponds to the logic value 1;

[0017] A pulse current density satisfying random flipping is input to the plurality of probabilistic devices in series, so that the plurality of probabilistic devices randomly present a high resistance state or a low resistance state, and the total voltage of the plurality of probabilistic devices in series at this time corresponds to the logic value 1 / 2;

[0018] A pulse current density satisfying upward deterministic flipping is input to the plurality of probabilistic devices in series, so that the plurality of probabilistic devices present a low resistance state, and the total voltage of the plurality of probabilistic devices in series at this time corresponds to the logic value 0.

[0019] The technical solution provided by the present application has at least the following beneficial effects:

[0020] The application provides a three-state XOR / XNOR gate based on a probabilistic device and a modulation method thereof. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and all other drawings obtained by those of ordinary skill in the art without creative effort based on the drawings are within the protection scope of the present application.

[0022] Figure 1 is a structural schematic diagram of a three-state XOR / XNOR gate provided by the embodiments of the present application;

[0023] Figures 2a-2b is a schematic diagram of a magnetic tunnel junction device based on SOT and STT provided by the embodiments of the present application;

[0024] Figure 3 is a schematic diagram of a Hall bar device provided by the embodiments of the present application;

[0025] Figure 4 is a schematic diagram of a rebound phenomenon provided by the embodiments of the present application;

[0026] Figure 5 is a schematic diagram of a random flip principle provided by the embodiments of the present application;

[0027] Figure 6 is a truth table of the three-state XOR / XNOR gate provided by the embodiments of the present application. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below in combination with the drawings of the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the described embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present application.

[0029] The embodiments of the present application provide a three-state XOR / XNOR gate based on a probabilistic device,Figure 1 As shown, the three-state XOR and XNOR gates comprise multiple probabilistic devices connected in series, with the "+" sign indicating series connection. The resistive states of these probabilistic devices vary from high to low resistance depending on the input pulse current density. By inputting multiple pulses of different current densities, the total voltage across the series connection of the multiple probabilistic devices reaches different voltage ranges, corresponding to logic values ​​1, 1 / 2, and 0, respectively, thus realizing the three-state XOR and XNOR gates.

[0030] In this embodiment of the invention, the probability device is a magnetic tunnel junction device (MTJ) or a Hall bar device.

[0031] like Figures 2a-2b The figures shown are schematic diagrams of magnetic tunnel junction devices based on the spin-orbit moment (SOT) effect and the spin-transfer moment (STT) effect, respectively. The magnetic tunnel junction device, from bottom to top, includes: a substrate 1, a spin current generation layer 2, a ferromagnetic layer 3, an intermediate non-magnetic insulating barrier layer 4, a magnetic pinning layer 5, and a readout electrode layer 6. The arrows in the figures represent the first current (write current I). in ) and the second current (readout current V) out ) direction. Through the direction. Figures 2a-2b The spin flow generation layer 2 and the ferromagnetic layer 3 are sputtered separately to reduce thermal stability. When a pulsed current is injected, a phenomenon of deterministic flipping and random flipping will occur simultaneously based on the spin orbital moment effect (SOT) or spin transfer moment effect (STT), i.e., the rebound phenomenon.

[0032] Figure 3 This is a schematic diagram of a Hall bar device, which, from bottom to top, includes: a substrate 1, a first spin current generation layer 7, a second spin current generation layer 8, a ferromagnetic layer 3, and a capping layer 9. Similarly, the arrows represent the first current (write current I). in ) and the second current (readout current V) out ) direction. Through the direction. Figure 3 The first spin flow generation layer 7 and the second spin flow generation layer 8 are sputtered separately to reduce thermal stability. When a pulse current is injected, a phenomenon of deterministic flipping and random flipping occurring simultaneously will occur, i.e., the rebound phenomenon.

[0033] This invention designs a three-state XOR XNOR gate based on the springback phenomenon of probabilistic devices. Figure 4 This is a schematic diagram of the rebound phenomenon, where the probabilistic device exhibits different magnetization reversals in response to different pulse current densities:

[0034] When the input pulse current density is greater than the critical flipping current density and less than the first threshold current density J0, deterministic flipping occurs; when the input pulse current density is greater than the first threshold current density J0, probabilistic flipping occurs; when the input pulse current density continues to increase and is greater than the second threshold current density J1, random flipping occurs, that is, the flipping probabilities of the magnetization state upward and downward are both 50%. Figure 4 In the formula, ±J0 is deterministic flipping, ±J0 ~ ±J1 is probabilistic flipping, and greater than ±J1 is random flipping. In the embodiment of the application, deterministic flipping and random flipping are mainly used, and the principle of random flipping is as shown in Figure 5 .

[0035] As an optional implementation, when deterministic flipping occurs, the input pulse current density is 10×10 10 A·m -2 ~20×10 10 A·m -2 (According to different sizes of the device, the range of deterministic flipping will change); when probabilistic flipping occurs, the input pulse current density is 20×10 10 A·m -2 ~30×10 10 A·m -2 (According to different sizes of the device, the range of probabilistic flipping will change and does not coincide with the deterministic flipping current density); when random flipping occurs, the input pulse current density is greater than 30×10 10 A·m -2 , and less than the maximum current density that the probabilistic device can withstand, that is, the upper limit of the current density depends on the current density that the probabilistic device can withstand.

[0036] Based on the above characteristics, the application utilizes the series connection of multiple probabilistic devices, inputs multiple different pulse current density values, and makes the total voltage of the entire circuit reach different voltage ranges, so as to realize the design of the three-state XOR gate and XNOR gate.

[0037] Further, the application further provides a modulation method of the three-state XOR gate and XNOR gate, comprising:

[0038] Inputting multiple pulse currents with different current densities to the series-connected multiple probabilistic devices, so that the total voltage of the series-connected multiple probabilistic devices reaches different voltage ranges, respectively corresponding to the logic values 1, 1 / 2 and 0, to realize the three-state XOR gate and XNOR gate.

[0039] Referring to Figure 1 , the logic values 1, 1 / 2 and 0 can be respectively realized by the following ways:

[0040] The pulse current density satisfying the downward deterministic flip is input to the plurality of probabilistic devices in series, so that the plurality of probabilistic devices present a high resistance state, and the total voltage in series at this time corresponds to a logic value 1;

[0041] The pulse current density satisfying the random flip is input to the plurality of probabilistic devices in series, so that the plurality of probabilistic devices randomly present a high resistance state or a low resistance state, and the total voltage in series at this time corresponds to a logic value 1 / 2;

[0042] The pulse current density satisfying the upward deterministic flip is input to the plurality of probabilistic devices in series, so that the plurality of probabilistic devices present a low resistance state, and the total voltage in series at this time corresponds to a logic value 0.

[0043] Figure 6 The truth table of the ternary XOR / XNOR gate provided by the embodiment of the application, wherein the logical inverse of the XOR / XNOR gate is also applicable. In a specific implementation manner:

[0044] For the XOR gate: when the input pulse current densities are both -J0, the output logic value is 1 / 2; when the input pulse current densities are J1 and -J0 respectively, the output logic value is 1; when the input pulse current densities are -J0 and J1 respectively, the output logic value is 1; and when the input pulse current densities are both J1, the output logic value is 1 / 2.

[0045] For the XNOR gate: when the input pulse current densities are both -J1, the output logic value is 1 / 2; when the input pulse current densities are J0 and -J1 respectively, the output logic value is 0; when the input pulse current densities are -J1 and J0 respectively, the output logic value is 0; and when the input pulse current densities are both J0, the output logic value is 1 / 2.

[0046] Compared with the prior art, the application provides a new ternary XOR / XNOR gate based on probabilistic devices, which is composed of a plurality of probabilistic devices in series, the resistance states of the probabilistic devices present a high resistance state or a low resistance state according to different input pulse current densities; by inputting pulse currents with different current densities multiple times, the total voltage in series of the plurality of probabilistic devices reaches different voltage ranges, which correspond to logic values 1, 1 / 2 and 0 respectively, so as to realize ternary XOR and XNOR gates. The application of the ternary XOR / XNOR gate is expected to break through the performance bottleneck of traditional binary circuits and become a key component in AI acceleration, fault-tolerant computing and new computing architecture.

[0047] It should be noted that, in the present document, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises a", "comprising", or "comprises" does not, without more constraints, preclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0048] Reference throughout this specification to "one embodiment", "an embodiment", "exemplary embodiment", "some embodiments", or the like, indicates that a described embodiment can include a particular feature, structure, or characteristic, but every embodiment can not necessarily include the particular feature, structure, or characteristic. Furthermore, the describing of a particular feature, structure, or characteristic in connection with an embodiment does not imply that the feature is included in every embodiment. The appearances of the phrases "in one embodiment" or "in some embodiments" in various places in the specification are not necessarily referring to the same embodiment.

[0049] It should be understood that the term "and / or" in the present document is merely used to describe associated objects, and can represent the three conditions, for example, A and / or B can represent the three conditions of A alone, A and B, and B alone, where A and B can be singular or plural. In addition, the character " / " in the present document generally represents an "or" relationship between the associated objects, but can also represent an "and / or" relationship. The specific meaning can be understood according to the context before and after.

[0050] In the present document, "at least one" means one or more, and "multiple" means two or more. "At least one of the following" or the like means any combination of the items, including single item or any combination of multiple items. For example, at least one of a, b, or c can represent a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, and c can be singular or plural.

[0051] It should be understood that in various embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of the processes should be determined by their functions and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0052] In several embodiments provided by the present application, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other manners. For example, the embodiments of the apparatus described above are merely schematic. For example, the division of the units is only a logical function division. There can be another division manner for the actual implementation. For example, a plurality of units or components can be combined or integrated into another device, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms.

[0053] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place, or can be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0054] In addition, each functional unit in each embodiment of the present application can be integrated into a processing unit, or each unit can be physically present separately, or two or more units can be integrated into one unit.

[0055] If the functions are realized in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the parts that make contributions to the prior art or parts of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0056] The present application covers any substitution, modification, equivalent method and scheme made on the essence and scope of the present application. In order to make the public have a thorough understanding of the present application, specific details are described in the following preferred embodiments of the present application, and the present application can also be completely understood without the description of these details by those skilled in the art. In addition, in order to avoid unnecessary confusion to the essence of the present application, well-known methods, processes, flows, elements and circuits, etc. are not described in detail.

[0057] The above merely describes preferred embodiments of the present application, and is not used to limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A probabilistic device based ternary XNOR gate, characterized in that, The three-state XOR / XNOR gate comprises a plurality of probabilistic devices connected in series, and the resistance state of the probabilistic device presents a high resistance state or a low resistance state according to different input pulse current densities; by inputting pulse currents with different current densities multiple times, the total series voltage of the plurality of probabilistic devices reaches different voltage ranges, respectively corresponding to logical values 1, 1 / 2 and 0, so as to realize the three-state XOR gate and XNOR gate. The probabilistic device has different magnetization flips for different pulse current densities: When the input pulse current density is greater than the critical flip current density and less than the first threshold current density J0, deterministic flip occurs; when the input pulse current density is greater than the first threshold current density J0, probabilistic flip occurs; when the input pulse current density continues to increase and is greater than the second threshold current density J1, random flip occurs, that is, the flip probability of the magnetization state upward and downward is 50%; Logical values 1, 1 / 2 and 0 are respectively realized by: Inputting the pulse current density satisfying the downward deterministic flip to the plurality of probabilistic devices connected in series, so that the plurality of probabilistic devices present a high resistance state, and the total series voltage at this time corresponds to the logical value 1; Inputting the pulse current density satisfying the random flip to the plurality of probabilistic devices connected in series, so that the plurality of probabilistic devices randomly present a high resistance state or a low resistance state, and the total series voltage at this time corresponds to the logical value 1 / 2; Inputting the pulse current density satisfying the upward deterministic flip to the plurality of probabilistic devices connected in series, so that the plurality of probabilistic devices present a low resistance state, and the total series voltage at this time corresponds to the logical value 0.

2. The tristate XNOR gate of claim 1, wherein, The probabilistic device is a magnetic tunnel junction device or a Hall bar device.

3. The tristate XNOR gate of claim 2, wherein, The magnetic tunnel junction device comprises, from bottom to top, a substrate, a spin current generation layer, a ferromagnetic layer, an intermediate non-magnetic insulating barrier layer, a magnetic pinning layer and a read electrode layer.

4. The tristate XNOR gate of claim 2, wherein, The Hall bar device comprises, from bottom to top, a substrate, a first spin current generation layer, a second spin current generation layer, a ferromagnetic layer and a cover layer.

5. The tristate XNOR gate of claim 1, wherein, 10 x 10 10 A m -2 ~ 20 x 10 10 A m -2 ; when a probabilistic flip occurs, the input pulsed current density is 20 x 10 10 A m -2 ~ 30 x 10 10 A m -2 ; and when a random flip occurs, the input pulsed current density is greater than 30 x 10 10 A m -2 and less than the maximum current density that the probabilistic device can withstand.

6. A modulation method based on the ternary XNOR gate according to any one of claims 1-5, characterized in that, The method comprises: Inputting pulse currents with different current densities multiple times to the plurality of probabilistic devices connected in series, so that the total series voltage of the plurality of probabilistic devices reaches different voltage ranges, respectively corresponding to logical values 1, 1 / 2 and 0, so as to realize the three-state XOR gate and XNOR gate.

7. The method of claim 6, wherein the modulation of the tri-state XNOR gate is performed by, Logical values 1, 1 / 2 and 0 are respectively realized by: Inputting the pulse current density satisfying the downward deterministic flip to the plurality of probabilistic devices connected in series, so that the plurality of probabilistic devices present a high resistance state, and the total series voltage at this time corresponds to the logical value 1; Inputting the pulse current density satisfying the random flip to the plurality of probabilistic devices connected in series, so that the plurality of probabilistic devices randomly present a high resistance state or a low resistance state, and the total series voltage at this time corresponds to the logical value 1 / 2; Inputting the pulse current density satisfying the upward deterministic flip to the plurality of probabilistic devices connected in series, so that the plurality of probabilistic devices present a low resistance state, and the total series voltage at this time corresponds to the logical value 0. The probabilistic device is a magnetic tunnel junction device or a Hall bar device.

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