Phase-locked loop circuit and control method
By using a voltage controller composed of multi-layer two-dimensional semiconductor materials and switches in the phase-locked loop circuit to replace the traditional charge pump and low-pass filter, the nonlinear problem in the phase-locked loop is solved, jitter and noise are reduced, and signal stability is improved.
Patent Information
- Application Number
- CN202511178313.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-22
- Publication Date
- 2025-09-30
- Estimated Expiration
- 2045-08-22
AI Technical Summary
Existing phase-locked loop circuits have nonlinear problems such as leakage current, charge pump switch delay mismatch, and charge and discharge current mismatch, which lead to a decrease in output clock noise performance.
A phase-locked loop circuit structure including a phase frequency detector, a voltage controller and a voltage-controlled oscillator is adopted. A voltage controller composed of multi-layer two-dimensional semiconductor materials and switches is used to convert the phase difference between the reference frequency signal and the feedback frequency signal into a linearly changing control voltage by comparing the phase difference, thereby replacing the charge pump and low-pass filter.
It effectively reduces the jitter and noise of the phase-locked loop, saves circuit area, avoids nonlinear problems, and improves the stability of the output signal.
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Figure CN120729293A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of integrated circuit manufacturing, and in particular to a phase-locked loop circuit and a control method. Background Art
[0002] A phase-locked loop (PLL) is a feedback control circuit that uses an external reference frequency signal to control the frequency and phase of an internal oscillating signal within the loop. During operation, when the frequency of the output signal equals the frequency of the input signal, the output voltage maintains a fixed phase difference with the input voltage. This locks the phase of the output voltage to the input voltage, hence the name PLL.
[0003] Phase-locked loops in related technologies such as Figure 1 As shown in the figure, a phase-locked loop (PLL) consists of a phase detector (PD) / phase frequency detector (PFD), a low-pass filter (LPF), a voltage-controlled oscillator (VCO), and a divider. Because a PLL typically consists of a charge pump and a low-pass filter, the presence of these components can lead to nonlinear issues such as leakage current, charge pump switching delay mismatch, and charge-discharge current mismatch. These issues can cause jitter in the charge pump output voltage, which in turn causes jitter in the VCO output frequency, thereby reducing the noise performance of the output clock. Summary of the Invention
[0004] The present application provides a phase-locked loop circuit and a control method to at least solve the above technical problems existing in the prior art.
[0005] The technical solution of the embodiment of the present application is implemented as follows: In a first aspect, an embodiment of the present application provides a phase-locked loop circuit, the phase-locked loop circuit comprising: a phase frequency detector, a voltage controller, a voltage-controlled oscillator, and a frequency divider; The frequency and phase detector is configured to receive a reference frequency signal and a feedback frequency signal, and output a function of a signal phase difference by comparing the phases of the reference frequency signal and the feedback frequency signal, wherein the function of the signal phase difference includes: a first voltage and a second voltage; The voltage controller is used to convert the function of the signal phase difference into a linearly varying control voltage, and output the control voltage to the voltage-controlled oscillator; The voltage-controlled oscillator is configured to receive the control voltage and generate an output signal corresponding to the control voltage; The frequency divider is used to divide the output signal of the voltage-controlled oscillator to obtain a feedback frequency signal, and output the feedback frequency signal to the frequency and phase detector.
[0006] In the above solution, the voltage controller includes: a source, a drain, a gate, a first electrode, a second electrode, a first switch, a second switch, a first layer of two-dimensional semiconductor material, a second layer of two-dimensional semiconductor material, and a third layer of two-dimensional semiconductor material; The second layer of two-dimensional semiconductor material and the second electrode are located on the third layer of two-dimensional semiconductor material, and the second electrode is located in a first direction of the second layer of two-dimensional semiconductor material; The source electrode, the drain electrode, and the first layer of two-dimensional semiconductor material are located on the second layer of two-dimensional semiconductor material, and the source electrode is located in a first direction of the first layer of two-dimensional semiconductor material, and the drain electrode is located in a second direction of the first layer of two-dimensional semiconductor material; The first electrode and the gate are located on the first layer of two-dimensional semiconductor material, the first electrode is located in a first direction of the gate, and the gate is located between the first electrode and the drain; One end of the first switch is connected to the first electrode, one end of the second switch is connected to the second electrode, and the other end of the first switch and the other end of the second switch are both connected to the source.
[0007] In the above solution, the voltage controller further comprises: an insulating layer, a substrate; The insulating layer is used to isolate different electrodes and materials; The substrate is used to provide a stable carrier for the voltage controller.
[0008] In the above solution, the insulating layer is used to isolate the second electrode from the source, isolate the source from the first electrode, isolate the first electrode from the drain, and isolate the gate from the first layer of two-dimensional semiconductor material.
[0009] In the above solution, the source receives a source voltage input from an external power source to generate current; The gate receives a gate voltage input from an external power supply and is used to regulate the conductive layer; the conductive layer includes: the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material, which are materials for generating electrons and holes; The drain is used to output the control voltage; The first switch and the second switch are used to control the on and off of the first electrode and the second electrode respectively.
[0010] In the above solution, the bandwidth of the first layer of two-dimensional semiconductor material is greater than the bandwidth of the second layer of two-dimensional semiconductor material, and the bandwidth of the second layer of two-dimensional semiconductor material is greater than the bandwidth of the third layer of two-dimensional semiconductor material.
[0011] In the above solution, the conduction band of the first layer of two-dimensional semiconductor material is at the top, the conduction band of the second layer of two-dimensional semiconductor material is in the middle, and the conduction band of the third layer of two-dimensional semiconductor material is at the bottom; The valence band of the first two-dimensional semiconductor material layer is at the bottom, the valence band of the second two-dimensional semiconductor material layer is in the middle, and the valence band of the third two-dimensional semiconductor material layer is at the top.
[0012] In the above scheme, the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material form a heterojunction, which is used to regulate the electron and hole transport behavior of different layers of two-dimensional semiconductor materials.
[0013] In the above solution, the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material are bonded together by van der Waals forces.
[0014] In the above scheme, when preparing the heterojunction, the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material are subjected to annealing treatment to form a van der Waals interface between the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material.
[0015] In the above solution, the first layer of two-dimensional semiconductor material is molybdenum disulfide, the second layer of two-dimensional semiconductor material is rhenium disulfide, and the first layer of two-dimensional semiconductor material is chromium diselenide.
[0016] In the above solution, the voltage controller is used to control the state of the first switch and the second switch according to the first voltage and the second voltage, and the state is open or closed; Wherein, in different states, the voltage controller generates different control voltages.
[0017] In the above solution, if the first switch and the second switch are both turned off, the source, the drain, and the gate are energized, and the source and the drain generate a control voltage having a first voltage value; If the first switch is closed and the second switch is open, the source, the first electrode, the drain, and the gate are energized, and the source and the drain generate a control voltage having a second voltage value; the second voltage value is greater than the first voltage value; and the magnitude of the second voltage value is proportional to the duration for which the first switch remains closed; If the first switch is disconnected and the second switch is closed, the source, the second electrode, the drain, and the gate are energized, and the source and the drain generate a control voltage with a third voltage value, which is less than the first voltage value; the magnitude of the third voltage value is proportional to the duration for which the second switch is continuously closed.
[0018] In a second aspect, an embodiment of the present application provides a control method for a phase-locked loop circuit, which is applied to the phase-locked loop circuit described above, and the method includes: The phase frequency detector receives a reference frequency signal and a feedback frequency signal, compares the phases of the reference frequency signal and the feedback frequency signal, and outputs a function of a signal phase difference, wherein the function of the signal phase difference includes: a first voltage and a second voltage; The voltage controller converts the function of the signal phase difference into a linearly varying control voltage and outputs the control voltage to the voltage-controlled oscillator; The voltage-controlled oscillator receives the control voltage and generates an output signal corresponding to the control voltage; The frequency divider divides the output signal of the voltage-controlled oscillator to obtain a feedback frequency signal, and outputs the feedback frequency signal to the frequency and phase detector.
[0019] In the above solution, the function of outputting the signal phase difference by comparing the phases of the reference frequency signal and the feedback frequency signal includes: If the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal, and the phase of the reference frequency signal is the same as the phase of the feedback frequency signal, the first voltage and the second voltage output by the frequency and phase detector are both low levels; If the frequency of the reference frequency signal is greater than the frequency of the feedback frequency signal, or the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal, and the phase of the reference frequency signal is ahead of the feedback frequency signal, the first voltage output by the frequency detector is high and the second voltage is low, and the maintenance time of the first voltage is proportional to the phase difference between the reference frequency signal and the feedback frequency signal; accordingly, If the frequency of the reference frequency signal is less than the frequency of the feedback frequency signal, or the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal and the phase of the reference frequency signal lags behind the feedback frequency signal, the first voltage output by the phase frequency detector is low and the second voltage is high, and the maintenance time of the second voltage is proportional to the phase difference between the reference frequency signal and the feedback frequency signal; Accordingly, the voltage controller converts the function of the signal phase difference into a linearly varying control voltage, including: The first switch and the second switch of the voltage controller are both disconnected, generating a control voltage having a first voltage value; The first switch of the voltage controller is closed and the second switch is opened, generating a control voltage having a second voltage value; the second voltage value is greater than the first voltage value; and the magnitude of the second voltage value is proportional to the duration for which the first switch remains closed; The first switch of the voltage controller is disconnected and the second switch is closed, generating a control voltage with a third voltage value, which is smaller than the first voltage value; the magnitude of the third voltage value is proportional to the duration for which the second switch is continuously closed.
[0020] The embodiments of the present application have the following beneficial effects: The phase-locked loop circuit and control method provided in the embodiments of the present application include: a phase frequency detector (PFD), a voltage controller, a voltage-controlled oscillator (VCO), and a frequency divider; the PFD receives a reference frequency signal and a feedback frequency signal, compares the phases of the reference frequency signal and the feedback frequency signal, and outputs a function of the signal phase difference, wherein the signal phase difference function includes a first voltage and a second voltage; the voltage controller converts the signal phase difference function into a linearly varying control voltage, and outputs the control voltage to the VCO; the VCO receives the control voltage and generates an output signal corresponding to the control voltage; and the frequency divider divides the output signal of the VCO to obtain a feedback frequency signal, and outputs the feedback frequency signal to the PFD. Thus, by converting the signal phase difference function into a linearly varying control voltage by the voltage controller, the area of the entire PLL is saved, nonlinear problems such as leakage current, charge pump switch delay mismatch, and charge-discharge current mismatch are avoided, and the jitter and noise of the entire PLL are effectively reduced.
[0021] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 Schematic diagram of a phase loop circuit in related art; Figure 2 A schematic diagram of the structure of a phase-locked loop circuit provided in an embodiment of the present application; Figure 3 A circuit cross-sectional diagram of a voltage controller provided in an embodiment of the present application; Figure 4 A circuit top view of a voltage controller provided in an embodiment of the present application; Figure 5 A schematic diagram of the energy band structure of a two-dimensional material heterojunction in a voltage controller provided in an embodiment of the present application; Figure 6 A schematic diagram of an example of a two-dimensional material heterojunction band structure provided in an embodiment of the present application; Figure 7 A schematic diagram of a phase frequency detector circuit logic provided in an embodiment of the present application; Figure 8 A schematic diagram of the logic of a voltage controller circuit provided in an embodiment of the present application; Figure 9 A flow chart of a control method for a phase-locked loop circuit provided in an embodiment of the present application. DETAILED DESCRIPTION
[0023] In order to make the purpose, features, and advantages of this application more obvious and easy to understand, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of this application.
[0024] In the following description, reference is made to “some embodiments”, which describes a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0025] If similar descriptions of "first / second" appear in the application documents, the following explanation is added. In the following description, the terms "first\second\third" involved are merely used to distinguish similar objects and do not represent a specific order for the objects. It can be understood that "first\second\third" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.
[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein are for the purpose of describing the embodiments of this application only and are not intended to limit this application.
[0027] Figure 2 A schematic diagram of a phase-locked loop circuit is provided in an embodiment of the present application. Figure 2 As shown, the phase-locked loop circuit includes: a frequency detector, a phase detector, a voltage controller, a voltage-controlled oscillator, and a frequency divider; The frequency and phase detector is configured to receive a reference frequency signal and a feedback frequency signal, and output a function of a signal phase difference by comparing the phases of the reference frequency signal and the feedback frequency signal, wherein the function of the signal phase difference includes: a first voltage and a second voltage; The voltage controller is used to convert the function of the signal phase difference into a control voltage, and output the control voltage to the voltage-controlled oscillator; The voltage-controlled oscillator is configured to receive a control voltage and generate an output signal corresponding to the control voltage; The frequency divider is used to divide the output signal of the voltage-controlled oscillator to obtain a feedback frequency signal, and output the feedback frequency signal to the frequency and phase detector.
[0028] In some embodiments, a phase frequency detector (PFD) receives a reference frequency signal (an external signal) and a feedback frequency signal (an output signal from a voltage-controlled oscillator, divided by a frequency divider). It operates by comparing the phase difference between the two frequency signals and outputting a function signal related to the phase difference, in this case a voltage signal (comprising a first voltage and a second voltage) reflecting the phase difference between the two voltages.
[0029] The voltage controller converts the phase difference function (including the first and second voltages) of the signals output by the phase frequency detector into a linearly varying control voltage. Its operating principle is to convert the phase difference signal into an adjustable control voltage. The magnitude of this control voltage determines the frequency of the voltage-controlled oscillator's output signal, and this control voltage varies based on the phase difference between the two voltages.
[0030] A voltage-controlled oscillator (VCO) receives a control voltage from a voltage controller and generates an output signal with a frequency that corresponds to the control voltage. By controlling the voltage, the frequency and phase of the VCO's output signal are gradually synchronized with a reference frequency signal.
[0031] The frequency divider divides the output signal of the voltage-controlled oscillator (VCO) to generate a feedback frequency signal. This is typically done by reducing the frequency to a level within the range that the phase frequency detector (PFD) can handle. This means the high-frequency output signal from the VCO is divided to generate a lower-frequency signal. This lower-frequency signal is then fed back to the PFD, forming a closed-loop control loop. The purpose of generating a lower-frequency signal is to obtain a frequency signal that matches the original reference frequency signal, thereby maintaining system stability through feedback control.
[0032] The phase-locked loop circuit provided in the embodiment of the present application inputs the first voltage and the second voltage output by the frequency detector into the voltage controller to replace the charge pump and the low-pass filter circuit, and converts the frequency or phase difference information reflected by the first voltage and the second voltage into a control voltage that can be linearly changed. Vctrl Compared with the use of charge pumps and low-pass filters, the phase-locked loop circuit of the embodiment of the present application does not have nonlinear problems such as leakage current, charge pump switch delay mismatch, and charge and discharge current mismatch, effectively reducing the jitter and noise of the entire phase-locked loop.
[0033] In some embodiments, the voltage controller includes: a source, a drain, a gate, a first electrode, a second electrode, a first switch, a second switch, a first layer of two-dimensional semiconductor material, a second layer of two-dimensional semiconductor material, and a third layer of two-dimensional semiconductor material; The second layer of two-dimensional semiconductor material and the second electrode are located on the third layer of two-dimensional semiconductor material, and the second electrode is located in a first direction of the second layer of two-dimensional semiconductor material; The source electrode, the drain electrode, and the first layer of two-dimensional semiconductor material are located on the second layer of two-dimensional semiconductor material, and the source electrode is located in a first direction of the first layer of two-dimensional semiconductor material, and the drain electrode is located in a second direction of the first layer of two-dimensional semiconductor material; The first electrode and the gate are located on the first layer of two-dimensional semiconductor material, the first electrode is located in a first direction of the gate, and the gate is located between the first electrode and the drain; One end of the first switch is connected to the first electrode, one end of the second switch is connected to the second electrode, and the other end of the first switch and the other end of the second switch are both connected to the source.
[0034] Here, a structure and switch utilizing multilayered two-dimensional semiconductor materials are presented to achieve precise current and voltage control. By controlling the gate voltage and the switch, the conductivity of the circuit can be flexibly adjusted, providing efficient and precise electronic regulation.
[0035] In some embodiments, the voltage controller further comprises: an insulating layer, a substrate; The insulating layer is used to isolate different electrodes and materials; The substrate is used to provide a stable carrier for the voltage controller.
[0036] Specifically, the insulating layer is used to isolate the second electrode from the source, isolate the source from the first electrode, isolate the first electrode from the drain, and isolate the gate from the first layer of two-dimensional semiconductor material.
[0037] Here, the insulating layer may be made of a material with good insulating properties such as silicon dioxide or silicon nitride, which can prevent electrical interference between different materials or electrodes and ensure the stability and reliability of the device.
[0038] The substrate may be made of silicon wafer or other similar materials, which have good mechanical strength and stability, and are used to ensure the stability of the structure and avoid deformation or damage caused by external pressure, temperature changes or external forces.
[0039] Here is an example of a voltage controller. Figure 3 As shown, a circuit cross-sectional diagram of a voltage controller is provided, as shown Figure 4 As shown, a circuit top view of a voltage controller is provided. In the figure, the first layer of material represents the first layer of two-dimensional semiconductor material, the second layer of material represents the second layer of two-dimensional semiconductor material, and the third layer of material represents the third layer of two-dimensional semiconductor material.
[0040] It can be seen that the third layer of two-dimensional semiconductor material is located on the substrate; the second layer of two-dimensional semiconductor material and electrode 2 (equivalent to the second electrode) are located on the third layer of two-dimensional semiconductor material, and electrode 2 is located in the first direction of the second layer of two-dimensional semiconductor material (the left direction as shown in the figure); the first layer of two-dimensional semiconductor material, the source, and the drain are located on the second layer of two-dimensional semiconductor material, and the source is located in the first direction of the first layer of two-dimensional semiconductor material (the left direction as shown in the figure), and the drain is located in the second direction of the first layer of two-dimensional semiconductor material (the right direction as shown in the figure); electrode 1 is located on the first layer of two-dimensional semiconductor material, and there is an insulating layer on the first layer of two-dimensional semiconductor material, the gate is located on the insulating layer, and electrode 1 is located in the first direction of the gate (the left direction as shown in the figure), and the gate is located between the first electrode and the drain.
[0041] The insulating layer can be a single, integrated layer, used to isolate electrode 2 from the source, isolate the source from electrode 1, isolate electrode 1 from the drain, and isolate the gate from the first layer of two-dimensional semiconductor material. The source and electrode 1 can be positioned by partially removing or cutting the insulating layer to form a gap or void. This gap or void allows the source and electrode 1 to be embedded in or contact the corresponding circuit components, while maintaining isolation elsewhere in the insulating layer to prevent unnecessary electrical interference or short circuits.
[0042] In this way, an integral insulating layer provides necessary electrical isolation for components such as electrodes, sources, and drains, ensuring that they do not interfere with each other or short-circuit.
[0043] In addition, the area of the first two-dimensional semiconductor material layer may be smaller than or equal to the area of the second two-dimensional semiconductor material layer, and the area of the second two-dimensional semiconductor material layer may be smaller than or equal to the area of the third two-dimensional semiconductor material layer.
[0044] In some embodiments, the source receives a source voltage input from an external power source to generate current; The gate receives a gate voltage input from an external power supply and is used to regulate the conductive layer; the conductive layer includes: the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material, which are materials for generating electrons and holes; The drain is used to output the control voltage; The first switch and the second switch are used to control the on and off of the first electrode and the second electrode respectively.
[0045] Here, the external power supply can be a constant power supply that meets the design requirements of the transistor, and there is no restriction on the voltage value. The source is the port where the voltage flows in, and the drain is the port where the voltage flows out.
[0046] The first switch and the second switch are switching elements for controlling the flow of current between the two electrodes, and the conduction state of the circuit is adjusted by the open or closed state of the switch.
[0047] Here, the gate is a control electrode located between the source and drain. It does not directly contact the conductive layer, but through the action of the electric field, the gate can affect the distribution of carriers (electrons or holes) in the conductive layer. When the gate voltage is applied, it creates an electric field below the conductive layer (formed by the semiconductor material), affecting the concentration of electrons or holes in the conductive layer. In other words, the gate controls whether a conductive channel is formed and the conductive properties of the channel.
[0048] Specifically, when the gate voltage is high, the electric field formed affects the conductive layer, allowing current to flow from the source to the drain, and the device is in the on state; when the gate voltage is low, the electric field formed is not enough to form an effective conductive channel on the conductive layer, and the current cannot flow from the source to the drain, and the device is in the off state.
[0049] Two-dimensional semiconductor materials are a crucial component of the nanomaterials field. Two-dimensional semiconductor materials are a general term for thin films that are only one or a few atomic layers thick. Different two-dimensional semiconductor materials can form two-dimensional heterojunction semiconductors, creating semiconductors with diverse properties and functions.
[0050] The first, second, and third layers of two-dimensional semiconductor material are used to provide electrons and holes. In semiconductors, electrons are negative charge carriers, while holes are positive charge carriers. These three layers of material function to generate electrons and holes, providing a source of free charge carriers within the material.
[0051] Here, the first switch and the second switch may be configured with a controller for controlling the states of the first switch and the second switch based on the first voltage and the second voltage. Alternatively, the first switch and the second switch may be voltage detection switches that have their own control functions and perform state control after receiving the first voltage and the second voltage. This is not limited here.
[0052] Combined with the above Figure 3 and Figure 4 Provided is an example. In the figure, switch 1 (equivalent to the example of the first switch) is used to connect the source and electrode 1, and switch 2 (equivalent to the example of the second switch) is used to connect the source and electrode 2. The source receives a source voltage (Vsource) input from an external power supply to generate current; the gate receives a gate voltage (Vgate) input from an external power supply to regulate the conductive layer; and the drain is used to output a control voltage (Vctrl).
[0053] In some embodiments, the bandwidth of the first two-dimensional semiconductor material layer is greater than the bandwidth of the second two-dimensional semiconductor material layer, and the bandwidth of the second two-dimensional semiconductor material layer is greater than the bandwidth of the third two-dimensional semiconductor material layer.
[0054] Bandwidth refers to the energy band width of a semiconductor material, that is, the energy difference between the conduction band and the valence band in the electronic band structure. It is often used to describe the conductive properties of a material.
[0055] The bandwidth of the first-layer two-dimensional semiconductor material is greater than that of the second-layer two-dimensional semiconductor material, indicating that the energy difference between the electron energy bands in the first-layer two-dimensional semiconductor material is larger, resulting in different electrical properties, such as higher conductivity or different band gaps.
[0056] The bandwidth of the second-layer two-dimensional semiconductor material is greater than that of the third-layer two-dimensional semiconductor material, indicating that the energy difference between the electron energy bands of the second-layer two-dimensional semiconductor material is greater than that of the third-layer two-dimensional semiconductor material, resulting in different electrical properties, such as higher conductivity or different band gap.
[0057] By adjusting the bandwidth of the above two-dimensional semiconductor materials at different levels, the performance of the device can be optimized, such as increasing the switching speed and reducing power consumption.
[0058] In some embodiments, the conduction band of the first two-dimensional semiconductor material is at the top, the conduction band of the second two-dimensional semiconductor material is in the middle, and the conduction band of the third two-dimensional semiconductor material is at the bottom; The valence band of the first two-dimensional semiconductor material layer is at the bottom, the valence band of the second two-dimensional semiconductor material layer is in the middle, and the valence band of the third two-dimensional semiconductor material layer is at the top.
[0059] Here, the conduction band of the first layer of two-dimensional semiconductor material is at the top, indicating that the conduction band energy of the first layer of two-dimensional semiconductor material is the highest and electrons can more easily jump from the valence band to the conduction band.
[0060] Correspondingly, the conduction band of the second-layer two-dimensional semiconductor material is centered, indicating that the conduction band energy of the second-layer two-dimensional semiconductor material is located between the first-layer two-dimensional semiconductor material and the third-layer two-dimensional semiconductor material, that is, the conduction band energy of the second-layer two-dimensional semiconductor material is relatively centered.
[0061] The conduction band of the third-layer two-dimensional semiconductor material is at the bottom, which indicates that the conduction band energy of the third-layer two-dimensional semiconductor material is the lowest among all three-layer materials, which means that electrons in the conduction band of this layer require higher energy to be excited into the conduction band, so its conductivity is relatively weak.
[0062] Here, the valence band of the third-layer two-dimensional semiconductor material is at the top, indicating that the valence band energy of the third-layer two-dimensional semiconductor material is the highest and the electrons are in a relatively high energy state.
[0063] The valence band of the second-layer two-dimensional semiconductor material is centered, indicating that the valence band energy of the second-layer two-dimensional semiconductor material is between the first-layer two-dimensional semiconductor material and the third-layer two-dimensional semiconductor material, and its valence band energy is between the two.
[0064] The valence band of the third-layer two-dimensional semiconductor material is at the top, which indicates that the valence band energy of the third-layer two-dimensional semiconductor material is the highest among all three-layer materials. The electrons in this layer are in a higher energy state and it is more difficult to jump to the conduction band.
[0065] Through the design of the above bandwidth and energy band arrangement, for the first layer of two-dimensional semiconductor material, after it is excited, the electrons on the conduction band can be transferred to the conduction band of the second layer of two-dimensional semiconductor material or the conduction band of the third layer of two-dimensional semiconductor material, and the holes on the valence band can be transferred to the valence band of the second layer of two-dimensional semiconductor material or the valence band of the third layer of two-dimensional semiconductor material.
[0066] For the second-layer two-dimensional semiconductor material, after it is excited, the electrons in the conduction band can be transferred to the conduction band of the third-layer two-dimensional semiconductor material, and the holes in the valence band can be transferred to the valence band of the third-layer two-dimensional semiconductor material.
[0067] In some embodiments, the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material form a heterojunction, which is used to regulate the electron and hole transport behavior of different layers of two-dimensional semiconductor materials.
[0068] Here, a heterojunction refers to an interface composed of two or more different types of materials.
[0069] Electrons and holes are the main charge carriers in semiconductor materials. Electrons are negatively charged particles, and holes are positively charged electron-missing locations. In a heterojunction, different layers of semiconductor materials regulate the transport behavior of electrons and holes through different energy band structures (positions of conduction bands and valence bands, etc.). This regulation can be achieved through: Changing the migration speed of carriers: the energy bands between different materials have an impact on the migration speed of electrons and holes; Affecting the distribution of carriers: Heterojunctions can cause electrons and holes to be unevenly distributed between different material layers, thereby affecting the conductivity and electronic properties of the material; Regulating carrier concentration: Through different energy band modulation, the heterojunction can affect the concentration distribution of electrons and holes.
[0070] Here, by utilizing heterojunctions (composed of different layers of two-dimensional semiconductor materials), the transport behavior of electrons and holes between different layers can be precisely controlled, thereby optimizing the performance of the material in various electronic and optoelectronic applications.
[0071] In some embodiments, the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material, and the third layer of two-dimensional semiconductor material are bonded together by van der Waals forces.
[0072] Here, the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material are bonded to each other through van der Waals forces. Therefore, the crystal structure and lattice constant of each two-dimensional semiconductor material do not need to match to obtain a heterojunction with good performance.
[0073] The use of van der Waals forces helps to tune the electronic properties of these materials, especially in heterojunctions and multilayer structures, enabling more precise control. Moreover, the weak binding force allows for a certain degree of independence and tunability between different layers.
[0074] In some embodiments, when preparing a heterojunction, the first two-dimensional semiconductor material, the second two-dimensional semiconductor material, and the third two-dimensional semiconductor material are annealed to form a van der Waals interface between the first two-dimensional semiconductor material, the second two-dimensional semiconductor material, and the third two-dimensional semiconductor material.
[0075] Here, the heterojunction is prepared through an annealing process to ensure a good van der Waals interface between the three two-dimensional semiconductor materials. This improves electron and hole transfer and optimizes the performance of the voltage controller. Furthermore, two-dimensional semiconductor materials have excellent physical properties and are compact, which can increase circuit performance and save circuit area.
[0076] Annealing is a heat treatment process that involves heating a material to a certain temperature, holding it for a period of time, and then slowly cooling it. Annealing can improve the material's crystal quality, eliminate stress, and promote bonding between layers.
[0077] In this way, through the annealing process, the interface quality between the three layers of two-dimensional semiconductor materials is improved, so that a strong and high-quality bonding interface is formed between them through the van der Waals force.
[0078] In some embodiments, the first two-dimensional semiconductor material is molybdenum disulfide (MoS2), the second two-dimensional semiconductor material is rhenium disulfide (MoSe2), and the third two-dimensional semiconductor material is chromium diselenide (CrSe2).
[0079] Here, we provide an example of a two-dimensional semiconductor material. By using the three aforementioned two-dimensional semiconductor materials, MoS2, MoSe2, and CrSe2, respectively, as different layers, their unique electronic, optical, and material properties optimize device performance. It should be noted that the above is only one example. In actual applications, other two-dimensional semiconductor materials can also be used for each layer, as long as they meet the aforementioned relationship between bandwidth and conduction band. The specific materials used are not limited here.
[0080] In one example, for a voltage controller circuit, the band structure of the three two-dimensional semiconductor materials used to form a heterojunction is as follows: Figure 5 As shown, the bandwidth of the first two-dimensional semiconductor material is the largest, the bandwidth of the second two-dimensional semiconductor material is in the middle, and the bandwidth of the third two-dimensional semiconductor material is the smallest. Specifically, the conduction band of the first two-dimensional semiconductor material is at the top, the conduction band of the second two-dimensional semiconductor material is in the middle, and the conduction band of the third two-dimensional semiconductor material is at the bottom. The valence band of the first two-dimensional semiconductor material is at the bottom, the valence band of the second two-dimensional semiconductor material is in the middle, and the valence band of the third two-dimensional semiconductor material is at the top.
[0081] like Figure 6 As shown, a specific example of the energy band structure of a two-dimensional material heterojunction in a voltage controller is provided. The first two-dimensional semiconductor material is molybdenum disulfide, with a conduction band of -4.25 eV and a valence band of -5.91 eV; the second two-dimensional semiconductor material is rhenium disulfide, with a conduction band of -4.46 eV and a valence band of -5.78 eV; and the first two-dimensional semiconductor material is chromium diselenide, with a conduction band of -4.56 eV and a valence band of -5.27 eV. eV stands for electron volt, a unit of energy level.
[0082] In some embodiments, the voltage controller is used to control the states of the first switch and the second switch according to the first voltage and the second voltage, and the states are open or closed; Wherein, in different states, the voltage controller generates different control voltages.
[0083] Here, the first switch and the second switch are switching elements for controlling the flow of current between two electrodes, and the conduction state of the circuit is adjusted by opening (opening) or closing (closing) the switches.
[0084] like Figure 3 In the example shown, one end of switch 1 (equivalent to the first switch) is connected to electrode 1, one end of switch 2 (equivalent to the second switch) is connected to electrode 2, and the other ends of switch 1 and switch 2 are both connected to the source. Through this connection relationship, switches 1 and 2 can control the conduction state in different situations.
[0085] In some embodiments, if the first switch and the second switch are both turned off, the source, the drain, and the gate are energized, and the source and the drain generate a control voltage having a first voltage value; If the first switch is closed and the second switch is open, the source, the first electrode, the drain, and the gate are energized, and the source and the drain generate a control voltage having a second voltage value; the second voltage value is greater than the first voltage value; and the magnitude of the second voltage value is proportional to the duration for which the first switch remains closed; If the first switch is disconnected and the second switch is closed, the source, the second electrode, the drain, and the gate are energized, and the source and the drain generate a control voltage with a third voltage value, which is less than the first voltage value; the magnitude of the third voltage value is proportional to the duration for which the second switch is continuously closed.
[0086] Here, combined Figure 3 and Figure 4 The conduction conditions and generated control voltage conditions in different situations are explained.
[0087] (1) When the first switch (such as Figure 3 Switch 1 shown) and a second switch (as Figure 3 When the switches 2) shown are all open, the source, drain, and gate are energized.
[0088] The electrons and holes in the second-layer two-dimensional semiconductor material are excited and start to move. Due to the bandwidth and energy band arrangement, a small amount of electrons and holes in the second-layer two-dimensional semiconductor material will be transferred to the third-layer two-dimensional semiconductor material, and most of the remaining electrons and holes in the second-layer two-dimensional semiconductor material will move in this layer.
[0089] At this time, the second layer of two-dimensional semiconductor material between the source and the drain is turned on and acts as a conductive layer. A stable control voltage is generated between the source and the drain, recorded as Vctrl-middle, and output from the drain to the voltage-controlled oscillator.
[0090] (2) When the first switch is closed and the second switch is disconnected, the source, the first electrode, the drain, and the gate are energized.
[0091] The electrons and holes in the second-layer two-dimensional semiconductor material are excited and begin to move. Due to the bandwidth and energy band arrangement, a small amount of electrons and holes in the second-layer two-dimensional semiconductor material will transfer to the third-layer two-dimensional semiconductor material, while the majority of the electrons and holes in the second-layer two-dimensional semiconductor material will move within this layer. The electrons and holes in the first-layer two-dimensional semiconductor material are excited and begin to move. Due to the bandwidth and energy band arrangement, the majority of the electrons and holes in the first-layer two-dimensional semiconductor material will transfer to the second-layer two-dimensional semiconductor material, increasing the number of electrons and holes in the second-layer two-dimensional semiconductor material.
[0092] At this time, the second layer of two-dimensional semiconductor material between the source and the drain is turned on and acts as a conductive layer. A control voltage greater than Vctrl-middle is generated between the source and the drain, denoted as Vctrl-max, and output from the drain to the voltage-controlled oscillator. The size of Vctrl-max is proportional to the time t1 that the first switch is continuously closed.
[0093] (3) When the first switch is disconnected and the second switch is closed, the source, the second electrode, the drain, and the gate are energized.
[0094] The electrons and holes in the second layer of two-dimensional semiconductor material are excited and start to move. At the same time, the electrons and holes in the third layer of two-dimensional semiconductor material are excited and start to move. Due to the bandwidth, energy band arrangement and the power supply to the third layer, the electrons and holes excited by the power supply to the third layer will attract the electrons and holes in the second layer to flow to the third layer of two-dimensional semiconductor material. Therefore, a large part of the electrons and holes in the second layer of two-dimensional semiconductor material are transferred to the third layer of two-dimensional semiconductor material, and the remaining electrons and holes in the second layer of two-dimensional semiconductor material will move in this layer.
[0095] At this time, the second layer of two-dimensional semiconductor material between the source and the drain is turned on and acts as a conductive layer. A control voltage less than Vctrl-middle is generated between the source and the drain, denoted as Vctrl-min, and output from the drain to the voltage-controlled oscillator. The size of Vctrl-min is proportional to the time t2 that the second switch is continuously closed.
[0096] Here, the relationship between Vctrl-min, Vctrl-middle, and Vctrl-max can be as follows Figure 8As shown, t1 represents the time during which the first switch is continuously closed, and t2 represents the time during which the second switch is continuously closed.
[0097] The phase-locked loop circuit provided in the embodiments of the present application inputs the first and second voltages output by the phase frequency detector into a voltage controller, replacing the traditional charge pump and low-pass filter circuits. The frequency or phase difference information reflected by the first and second voltages is converted into a linearly variable control voltage Vctrl. Compared to circuits using charge pumps and low-pass filters, the voltage controller in the embodiments of the present application uses only one type of device, a two-dimensional material transistor, and only one device to achieve voltage control, effectively saving the area of the entire phase-locked loop.
[0098] Moreover, since the voltage controllers are all concentrated on a two-dimensional material transistor, the size of the two-dimensional material transistor is also relatively small, which can effectively reduce the duration of the switching delay mismatch. Only the time limit for the voltage to go from source to drain is close to 0, which greatly reduces the jitter of the subsequent voltage-controlled oscillator (VCO) output frequency, effectively reducing the jitter and noise of the entire phase-locked loop, thereby improving the performance of the entire phase-locked loop.
[0099] In addition, since the voltage controller directly replaces the traditional charge pump and low-pass filter circuits, it also directly solves nonlinear problems such as leakage current, charge pump switch delay mismatch, and charge and discharge current mismatch caused by the above devices.
[0100] Figure 9 A flow chart of a control method for a phase-locked loop circuit provided in an embodiment of the present application is shown as follows: Figure 9 As shown, the phase-locked loop circuit includes: a phase frequency detector, a voltage controller, a voltage-controlled oscillator, and a frequency divider. The control method includes: Step 901: A frequency detector receives a reference frequency signal and a feedback frequency signal, compares the phases of the reference frequency signal and the feedback frequency signal, and outputs a function of a signal phase difference, wherein the function of the signal phase difference includes: a first voltage and a second voltage; Step 902: The voltage controller converts the function of the signal phase difference into a linearly varying control voltage, and outputs the control voltage to the voltage-controlled oscillator. Step 903: The voltage-controlled oscillator receives the control voltage and generates an output signal corresponding to the control voltage; Step 904: The frequency divider divides the output signal of the voltage-controlled oscillator to obtain a feedback frequency signal, and outputs the feedback frequency signal to the frequency and phase detector.
[0101] In some embodiments, the phase-locked loop circuit can adopt the above Figure 2 The circuit structure shown in the figure, the voltage controller can adopt the above Figure 3 The structure shown.
[0102] In some embodiments, the function of outputting a signal phase difference by comparing the phases of the reference frequency signal and the feedback frequency signal includes: If the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal, and the phase of the reference frequency signal is the same as the phase of the feedback frequency signal, the first voltage and the second voltage output by the frequency and phase detector are both low levels; If the frequency of the reference frequency signal is greater than the frequency of the feedback frequency signal, or the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal, and the phase of the reference frequency signal leads the feedback frequency signal, the first voltage output by the phase frequency detector is a high level and the second voltage is a low level, and the maintenance time of the first voltage is proportional to the phase difference between the reference frequency signal and the feedback frequency signal; If the frequency of the reference frequency signal is less than the frequency of the feedback frequency signal, or the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal and the phase of the reference frequency signal lags behind the feedback frequency signal, the first voltage output by the frequency detector is low and the second voltage is high, and the maintenance time of the second voltage is proportional to the phase difference between the reference frequency signal and the feedback frequency signal.
[0103] In some embodiments, the voltage controller converts the function of the signal phase difference into a linearly varying control voltage, including: If the first voltage and the second voltage are both at a low level, the first switch and the second switch of the voltage controller are both disconnected, generating a control voltage with a voltage value of the first voltage value; If the first voltage is at a high level and the second voltage is at a low level, the first switch of the voltage controller is closed and the second switch is opened, thereby generating a control voltage having a second voltage value; the second voltage value is greater than the first voltage value; and the magnitude of the second voltage value is proportional to the duration for which the first switch remains closed; If the first voltage is at a low level and the second voltage is at a high level, the first switch of the voltage controller is disconnected and the second switch is closed, generating a control voltage with a third voltage value, which is less than the first voltage value; the magnitude of the third voltage value is proportional to the length of time the second switch is continuously closed.
[0104] In some embodiments, the voltage-controlled oscillator receives the control voltage and generates an output signal corresponding to the control voltage, including: If the received voltage value is a control voltage of a first voltage value, the voltage-controlled oscillator generates an output signal of a first frequency; If the received voltage value is a control voltage of a second voltage value, the voltage-controlled oscillator generates an output signal of a second frequency; If the received control voltage has a third voltage value, the voltage-controlled oscillator generates an output signal with a third frequency; The second frequency is greater than the first frequency, and the first frequency is greater than the third frequency.
[0105] Here, we provide a phase lock loop circuit under different circumstances of the frequency detector, phase detector, and voltage controller logic. Here, we take the reference frequency signal frequency equal to the feedback frequency signal frequency, and the three cases of the same phase, phase leading, and phase lagging as examples for explanation. The specific frequency detector logic is as follows: Figure 7 As shown, the logic of the voltage controller is as follows Figure 8 , the specific situation is as follows: (1) When the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal, and the phase of the reference frequency signal is the same as the phase of the feedback frequency signal, such as Figure 7 As shown in (a) of the figure, the UP signal (equivalent to the first voltage) and the DOWN signal (equivalent to the second voltage) output by the phase and frequency detector are both low, and the voltage difference between the UP and DOWN signals is 0. Based on the voltage difference between the UP and DOWN signals, both switches 1 and 2 are turned off. The output voltage Vctrl generated by the voltage controller is Vctrl-middle. Accordingly, the frequency generated by the entire voltage-controlled oscillator (VCO) is frequency-middle.
[0106] (2) When the frequency of the reference frequency signal is greater than the frequency of the feedback frequency signal, and the phase of the reference frequency signal leads the feedback frequency signal, such as Figure 7 As shown in (b) of the diagram, the UP signal output by the phase frequency detector is high, and its duration is proportional to the phase difference between the reference frequency signal and the feedback frequency signal. The DOWN signal is low, and the voltage difference between the UP and DOWN signals is positive. Based on the voltage difference between the UP and DOWN signals, switch 1 is closed and switch 2 is opened. The output voltage Vctri generated by the voltage controller is Vctrl-max, and the magnitude of Vctrl-max is proportional to the duration t1 of switch 1 being closed. Accordingly, the frequency generated by the voltage-controlled oscillator is frequency-max.
[0107] (3) When the frequency of the reference frequency signal is less than the frequency of the feedback frequency signal, and the phase of the reference frequency signal lags behind the feedback frequency signal, such as Figure 7As shown in (c), the UP signal output by the phase frequency detector is low, and the DOWN signal is high. The duration of the high level is proportional to the phase difference between the reference frequency signal and the feedback frequency signal. The voltage difference between the UP and DOWN signals is negative. The voltage difference between the UP and DOWN signals controls switch 1 to open and switch 2 to close. The output voltage Vctrl generated by the voltage controller is Vctrl-min, which is proportional to the duration t2 of switch 2's closure. Accordingly, the frequency generated by the voltage-controlled oscillator is frequency-min.
[0108] The above frequency-max>frequency-middle>frequency-min.
[0109] In some embodiments, the voltage controller includes: a source, a drain, a gate, a first electrode, a second electrode, a first switch, a second switch, a first layer of two-dimensional semiconductor material, a second layer of two-dimensional semiconductor material, and a third layer of two-dimensional semiconductor material; The second layer of two-dimensional semiconductor material and the second electrode are located on the third layer of two-dimensional semiconductor material, and the second electrode is located in a first direction of the second layer of two-dimensional semiconductor material; The source electrode, the drain electrode, and the first layer of two-dimensional semiconductor material are located on the second layer of two-dimensional semiconductor material, and the source electrode is located in a first direction of the first layer of two-dimensional semiconductor material, and the drain electrode is located in a second direction of the first layer of two-dimensional semiconductor material; The first electrode and the gate are located on the first layer of two-dimensional semiconductor material, the first electrode is located in a first direction of the gate, and the gate is located between the first electrode and the drain; One end of the first switch is connected to the first electrode, one end of the second switch is connected to the second electrode, and the other end of the first switch and the other end of the second switch are both connected to the source.
[0110] In some embodiments, the voltage controller further comprises: an insulating layer, a substrate; The insulating layer is used to isolate different electrodes and materials; The substrate is used to provide a stable carrier for the voltage controller.
[0111] In some embodiments, the insulating layer is used to isolate the second electrode from the source, isolate the source from the first electrode, isolate the first electrode from the drain, and isolate the gate from the first layer of two-dimensional semiconductor material.
[0112] In some embodiments, the source receives a source voltage input from an external power source to generate current; The gate receives a gate voltage input from an external power supply and is used to regulate the conductive layer; the conductive layer includes: the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material, which are materials for generating electrons and holes; The drain is used to output the control voltage; The first switch and the second switch are used to control the on and off of the first electrode and the second electrode respectively.
[0113] In some embodiments, the bandwidth of the first two-dimensional semiconductor material layer is greater than the bandwidth of the second two-dimensional semiconductor material layer, and the bandwidth of the second two-dimensional semiconductor material layer is greater than the bandwidth of the third two-dimensional semiconductor material layer.
[0114] In some embodiments, the conduction band of the first two-dimensional semiconductor material is at the top, the conduction band of the second two-dimensional semiconductor material is in the middle, and the conduction band of the third two-dimensional semiconductor material is at the bottom; The valence band of the first two-dimensional semiconductor material layer is at the bottom, the valence band of the second two-dimensional semiconductor material layer is in the middle, and the valence band of the third two-dimensional semiconductor material layer is at the top.
[0115] In some embodiments, the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material form a heterojunction, which is used to regulate the electron and hole transport behavior of different layers of two-dimensional semiconductor materials.
[0116] In some embodiments, the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material, and the third layer of two-dimensional semiconductor material are bonded together by van der Waals forces.
[0117] In some embodiments, when preparing a heterojunction, the first two-dimensional semiconductor material, the second two-dimensional semiconductor material, and the third two-dimensional semiconductor material are annealed to form a van der Waals interface between the first two-dimensional semiconductor material, the second two-dimensional semiconductor material, and the third two-dimensional semiconductor material.
[0118] In some embodiments, the first layer of two-dimensional semiconductor material is molybdenum disulfide, the second layer of two-dimensional semiconductor material is rhenium disulfide, and the first layer of two-dimensional semiconductor material is chromium diselenide.
[0119] In some embodiments, the voltage controller is used to control the states of the first switch and the second switch according to the first voltage and the second voltage, and the states are open or closed; Wherein, in different states, the voltage controller generates different control voltages.
[0120] In some embodiments, if the first switch and the second switch are both turned off, the source, the drain, and the gate are energized, and the source and the drain generate a control voltage having a first voltage value; If the first switch is closed and the second switch is open, the source, the first electrode, the drain, and the gate are energized, and the source and the drain generate a control voltage having a second voltage value; the second voltage value is greater than the first voltage value; and the magnitude of the second voltage value is proportional to the duration for which the first switch remains closed; If the first switch is disconnected and the second switch is closed, the source, the second electrode, the drain, and the gate are energized, and the source and the drain generate a control voltage with a third voltage value, which is less than the first voltage value; the magnitude of the third voltage value is proportional to the duration for which the second switch is continuously closed.
[0121] For the specific structure of the phase-locked loop circuit, please refer to Figures 2 to 6 The relevant instructions will not be repeated here.
[0122] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this application can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this application can be achieved. This is not a limitation herein.
[0123] In the above description, reference is made to “some embodiments”, which describes a subset of all possible embodiments, but it can be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict.
[0124] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by those skilled in the art to which this application belongs. The terms used in this application are only for the purpose of describing the embodiments of this application and are not intended to limit this application.
[0125] It should be understood that in the various embodiments of the present application, the size of the serial number of each implementation process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
[0126] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.
[0127] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.
Claims
1. A phase-locked loop circuit, characterized in that: The phase-locked loop circuit includes: a frequency detector, a phase detector, a voltage controller, a voltage-controlled oscillator, and a frequency divider; The frequency and phase detector is configured to receive a reference frequency signal and a feedback frequency signal, and output a function of a signal phase difference by comparing the phases of the reference frequency signal and the feedback frequency signal, wherein the function of the signal phase difference includes: a first voltage and a second voltage; The voltage controller is used to convert the function of the signal phase difference into a linearly varying control voltage, and output the control voltage to the voltage-controlled oscillator; The voltage-controlled oscillator is configured to receive the control voltage and generate an output signal corresponding to the control voltage; The frequency divider is used to divide the output signal of the voltage-controlled oscillator to obtain a feedback frequency signal, and output the feedback frequency signal to the frequency and phase detector.
2. The circuit according to claim 1, wherein: The voltage controller includes: a source, a drain, a gate, a first electrode, a second electrode, a first switch, a second switch, a first layer of two-dimensional semiconductor material, a second layer of two-dimensional semiconductor material, and a third layer of two-dimensional semiconductor material; The second layer of two-dimensional semiconductor material and the second electrode are located on the third layer of two-dimensional semiconductor material, and the second electrode is located in a first direction of the second layer of two-dimensional semiconductor material; The source electrode, the drain electrode, and the first layer of two-dimensional semiconductor material are located on the second layer of two-dimensional semiconductor material, and the source electrode is located in a first direction of the first layer of two-dimensional semiconductor material, and the drain electrode is located in a second direction of the first layer of two-dimensional semiconductor material; The first electrode and the gate are located on the first layer of two-dimensional semiconductor material, the first electrode is located in a first direction of the gate, and the gate is located between the first electrode and the drain; One end of the first switch is connected to the first electrode, one end of the second switch is connected to the second electrode, and the other end of the first switch and the other end of the second switch are both connected to the source.
3. The circuit according to claim 2, characterized in that The voltage controller further includes: an insulating layer and a substrate; The insulating layer is used to isolate different electrodes and materials; The substrate is used to provide a stable carrier for the voltage controller.
4. The circuit according to claim 3, characterized in that The insulating layer is used to isolate the second electrode from the source, isolate the source from the first electrode, isolate the first electrode from the drain, and isolate the gate from the first layer of two-dimensional semiconductor material.
5. The circuit according to claim 2, characterized in that The source receives a source voltage input from an external power source to generate current; The gate receives a gate voltage input from an external power supply to regulate the conductive layer; The conductive layer includes: the first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material, which are materials for generating electrons and holes; The drain is used to output the control voltage; The first switch and the second switch are used to control the on and off of the first electrode and the second electrode respectively.
6. The circuit according to claim 2 or 5, characterized in that The bandwidth of the first two-dimensional semiconductor material layer is greater than the bandwidth of the second two-dimensional semiconductor material layer, and the bandwidth of the second two-dimensional semiconductor material layer is greater than the bandwidth of the third two-dimensional semiconductor material layer.
7. The circuit according to claim 2 or 5, characterized in that The conduction band of the first two-dimensional semiconductor material layer is at the top, the conduction band of the second two-dimensional semiconductor material layer is in the middle, and the conduction band of the third two-dimensional semiconductor material layer is at the bottom; The valence band of the first two-dimensional semiconductor material layer is at the bottom, the valence band of the second two-dimensional semiconductor material layer is in the middle, and the valence band of the third two-dimensional semiconductor material layer is at the top.
8. The circuit according to claim 2 or 5, characterized in that The first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material form a heterojunction, which is used to regulate the electron and hole transport behavior of different layers of two-dimensional semiconductor materials.
9. The circuit according to claim 2 or 5, characterized in that The first layer of two-dimensional semiconductor material, the second layer of two-dimensional semiconductor material and the third layer of two-dimensional semiconductor material are bonded together by van der Waals forces.
10. The circuit according to claim 8, characterized in that When preparing a heterojunction, the first two-dimensional semiconductor material, the second two-dimensional semiconductor material and the third two-dimensional semiconductor material are annealed to form a van der Waals interface between the first two-dimensional semiconductor material, the second two-dimensional semiconductor material and the third two-dimensional semiconductor material.
11. The circuit according to claim 2 or 5, characterized in that The first layer of two-dimensional semiconductor material is molybdenum disulfide, the second layer of two-dimensional semiconductor material is rhenium disulfide, and the third layer of two-dimensional semiconductor material is chromium diselenide.
12. The circuit according to claim 2, characterized in that The voltage controller is configured to control the states of the first switch and the second switch according to the first voltage and the second voltage, wherein the states are open or closed; Wherein, in different states, the voltage controller generates different control voltages.
13. The circuit according to claim 12, characterized in that If the first switch and the second switch are both turned off, the source, the drain, and the gate are energized, and the source and the drain generate a control voltage having a first voltage value; If the first switch is closed and the second switch is disconnected, the source, the first electrode, the drain, and the gate are energized, and the source and the drain generate a control voltage having a second voltage value; the second voltage value is greater than the first voltage value; The magnitude of the second voltage value is proportional to the duration for which the first switch is continuously closed; If the first switch is disconnected and the second switch is closed, the source, the second electrode, the drain, and the gate are energized, and the source and the drain generate a control voltage having a third voltage value, which is lower than the first voltage value; The magnitude of the third voltage value is proportional to the duration during which the second switch is continuously closed.
14. A control method for a phase-locked loop circuit, characterized in that: Applied to a phase-locked loop circuit, the method includes: The phase frequency detector receives a reference frequency signal and a feedback frequency signal, compares the phases of the reference frequency signal and the feedback frequency signal, and outputs a function of a signal phase difference, wherein the function of the signal phase difference includes: a first voltage and a second voltage; The voltage controller converts the function of the signal phase difference into a linearly varying control voltage and outputs the control voltage to the voltage-controlled oscillator; The voltage-controlled oscillator receives the control voltage and generates an output signal corresponding to the control voltage; The frequency divider divides the output signal of the voltage-controlled oscillator to obtain a feedback frequency signal, and outputs the feedback frequency signal to the frequency and phase detector.
15. The method according to claim 14, characterized in that The function of outputting a signal phase difference by comparing the phases of the reference frequency signal and the feedback frequency signal includes: If the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal, and the phase of the reference frequency signal is the same as the phase of the feedback frequency signal, the first voltage and the second voltage output by the frequency and phase detector are both low levels; If the frequency of the reference frequency signal is greater than the frequency of the feedback frequency signal, or the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal, and the phase of the reference frequency signal leads the feedback frequency signal, the first voltage output by the phase frequency detector is a high level and the second voltage is a low level, and the maintenance time of the first voltage is proportional to the phase difference between the reference frequency signal and the feedback frequency signal; If the frequency of the reference frequency signal is less than the frequency of the feedback frequency signal, or the frequency of the reference frequency signal is equal to the frequency of the feedback frequency signal and the phase of the reference frequency signal lags behind the feedback frequency signal, the first voltage output by the phase frequency detector is low and the second voltage is high, and the maintenance time of the second voltage is proportional to the phase difference between the reference frequency signal and the feedback frequency signal; Accordingly, the voltage controller converts the function of the signal phase difference into a linearly varying control voltage, including: The first switch and the second switch of the voltage controller are both disconnected, generating a control voltage having a first voltage value; The first switch of the voltage controller is closed and the second switch is opened, generating a control voltage having a second voltage value; the second voltage value is greater than the first voltage value; and the magnitude of the second voltage value is proportional to the duration for which the first switch remains closed; The first switch of the voltage controller is disconnected and the second switch is closed, generating a control voltage with a third voltage value, which is smaller than the first voltage value; the magnitude of the third voltage value is proportional to the duration for which the second switch is continuously closed.
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