High dynamic stability high voltage resistant GaN power device and preparation method thereof

Abstract

The application belongs to the technical field of power electronic devices, and particularly relates to a high-dynamic-stability high-voltage GaN power device and a preparation method thereof. The high-dynamic-stability high-voltage GaN power device provided by the application adds a barrier layer on a silicon substrate. Since the material of the barrier layer is an insulating material, the electrons in the substrate cannot pass through the barrier layer, so that the substrate electrons are prevented from being captured by the buffer layer traps, and the dynamic resistance problem is weakened. Meanwhile, due to the existence of the barrier layer, the pressure resistance of the vertical path from the drain to the silicon substrate is improved, and thus the voltage resistance of the device is higher.

Description

Technical Field

[0001] This invention belongs to the field of power electronic device technology, specifically relating to a GaN power device with high dynamic stability and high withstand voltage and its fabrication method. Background Technology

[0002] Compared to first-generation semiconductors represented by silicon and second-generation semiconductors represented by gallium arsenide, GaN (gallium nitride) is a third-generation semiconductor material with significant advantages in material properties. Its most notable characteristics include a large bandgap, high breakdown electric field, and high electron saturation velocity. In the field of power electronics systems, these advantages can help overcome the development bottlenecks of silicon semiconductor devices, enabling electronic systems to achieve faster operating frequencies, lower losses, and smaller sizes.

[0003] However, current collapse caused by trapping effects under high-pressure stress is a common problem in GaN devices, also known as the dynamic resistance problem. The dynamic resistance problem is mainly caused by two trapping effects: barrier layer traps and buffer layer traps, such as... Figure 5 As shown, when a device is subjected to high-voltage stress, a high electric field appears inside the device, accelerating electrons in the two-dimensional electron gas. When a trap effect occurs in the barrier layer, the accelerated electrons are captured by these traps. When traps exist in the buffer layer, the accelerated electrons may also be captured by the buffer layer traps. Simultaneously, electrons in the silicon substrate are also attracted to the buffer layer and captured by the traps within it. After the stress is removed, the device turns on normally, but these captured electrons cannot be released in time. The shallower the trap energy level, the faster the electron release rate; the deeper the trap energy level, the slower the electron release rate. Electrons trapped in the traps form charged centers, affecting the electron mobility of the channel, thus increasing the channel resistance, which manifests as an increase in resistance at the device's electrical characteristics level.

[0004] Currently, commercially available GaN devices use silicon substrates due to cost considerations. For the second type of trap (buffer layer trap), electrons in the silicon substrate are trapped, leading to a deterioration in dynamic resistance. Furthermore, because the silicon substrate itself has some conductivity, the device's breakdown voltage is limited by its vertical path. That is, when a high voltage is applied to the drain, the conductivity of the silicon substrate results in insufficient voltage withstand capability along the vertical path from the drain to the silicon substrate. Summary of the Invention

[0005] The purpose of this invention is to provide a GaN power device with high dynamic stability and high withstand voltage and its fabrication method. The GaN power device obtained by the method provided by this invention has high dynamic stability and high withstand voltage characteristics.

[0006] In order to achieve the above object, the present application provides the following technical solutions:

[0007] The present application provides a high dynamic stability high voltage GaN power device, comprising a substrate, a barrier layer arranged on the upper surface of the substrate, a GaN buffer layer arranged on the upper surface of the barrier layer, a GaN channel layer arranged on the upper surface of the GaN buffer layer, an Al x Ga 1-x N barrier layer arranged on the upper surface of the GaN channel layer, a gate electrode arranged on the upper surface of the Al x Ga 1-x N barrier layer, and a passivation layer surrounding the gate electrode, a source electrode and a drain electrode arranged at both ends of the GaN channel layer and the Al x Ga 1-x N barrier layer and in ohmic contact with the GaN channel layer and the Al x Ga 1-x N barrier layer.

[0008] The material of the barrier layer comprises Al2O3 or AlN.

[0009] The Al x Ga 1-x N barrier layer has a thickness of 10-30 nm.

[0010] Preferably, the substrate comprises a silicon wafer, and the thickness of the substrate is 600-1000 μm.

[0011] Preferably, the thickness of the barrier layer is 20-30 nm.

[0012] Preferably, the thickness of the GaN buffer layer is 0.5-3 μm.

[0013] Preferably, the thickness of the GaN channel layer is 100-2000 nm.

[0014] Preferably, the Al x Ga 1-x N barrier layer has a thickness of 10-30 nm.

[0015] Preferably, the source electrode and the drain electrode independently comprise a titanium layer and an aluminum layer arranged in sequence from bottom to top.

[0016] The thickness of the aluminum layer is 500-5000 nm, and the thickness of the titanium layer is 1-20 nm.

[0017] Preferably, the gate electrode comprises a first TiN layer, an Al layer and a second TiN layer arranged in sequence from bottom to top.

[0018] The thickness of the first TiN layer and the second TiN layer is independently 10-100 nm.

[0019] The thickness of the Al layer is 1000 nm.

[0020] Preferably, the material of the passivation layer is SiN; and the thickness of the passivation layer is 10-100 nm.

[0021] The application further provides a preparation method of the high-dynamic-stability high-voltage GaN power device.

[0022] The barrier layer, the GaN buffer layer, the GaN channel layer, the Al x Ga 1-x N barrier layer and the passivation layer are sequentially prepared on the surface of the substrate to obtain a semi-finished product.

[0023] The source electrode, the drain electrode and the gate electrode are prepared on the semi-finished product to obtain the high-dynamic-stability high-voltage GaN power device.

[0024] The application provides a high-dynamic-stability high-voltage GaN power device. x Ga 1-x N barrier layer, the gate electrode arranged on the upper surface of the Al x Ga 1-x N barrier layer and the passivation layer surrounding the gate electrode, and the source electrode and the drain electrode arranged at both ends of the GaN channel layer and the Al x Ga 1-x N barrier layer and in ohmic contact with the GaN channel layer and the Al x Ga 1-x N barrier layer; the material of the barrier layer comprises Al2O3 or AlN; the value range of x in the Al x Ga 1-x N barrier layer is 0.25.

[0025] The high-dynamic-stability high-voltage GaN power device provided by the application adds a barrier layer on a silicon substrate. Since the material of the barrier layer is an insulating material, the electrons in the substrate cannot pass through the barrier layer, so that the substrate electrons are prevented from being captured by the buffer layer traps, and the dynamic resistance problem is weakened. Meanwhile, due to the existence of the barrier layer, the pressure resistance of the vertical path from the drain electrode to the silicon substrate is improved, and thus the voltage resistance of the device is higher. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 The silicon wafer with the Al2O3 layer obtained in Example 1 is used as the substrate.

[0027] Figure 2 The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3. x Ga 1-x The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3.

[0028] Figure 3 The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3.

[0029] Figure 4 The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3.

[0030] Figure 5 The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3.

[0031] The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3. x Ga 1-x The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3. DETAILED DESCRIPTION

[0032] The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3. x Ga 1-x The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3. x Ga 1-x The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3. x Ga 1-x The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3. x Ga 1-x The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3.

[0033] The material of the barrier layer comprises Al2O3 or AlN.

[0034] The value range of x in the Al x Ga 1-x N barrier layer is 0.25.

[0035] Figure 4 The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3. Figure 4 The structure diagram of the device obtained after preparing the source electrode and the drain electrode in Example 1 is shown in Figure 3.

[0036] The high dynamic stability high voltage GaN power device provided by the application comprises a substrate.

[0037] The high dynamic stability high voltage GaN power device provided by the application comprises a barrier layer arranged on the upper surface of the substrate. In the application, the thickness of the barrier layer is preferably 20-30 nm, and specifically can be 20 nm, 21 nm, 22 nm, 23 nm, 24 nm, 25 nm, 26 nm, 27 nm, 28 nm, 29 nm or 30 nm. In the application, the material of the barrier layer is an insulating material, and the electrons in the substrate cannot pass through the barrier layer, so that the dynamic resistance problem is weakened by preventing the electrons in the substrate from being captured by the traps in the buffer layer; at the same time, the pressure resistance of the vertical path from the drain to the substrate is improved due to the existence of the barrier layer, and thus the voltage resistance of the device is higher.

[0038] The high dynamic stability high voltage GaN power device provided by the application comprises a GaN buffer layer arranged on the upper surface of the barrier layer. In the application, the thickness of the GaN buffer layer is preferably 0.5-3 μm, and specifically can be 0.5 μm, 1.0 μm, 2.0 μm or 3.0 μm.

[0039] The high dynamic stability high voltage GaN power device provided by the application comprises a GaN channel layer arranged on the upper surface of the GaN buffer layer. In the application, the thickness of the GaN channel layer is preferably 100-2000 nm, and specifically can be 100 nm, 300 nm, 500 nm, 1000 nm, 1500 nm or 2000 nm.

[0040] The high dynamic stability high voltage GaN power device provided by the application comprises an Al x Ga 1-x N barrier layer arranged on the upper surface of the GaN channel layer. In the application, the value range of x in the Al x Ga 1-x N barrier layer is 0.25; and the thickness of the Al x Ga 1-x N barrier layer is 10-30 nm, and specifically can be 10 nm, 15 nm, 20 nm, 23 nm, 25 nm or 30 nm.

[0041] The high dynamic stability high voltage GaN power device provided by the application comprises an Al x Ga1-x A gate electrode on the upper surface of the N barrier layer and a passivation layer surrounding the gate electrode. In the present application, the gate electrode preferably comprises a first TiN layer, an Al layer and a second TiN layer stacked in order from bottom to top; the thickness of the first TiN layer and the second TiN layer is preferably independently 10-100 nm, and can be specifically 10 nm, 50 nm or 100 nm; the thickness of the Al layer is preferably 1000 nm. In the present application, the material of the passivation layer is preferably SiN; the thickness of the passivation layer is preferably 10-100 nm, and can be specifically 10 nm, 50 nm or 100 nm.

[0042] The high-dynamic-stability high-voltage GaN power device provided by the present application comprises a GaN channel layer and an Al x Ga 1-x N barrier layer at both ends of the N barrier layer and on the GaN channel layer and the Al x Ga 1-x Source electrode and drain electrode for ohmic contact of the N barrier layer. In the present application, the source electrode and the drain electrode preferably independently comprise a titanium layer and an aluminum layer stacked in order from bottom to top; the thickness of the aluminum layer is preferably 500-5000 nm, and can be specifically 500 nm, 1000 nm, 2000 nm, 3000 nm, 4000 nm or 5000 nm; the thickness of the titanium layer is preferably 1-20 nm, and can be specifically 1 nm, 5 nm, 10 nm, 15 nm or 20 nm.

[0043] The present application also provides a preparation method of the high-dynamic-stability high-voltage GaN power device described in the above technical solution, comprising the following steps:

[0044] Preparation of a barrier layer, a GaN buffer layer, a GaN channel layer, an AlxGa1-xN barrier layer and a passivation layer in order on the surface of a substrate to obtain a semi-finished product;

[0045] Preparation of a source electrode, a drain electrode and a gate electrode on the semi-finished product to obtain the high-dynamic-stability high-voltage GaN power device.

[0046] In the present application, the preparation of the barrier layer preferably adopts an atomic layer deposition process. The present application does not have special limitations on the specific process of the atomic layer deposition process, which can be known to those skilled in the art. In the present application, after the atomic layer deposition process, the obtained thin film is preferably further annealed, the annealing temperature is preferably 400-600°C, and can be 400°C, 500°C, 600°C; the holding time is preferably 1-50 min, and can be 1 min, 10 min, 20 min, 30 min, 40 min, 50 min; the annealing is preferably carried out in a nitrogen atmosphere. In the present application, the thin film obtained by the atomic layer deposition process has good compactness; further, after annealing, the grown thin film can be converted into a crystal, and the lattice arrangement is more complete, and the lattice constant of the barrier layer is closer to that of GaN, so that the GaN material grown on the crystallized barrier layer has better quality.

[0047] The present application does not have special limitations on the preparation method of the GaN buffer layer, GaN channel layer, Al x Ga 1-x N barrier layer and passivation layer, which can be known to those skilled in the art. In the present application, due to the spontaneous polarization effect of GaN material, and the piezoelectric effect formed by Al x Ga 1-x N material, a two-dimensional electron gas layer is formed in the GaN channel layer, and the conductivity of the GaN device is based on this two-dimensional electron gas layer.

[0048] The present application does not have special limitations on the preparation method of the source electrode, drain electrode and gate electrode, which can be known to those skilled in the art.

[0049] Unless otherwise specified, the materials and equipment used in the present application are commercially available in the art.

[0050] The technical solutions in the present application will be described clearly and completely in the embodiments in the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0051] Example 1

[0052] A silicon wafer was placed in an ALD device to grow an Al2O3 thin film with a thickness of 25 nm, and after the growth was completed, annealing was carried out at 500°C under a nitrogen atmosphere for 10 min, and the obtained structure is shown in Figure 1 , (wherein 2 is the Al2O3 layer);

[0053] Then the silicon wafer with the Al2O3 layer is put into a MOCVD device to grow a GaN buffer layer, a GaN channel layer and an Al x Ga 1-x N(x=0.25) barrier layer in sequence, wherein the thickness of the GaN buffer layer is 2 μm, the thickness of the channel layer is 300 nm, and the thickness of the barrier layer is 23 nm; due to the spontaneous polarization effect of the GaN material and the piezoelectric effect formed by the Al x Ga 1-x N material, a two-dimensional electron gas is formed in the GaN channel layer, and the structure is as shown in Figure 2 ;

[0054] Then a SiN layer is grown as a passivation layer above the Al x Ga 1-x N barrier layer by using a PECVD device, and the thickness is 50 nm; then a source electrode and a drain electrode are made, and the electrodes adopt a Ti / Al structure, and the thicknesses are 10 nm / 1000 nm, and the structure is as shown in Figure 3 ;

[0055] Then a gate electrode is made, and the gate electrode adopts a TiN / Al / TiN structure, and the thicknesses are 50 nm / 1000 nm / 50 nm, and the device is made, and the structure is as shown in Figure 4 .

[0056] As can be seen from the above embodiment, the Al2O3 thin film is obtained by using the atomic layer deposition process on the surface of the silicon substrate, and the obtained thin film has good compactness; further, after annealing, the grown thin film can be converted into a crystal, and the lattice arrangement is more complete; compared with the silicon, the lattice constant of the Al2O3 layer is closer to that of the GaN, and therefore the quality of the GaN material grown on the crystallized Al2O3 layer is better; meanwhile, the Al2O3 layer is an insulating layer, and the electrons in the substrate cannot pass through the Al2O3 layer, and therefore the problem of the dynamic resistance is weakened; meanwhile, due to the existence of the Al2O3 layer, the pressure resistance of the vertical path from the drain to the substrate is improved, and therefore the pressure resistance of the device is higher.

[0057] Although the above embodiment describes the present application in detail, it is only a part of the embodiments of the present application, but not all the embodiments, and other embodiments can be obtained under the premise of no creativity according to the present embodiment, and these embodiments all belong to the protection scope of the present application.

Claims

1. A high dynamic stability high voltage withstanding GaN power device, characterized in that, A substrate, a barrier layer disposed on an upper surface of the substrate, a GaN buffer layer disposed on an upper surface of the barrier layer, a GaN channel layer disposed on an upper surface of the GaN buffer layer, an Al x Ga 1-x N barrier layer disposed on an upper surface of the GaN channel layer, a gate electrode disposed on an upper surface of the Al x Ga 1-x N barrier layer, a passivation layer surrounding the gate electrode, a source electrode and a drain electrode disposed at both ends of the GaN channel layer and the Al x Ga 1-x N barrier layer, and in ohmic contact with the GaN channel layer and the Al x Ga 1-x N barrier layer. The material of the barrier layer comprises Al2O3 or AlN; The Al x Ga 1-x x in the GaN barrier layer is in the range of 0.

25.

2. The high dynamic stability high voltage withstanding GaN power device according to claim 1, characterized in that, The substrate comprises a silicon wafer, and the thickness of the substrate is 600-1000 μm.

3. The high dynamic stability high voltage withstanding GaN power device according to claim 1, characterized in that, The thickness of the barrier layer is 20-30 nm.

4. The high dynamic stability high voltage withstanding GaN power device of claim 1, wherein, The thickness of the GaN buffer layer is 0.5-3 μm.

5. The high dynamic stability high voltage withstanding GaN power device according to claim 1, wherein, The thickness of the GaN channel layer is 100-2000 nm.

6. The high-dynamic-stability high-voltage-withstand GaN power device of claim 1, wherein, The Al x Ga 1-x The thickness of the GaN barrier layer is 10-30 nm.

7. The high-dynamic-stability high-voltage-withstand GaN power device of claim 1, wherein, The source electrode and the drain electrode independently comprise a titanium layer and an aluminum layer which are stacked from bottom to top; The thickness of the aluminum layer is 500-5000 nm, and the thickness of the titanium layer is 1-20 nm.

8. The high-dynamic-stability high-voltage-withstand GaN power device of claim 1, wherein, The gate electrode comprises a first TiN layer, an Al layer and a second TiN layer which are stacked from bottom to top; The thickness of the first TiN layer and the second TiN layer is independently 10-100 nm; The thickness of the Al layer is 1000 nm.

9. The high-dynamic-stability high-voltage GaN power device of claim 1, wherein, The material of the passivation layer is SiN, and the thickness of the passivation layer is 10-100 nm.

10. The method for preparing high dynamic stability high voltage withstanding GaN power device according to any one of claims 1-9, characterized in that, The method comprises the following steps: A barrier layer, a GaN buffer layer, a GaN channel layer, an Al x Ga 1-x N barrier layer and a passivation layer are sequentially prepared on the surface of a substrate to obtain a semi-finished product; Preparation of a source electrode, a drain electrode and a gate electrode on the semi-finished product to obtain the high-dynamic-stability high-voltage GaN power device.

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