Self-adaptive wide-range detection circuit, load switch, chip and electronic equipment

Abstract

The invention provides a self-adaptive wide-range detection circuit, a load switch, a chip and electronic equipment. The adaptive wide-range detection circuit comprises an output voltage judgment module, a signal detection module, a first current detection module, a second current detection module and a signal processing module. The signal detection module comprises detection units in one-to-one correspondence with first switch units of the load switch; the output voltage judgment module is coupled with the first current detection module and the second current detection module, and the first current detection module and the second current detection module are coupled with the signal processing module; according to the control signal, the input voltage and the output voltage, one of the first current detection module and the second current detection module can be adaptively driven to work, the other one does not work, and a current detection result is generated. According to the invention, wide current detection and decoupling of the driving voltage and the input voltage can be realized adaptively, and the reliability is high.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and in particular to an adaptive wide-range detection circuit, a load switch, a chip and an electronic device. Background Art

[0002] Load switches select from different power input paths and convert them into a protected single output for the load. To protect the device by shutting down in the event of an abnormality, load switches typically integrate current detection circuits to monitor the current flowing through the load switch. Existing current detection circuits have specific requirements for the current range to be detected. Typically, they can only accurately detect current values ​​within a limited range. For situations with large current fluctuations, existing current detection circuits suffer from low detection accuracy or even detection failure.

[0003] However, with the rapid development of technology, signal transmission is placing increasingly stringent demands on the performance of load switches and their current sensing circuits. For certain electronic applications (such as mobile phone systems), current sensing circuits in existing technologies cannot effectively meet the increasing range of current variations and require rapid response to current changes. Furthermore, the range of power supply input voltages is also becoming increasingly wider, requiring rapid response to input voltage changes. The input voltage range and maximum load current that existing load switches can handle are dependent on the choice of switch unit, which in turn determines the load switch architecture.

[0004] The switch unit of the load switch in the prior art is usually implemented by a single PMOS transistor or a single NMOS transistor. In order to achieve a wide input range, the driving voltage needs to be coupled with the input and output voltages. For example, see Figure 1 , Figure 1 FIG. 1 is a schematic diagram of the structure of a load switch (taking the switch tube as an NMOS tube as an example) in the prior art. Figure 1 It can be seen that the load switch in the prior art includes a switch tube 1, a positive charge pump 2, a voltage stabilizing unit 3 and a driving buffer unit 4. Figure 1 As shown, in the load switch architecture using an NMOS transistor as the switch transistor 1, the NMOS transistor (i.e., the switch transistor 1) is located at the input power supply ( Figure 1 Not shown, use IN schematic) and load ( Figure 1The source of the NMOS transistor is connected to the load terminal (not shown in the figure, indicated by OUT). To ensure full conduction of the NMOS transistor (i.e., switch 1), the voltage generated by the positive charge pump 2 is typically required to be higher than the output voltage to drive switch 1. In this architecture, when the output voltage is high and changes rapidly, the gate voltage of switch 1 must also be able to keep up with the rapid changes in the output voltage, placing high performance requirements on the driver buffer unit 4. When the output voltage changes rapidly during switch 1 conduction and the gate voltage fails to keep up with the output voltage changes, gate oxide reliability issues may arise.

[0005] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or any form of implication that the information constitutes prior art already known to those skilled in the art. Summary of the Invention

[0006] The present invention addresses one or more of the problems in the prior art, namely, that the current detection circuit cannot adaptively perform current detection within a wide input range, and that the load switch in the prior art has input voltage and output voltage coupling and poor scalability. The present invention provides an adaptive wide-range detection circuit, a load switch, a chip, and an electronic device. The adaptive wide-range detection circuit provided by the present invention is not only capable of automatic adjustment and adaptively realizing wide current detection, but also has a rapid response and high reliability. The load switch provided by the present invention has no requirements for the range and timing of the transmitted power supply voltage signal and has strong applicability. It can also realize arbitrary multi-channel signal selection and has strong scalability. Furthermore, the load switch provided by the present invention realizes decoupling of the driving voltage and the input voltage, has no leakage of the power supply voltage signal to be transmitted, and avoids the gate from being subjected to high voltage, thereby having high reliability.

[0007] To achieve the above objectives, the present invention is implemented through the following technical solutions: an adaptive wide-range detection circuit for a load switch, the load switch including at least one first switch unit, the adaptive wide-range detection circuit including an output voltage determination module, a signal detection module, a first current detection module, a second current detection module, and a signal processing module; wherein the signal detection module includes detection units corresponding to the first switch units one by one, and the impedance of the detection units is proportional to the impedance of the corresponding first switch units; an output terminal of the output voltage determination module is coupled to a control terminal of the first current detection module and a control terminal of the second current detection module; an output terminal of the signal detection module is coupled to an input terminal of the first current detection module and an input terminal of the second current detection module; an output terminal of the first current detection module and an output terminal of the second current detection module are coupled to an input terminal of the signal processing module; the signal detection module receives a control signal, an input voltage, and an output voltage of the load switch, and the output voltage determination module receives the output voltage; the adaptive wide-range detection circuit is configured to adaptively drive one of the first current detection module and the second current detection module to operate and the other to deactivate according to the control signal, the input voltage, and the output voltage to generate a current detection result.

[0008] Optionally, the output voltage judgment module is configured to drive the first current detection module to work and control the second current detection module not to work when the output voltage is less than a preset voltage; drive the second current detection module to work and control the first current detection module not to work when the output voltage is greater than or equal to the preset voltage; the signal detection module is configured to drive the detection unit corresponding to the currently working first switching unit to generate an input detection voltage and an output detection voltage according to the received control signal; the first current detection module is configured to generate a first detection current according to the input detection voltage and the output detection voltage; the second current detection module is configured to generate a second detection current according to the input detection voltage and the output detection voltage; the signal processing module is configured to generate the current detection result according to the first detection current and the second detection current.

[0009] Optionally, the output voltage judgment module includes a voltage divider circuit and a comparator, the first end of the voltage divider circuit receives the output voltage, the second end of the voltage divider circuit is grounded, the voltage divider point of the voltage divider circuit is coupled to the positive input end of the comparator, the negative input end of the comparator receives the reference voltage, and the output end of the comparator is coupled to the control end of the first current detection module and the control end of the second current detection module.

[0010] Optionally, the detection unit includes a second switch unit and a third switch unit, the first end of the second switch unit is coupled to the first end of the first switch unit corresponding to it to receive the input voltage, the first end of the third switch unit is coupled to the second end of the first switch unit corresponding to it to receive the output voltage, the second end of the second switch unit, the first end of the first current detection module and the first end of the second current detection module are coupled to a first node, the second end of the third switch unit, the second end of the first current detection module and the second end of the second current detection module are coupled to a second node; the control end of the second switch unit and the control end of the third switch unit receive the control signal.

[0011] Optionally, the second switch unit includes a second CMOS switch tube, the third switch unit includes a third CMOS switch tube, and the impedance of the second switch unit is equal to the impedance of the third switch unit.

[0012] Optionally, the second CMOS switch tube includes a second PMOS tube and a second NMOS tube, the third CMOS switch tube includes a third PMOS tube and a third NMOS tube, and the second PMOS tube, the second NMOS tube, the third PMOS tube and the third NMOS tube have the same size.

[0013] Optionally, the first current detection module includes a first input side mirror circuit, a first output side mirror circuit and a first inverter, and the second current detection module includes a second input side mirror circuit and a second output side mirror circuit; the first end of the first input side mirror circuit and the first end of the first output side mirror circuit are used to receive the operating voltage, and the first end of the second input side mirror circuit and the first end of the second output side mirror circuit are grounded; the second end of the first input side mirror circuit, the second end of the second input side mirror circuit and the second end of the second output side mirror circuit are coupled to the first node, the third end of the first input side mirror circuit, the third end of the second input side mirror circuit and the second end of the first output side mirror circuit are coupled to the second node; the fourth end of the first input side mirror circuit and the third end of the first output side mirror circuit are coupled to the third node; the fourth end of the first output side mirror circuit is coupled to the first input end of the signal processing module; the second input side mirror The fourth terminal of the image circuit and the third terminal of the second output-side mirror circuit are coupled to a fourth node, and the fourth terminal of the second output-side mirror circuit is coupled to the second input terminal of the signal processing module; the input terminal of the first inverter, the control terminal of the second input-side mirror circuit, and the control terminal of the second output-side mirror circuit are coupled to the output terminal of the output voltage judgment module, and the control terminal of the first input-side mirror circuit and the control terminal of the first output-side mirror circuit are coupled to the output terminal of the first inverter; the first current detection module is configured to, during operation, use the clamping function of the first input-side mirror circuit to make the voltages of the first node and the second node the same, and output the first detection current through the mirroring function of the first output-side mirror circuit; the second current detection module is configured to, during operation, use the clamping function of the second input-side mirror circuit to make the voltages of the first node and the second node the same, and output the second detection current through the mirroring function of the second output-side mirror circuit.

[0014] Optionally, the first input side mirror circuit includes a first current source, a second current source and a first current mirror; the input end of the first current source and the input end of the second current source receive the operating voltage, the output end of the first current source and the power supply voltage end of the image side of the first current mirror are coupled to the third node, the output end of the second current source is coupled to the power supply voltage end of the source side of the first current mirror, the output end of the first current mirror is coupled to the first node, and the input end of the first current mirror is coupled to the second node; the second input side mirror circuit includes a second current mirror, a third current source and a fourth current source; the second current mirror The power supply voltage terminal on the source side is coupled to the second node, the power supply voltage terminal on the image side of the second current mirror is coupled to the first node, the output terminal of the second current mirror and the input terminal of the third current source are coupled to a fourth node, the input terminal of the second current mirror is coupled to the input terminal of the fourth current source, and the output terminal of the third current source and the output terminal of the fourth current source are coupled to ground; the input terminal of the first inverter, the control terminal of the third current source and the control terminal of the fourth current source are coupled to the output terminal of the output voltage judgment module, and the control terminal of the first current source and the control terminal of the second current source are coupled to the output terminal of the first inverter.

[0015] Optionally, the first output-side mirror circuit includes a third current mirror, a first control switch, and a second control switch. A power supply voltage terminal of the third current mirror receives the operating voltage. An input terminal of the third current mirror is coupled to the first terminal of the first control switch. An output terminal of the third current mirror is coupled to the first terminal of the second control switch. A second terminal of the first control switch is coupled to the second node. A control terminal of the first control switch is coupled to the third node. A second terminal of the second control switch is coupled to the first input terminal of the signal processing module. The second output-side mirror circuit includes a third control switch, a fourth current mirror, and a fourth control switch. A first terminal of the third control switch is coupled to the first node. A second terminal of the third control switch is coupled to the input terminal of the fourth current mirror. A control terminal of the third control switch is coupled to the fourth node. An output terminal of the fourth current mirror is coupled to the first terminal of the fourth control switch. A second terminal of the fourth control switch is coupled to the second input terminal of the signal processing module. A ground terminal of the fourth current mirror is grounded. An input terminal of the first inverter is coupled to the output terminal of the output voltage determination module. An output terminal of the first inverter is coupled to the control terminal of the second control switch.

[0016] Optionally, the first current detection module includes a first operational amplifier, a fifth control switch, a fifth current mirror, a sixth control switch and a second inverter; the second current detection module includes a second operational amplifier, a seventh control switch, a sixth current mirror and an eighth control switch; the positive input terminal of the first operational amplifier, the negative input terminal of the second operational amplifier and the first end of the seventh control switch are coupled to the first node, the negative input terminal of the first operational amplifier, the positive input terminal of the second operational amplifier and the first end of the fifth control switch are coupled to the second node; the control end of the fifth control switch is coupled to the output terminal of the first operational amplifier, the second end of the fifth control switch is coupled to the input terminal of the fifth current mirror, and the fifth current mirror The output end of the output voltage judgment module is coupled to the first end of the sixth control switch, the second end of the sixth control switch is coupled to the first input end of the signal processing module, and the power supply voltage end of the fifth current mirror receives the operating voltage; the control end of the seventh control switch is coupled to the output end of the second operational amplifier, the second end of the seventh control switch is coupled to the input end of the sixth current mirror, the output end of the sixth current mirror is coupled to the first end of the eighth control switch, the first end of the eighth control switch is coupled to the second input end of the signal processing module, and the ground end of the sixth current mirror is coupled to ground; the output end of the output voltage judgment module is coupled to the input end of the second inverter, and the output end of the second inverter is coupled to the control end of the sixth control switch and the control end of the first operational amplifier.

[0017] Optionally, the signal processing module includes a seventh current mirror, the power supply voltage end of the seventh current mirror receives the operating voltage, the input end of the seventh current mirror is coupled to the output end of the second current detection module, and the output end of the seventh current mirror is connected in parallel with the output end of the first current detection module; the seventh current mirror is configured to add the mirror current of the second detection current to the first detection current to generate the current detection result.

[0018] In order to achieve the above-mentioned objectives, the present invention also provides a load switch, which includes the adaptive wide-range detection circuit described in any one of the above items, and the load switch also includes a switch array and an adaptive drive circuit, the switch array includes at least two first switch units; the first end of each first switch unit receives a corresponding input voltage, the second end provides an output voltage, and the control end is coupled to the adaptive drive circuit; the adaptive drive circuit is configured to generate a control signal based on the received control instruction, the power supply voltage, the output voltage, and the input voltage of each first switch unit; and is also used to adaptively drive one of the first switch units to turn on and the other first switch units to turn off, and drive the adaptive wide-range detection circuit to adaptively generate a current detection result.

[0019] Optionally, each first switch unit includes a first CMOS switch tube and a dynamic bias circuit; the first CMOS switch tube includes a first PMOS tube and a first NMOS tube, and the dynamic bias circuit includes a PMOS bias circuit and an NMOS bias circuit; when the first switch unit is turned on, the PMOS bias circuit is configured to bias the substrate voltage of the first PMOS tube to the input voltage of the corresponding first CMOS switch tube and bias the gate voltage of the first PMOS tube to a low level; and the NMOS bias circuit is configured to bias the substrate voltage of the first NMOS tube to the output voltage and bias the gate voltage of the first NMOS tube to a driving voltage; when the first switch unit is turned off, the PMOS bias circuit is configured to bias both the substrate voltage and the gate voltage of the first PMOS tube to the driving voltage, and the NMOS bias circuit is configured to bias both the substrate voltage and the gate voltage of the first NMOS tube to a low level.

[0020] Optionally, the adaptive driving circuit includes a driving voltage generation and selection module, an interface conversion module and a driving buffer module; the input end of the driving voltage generation and selection module receives the output voltage and the input voltages of all the first switch units, and the output end of the driving voltage generation and selection module is coupled to the first input end of the interface conversion module, the first input end of the driving buffer module and the first current detection module of the adaptive wide-range detection circuit; the output end of the interface conversion module is coupled to the second input end of the driving buffer module and the signal detection module of the adaptive wide-range detection circuit; the output end of the driving buffer module is coupled to the control end of each of the first switch units in the switch array; the driving voltage generation and selection module is configured to use the maximum value among the output voltage, all the input voltages and the supply voltage as the driving voltage; the interface conversion module is configured to generate the control signal according to the control instruction, and the control signal includes information of the first switch unit to be turned on in the switch array; the driving buffer module is configured to provide the driving voltage for the first switch unit to be turned on.

[0021] Optionally, the driving voltage generation selection module includes a charge pump unit and a driving voltage generation unit; the input end of the charge pump unit receives the control signal, and the control signal includes the working mode; the output end of the charge pump unit is coupled to the driving voltage generation unit; the charge pump unit is configured to generate a charge pump voltage according to the working mode and the supply voltage, and the charge pump voltage is the maximum value of the output voltage and all the input voltages; the driving voltage generation unit is configured to generate the driving voltage according to the output voltage, all the input voltages and the charge pump voltage.

[0022] Optionally, the charge pump unit includes a clock circuit and a charge pump; the clock circuit is configured to drive the charge pump to operate in low power mode when the operating mode is low power mode, and to drive the charge pump to operate in normal operating mode when the operating mode is normal mode; the charge pump is configured to generate the charge pump voltage based on the received power supply voltage.

[0023] Optionally, the driving voltage generating unit includes a clamping circuit and a pull-up circuit, the first end of the pull-up circuit receives the output voltage, all the input voltages and the charge pump voltage, the second end of the pull-up circuit is coupled to the output end of the pull-up circuit to output the driving voltage, and the input end of the pull-up circuit is used to receive the charge pump voltage; the clamping circuit is configured to clamp the driving voltage when the power supply voltage fails; the pull-up circuit is configured to pull up the driving voltage to the charge pump voltage when the power supply voltage is normally supplied.

[0024] In order to achieve the above object, the present invention further provides a chip on which any one of the above-mentioned adaptive wide-range detection circuits or the above-mentioned load switch is integrated.

[0025] In order to achieve the above object, the present invention further provides an electronic device, which includes any of the above-mentioned adaptive wide-range detection circuits, or any of the above-mentioned load switches, or the above-mentioned chip.

[0026] Compared with the prior art, the adaptive wide-range detection circuit, load switch, chip and electronic device provided by the present invention have the following advantages: the adaptive wide-range detection circuit provided by the present invention can not only automatically adjust and adaptively realize the detection of a wide current, but also respond quickly and have high reliability; the load switch provided by the present invention has no requirements on the range and timing of the transmitted power supply voltage signal and has strong applicability; and can realize arbitrary multi-channel signal selection and has strong scalability; further, the load switch provided by the present invention realizes the decoupling of the driving voltage and the input voltage, there is no leakage of the power supply voltage signal to be transmitted, and the gate avoids being subjected to high voltage, and has high reliability.

[0027] Furthermore, since the load switch, chip and electronic device provided by the present invention belong to the same inventive concept as the adaptive wide-range detection circuit provided by the present invention, the load switch, chip and electronic device provided by the present invention at least have all the advantages of the adaptive wide-range detection circuit provided by the present invention. For details about the beneficial effects of the load switch, chip and electronic device provided by the present invention, please refer to the above description of the beneficial effects of the adaptive wide-range detection circuit provided by the present invention, and no further details will be given here. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 The figure is a schematic diagram of the architecture of a load switch (taking the switch tube as an NMOS tube as an example) in the prior art.

[0029] Figure 2 A schematic diagram of one application scenario of the adaptive wide-range detection circuit provided by the present invention.

[0030] Figure 3 This is a structural block diagram of an adaptive wide-range detection circuit provided in Example 1 of the present invention.

[0031] Figure 4 This is a topological structure diagram of a specific example of the output voltage judgment module of the adaptive wide-range detection circuit provided in the first embodiment of the present invention.

[0032] Figure 5 This is a topological structure diagram of a detection unit, a first current detection module, and a second current detection module of an adaptive wide-range detection circuit provided in a first implementation manner of the first embodiment of the present invention.

[0033] Figure 6 This is a working principle diagram of the first current detection module of the adaptive wide-range detection circuit provided in the second implementation manner of Example 1 of the present invention.

[0034] Figure 7a This is a working principle diagram of the second current detection module of the adaptive wide-range detection circuit provided in the second implementation manner of Example 1 of the present invention.

[0035] Figure 7b This is a working principle diagram of the second current detection module of the adaptive wide-range detection circuit provided in the second implementation manner of Example 1 of the present invention.

[0036] Figure 8 This is a topological structure diagram of a signal processing module of the adaptive wide-range detection circuit provided in the first embodiment of the present invention in one specific example.

[0037] Figure 9 This is a structural block diagram of a specific example of a load switch provided in one implementation manner of the second embodiment of the present invention.

[0038] Figure 10 This is a topological structure diagram of the first switch unit of the load switch provided in one implementation manner of the second embodiment of the present invention.

[0039] Figure 11 for Figure 10 Schematic diagram of the gate states of the first PMOS tube and the first NMOS tube when the first switch unit is a CMOS switch tube as an example.

[0040] Figure 12 for Figure 10 Schematic diagram of the gate states of the first PMOS tube and the first NMOS tube when the first switch unit is a CMOS switch tube as an example.

[0041] Figure 13 This is a structural block diagram of a drive voltage generation and selection module for a load switch provided in the second embodiment of the present invention.

[0042] Figure 14 This is a schematic diagram of a topological structure of a specific example of a drive voltage generation and selection module for a load switch provided in the second embodiment of the present invention. DETAILED DESCRIPTION

[0043] The following, in conjunction with the accompanying drawings, further details the adaptive wide-range detection circuit, load switch, chip, and electronic device proposed by the present invention. The following description will further clarify the advantages and features of the present invention. It should be noted that the drawings are simplified and not to exact scale, and are intended solely to facilitate and clearly illustrate the purpose of the embodiments of the present invention. To make the purposes, features, and advantages of the present invention more readily apparent, please refer to the accompanying drawings. It should be noted that the structures, proportions, and sizes illustrated in the drawings herein are intended solely to facilitate understanding and reading by those skilled in the art, and are not intended to limit the implementation of the present invention. Any structural modifications, changes in proportions, or adjustments in size, provided they produce the same or similar effects and achieve the same objectives, should still fall within the scope of the technical content disclosed herein. The specific design features of the present invention disclosed herein, including, for example, specific dimensions, orientations, positions, and shapes, will be determined in part by the specific application and use environment. Furthermore, in the embodiments described below, the same reference numerals may be used across different drawings to represent the same parts or parts with the same functions, and their repeated descriptions may be omitted. In this specification, like reference numerals and letters are used to refer to like items, and thus, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0044] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element. The singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features.

[0045] It should be understood that when an element is referred to as being "connected," "connected to," or "coupled to" another element, it can be directly connected to the other element or there can be intervening elements. In contrast, when an element is referred to as being "directly connected" or "directly connected to" another element, there are no intervening elements.

[0046] The core idea of ​​the present invention is to provide an adaptive wide-range detection circuit, a load switch, a chip and an electronic device. The present invention provides an adaptive wide-range detection circuit, a load switch, a chip and an electronic device. The adaptive wide-range detection circuit provided by the present invention can not only automatically adjust and adaptively realize the detection of a wide current, but also respond quickly and have high reliability; the load switch provided by the present invention has no requirements on the range and timing of the transmitted power supply voltage signal and has strong applicability; and can realize arbitrary multi-channel signal selection and has strong scalability; further, the load switch provided by the present invention realizes the decoupling of the driving voltage and the input voltage, there is no leakage of the power supply voltage signal to be transmitted, and the gate avoids being subjected to high voltage, and has high reliability.

[0047] It should be noted that the adaptive wide-range detection circuit provided by the present invention can be used in the load switch and electronic equipment provided by the present invention, and the adaptive wide-range detection circuit, load switch and chip provided by the present invention can be used in the electronic equipment provided by the present invention. It should be noted that those skilled in the art should be able to understand that the present invention does not impose any limitation on the electronic equipment. For example, the electronic equipment includes but is not limited to video products such as televisions, video recorders and digital cameras, communication products such as mobile phones, communication switching equipment and communication transmission equipment, learning assistance products such as translators, learning machines and electronic dictionaries, and medical equipment products such as medical imaging equipment and medical detection equipment, etc., which are not listed one by one.

[0048] In order to realize the above idea, the present invention provides an adaptive wide range detection circuit for load switch. For example, see Figure 2 and Figure 3 ,in, Figure 2 A schematic diagram of one application scenario of the adaptive wide-range detection circuit provided by the present invention; Figure 3 This is a structural block diagram of the adaptive wide range detection circuit provided by the first embodiment of the present invention. Figure 2 (For ease of understanding, Figure 2 The adaptive wide range detection circuit in FIG. 1 shows only the signal detection module 120 ) and Figure 3 It can be seen that the load switch includes at least one first switch unit 210, and the adaptive wide-range detection circuit 100 includes an output voltage judgment module 110, a signal detection module 120, a first current detection module 131, a second current detection module 132 and a signal processing module 140; wherein, the signal detection module 120 includes a detection unit 121 corresponding to each of the first switch units 210, and the impedance of the detection unit 121 is proportional to the impedance of the corresponding first switch unit 210; the output terminal of the output voltage judgment module 110 ( Figure 3 The output end of the signal detection module 120 is coupled to the input end of the first current detection module 131 and the input end of the second current detection module 132; the output end of the first current detection module 131 and the output end of the second current detection module 132 are coupled to the input end of the signal processing module 140; the signal detection module 120 receives the control signal SW_sel <n:1>, the input voltages IN_1, IN_2, ..., IN_n and the output voltage Vout of the load switch, the output voltage determination module 110 receives the output voltage Vout (in order to facilitate understanding of the drawings, the OUT mark is used in the drawings of the specification). Further, the adaptive wide range detection circuit 100 is configured to detect the load switch according to the control signal SW_sel <n:1>, the input voltages IN_1, IN_2, ..., IN_n and the output voltage Vout adaptively drive one of the first current detection module 131 and the second current detection module 132 to work and the other not to work to generate a current detection result (for ease of understanding the drawings, the description uses the label Isen in the drawings).

[0049] The adaptive wide-range detection circuit 100 provided by the present invention includes a detection unit 121 corresponding to the first switch unit 210 one by one, and the impedance of the detection unit 121 is proportional to the impedance of the first switch unit 210 corresponding thereto, thereby being able to detect the current flowing through the first switch unit 210 according to the proportional relationship, thereby improving the detection accuracy of the adaptive wide-range detection circuit 100 provided by the present invention; further, the adaptive wide-range detection circuit 100 can detect the current flowing through the first switch unit 210 according to the control signal SW_sel <n:1>The input voltages IN_1, IN_2, ..., IN_n and the output voltage Vout adaptively drive one of the first current detection module 131 and the second current detection module 132 to operate and the other to deactivate to generate a current detection result Isen. This not only enables automatic adjustment and adaptive detection of a wide current range, but also provides rapid response and high reliability. Furthermore, the adaptive wide-range detection circuit 100 provided by the present invention includes an output voltage determination module 110, a signal detection module 120, a first current detection module 131, a second current detection module 132, and a signal processing module 140. This modular design also has the advantages of clear logic and ease of implementation.

[0050] It should be noted that those skilled in the art should be able to understand that the present invention does not impose any limitation on the number of the first switch units 210, and the number of the first switch units 210 can be 1, 2 or more. Figure 2 In the figure, n represents the number of the first switch units 210. Correspondingly, the signal detection module 120 has n corresponding detection units 121. It should be understood that although a one-to-one correspondence between detection units 121 and first switch units 210 is used herein as an example, this is obviously merely an exemplary description of a preferred embodiment and not a limitation of the present invention. In other embodiments, one detection unit 121 may correspond to two, three, or more first switch units 210.

[0051] For example, in some exemplary embodiments, the output voltage judgment module 110 is configured to drive the first current detection module 131 to work and control the second current detection module 132 to not work when the output voltage Vout is less than a preset voltage; when the output voltage Vout is greater than or equal to the preset voltage, drive the second current detection module 132 to work and control the first current detection module 131 to not work; the signal detection module 120 is configured to receive the control signal SW_sel <n:1>, driving the detection unit 121 corresponding to the currently working first switching unit 210 to generate an input detection voltage and an output detection voltage; the first current detection module 131 is configured to generate a first detection current Isen1 according to the input detection voltage and the output detection voltage; the second current detection module 132 is configured to generate a second detection current Isen2 according to the input detection voltage and the output detection voltage; the signal processing module 140 is configured to generate the current detection result Isen according to the first detection current Isen1 and the second detection current Isen2.

[0052] It should be noted that those skilled in the art will appreciate that the present invention does not impose any limitation on the specific value of the preset voltage. For example, in some embodiments, the preset voltage may be 2.5V. Accordingly, when the output voltage Vout is lower than 2.5V, the output voltage determination module 110 drives the first current detection module 131 to operate to generate the first detection current Isen1 and disables the second current detection module 132. When the output voltage Vout is higher than or equal to 2.5V, the output voltage determination module 110 drives the first current detection module 131 to operate to disable the first current detection module 131 and enables the second current detection module 132 to operate to generate the second detection current Isen2.

[0053] For example, see Figure 4 , Figure 4 This is a topological diagram of a specific example of the output voltage judgment module of the adaptive wide range detection circuit provided in the first embodiment of the present invention. Figure 3 as well as Figure 4 It can be seen that in some exemplary embodiments, the output voltage determination module 110 includes a voltage divider circuit 111 and a comparator COMP. The first terminal of the voltage divider circuit 111 receives the output voltage Vout, the second terminal of the voltage divider circuit 111 is grounded, the voltage dividing point of the voltage divider circuit 111 is coupled to the positive input terminal of the comparator COMP, and the negative input terminal of the comparator COMP receives the reference voltage V ref (Preferably, the reference voltage V ref The value of the comparator COMP is equal to the value of the preset voltage), and the output terminal of the comparator COMP is coupled to the control terminal of the first current detection module 131 and the control terminal of the second current detection module 132. Therefore, the output voltage determination module 110 of the adaptive wide-range detection circuit 100 provided by the present invention adopts the design method of the voltage divider circuit 111 and the comparator COMP, which has the advantages of clear logic, low cost, and easy implementation.

[0054] For example, please see Figure 4 ,like Figure 4 As shown, in some exemplary embodiments, the voltage divider circuit 111 includes a first resistor R1 and a second resistor R2 connected in series. Thus, the output voltage Vout is divided by the first resistor R1 and the second resistor R2 to generate a divided voltage Vdiv. The comparator COMP generates a determination signal SEL for the output voltage Vout based on a comparison result between the divided voltage Vdiv and a reference voltage Vref to adaptively select whether the first current detection module 131 or the second current detection module 132 is to be operated.

[0055] For example, see Figure 5 , Figure 5 This is a topological diagram of a specific example of a detection unit of the adaptive wide range detection circuit provided in the first embodiment of this embodiment. Figure 5 It can be seen that in some exemplary embodiments, the detection unit 121 includes a second switch unit SW2 and a third switch unit SW3, a first end of the second switch unit SW2 is coupled to the first end of the first switch unit 210 corresponding thereto to receive the input voltage, a first end of the third switch unit SW3 is coupled to the second end of the first switch unit 210 corresponding thereto to receive the output voltage, a second end of the second switch unit SW2, a first end of the first current detection module 131, and a first end of the second current detection module 132 are coupled to a first node A, a second end of the third switch unit SW3, a second end of the first current detection module 131, and a second end of the second current detection module 132 are coupled to a second node B; a control end of the second switch unit SW2 and a control end of the third switch unit SW3 receive the control signal SW_sel <n:1>.

[0056] Therefore, by coupling the second switch unit SW2 between the first end of the corresponding first switch unit 210 (to receive the input voltage) and the first node A (i.e., the common point of the first end of the first current detection module 131 and the first end of the second current detection module 132), the collected input detection voltage can be sent to the first current detection module 131 and the second current detection module 132. By coupling the third switch unit SW3 between the second end of the corresponding first switch unit 210 (to receive the output voltage Vout) and the second node B (i.e., the common point of the second end of the first current detection module 131 and the second end of the second current detection module 132), the collected output detection voltage can be sent to the first current detection module 131 and the second current detection module 132. This lays a good foundation for the first current detection module 131 to generate the first detection current Isen1 and the second current detection module 132 to generate the second detection current Isen2 to adaptively perform current detection on the switching load.

[0057] For example, please see Figure 5 ,like Figure 5 As shown, in some exemplary embodiments, the second switch unit SW2 includes a second CMOS switch tube, the third switch unit SW3 includes a third CMOS switch tube, and the impedance of the second switch unit SW2 is equal to the impedance of the third switch unit SW3. Therefore, using CMOS switches to implement the second switch unit SW2 and the third switch unit SW3 can further improve the detection accuracy and reliability of the present invention based on the advantages of CMOS switches such as low static power consumption, high noise tolerance, and a wide power supply voltage range.

[0058] It should be noted that those skilled in the art will appreciate that using CMOS switches to implement the second switch unit SW2 and the third switch unit SW3 is merely an example of a preferred embodiment and does not constitute a limitation of the present invention. The present invention does not impose any specific limitations on the specific implementation of the second switch unit SW2 and the third switch unit SW3. For example, in other embodiments, the second switch unit SW2 and / or the third switch unit SW3 may also be implemented using methods including, but not limited to, BiCMOS (bipolar complementary metal oxide semiconductor) and BCD (bipolar complementary drive).

[0059] For example, please see Figure 5 ,like Figure 5 As shown, in some exemplary embodiments, the second switch unit SW2 (i.e., the second CMOS switch tube) includes a second PMOS tube MP2 and a second NMOS tube MN2, and the third switch unit SW3 (i.e., the third CMOS switch tube) includes a third PMOS tube MP3 and a third NMOS tube MN3, and the second PMOS tube MP2, the second NMOS tube MN2, the third PMOS tube MP3, and the third NMOS tube MN3 have the same size.

[0060] As mentioned above, since the impedance of the detection unit 121 is proportional to the impedance of the corresponding first switch unit 210, and the second PMOS transistor MP2, the second NMOS transistor MN2, the third PMOS transistor MP3, and the third NMOS transistor MN3 have the same size, assuming that the proportional relationship is 1 / K, the impedance of the second switch unit SW2, the impedance of the third switch unit SW3, and the impedance of the first switch unit 210 satisfy the following formula (1).

[0061] (1) Among them, R on_sw1 is the impedance of the first switch unit 210, R on_sw2 is the impedance of the second switch unit SW2, R on_sw3 is the impedance of the third switch unit SW3 , and K is the size ratio of the second switch unit SW2 and the third switch unit SW3 to the first switch unit 210 .

[0062] To facilitate understanding of the present invention, the following <First Implementation> and <Second Implementation> illustrate preferred implementations of the first current detection module 131 and the second current detection module 132 of the adaptive wide-range detection circuit 100 provided by the present invention. It should be understood that the present invention does not impose any limitations on the specific implementations of the first current detection module 131 and the second current detection module 132.

[0063] <First Implementation Method> For example, please combine Figure 3 and Figure 4 See also Figure 5 ,from Figure 5 It can be seen that the first current detection module 131 includes a first input-side mirror circuit 1311, a first output-side mirror circuit 1312, and a first inverter 133, and the second current detection module 132 includes a second input-side mirror circuit 1321 and a second output-side mirror circuit 1322. Furthermore, the first end of the first input-side mirror circuit 1311 and the first end of the first output-side mirror circuit 1312 are used to receive the operating voltage ( Figure 5 , a first terminal of the second input-side mirror circuit 1321 and a first terminal of the second output-side mirror circuit 1322 are grounded; a second terminal of the first input-side mirror circuit 1311, a second terminal of the second input-side mirror circuit 1321, and a second terminal of the second output-side mirror circuit 1322 are coupled to the first node A, a third terminal of the first input-side mirror circuit 1311, a third terminal of the second input-side mirror circuit 1321, and a second terminal of the first output-side mirror circuit 1312 are coupled to the second node B; a fourth terminal of the first input-side mirror circuit 1311 and a third terminal of the first output-side mirror circuit 1312 are coupled to a third node C; a fourth terminal of the first output-side mirror circuit 1312 is coupled to the first input terminal of the signal processing module 140; a fourth terminal of the second input-side mirror circuit 1321 and a third terminal of the second output-side mirror circuit 1322 are coupled to a fourth node D, and a fourth terminal of the second output-side mirror circuit 1322 is coupled to the second input terminal of the signal processing module 140; an input terminal of the first inverter 133 ( Figure 5 The control terminal of the second input side mirror circuit 1321 ( Figure 5 The judgment signal SEL is used as an example) and the control terminal of the second output side mirror circuit 1322 ( Figure 5 The output terminal (indicated by the judgment signal SEL) of the output voltage judgment module 110 is coupled to the output terminal ( Figure 5 The control terminal of the first input side mirror circuit 1311 ( Figure 5 The inverted judgment signal SELB of the judgment signal SEL is used as an example) and the control terminal of the first output side mirror circuit 1312 ( Figure 5 The output terminal (shown as the inverse judgment signal SELB of the judgment signal SEL) of the first inverter 133 is coupled to the output terminal ( Figure 5 (illustrated by the inverted judgment signal SELB of the judgment signal SEL). Furthermore, the first current detection module 131 is configured to, during operation, use the clamping function of the first input-side mirror circuit 1311 to make the voltages of the first node A and the second node B the same, and to output the first detection current Isen1 through the mirroring function of the first output-side mirror circuit 1312. The second current detection module 132 is configured to, during operation, use the clamping function of the second input-side mirror circuit 1321 to make the voltages of the first node A and the second node B the same, and to output the second detection current Isen2 through the mirroring function of the second output-side mirror circuit 1322.

[0064] Thus, when the first current detection module 131 is in operation, the clamping function of the first input-side mirror circuit 1311 ensures that the voltages at the first node A and the second node B are the same. This allows the first detection current Isen1 flowing through the first output-side mirror circuit 1312 to be proportional to the current flowing through the first switch unit 210. The first output-side mirror circuit 1312 can output a stable first detection current Isen1, thereby improving the accuracy and reliability of current detection. Similarly, when the second current detection module 132 is in operation, the clamping function of the second input-side mirror circuit 1321 ensures that the voltages at the first node A and the second node B are the same. This allows the second detection current Isen2 flowing through the second output-side mirror circuit 1322 to be proportional to the current flowing through the first switch unit 210. The second output-side mirror circuit 1322 can output a stable second detection current Isen2, thereby improving the accuracy and reliability of current detection. Furthermore, the first current detection module 131 and the second current detection module 132 can adaptively implement current detection over a wide range.

[0065] For example, please see Figure 5 ,like Figure 5 As shown, in some exemplary embodiments, the first input-side mirror circuit 1311 includes a first current source CS1, a second current source CS2, and a first current mirror CM1; the input end of the first current source CS1 and the input end of the second current source CS2 receive the working voltage ( Figure 5 (illustrated by the driving voltage VMAX in FIG. 1 ), the output terminal of the first current source CS1 and the image-side power supply voltage terminal of the first current mirror CM1 are coupled to the third node C, the output terminal of the second current source CS2 is coupled to the source-side power supply voltage terminal of the first current mirror CM1, the output terminal of the first current mirror CM1 is coupled to the first node A, and the input terminal of the first current mirror CM1 is coupled to the second node B. Similarly, the second input-side mirror circuit 1321 includes a second current mirror CM2, a third current source CS3, and a fourth current source CS4; the source-side power supply voltage terminal of the second current mirror CM2 is coupled to the second node B, the image-side power supply voltage terminal of the second current mirror CM2 is coupled to the first node A, the output terminal of the second current mirror CM2 and the input terminal of the third current source CS3 are coupled to a fourth node D, the input terminal of the second current mirror CM2 is coupled to the input terminal of the fourth current source CS4, and the output terminals of the third current source CS3 and the fourth current source CS4 are coupled to ground. Furthermore, the input end of the first inverter 133, the control end of the third current source CS3, and the control end of the fourth current source CS4 are coupled to the output end of the output voltage judgment module 110, and the control end of the first current source CS1 and the control end of the second current source CS2 are coupled to the output end of the first inverter 133.

[0066] Therefore, the present invention can further improve the detection accuracy, stability and reliability of the adaptive wide-range detection circuit 100 provided by the present invention by adopting a current source and a current mirror to implement the design of the first input side mirror circuit 1311 and the second input side mirror circuit 1321, thereby making the present invention more applicable.

[0067] For example, Figure 5 As shown, in some exemplary embodiments, the first current mirror CM1 includes a fourth NMOS transistor MN4 and a fifth NMOS transistor MN5 with their gates connected in common. The drain and gate of the fourth NMOS transistor MN4 are short-circuited, the drain of the fourth NMOS transistor MN4 is coupled to the output terminal of the second current source CS2, the source of the fourth NMOS transistor MN4 is coupled to the second node B, the drain of the fifth NMOS transistor MN5 is coupled to the third node C, and the source of the fifth NMOS transistor MN5 is coupled to the first node A. The second current mirror CM2 includes a fourth PMOS transistor MP4 and a fifth PMOS transistor MP5 with their gates connected in common. The drain and gate of the fourth PMOS transistor MP4 are short-circuited, the source of the fourth PMOS transistor MP4 is coupled to the second node B, the drain of the fourth PMOS transistor MP4 is coupled to the input terminal of the fourth current source CS4, the source of the fifth PMOS transistor MP5 is coupled to the first node A, and the source of the fifth PMOS transistor MP5 is coupled to the fourth node D.

[0068] It should be noted that those skilled in the art should be able to understand that Figure 5 The use of NMOS transistors to implement the first current mirror CM1 and PMOS transistors to implement the second current mirror CM2 are merely exemplary of preferred embodiments and are not intended to limit the present invention. For more detailed information on current mirror implementations, please refer to relevant technical adaptations known to those skilled in the art. Due to space limitations, this article will not elaborate further.

[0069] For example, please see Figure 5 ,like Figure 5 As shown, in some exemplary embodiments, the first output side mirror circuit 1312 includes a third current mirror CM3, a first control switch (exemplarily, as Figure 5 The sixth NMOS transistor MN6 is used as an example) and the second control switch S1, the power supply voltage terminal of the third current mirror CM3 receives the working voltage ( Figure 5 The input terminal of the third current mirror CM3 is coupled to the first terminal of the first control switch, the output terminal of the third current mirror CM3 is coupled to the first terminal of the second control switch S1, the second terminal of the first control switch is coupled to the second node B, the control terminal of the first control switch is coupled to the third node C, and the second terminal of the second control switch S1 is coupled to the first input terminal of the signal processing module 140. Similarly, the second output-side mirror circuit 1322 includes a third control switch (exemplarily, as Figure 5 The fourth current mirror CM4 and the fourth control switch S2 are connected. The first terminal of the third control switch is coupled to the first node A, the second terminal of the third control switch is coupled to the input terminal of the fourth current mirror CM4, the control terminal of the third control switch is coupled to the fourth node D, the output terminal of the fourth current mirror CM4 is coupled to the first terminal of the fourth control switch S2, the second terminal of the fourth control switch S2 is coupled to the second input terminal of the signal processing module 140, and the ground terminal of the fourth current mirror CM4 is grounded. Furthermore, the input terminal of the first inverter 133 ( Figure 5 The output terminal (indicated by the judgment signal SEL) of the output voltage judgment module 110 is coupled to the output terminal ( Figure 5 The output terminal of the first inverter 133 ( Figure 5 The inverted judgment signal SELB of the judgment signal SEL is used as an example) and the control end of the second control switch S1.

[0070] Therefore, by controlling the second control switch S1 to be turned on, the first current detection module 131 can be controlled to work, and by controlling the fourth control switch S2 to be turned off, the second current detection module 132 can be controlled to not work. Also, by controlling the second control switch S1 to be turned off, the first current detection module 131 can be controlled to not work, and by controlling the fourth control switch S2 to be turned on, the second current detection module 132 can be controlled to work, thereby adaptively achieving wide-range current detection.

[0071] Exemplarily, the third current mirror CM3 includes a seventh PMOS transistor MP7 and an eighth PMOS transistor MP8 with gates connected in common, the drain and gate of the seventh PMOS transistor MP7 are short-circuited, the source of the seventh PMOS transistor MP7 and the source of the eighth MOS transistor receive the supply voltage, and the drain of the seventh PMOS transistor MP7 is coupled to the first control switch (exemplarily, as Figure 5 The drain of the eighth PMOS transistor MP8 is coupled to the first end of the second control switch S1. Similarly, the fourth current mirror CM4 includes a seventh NMOS transistor MN7 and an eighth NMOS transistor MN8 with their gates connected in common. The drain and gate of the seventh NMOS transistor MN7 are short-circuited, and the drain of the seventh NMOS transistor MN7 is coupled to the third control switch (for example, Figure 5 The drain of the eighth NMOS transistor MN8 is coupled to the first end of the fourth control switch S2, and the source of the seventh NMOS transistor MN7 and the source of the eighth NMOS transistor MN8 are coupled to the ground.

[0072] <Second Implementation Method> For example, please combine Figure 3 and Figure 4 See also Figure 6 , Figure 6 This is a topological diagram of a specific example of a detection unit of the adaptive wide range detection circuit provided in this embodiment. Figure 5 and Figure 6 It can be seen that the difference between the first current detection module 131 and the second current detection module 132 of the adaptive wide range detection circuit 100 provided in this embodiment is that the first current detection module 131 of the adaptive wide range detection circuit 100 provided in this embodiment includes a first operational amplifier AV1, a fifth control switch (exemplarily, Figure 6 The ninth NMOS transistor MN9 is used as an example), a fifth current mirror CM5, a sixth control switch S3 and a second inverter 134; the second current detection module 132 includes a second operational amplifier AV2, a seventh control switch (exemplarily, Figure 6 The ninth PMOS transistor MP9 is used as an example), the sixth current mirror CM6 and the eighth control switch S4. Further, the positive phase input terminal of the first operational amplifier AV1, the negative phase input terminal of the second operational amplifier AV2 and the seventh control switch (exemplarily, Figure 6 The first end of the ninth PMOS transistor MP9 is coupled to the first node A, the negative phase input end of the first operational amplifier AV1, the positive phase input end of the second operational amplifier AV2, and the fifth control switch (exemplarily, Figure 6 The first end of the ninth NMOS transistor MN9 is coupled to the second node B; the fifth control switch (exemplarily, Figure 6 The control end of the ninth NMOS transistor MN9 is coupled to the output end of the first operational amplifier AV1, and the fifth control switch (exemplarily, Figure 6 The second end of the ninth NMOS transistor MN9 is coupled to the input end of the fifth current mirror CM5, the output end of the fifth current mirror CM5 is coupled to the first end of the sixth control switch S3, and the second end of the sixth control switch S3 is coupled to the first input end ( Figure 6 The power supply voltage terminal of the fifth current mirror CM5 receives the operating voltage; the seventh control switch (exemplarily, Figure 6 The control end of the ninth PMOS transistor MP9 is coupled to the output end of the second operational amplifier AV2, and the seventh control switch (exemplarily, Figure 6 The second end of the ninth PMOS transistor MP9 is coupled to the input end of the sixth current mirror CM6, the output end of the sixth current mirror CM6 is coupled to the first end of the eighth control switch S4, and the first end of the eighth control switch S4 is coupled to the second input end ( Figure 6 The ground terminal of the sixth current mirror CM6 is coupled to the ground (indicated by Isen2); the output terminal of the output voltage judgment module 110 is coupled to the input terminal of the second inverter 134, and the output terminal of the second inverter 134 is coupled to the control terminal of the sixth control switch S3 and the control terminal of the first operational amplifier AV1.

[0073] Therefore, by controlling the sixth control switch S3 to be turned on, the first current detection module 131 can be controlled to work, and by controlling the eighth control switch S4 to be turned off, the second current detection module 132 can be controlled to not work. Also, by controlling the sixth control switch S3 to be turned off, the first current detection module 131 can be controlled to not work, and by controlling the eighth control switch S4 to be turned on, the second current detection module 132 can be controlled to work, thereby adaptively achieving wide-range current detection.

[0074] For more detailed information about the fifth current mirror CM5 and the sixth current mirror CM6, please refer to the above description of the third current mirror CM3 and the fourth current mirror CM4 for adaptive understanding. In order to avoid redundancy, they will not be elaborated here.

[0075] Next, taking the second embodiment as an example, the working principles of the first current detection module 131 and the second current detection module 132 of the adaptive wide-range detection circuit 100 provided by the present invention are briefly described as follows: For example, when the output voltage Vout is less than a preset voltage (such as 2.5V), the judgment signal SEL=0, the first current detection module 131 is enabled, and the second current detection module 132 stops working. Figure 6 See also Figure 7a , Figure 7a This is a working principle diagram of the first current detection module of the adaptive wide range detection circuit provided in this embodiment. Figure 7a It can be seen that for the first operational amplifier AV1, according to the virtual short principle, the voltage V A , the voltage of the second node B V B And the input voltage V in Satisfies the following formula (2).

[0076] (2) Then flows through the fifth control switch (exemplarily, Figure 5 and Figure 6 The current of the ninth NMOS transistor MN9 (taking it as an example) satisfies the following formula (3).

[0077] (3) In formula (3), I MN9 is flowing through the fifth control switch (exemplarily, Figure 5 and Figure 6 The current of the ninth NMOS tube is used as an example, V B is the voltage of the second node B, V out is the output voltage, R on_SW3 is the impedance of the third switch unit SW3, I power is the current flowing through the first switch unit 210, R on_SW1 is the impedance of the first switch unit 210, and K is the proportional coefficient.

[0078] Furthermore, the tenth PMOS transistor MP10 and the eleventh PMOS transistor MP11 form the fifth current mirror CM5. Assuming that the tenth PMOS transistor MP10 and the eleventh PMOS transistor MP11 have the same size, the first detection current Isen1 is equal to the current I flowing through the first switch unit 210. power The following formula (4) is satisfied.

[0079] (4) For example, when the output voltage Vout is greater than a preset voltage (such as 2.5V), the judgment signal SEL=1, the second current detection module 132 is enabled, and the first current detection module 131 stops working. Figure 6 See also Figure 7b , Figure 7b This is a working principle diagram of the second current detection module of the adaptive wide range detection circuit provided in this embodiment. Figure 7b It can be seen that when current flows through the input port and the output port, the input voltage V in , the output voltage V out , the current I flowing through the first switch unit 210 power And its impedance R on_sw1 The following relationship (5) is satisfied.

[0080] (5) For the second operational amplifier AV2, according to the virtual short principle, the voltage V A , the voltage of the second node B V B And the input voltage V in Satisfies the following formula (6).

[0081] (6) Then flows through the seventh and fifth control switches (exemplarily, Figure 5 and Figure 7b The current of the ninth PMOS transistor MP9 (taken as an example) satisfies the following formula (7).

[0082] (7) In formula (7), I MP9 is flowing through the seventh control switch (exemplarily, Figure 5 7 ) using the ninth PMOS transistor MP9 as an example, V A is the voltage of the first node A, V in is the input voltage, R on_SW2 is the impedance of the second switch unit SW2, I power is the current flowing through the first switch unit 210, R on_SW1 is the impedance of the first switch unit 210, and K is the proportional coefficient.

[0083] Furthermore, the tenth NMOS transistor MN10 and the eleventh NMOS transistor MN11 form the sixth current mirror CM6. Assuming that the tenth NMOS transistor MN10 and the eleventh NMOS transistor MN11 have the same size, the second detection current Isen2 is equal to the current I flowing through the first switch unit 210. power The following formula (8) is satisfied.

[0084] (8) It can be seen that the first detection current Isen1 and the second detection current Isen2 are related to the current I flowing through the first switch unit 210. power The ratio of is the same as that of , and Isen can be obtained by adding the detection currents, as shown in the following example.

[0085]

[0086] As mentioned above, the <first embodiment> and <second embodiment> mentioned above are merely illustrative descriptions of preferred embodiments and are not limitations of the present invention. In addition to being basic current mirrors, the first current mirror CM1, the second current mirror CM2, ..., and the seventh current mirror CM7 described below may also be implemented according to actual needs using methods including but not limited to Wilson current mirrors, Widlar current sources, and Cascode current mirrors.

[0087] For example, in some of the exemplary embodiments, see Figure 8 , Figure 8 The topological structure diagram of the signal processing module of the adaptive wide range detection circuit provided in this embodiment in one specific example. Figure 8 As can be seen, the signal processing module 140 includes a seventh current mirror CM7, a power supply voltage terminal of the seventh current mirror CM7 receiving an operating voltage, an input terminal of the seventh current mirror CM7 coupled to the output terminal of the second current detection module 132, and an output terminal of the seventh current mirror CM7 connected in parallel to the output terminal of the first current detection module 131; the seventh current mirror CM7 is configured to add a mirror current of the second detection current Isen2 to the first detection current Isen1 to generate the current detection result Isen. Therefore, using a current mirror to implement the signal processing module 140 can further improve the detection accuracy, stability, and reliability of the adaptive wide-range detection circuit 100 provided by the present invention, thereby making the present invention more applicable.

[0088] Example 2 This embodiment provides a load switch. For example, see Figure 2 and Figure 9 , Figure 9 This is a structural block diagram of a specific example of a load switch provided in one embodiment of the present invention. Figure 9 It can be seen that the switch load provided in this embodiment includes the adaptive wide-range detection circuit 100 described in any one of the first embodiments, and the load switch further includes a switch array 200 and an adaptive drive circuit 300. The switch array 200 includes at least two first switch units 210; each first switch unit 210 has a first terminal that receives a corresponding input voltage IN_1, IN_2, ..., IN_n, a second terminal that provides an output voltage Vout, and a control terminal that is coupled to the adaptive drive circuit 300. Furthermore, the adaptive drive circuit 300 is configured to generate a control signal SW_sel based on a received control instruction, a supply voltage, the output voltage Vout, and the input voltages IN_1, IN_2, ..., IN_n of each first switch unit 210. <n:1>It is also used to adaptively drive one of the first switch units 210 to turn on and the other first switch units 210 to turn off, and drive the adaptive wide range detection circuit 100 to adaptively generate a current detection result Isen.

[0089] The load switch provided by the present invention monitors the states of the input voltages IN_1, IN_2, ..., IN_n in real time and adaptively switches the operating mode of the adaptive wide-range detection circuit 100 accordingly, ensuring normal operation even when the input voltages IN_1, IN_2, ..., IN_n are close to their limit values ​​(as high as IN_MAX or as low as 0V). Thus, this adaptive mechanism effectively expands the applicable range of the input voltages IN_1, IN_2, ..., IN_n of the current detection circuit, enabling stable current detection and processing within a wide range of input voltages IN_1, IN_2, ..., IN_n. As a result, the load switch provided by the present invention achieves decoupling of the drive voltage Vmax from the input voltages IN_1, IN_2, ..., IN_n, preventing leakage of the power supply voltage signal to be transmitted and protecting the gate from high voltage, resulting in high reliability. Furthermore, since the load switch provided by the present invention includes the adaptive wide-range detection circuit 100 provided by the present invention, the load switch provided by the present invention also has at least all the advantages of the adaptive wide-range detection circuit 100 provided by the present invention. For details about the beneficial effects of the load switch provided by the present invention, please refer to the above description of the beneficial effects of the adaptive wide-range detection circuit 100 provided by the present invention, and no further details will be given here.

[0090] For example, see Figure 10 、 Figure 11 and Figure 12 ,in, Figure 10 This is a topological diagram of the first switch unit 210 of the load switch provided in one implementation manner of this embodiment. Figure 11 for Figure 10 In the figure, the first switch unit is a CMOS switch tube as an example, showing the gate states of the first PMOS tube and the first NMOS tube when the switch is turned on. Figure 12 for Figure 10 In the figure, the first switch unit is a CMOS switch tube as an example, and the gate state of the first PMOS tube and the gate state of the first NMOS tube are shown. Figure 10 、 Figure 11 and Figure 12 It can be seen that each of the first switch units 210 includes a first CMOS switch tube and a dynamic bias circuit 211; the first CMOS switch tube includes a first PMOS tube MP1 and a first NMOS tube MN1, and the dynamic bias circuit 211 includes a PMOS bias circuit 2111 and an NMOS bias circuit 2112. Furthermore, when the first switch unit 210 is turned on, the PMOS bias circuit is configured to bias the substrate voltage of the first PMOS tube MP1 to the input voltage ( Figure 10 IN in the figure) and bias the gate voltage of the first PMOS transistor MP1 to a low level; and the NMOS bias circuit is configured to bias the substrate voltage of the first NMOS transistor MN1 to the output voltage ( Figure 10 OUT in FIG. 1 ) and biases the gate voltage of the first NMOS transistor MN1 to the driving voltage VMAX. This biasing scheme effectively prevents the bias effect on the threshold voltage of the first NMOS transistor MN1 when the first switch unit 210 is on. When the first switch unit 210 is off, the PMOS bias circuit is configured to bias both the substrate voltage and gate voltage of the first PMOS transistor MP1 to the driving voltage VMAX, and the NMOS bias circuit is configured to bias both the substrate voltage and gate voltage of the first NMOS transistor MN1 to a low level. This biasing scheme ensures that when the first CMOS switch is turned off, signal leakage due to the parasitic diode is not generated.

[0091] It should be noted that those skilled in the art should be able to understand that the present invention does not impose too many restrictions on the specific implementation of the PMOS bias circuit 2111 and the NMOS bias circuit 2112. For example, please continue to refer to Figure 10 ,like Figure 10 As shown, the PMOS bias circuit 2111 includes a ninth control switch S5 and a tenth control switch S6; the NMOS bias circuit 2112 includes an eleventh control switch S7 and a twelfth control switch S8.

[0092] For example, please see Figure 2 and Figure 9 ,like Figure 2 and Figure 9 As shown in some exemplary embodiments, the adaptive driving circuit 300 includes a driving voltage generating and selecting module 310, an interface conversion module 320, and a driving buffer module 330. The input terminal of the driving voltage generating and selecting module 310 receives the output voltage ( Figure 9 The output of the driving voltage generation and selection module 310 is coupled to the first input of the interface conversion module 320, the first input of the driving buffer module 330, and the first current detection module 131 of the adaptive wide-range detection circuit 100. The output of the interface conversion module 320 is coupled to the second input of the driving buffer module 330 and the signal detection module 120 of the adaptive wide-range detection circuit 100. The output of the driving buffer module 330 is coupled to the control terminal of each of the first switching units 210 in the switch array 200. Furthermore, the driving voltage generation and selection module 310 is configured to use the maximum value among the output voltage Vout, all the input voltages IN_1, IN_2, ..., IN_n, and the supply voltage VDD as the driving voltage VMAX. The interface conversion module 320 is configured to generate the control signal SW_sel according to the control instruction. <n:1>, the control signal SW_sel <n:1>The information of the first switch unit 210 to be turned on in the switch array 200 is included; the driving buffer module 330 is configured to provide the driving voltage VMAX for the first switch unit 210 to be turned on.

[0093] pass Figure 9 and Figure 10 , those skilled in the art will understand that: during the operation of the first switch unit 210, when the input voltage ( Figure 10 When the input voltage (indicated by IN) is low, the on-resistance of the first NMOS transistor MN1 is low; Figure 10 When the input voltage (indicated by IN) is high, the on-resistance of the first PMOS transistor MP1 is low. Figure 10 IN in the figure) is within the range of 0~VMAX, the input voltage ( Figure 10 IN) can be transmitted to the output terminal ( Figure 10 Indicated by OUT in the figure). Furthermore, for MOS devices, the maximum voltage they can withstand is fixed, namely the drive voltage VMAX. When the input voltages IN_1, IN_2, ..., IN_n change rapidly within the normal operating range, the drive voltage VMAX remains fixed, and there are no special requirements for the timing of the input voltages. With this configuration, the first switch unit 210 of the switch load provided by the present invention utilizes a PMOS+NMOS configuration with a fixed drive voltage VMAX. This not only enables voltage signal transmission within a wide input voltage range of IN_1, IN_2, ..., IN_n, but also eliminates any specific requirements for the rate of change of the input voltages IN_1, IN_2, ..., IN_n, resulting in strong applicability. Furthermore, the maximum voltage borne by the MOS device during operation is determined by the drive voltage VMAX, resulting in high reliability.

[0094] For example, in some of the exemplary embodiments, see Figure 13 , Figure 13 This is a structural block diagram of the drive voltage generation and selection module of the load switch provided in this embodiment. Figure 13 It can be seen that the driving voltage generation and selection module 310 includes a charge pump unit 311 and a driving voltage generation unit 312; the input end of the charge pump unit 311 receives the control signal SW_sel <n:1>, the control signal SW_sel <n:1>The output terminal of the charge pump unit 311 is coupled to the driving voltage generating unit 312. Furthermore, the charge pump unit 311 is configured to generate a charge pump voltage VCP according to the operating mode and the supply voltage VDD, wherein the charge pump voltage VCP is the maximum value among the output voltage Vout and all the input voltages IN_1, IN_2, ..., IN_n; and the driving voltage generating unit 312 is configured to generate the driving voltage VMAX according to the output voltage Vout, all the input voltages IN1, and the charge pump voltage VCP.

[0095] Therefore, the charge pump voltage VCP provided by the charge pump unit 311 is only related to the power supply voltage VDD, and the charge pump voltage VCP is the maximum value of the output voltage Vout and all the input voltages IN_1, IN_2, ..., IN_n. With this configuration, when the power supply voltage abnormally loses power and the charge pump unit 311 has no output, the driving voltage VMAX can be clamped by the input voltages IN_1, IN_2, ..., IN_n and the output voltage Vout, thereby preventing the first switch unit 210 from being completely turned off during an abnormal power failure, further improving the reliability of the present invention.

[0096] Specifically, the charge pump voltage VCP is the maximum value among the output voltage Vout and all the input voltages IN_1, IN_2, ..., IN_n, that is, the charge pump voltage VCP satisfies the following formula (9).

[0097] (9) For example, in some of the exemplary embodiments, see Figure 13 ,from Figure 13 As can be seen, the charge pump unit 311 includes a clock circuit 3111 and a charge pump 3112. The clock circuit 3111 is configured to drive the charge pump 3112 to operate in the low-power mode when the operating mode is the low-power mode, and to drive the charge pump 3112 to operate in the normal operating mode when the operating mode is the normal mode. The charge pump 3112 is configured to generate the charge pump voltage VCP based on the received supply voltage VDD. Thus, the clock circuit 3111 can output different signal frequencies depending on the current operating mode of the system, thereby effectively reducing the power consumption of the load switch provided by the present invention.

[0098] Exemplarily, the clock circuit 3111 and the charge pump circuit 3112 may be integrated into a chip, and both are powered by a power supply port of the chip.

[0099] For example, in some of the exemplary embodiments, see Figure 14 , Figure 14 The topological structure diagram of one specific example of the driving voltage generation and selection module of the load switch provided in this embodiment. Figure 14 It can be seen that the driving voltage generating unit 312 includes a clamping circuit 3121 and a pull-up circuit 3122. The first end of the pull-up circuit 3122 receives the output voltage Vout, all the input voltages IN_1, IN_2, ..., IN_n and the charge pump voltage VCP. The second end of the pull-up circuit 3122 is coupled to the output end of the pull-up circuit 3122 to output the driving voltage VMAX. The input end of the pull-up circuit 3122 is used to receive the charge pump voltage VCP. The clamping circuit 3121 is configured to clamp the driving voltage VMAX when the power supply voltage fails. The pull-up circuit 3122 is configured to pull up the driving voltage VMAX to the charge pump voltage VCP when the power supply voltage VDD is normally supplied. Therefore, the driving voltage generating unit 312 adopts the design of the clamping circuit 3121 and the pull-up circuit 3122, which can ensure that the driving voltage VMAX is only related to the power supply voltage VDD when the power supply voltage VDD is normally supplied, and can ensure that the first switch unit 210 is completely turned off when the power supply voltage VDD is powered off, further improving the reliability of the present invention, and the structure is simple and easy to implement.

[0100] For example, Figure 14 As shown, the clamping circuit 3121 includes the first switch unit 210 ( Figure 14 In the example, diodes D1, D2, ..., Dn are coupled in a one-to-one correspondence (using IN_1, IN_2, ..., IN_n for illustration) to receive the output voltage ( Figure 14 OUT is used as an example) and the diode Dout is coupled to the charge pump 3112 ( Figure 14 The pull-up circuit 3122 includes a fourteenth PMOS transistor MP14, a fifteenth PMOS transistor MP15, and a twelfth NMOS transistor MP12.

[0101] Next, the working principle of the driving voltage generating unit 312 is briefly described as follows: First, when the power supply voltage is lost, the charge pump 3112 does not output the charge pump voltage VCP. The fifteenth PMOS transistor MP15 is turned on, the twelfth NMOS transistor MN12 is turned off, and the gate of the fourteenth PMOS transistor MP14 is at a high level, thus turning off the fourteenth PMOS transistor MP14. The driving voltage VMAX is clamped by the diode, satisfying the following equation (10).

[0102] (10) In formula (10), Vdiode is the conduction voltage drop of the diodes D1, D2, ..., Dn, Dout, and Dvcp of the clamping circuit 3121. For example, a Schottky diode is used, and its conduction voltage drop is lower than the threshold voltage and parasitic diode voltage drop of the MOS transistor of the first switch unit 210. This ensures that the MOS transistor of the first switch unit 210 will not turn on when the supply voltage VDD is disconnected.

[0103] Secondly, when VDD is normally powered, the operating voltage of the charge pump unit 311 satisfies the following formula (11).

[0104] (11) The diodes D1, D2, ..., Dn, Dout, and Dvcp of the clamping circuit 3121 are all in a reverse-biased off state. The fifteenth PMOS transistor MP15 and the twelfth NMOS transistor MN12 control the gate of the fourteenth PMOS transistor MP14. At this time, the twelfth NMOS transistor MN12 is turned on, the fourteenth PMOS transistor MP14 is turned off, and the fifteenth PMOS transistor MP15 is turned on, pulling the drive voltage VMAX up to the charge pump voltage VCP. At this time, the drive voltage VMAX satisfies the following equation (12).

[0105] (12) In addition, the present invention does not impose too many restrictions on the specific implementation of the driving buffer module 330, as long as the control signal SW_sel can be increased. <n:1>For example, in some preferred embodiments, an inverter chain can be used to gradually enhance the driving capability. Due to space limitations, this article does not elaborate on this. For more details about the drive buffer module 330, please refer to the relevant technical adaptability understanding known to those skilled in the art.

[0106] Example 3

[0107] This embodiment provides a chip, in some embodiments of which the chip is integrated with the adaptive wide-range detection circuit described in any embodiment of Example 1 of this document; in other embodiments of which the chip is integrated with the load switch described in Example 2 of this document.

[0108] Example 4

[0109] This embodiment provides an electronic device, in some embodiments of which the electronic device includes the adaptive wide-range detection circuit described in any embodiment of Example 1 of this document; in other embodiments, the electronic device includes the load switch described in any embodiment of Example 2 of this document; in still other embodiments, the electronic device includes the chip described in any embodiment of Example 3 of this document.

[0110] Since the electronic device provided by the present invention and the adaptive wide-range detection circuit, load switch, or chip provided by the present invention belong to the same inventive concept, and the load switch and chip provided by the present invention belong to the same inventive concept as the adaptive wide-range detection circuit provided by the present invention, the electronic device provided by the present invention has at least all the advantages of the adaptive wide-range detection circuit provided by the present invention. For details about the beneficial effects of the electronic device provided by the present invention, please refer to the above description of the beneficial effects of the adaptive wide-range detection circuit provided by the present invention, and no further details will be given here.

[0111] More specifically, the electronic device provided in this embodiment, in addition to including at least a processor and memory, may further include a display component, a communication component, a sensor component, a power supply component, a multimedia component, and an input / output interface, etc., as needed. The display component, memory, communication component, sensor component, power supply component, multimedia component, and input / output interface are all connected to the processor. The memory may be static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, etc. The processor may be a central processing unit (CPU), graphics processing unit (GPU), field programmable gate array (FPGA), application-specific integrated circuit (ASIC), digital signal processing (DSP) chip, etc. Other communication components, sensor components, power supply components, multimedia components, etc., can all be implemented using general-purpose components. Due to space limitations, they are not described in detail here. For more detailed information, please refer to the relevant technical adaptability understanding known to those skilled in the art.

[0112] It should be noted that the functional modules in the various embodiments of this document may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0113] Compared with the prior art, the adaptive wide-range detection circuit, load switch, chip and electronic device provided by the present invention have the following advantages: the adaptive wide-range detection circuit provided by the present invention can not only automatically adjust and adaptively realize the detection of a wide current, but also respond quickly and have high reliability; the load switch provided by the present invention has no requirements on the range and timing of the transmitted power supply voltage signal and has strong applicability; and can realize arbitrary multi-channel signal selection and has strong scalability; further, the load switch provided by the present invention realizes the decoupling of the driving voltage and the input voltage, there is no leakage of the power supply voltage signal to be transmitted, and the gate avoids being subjected to high voltage, and has high reliability.

[0114] The above description is merely a description of preferred embodiments of the adaptive wide-range detection circuit, load switch, chip, and electronic device provided by the present invention, and does not limit the scope of the present invention in any way. Any changes or modifications made by a person skilled in the art based on the above disclosure are within the scope of protection of the present invention. Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such modifications and variations fall within the scope of the present invention and its equivalents, the present invention is intended to include such modifications and variations.

Claims

1. An adaptive wide range detection circuit, characterized in that: For a load switch, the load switch includes at least one first switch unit, and the adaptive wide-range detection circuit includes an output voltage judgment module, a signal detection module, a first current detection module, a second current detection module and a signal processing module; wherein the signal detection module includes a detection unit corresponding to each of the first switch units, and the impedance of the detection unit is proportional to the impedance of the first switch unit corresponding to the detection unit; the output end of the output voltage judgment module is coupled to the control end of the first current detection module and the control end of the second current detection module; the output end of the signal detection module is coupled to the input end of the first current detection module and the input end of the second current detection module; the output end of the first current detection module and the output end of the second current detection module are coupled to the input end of the signal processing module; the signal detection module receives a control signal, the input voltage and the output voltage of the load switch, and the output voltage judgment module receives the output voltage; The adaptive wide-range detection circuit is configured to adaptively drive one of the first current detection module and the second current detection module to operate and the other to not operate according to the control signal, the input voltage and the output voltage to generate a current detection result.

2. The adaptive wide range detection circuit according to claim 1, characterized in that: The output voltage judgment module is configured to, when the output voltage is less than a preset voltage, drive the first current detection module to operate and control the second current detection module to not operate; when the output voltage is greater than or equal to the preset voltage, drive the second current detection module to operate and control the first current detection module to not operate; The signal detection module is configured to drive the detection unit corresponding to the currently working first switching unit to generate an input detection voltage and an output detection voltage according to the received control signal; The first current detection module is configured to generate a first detection current according to the input detection voltage and the output detection voltage; The second current detection module is configured to generate a second detection current according to the input detection voltage and the output detection voltage; The signal processing module is configured to generate the current detection result according to the first detection current and the second detection current.

3. The adaptive wide range detection circuit according to claim 2, characterized in that: The output voltage judgment module includes a voltage divider circuit and a comparator, a first end of the voltage divider circuit receives the output voltage, a second end of the voltage divider circuit is grounded, a voltage dividing point of the voltage divider circuit is coupled to the positive input end of the comparator, a negative input end of the comparator receives a reference voltage, and an output end of the comparator is coupled to the control end of the first current detection module and the control end of the second current detection module.

4. The adaptive wide range detection circuit according to claim 2, characterized in that: The detection unit includes a second switch unit and a third switch unit, the first end of the second switch unit is coupled to the first end of the first switch unit corresponding thereto to receive the input voltage, the first end of the third switch unit is coupled to the second end of the first switch unit corresponding thereto to receive the output voltage, the second end of the second switch unit, the first end of the first current detection module and the first end of the second current detection module are coupled to a first node, the second end of the third switch unit, the second end of the first current detection module and the second end of the second current detection module are coupled to a second node; the control end of the second switch unit and the control end of the third switch unit receive the control signal.

5. The adaptive wide range detection circuit according to claim 4, characterized in that: The second switch unit includes a second CMOS switch tube, the third switch unit includes a third CMOS switch tube, and the impedance of the second switch unit is equal to the impedance of the third switch unit.

6. The adaptive wide range detection circuit according to claim 5, characterized in that: The second CMOS switch tube includes a second PMOS tube and a second NMOS tube, the third CMOS switch tube includes a third PMOS tube and a third NMOS tube, and the second PMOS tube, the second NMOS tube, the third PMOS tube and the third NMOS tube have the same size.

7. The adaptive wide range detection circuit according to claim 4, characterized in that: The first current detection module includes a first input side mirror circuit, a first output side mirror circuit and a first inverter, and the second current detection module includes a second input side mirror circuit and a second output side mirror circuit; A first end of the first input-side mirror circuit and a first end of the first output-side mirror circuit are used to receive an operating voltage, and a first end of the second input-side mirror circuit and a first end of the second output-side mirror circuit are grounded; a second end of the first input-side mirror circuit, a second end of the second input-side mirror circuit, and a second end of the second output-side mirror circuit are coupled to the first node, and a third end of the first input-side mirror circuit, a third end of the second input-side mirror circuit, and a second end of the first output-side mirror circuit are coupled to the second node; The fourth terminal of the first input-side mirror circuit and the third terminal of the first output-side mirror circuit are coupled to a third node; the fourth terminal of the first output-side mirror circuit is coupled to the first input terminal of the signal processing module; The fourth terminal of the second input-side mirror circuit and the third terminal of the second output-side mirror circuit are coupled to a fourth node, and the fourth terminal of the second output-side mirror circuit is coupled to the second input terminal of the signal processing module; The input terminal of the first inverter, the control terminal of the second input-side mirror circuit, and the control terminal of the second output-side mirror circuit are coupled to the output terminal of the output voltage judgment module, and the control terminal of the first input-side mirror circuit and the control terminal of the first output-side mirror circuit are coupled to the output terminal of the first inverter; The first current detection module is configured to make the voltages of the first node and the second node the same through the clamping function of the first input side mirror circuit during operation, and output the first detection current through the mirroring function of the first output side mirror circuit; the second current detection module is configured to make the voltages of the first node and the second node the same through the clamping function of the second input side mirror circuit during operation, and output the second detection current through the mirroring function of the second output side mirror circuit.

8. The adaptive wide range detection circuit according to claim 7, characterized in that: The first input-side mirror circuit includes a first current source, a second current source, and a first current mirror; an input terminal of the first current source and an input terminal of the second current source receive the operating voltage, an output terminal of the first current source and a power supply voltage terminal on the image side of the first current mirror are coupled to the third node, an output terminal of the second current source is coupled to the power supply voltage terminal on the source side of the first current mirror, an output terminal of the first current mirror is coupled to the first node, and an input terminal of the first current mirror is coupled to the second node; The second input side mirror circuit includes a second current mirror, a third current source and a fourth current source; A power supply voltage terminal on a source side of the second current mirror is coupled to the second node, a power supply voltage terminal on an image side of the second current mirror is coupled to the first node, an output terminal of the second current mirror and an input terminal of the third current source are coupled to a fourth node, an input terminal of the second current mirror is coupled to an input terminal of the fourth current source, and an output terminal of the third current source and an output terminal of the fourth current source are coupled to ground; The input end of the first inverter, the control end of the third current source, and the control end of the fourth current source are coupled to the output end of the output voltage determination module, and the control end of the first current source and the control end of the second current source are coupled to the output end of the first inverter.

9. The adaptive wide range detection circuit according to claim 7, characterized in that: The first output-side mirror circuit includes a third current mirror, a first control switch, and a second control switch, wherein a power supply voltage terminal of the third current mirror receives the operating voltage, an input terminal of the third current mirror is coupled to the first terminal of the first control switch, an output terminal of the third current mirror is coupled to the first terminal of the second control switch, a second terminal of the first control switch is coupled to the second node, a control terminal of the first control switch is coupled to the third node, and a second terminal of the second control switch is coupled to the first input terminal of the signal processing module; The second output-side mirror circuit includes a third control switch, a fourth current mirror, and a fourth control switch, wherein a first terminal of the third control switch is coupled to the first node, a second terminal of the third control switch is coupled to the input terminal of the fourth current mirror, a control terminal of the third control switch is coupled to the fourth node, an output terminal of the fourth current mirror is coupled to the first terminal of the fourth control switch, a second terminal of the fourth control switch is coupled to the second input terminal of the signal processing module, and a ground terminal of the fourth current mirror is grounded; The input terminal of the first inverter is coupled to the output terminal of the output voltage determination module, and the output terminal of the first inverter is coupled to the control terminal of the second control switch.

10. The adaptive wide range detection circuit according to claim 4, characterized in that: The first current detection module includes a first operational amplifier, a fifth control switch, a fifth current mirror, a sixth control switch and a second inverter; the second current detection module includes a second operational amplifier, a seventh control switch, a sixth current mirror and an eighth control switch; A non-inverting input terminal of the first operational amplifier, a negative input terminal of the second operational amplifier, and a first terminal of the seventh control switch are coupled to the first node, and a negative input terminal of the first operational amplifier, a positive input terminal of the second operational amplifier, and a first terminal of the fifth control switch are coupled to the second node; a control terminal of the fifth control switch is coupled to the output terminal of the first operational amplifier, a second terminal of the fifth control switch is coupled to the input terminal of the fifth current mirror, an output terminal of the fifth current mirror is coupled to the first terminal of the sixth control switch, a second terminal of the sixth control switch is coupled to the first input terminal of the signal processing module, and a power supply voltage terminal of the fifth current mirror receives an operating voltage; a control terminal of the seventh control switch coupled to the output terminal of the second operational amplifier, a second terminal of the seventh control switch coupled to the input terminal of the sixth current mirror, an output terminal of the sixth current mirror coupled to the first terminal of the eighth control switch, a first terminal of the eighth control switch coupled to the second input terminal of the signal processing module, and a ground terminal of the sixth current mirror coupled to ground; An output terminal of the output voltage determination module is coupled to an input terminal of the second inverter. An output terminal of the second inverter is coupled to a control terminal of the sixth control switch and a control terminal of the first operational amplifier.

11. The adaptive wide range detection circuit according to claim 2, characterized in that: The signal processing module includes a seventh current mirror, wherein a power supply voltage terminal of the seventh current mirror receives an operating voltage, an input terminal of the seventh current mirror is coupled to an output terminal of the second current detection module, and an output terminal of the seventh current mirror is connected in parallel to an output terminal of the first current detection module; The seventh current mirror is configured to add a mirror current of the second detection current to the first detection current to generate the current detection result.

12. A load switch, characterized in that: The load switch comprises the adaptive wide-range detection circuit according to any one of claims 1 to 11, wherein the load switch further comprises a switch array and an adaptive drive circuit, the switch array comprising at least two of the first switch units; each of the first switch units has a first terminal receiving a corresponding input voltage, a second terminal providing an output voltage, and a control terminal coupled to the adaptive drive circuit; The adaptive driving circuit is configured to generate a control signal based on the received control instruction, the power supply voltage, the output voltage, and the input voltage of each of the first switching units; and is also used to adaptively drive one of the first switching units to turn on and the other first switching units to turn off, and drive the adaptive wide-range detection circuit to adaptively generate a current detection result.

13. The load switch according to claim 12, wherein: Each of the first switch units includes a first CMOS switch tube and a dynamic bias circuit; the first CMOS switch tube includes a first PMOS tube and a first NMOS tube, and the dynamic bias circuit includes a PMOS bias circuit and an NMOS bias circuit; When the first switch unit is turned on, the PMOS bias circuit is configured to bias the substrate voltage of the first PMOS transistor to the input voltage of the corresponding first CMOS switch transistor and bias the gate voltage of the first PMOS transistor to a low level; and the NMOS bias circuit is configured to bias the substrate voltage of the first NMOS transistor to the output voltage and bias the gate voltage of the first NMOS transistor to a driving voltage; When the first switch unit is turned off, the PMOS bias circuit is configured to bias the substrate voltage and gate voltage of the first PMOS tube to the driving voltage, and the NMOS bias circuit is configured to bias the substrate voltage and gate voltage of the first NMOS tube to a low level.

14. The load switch according to claim 12, wherein: The adaptive driving circuit includes a driving voltage generation and selection module, an interface conversion module, and a driving buffer module; an input end of the driving voltage generation and selection module receives the output voltage and the input voltages of all the first switch units, and an output end of the driving voltage generation and selection module is coupled to a first input end of the interface conversion module, a first input end of the driving buffer module, and a first current detection module of the adaptive wide-range detection circuit; an output end of the interface conversion module is coupled to a second input end of the driving buffer module and a signal detection module of the adaptive wide-range detection circuit; an output end of the driving buffer module is coupled to a control end of each of the first switch units in the switch array; The driving voltage generation and selection module is configured to use the maximum value among the output voltage, all the input voltages and the supply voltage as the driving voltage; The interface conversion module is configured to generate the control signal according to the control instruction, wherein the control signal includes information about the first switch unit to be turned on in the switch array; The driving buffer module is configured to provide the driving voltage to the first switching unit to be turned on.

15. The load switch according to claim 14, wherein: The driving voltage generation selection module includes a charge pump unit and a driving voltage generation unit; an input end of the charge pump unit receives the control signal, the control signal including the working mode; an output end of the charge pump unit is coupled to the driving voltage generation unit; The charge pump unit is configured to generate a charge pump voltage according to the working mode and the supply voltage, wherein the charge pump voltage is a maximum value of the output voltage and all the input voltages; The driving voltage generating unit is configured to generate the driving voltage according to the output voltage, all the input voltages and the charge pump voltage.

16. The load switch according to claim 15, wherein: The charge pump unit includes a clock circuit and a charge pump; the clock circuit is configured to drive the charge pump to operate in low power mode when the operating mode is low power mode, and to drive the charge pump to operate in normal operating mode when the operating mode is normal mode; the charge pump is configured to generate the charge pump voltage according to the received power supply voltage.

17. The load switch according to claim 15, wherein: The driving voltage generating unit includes a clamp circuit and a pull-up circuit, wherein a first end of the pull-up circuit receives the output voltage, all the input voltages, and the charge pump voltage, a second end of the pull-up circuit is coupled to the output end of the pull-up circuit to output the driving voltage, and an input end of the pull-up circuit is used to receive the charge pump voltage; The clamping circuit is configured to clamp the driving voltage when the power supply voltage is powered off; The pull-up circuit is configured to pull up the driving voltage to the charge pump voltage when the power supply voltage is normally supplied.

18. A chip, characterized in that: The adaptive wide-range detection circuit according to any one of claims 1 to 11 or the load switch according to any one of claims 12 to 17 is integrated thereon.

19. An electronic device, characterized in that: The method comprises the adaptive wide-range detection circuit according to any one of claims 1 to 11, or the load switch according to any one of claims 12 to 17, or the chip according to claim 18.

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