A method and device for handling alignment failure in a wafer lithography process
By automatically selecting and using backup alignment marks to handle alignment failures during wafer lithography, lithography efficiency and product yield are improved, solving the problems of low efficiency and high cost caused by cumbersome processing in existing technologies.
Patent Information
- Application Number
- CN202511222740.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-29
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2045-08-29
AI Technical Summary
The existing methods for handling alignment failures in wafer lithography are cumbersome, resulting in low lithography efficiency, reduced yield, and high labor costs. In particular, manual intervention is required after alignment failure, which affects the efficiency and capacity of the exposure equipment.
During the wafer lithography process, after an alignment failure is automatically identified, an unused backup alignment mark is selected for reprocessing. The target alignment mark is determined by a preset selection rule, and reprocessing is carried out according to the operation procedure of the lithography stage. Quality evaluation parameters are obtained to determine whether the reprocessing process is successful, until the termination condition is met.
It improves lithography efficiency, increases product output, reduces labor costs, and reduces downtime of lithography machines caused by alignment failures.
Smart Images

Figure CN120742630B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of wafer processing technology, and in particular to a method and apparatus for handling alignment failures during wafer lithography. Background Technology
[0002] Currently, the industry's methods for handling wafer alignment failures are quite cumbersome. When an alignment failure occurs, if it's an ASML machine, the unexposed wafer with photoresist is returned to the wafer cassette for manual processing. Manual processing requires checking the machine's exposure report to determine the cause of the failure, confirming the wafer ID, product information, and whether there's a re-exposure program (if not, a new program needs to be created, PPID (machine-to-control system connection) and R2R (given exposure conditions) information re-uploaded, and then a runcard (special step) is initiated to re-explore the misaligned wafer. This process takes approximately 20 minutes. If it's a Canon machine, the wafer will remain on the wafer stage awaiting manual processing. If manual processing is delayed or multiple attempts fail, it leads to wafer backlog, severely impacting delivery efficiency. Regardless of the machine, the processing methods all affect the exposure efficiency of the exposure machine and require significant manual time. Furthermore, the photoresist applied to the wafer has a limited lifespan (ARF 40 min, DUV 90 min). The timeliness requirements vary depending on the precision of the equipment. Once the timeliness is exceeded, rework is required (removing the photoresist, reapplying the adhesive, and then re-exposing), affecting the equipment's production capacity. Therefore, intelligent and rapid handling of wafer alignment failures is essential. Summary of the Invention
[0003] In view of this, the purpose of this application is to provide a method and apparatus for handling alignment failures during wafer lithography. If an alignment failure is detected during wafer processing, the alignment mark is automatically replaced and the process is repeated, thereby effectively improving lithography efficiency and increasing product yield.
[0004] This application provides a method for handling alignment failures during wafer lithography, the method comprising:
[0005] If an alignment failure is detected during the target lithography stage of the wafer, determine whether there is at least one unused spare alignment mark;
[0006] If present, the target alignment mark required for the reprocessing of the wafer in the target lithography stage is determined from the at least one unused spare alignment mark according to a preset selection rule;
[0007] The wafer is reprocessed according to the target alignment mark and the operation procedure of the target photolithography stage, and quality evaluation parameters are obtained after the processing is completed.
[0008] Based on the quality assessment parameters and preset assessment rules, determine whether the reprocessing process of the target lithography stage is successful.
[0009] Optionally, the step of reprocessing the wafer according to the target alignment mark and following the operation flow of the target photolithography stage includes:
[0010] Obtain the overlay accuracy compensation value of the target alignment mark;
[0011] The current pose parameters of the target machine are corrected according to the overlay accuracy compensation value, and the control program required for the reprocessing of the target lithography stage is obtained.
[0012] According to the control program, the target machine that has completed the pose correction is used to reprocess the wafer according to the operation process of the target lithography stage.
[0013] Optionally, before the target machine, having completed pose correction according to the control program, reprocesses the wafer according to the operation flow of the target lithography stage, the processing method further includes:
[0014] Identify whether the presence time of the photoresist currently coated on the wafer exceeds a preset time;
[0015] If the error exceeds the limit, the photoresist coated on the wafer will be removed during the alignment failure process.
[0016] If the value does not exceed the limit, the target machine that has completed the pose correction according to the control program will reprocess the wafer according to the operation process of the target lithography stage.
[0017] Optionally, determining the target alignment mark required for the reprocessing of the wafer in the target photolithography stage from the at least one unused spare alignment mark according to a preset selection rule includes:
[0018] Obtain the usage priority of each unused alternate alignment mark;
[0019] The highest priority unused alternate alignment mark will be used to determine the target alignment mark required for wafer reprocessing.
[0020] Optionally, obtaining quality assessment parameters after processing includes:
[0021] Obtain the quality assessment parameters required for the target lithography stage; wherein, if the target lithography stage is the exposure stage, the obtained quality assessment parameters include overlay error; if the target lithography stage is the development stage, the obtained quality assessment parameters include overlay error and development result.
[0022] Optionally, the quality assessment parameters include the overlay error after reprocessing. Determining whether the reprocessing of the target lithography stage is successful based on the quality assessment parameters and preset assessment rules includes:
[0023] Identify whether the overprinting error is within a preset error range;
[0024] If the target photolithography stage is successfully processed, the reprocessing of the target photolithography stage is determined to be successful; otherwise, the reprocessing of the target photolithography stage is determined to be unsuccessful.
[0025] Optionally, if it is determined that the reprocessing of the target lithography stage is unsuccessful, the processing method further includes:
[0026] Identify whether there is at least one unused spare alignment mark;
[0027] If it does not exist, send a notification message to the target client.
[0028] This application embodiment also provides a processing apparatus for alignment failures during wafer lithography, the processing apparatus comprising:
[0029] The determination module is used to determine whether there is at least one unused spare alignment mark if an alignment failure is detected in the target lithography stage of the wafer.
[0030] A selection module is used to determine, if present, the target alignment mark required for the reprocessing of the wafer in the target lithography stage from the at least one unused spare alignment mark according to a preset selection rule;
[0031] The processing module is used to reprocess the wafer according to the target alignment mark and the operation process of the target photolithography stage, and obtain quality evaluation parameters after the processing is completed.
[0032] The evaluation module is used to determine whether the reprocessing process of the target lithography stage is successful based on the quality evaluation parameters and preset evaluation rules.
[0033] Optionally, when the processing module reprocesses the wafer according to the target alignment mark and the operation flow of the target photolithography stage, the processing module is used to:
[0034] Obtain the overlay accuracy compensation value of the target alignment mark;
[0035] The current pose parameters of the target machine are corrected according to the overlay accuracy compensation value, and the control program required for the reprocessing of the target lithography stage is obtained.
[0036] According to the control program, the target machine that has completed the pose correction is used to reprocess the wafer according to the operation process of the target lithography stage.
[0037] Optionally, before the target machine, having completed pose correction according to the control program, reprocesses the wafer according to the operation flow of the target lithography stage, the processing module is further configured to:
[0038] Identify whether the presence time of the photoresist currently coated on the wafer exceeds a preset time;
[0039] If the error exceeds the limit, the photoresist coated on the wafer will be removed during the alignment failure process.
[0040] If the value does not exceed the limit, the target machine that has completed the pose correction according to the control program will reprocess the wafer according to the operation process of the target lithography stage.
[0041] Optionally, when the selection module determines the target alignment mark required for reprocessing the wafer in the target lithography stage from the at least one unused spare alignment mark according to a preset selection rule, the selection module is used to:
[0042] Obtain the usage priority of each unused alternate alignment mark;
[0043] The highest priority unused alternate alignment mark will be used to determine the target alignment mark required for wafer reprocessing.
[0044] Optionally, when the processing module is used to obtain quality assessment parameters after processing, the processing module is used to:
[0045] Obtain the quality assessment parameters required for the target lithography stage; wherein, if the target lithography stage is the exposure stage, the obtained quality assessment parameters include overlay error; if the target lithography stage is the development stage, the obtained quality assessment parameters include overlay error and development result.
[0046] Optionally, the quality assessment parameters include the overlay error after reprocessing. When the assessment module determines whether the reprocessing of the target lithography stage is successful based on the quality assessment parameters and preset assessment rules, the assessment module is used to:
[0047] Identify whether the overprinting error is within a preset error range;
[0048] If the target photolithography stage is successfully processed, the reprocessing of the target photolithography stage is determined to be successful; otherwise, the reprocessing of the target photolithography stage is determined to be unsuccessful.
[0049] Optionally, the processing device further includes a prompting module, the prompting module being used for:
[0050] If the reprocessing of the target lithography stage is determined to be unsuccessful, identify whether there is at least one unused spare alignment mark;
[0051] If it does not exist, send a notification message to the target client.
[0052] This application also provides an electronic device, including: a processor, a memory, and a bus. The memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor communicates with the memory via the bus. When the machine-readable instructions are executed by the processor, the steps of the processing method described above are performed.
[0053] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the steps of the processing method described above.
[0054] This application provides a method and apparatus for handling alignment failures during wafer lithography. The method includes: if an alignment failure is detected in the target lithography stage of the wafer, determining whether there is at least one unused spare alignment mark; if so, determining the target alignment mark required for reprocessing the wafer in the target lithography stage from the at least one unused spare alignment mark according to a preset selection rule; reprocessing the wafer according to the target alignment mark and the operation flow of the target lithography stage, and obtaining quality evaluation parameters after processing; and determining whether the reprocessing process of the target lithography stage is successful according to the quality evaluation parameters and the preset evaluation rule.
[0055] In this way, for the photolithography process of wafers, this application pre-sets multiple alignment marks for the target photolithography stage that requires alignment operation. When the photolithography operation is performed using the currently selected alignment mark and photolithography recognition occurs, a new backup alignment mark is automatically selected according to the preset selection rules to process the wafer again until the processing is successful or the termination condition is met, thereby effectively improving the photolithography efficiency of wafers, increasing product yield, and reducing labor costs.
[0056] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description
[0057] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0058] Figure 1 An example of a determination principle for alignment success provided in this application;
[0059] Figure 2 A schematic diagram of the alignment marks provided in this application;
[0060] Figure 3 A flowchart illustrating a method for handling alignment failures during wafer lithography, provided as an embodiment of this application;
[0061] Figure 4 This is one of the structural schematic diagrams of a wafer lithography process alignment failure handling apparatus provided in an embodiment of this application;
[0062] Figure 5 A second schematic diagram of a device for handling alignment failures during wafer lithography provided in an embodiment of this application;
[0063] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0064] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. Based on the embodiments of this application, every other embodiment obtained by those skilled in the art without inventive effort falls within the scope of protection of this application.
[0065] Currently, the industry's methods for handling wafer alignment failures are quite cumbersome. When an alignment failure occurs, if it's an ASML machine, the unexposed wafer with photoresist is returned to the wafer cassette for manual processing. Manual processing requires checking the machine's exposure report to determine the cause of the failure, confirming the wafer ID, product information, and whether there's a re-exposure program (if not, a new program needs to be created, PPID (machine-to-control system connection) and R2R (given exposure conditions) information re-uploaded, and then a runcard (special step) is initiated to re-explore the misaligned wafer. This process takes approximately 20 minutes. If it's a Canon machine, the wafer will remain on the wafer stage awaiting manual processing. If manual processing is delayed or multiple attempts fail, it leads to wafer backlog, severely impacting delivery efficiency. Regardless of the machine, the processing methods all affect the exposure efficiency of the exposure machine and require significant manual time. Furthermore, the photoresist applied to the wafer has a limited lifespan (ARF 40 min, DUV 90 min). The timeliness requirements vary depending on the precision of the machine. Once the timeliness is exceeded, rework is required (washing off the photoresist, reapplying the adhesive, and then exposing again), which affects the machine's production capacity.
[0066] It should also be noted that there are many reasons for wafer alignment failure, such as COWA (coarse alignment) failure and FIWA (fine alignment) failure. Taking ASML exposure as an example: after the wafer is transferred to the stage, it needs to undergo multiple alignment steps between "pre-alignment + precision alignment". Pre-alignment includes three types of optical alignment: mask & mask stage, wafer & wafer stage, and wafer stage & mask stage. It is used to adjust the distance and approximate horizontal position between the mask and the wafer, and alignment failure usually does not occur. Precision alignment is when the machine focuses a laser onto the alignment mark on the wafer. The diffracted light from the alignment mark is transmitted to the image sensor and photodetector via a beam splitter. If two signals with periods of 8µm and 8.8µm are received, the alignment is successful. For an example, please refer to [link to example]. Figure 1 , Figure 1 This application provides an example of a principle for determining alignment pass. This method ensures the high alignment of the photomask and wafer, guaranteeing accurate alignment of the two exposure layers. To further refine alignment, ASML has made finer improvements to the alignment marks with 8µm & 8.8µm intervals. Currently, we place alignment marks of several types, including AH00, AH32, AH53, AH74, NVSM157, and VSPM325374, on each exposure layer requiring alignment. Please refer to [link / reference needed]. Figure 2 , Figure 2The diagram illustrates the alignment marks provided in this application, but NVSM157, VSPM325374, and AH74 are not shown. However, due to differences in manufacturing processes, such as thicker photoresist in the back-end exposure layer, metal patterns in the front layer being covered by oxide layers, and blurred patterns after etching, poor received alignment mark signals can lead to alignment failures. More precise alignment marks are more prone to failure. Therefore, for exposure layers prone to alignment failures, we typically prepare different types of re-exposure programs in advance for shift workers. Even with re-exposure programs available and running smoothly, alignment failures still require at least 20 minutes of manual processing. If the replacement alignment mark is unsuitable, re-exposure needs to be repeated. During night shifts, most shift workers do not create new re-exposure programs (changing exposure programs is risky, and usually only trained personnel can change mark types), which can easily cause long wafer dwell times.
[0067] Based on this, embodiments of this application provide a method for handling alignment failures during wafer lithography, in order to improve lithography efficiency and increase product yield.
[0068] Please see Figure 3 , Figure 3 This is a flowchart illustrating a method for handling alignment failures during wafer lithography, as provided in an embodiment of this application. Figure 3 As shown in the embodiments of this application, the processing method includes:
[0069] S301. If an alignment failure is detected in the target lithography stage of the wafer, determine whether there is at least one unused spare alignment mark.
[0070] S302. If present, determine the target alignment mark required for the reprocessing of the wafer in the target lithography stage from the at least one unused spare alignment mark according to a preset selection rule.
[0071] S303. Based on the target alignment mark, the wafer is reprocessed according to the operation procedure of the target photolithography stage, and quality evaluation parameters are obtained after the processing is completed.
[0072] S304. Based on the quality assessment parameters and preset assessment rules, determine whether the reprocessing process of the target lithography stage is successful.
[0073] The steps in the embodiments of this application are described below by way of example.
[0074] For step S301, feedback information is received from the wafer production monitoring system (e.g., IUI system). Based on the feedback information, it is determined whether there is an alignment failure during the wafer processing in the target lithography stage. If an alignment failure is determined, it is determined whether there is at least one spare alignment mark still in use.
[0075] Here, determining whether an alignment failure exists is generally based on whether the overprinting error (OVL) exceeds a preset standard.
[0076] The photolithography stage may include processes such as photoresist coating, exposure, and development, and the target photolithography stage is the stage where photolithographic alignment is required. For example, the target photolithography stage may be the exposure stage, or the exposure + development stage.
[0077] The alignment marks are pre-set, and multiple pre-set marks are possible. These may include an optimal alignment mark and at least one backup alignment mark. The optimal alignment mark is the mark used during the initial processing of the target lithography stage. For example, alignment mark signals from the same platform can be manually collected, and multiple marker substitutes with better signals can be sequentially identified, thus determining the optimal alignment mark and the backup alignment mark. Furthermore, when determining each backup alignment mark, the corresponding overlay accuracy compensation value is also determined.
[0078] In this step, if it is determined that there is at least one unused spare alignment mark, then step S302 is executed; otherwise, a prompt message is sent to the target client.
[0079] The prompt message may include the reason for the failure and related information.
[0080] For step S302, the step includes: when it is determined that there is at least one unused spare alignment mark, selecting a target alignment mark from the at least one unused spare alignment mark according to a predetermined selection rule, which is required to reprocess the wafer according to the operation flow of the target lithography stage.
[0081] In one embodiment provided in this application, determining the target alignment mark required for reprocessing the wafer in the target photolithography stage from the at least one unused spare alignment mark according to a preset selection rule includes:
[0082] S3021. Obtain the usage priority of each unused alternate alignment mark.
[0083] S3022. The highest priority unused backup alignment mark is used as the target alignment mark required for reprocessing the wafer.
[0084] Here, the priority of the backup alignment mark can be determined in advance.
[0085] Regarding step S303, in one embodiment provided in this application, the reprocessing of the wafer according to the target alignment mark and the operation flow of the target photolithography stage includes:
[0086] S3031. Obtain the overlay accuracy compensation value of the target alignment mark.
[0087] S3032. Correct the current pose parameters of the target machine according to the overlay accuracy compensation value, and obtain the control program required for the target lithography stage reprocessing.
[0088] S3033. The target machine, which has completed the pose correction under the control of the control program, reprocesses the wafer according to the operation process of the target lithography stage.
[0089] For step S3031, the overlay accuracy compensation value of the alignment mark can be predetermined, and each spare alignment mark has its corresponding overlay accuracy compensation value.
[0090] For step S3032, the current pose parameters of the target machine are corrected, which may include coordinate correction and rotation angle correction.
[0091] Correction can reduce the probability that changing the marker will worsen the OVL.
[0092] In step S3033, the control program controls the specific motion trajectory and motion parameters of the target machine.
[0093] In another embodiment provided in this application, before the target machine that has completed pose correction according to the control program reprocesses the wafer according to the operation flow of the target lithography stage, the processing method further includes: identifying whether the presence time of the photoresist currently coated on the wafer exceeds a preset time; if it exceeds, removing the photoresist coated on the wafer during the alignment failure process; if it does not exceed, reprocessing the wafer according to the operation flow of the target machine that has completed pose correction according to the control program.
[0094] Here, removing the photoresist that has exceeded the preset time is to ensure the accuracy of the lithography results when re-performing the target lithography stage.
[0095] Continuing with step S303, the step of obtaining quality assessment parameters after processing includes: obtaining quality assessment parameters corresponding to the target lithography stage; wherein, if the target lithography stage is an exposure stage, the obtained quality assessment parameters include overlay error; if the target lithography stage is an exposure and development stage, the obtained quality assessment parameters include overlay error and development result.
[0096] Here, the overlay error is determined by performing OVL measurement, and the development result is determined by performing ADI testing.
[0097] Regarding step S304, the quality assessment parameters include the overlay error after reprocessing. In one embodiment provided in this application, determining whether the reprocessing process of the target lithography stage is successful based on the quality assessment parameters and preset assessment rules includes: identifying whether the overlay error is within a preset error range; if it is, determining that the reprocessing process of the target lithography stage is successful; otherwise, determining that the reprocessing process of the target lithography stage is unsuccessful.
[0098] The preset error range is predetermined.
[0099] Furthermore, in another embodiment provided in this application, if it is determined that the reprocessing of the target lithography stage is unsuccessful, the processing method further includes: identifying whether there is at least one unused spare alignment mark; if not, sending a prompt message to the target client.
[0100] If it is confirmed that the function exists, then return to step S302.
[0101] In this way, for the photolithography process of wafers, this application pre-sets multiple alignment marks for the target photolithography stage that requires alignment operation. When the photolithography operation is performed using the currently selected alignment mark and photolithography recognition occurs, a new backup alignment mark is automatically selected according to the preset selection rules to process the wafer again until the processing is successful or the termination condition is met, thereby effectively improving the photolithography efficiency of wafers, increasing product yield, and reducing labor costs.
[0102] Based on the same inventive concept, this application also provides a processing device corresponding to the processing method. Since the principle of the device in this application to solve the problem is similar to the processing method described above in this application, the implementation of the device can refer to the implementation of the method, and the repeated parts will not be described again.
[0103] Please refer to 4. Figure 5 , Figure 4 This is one of the structural schematic diagrams of a device for handling alignment failures during wafer lithography provided in an embodiment of this application. Figure 5 This is a second schematic diagram of a device for handling alignment failures during wafer lithography, provided as an embodiment of this application. Figure 4 As shown, the processing device 400 includes:
[0104] The determination module 410 is used to determine whether there is at least one unused spare alignment mark if an alignment failure is detected in the target lithography stage of the wafer.
[0105] The selection module 420 is used to determine, if present, the target alignment mark required for the reprocessing of the wafer in the target lithography stage from the at least one unused spare alignment mark according to a preset selection rule;
[0106] The processing module 430 is used to reprocess the wafer according to the target alignment mark and the operation process of the target photolithography stage, and to obtain quality evaluation parameters after the processing is completed.
[0107] Evaluation module 440 is used to determine whether the reprocessing process of the target lithography stage is successful based on the quality evaluation parameters and preset evaluation rules.
[0108] Optionally, when the processing module 430 reprocesses the wafer according to the target alignment mark and the operation flow of the target photolithography stage, the processing module 430 is used to:
[0109] Obtain the overlay accuracy compensation value of the target alignment mark;
[0110] The current pose parameters of the target machine are corrected according to the overlay accuracy compensation value, and the control program required for the reprocessing of the target lithography stage is obtained.
[0111] According to the control program, the target machine that has completed the pose correction is used to reprocess the wafer according to the operation process of the target lithography stage.
[0112] Optionally, before the target machine, having completed pose correction according to the control program, reprocesses the wafer according to the operation flow of the target lithography stage, the processing module 430 is further configured to:
[0113] Identify whether the presence time of the photoresist currently coated on the wafer exceeds a preset time;
[0114] If the error exceeds the limit, the photoresist coated on the wafer will be removed during the alignment failure process.
[0115] If the value does not exceed the limit, the target machine that has completed the pose correction according to the control program will reprocess the wafer according to the operation process of the target lithography stage.
[0116] Optionally, when the selection module 420 determines the target alignment mark required for reprocessing the wafer in the target lithography stage from the at least one unused spare alignment mark according to a preset selection rule, the selection module 420 is used to:
[0117] Obtain the usage priority of each unused alternate alignment mark;
[0118] The highest priority unused alternate alignment mark will be used to determine the target alignment mark required for wafer reprocessing.
[0119] Optionally, when the processing module 430 is used to obtain quality assessment parameters after processing, the processing module 430 is used to:
[0120] Obtain the quality assessment parameters required for the target lithography stage; wherein, if the target lithography stage is the exposure stage, the obtained quality assessment parameters include overlay error; if the target lithography stage is the development stage, the obtained quality assessment parameters include overlay error and development result.
[0121] Optionally, the quality assessment parameters include the overlay error after reprocessing. When the assessment module determines whether the reprocessing of the target lithography stage is successful based on the quality assessment parameters and preset assessment rules, the assessment module 440 is used to:
[0122] Identify whether the overprinting error is within a preset error range;
[0123] If the target photolithography stage is successfully processed, the reprocessing of the target photolithography stage is determined to be successful; otherwise, the reprocessing of the target photolithography stage is determined to be unsuccessful.
[0124] Optional, such as Figure 5 As shown, the processing device 400 further includes a prompting module 450, which is used for:
[0125] If the reprocessing of the target lithography stage is determined to be unsuccessful, identify whether there is at least one unused spare alignment mark;
[0126] If it does not exist, send a notification message to the target client.
[0127] Please see Figure 6 , Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Figure 6 As shown, the electronic device 600 includes a processor 610, a memory 620, and a bus 630.
[0128] The memory 620 stores machine-readable instructions executable by the processor 610. When the electronic device 600 is running, the processor 610 and the memory 620 communicate via the bus 630. When the machine-readable instructions are executed by the processor 610, they can perform the operations described above. Figure 3 The steps in the method embodiment shown are described in detail in the method embodiment, and will not be repeated here.
[0129] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, can perform the above-described actions. Figure 3 The steps in the method embodiment shown are described in detail in the method embodiment, and will not be repeated here.
[0130] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0131] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the shown or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.
[0132] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0133] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0134] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0135] Finally, it should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The scope of protection of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A method for handling alignment failure in a wafer lithography process, the method comprising: identifying a wafer having a failed alignment; and performing a wafer alignment recovery procedure on the wafer. The processing method comprises: If it is identified that alignment failure occurs in a target photolithography stage of a wafer, it is determined whether there is at least one unused backup alignment mark; If there is, a target alignment mark required for reprocessing the wafer in the target photolithography stage is determined from the at least one unused backup alignment mark according to a preset selection rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; 2. The treatment method according to claim 1, characterized in that, The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; 3. The treatment method of claim 1, wherein The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; 4. The treatment method of claim 1, wherein It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; 5. The treatment method of claim 1, wherein It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; 6. The treatment method of claim 1, wherein The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; 7. A device for handling alignment failures during wafer lithography, characterized in that, It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; The wafer is reprocessed according to the target alignment mark and an operation procedure of the target photolithography stage, and a quality evaluation parameter is obtained after the processing is completed; It is determined whether the reprocessing process of the target photolithography stage is successful according The determining module is configured to determine whether there is at least one unused backup alignment mark if it is identified that the target photolithography stage of the wafer has alignment failure; The selecting module is configured to determine a target alignment mark required for reprocessing the wafer in the target photolithography stage from the at least one unused backup alignment mark according to a preset selection rule if there is; The processing module is configured to reprocess the wafer according to the target alignment mark and an operation procedure of the target photolithography stage, and obtain a quality evaluation parameter after the processing is completed; The evaluation module is configured to determine whether the reprocessing process of the target photolithography stage is successful according to the quality evaluation parameter and a preset evaluation rule; When the processing module is configured to reprocess the wafer according to the target alignment mark and the operation procedure of the target photolithography stage, the processing module is configured to: Obtain a overlay accuracy compensation value of the target alignment mark; Correct a current pose parameter of a target machine according to the overlay accuracy compensation value, and obtain a control program required for reprocessing the target photolithography stage; Control the target machine to reprocess the wafer according to the operation procedure of the target photolithography stage after the pose correction is completed according to the control program.
8. An electronic device, comprising: Comprise: A processor, a memory and a bus, the memory stores machine readable instructions executable by the processor, when the electronic device is running, the processor and the memory communicate through the bus, the machine readable instructions are executed by the processor to execute the steps of the processing method in any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, the computer program is executed by the processor to execute the steps of the processing method in any one of claims 1 to 6.
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