A shader-based instruction scheduling system

Abstract

The application relates to the technical field of integrated circuit design, in particular to a shader-based instruction scheduling system, which divides instruction sets according to reference resource information, determines the instruction set to which an initial instruction belongs according to target resource information corresponding to the initial instruction, and then determines a target scheduling instruction according to an instruction set priority order, resource states corresponding to each resource type and initial instructions contained in each instruction set. The instruction sets are screened through the resource states corresponding to each resource type before the target scheduling instruction is determined, so that resource checking through complex logic is avoided, and the target scheduling instruction can utilize resources with a higher shortage degree as much as possible according to the instruction set priority order, thereby improving the resource utilization rate of the shader.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design technology, and in particular to a shader-based instruction scheduling system. Background Technology

[0002] The shaders in a GPU chip typically include an instruction scheduling unit and multiple processing units. Each processing unit includes multiple thread bundles. When the instruction scheduling unit determines the instruction that needs to be scheduled, it fetches instructions from the instruction queues corresponding to each thread bundle of each processing unit, and then arbitrates the fetched instructions to determine the instruction that needs to be scheduled for execution.

[0003] However, after identifying the instruction that needs to be scheduled for execution, a rather complex logic is required to determine whether the resources of each resource type can support the execution of the instruction. If at least one resource type is occupied and cannot support the execution of the instruction in the current cycle, it is necessary to wait for the next cycle. The unoccupied resources in the current cycle will be idle, resulting in low resource utilization of the shader.

[0004] In addition, existing arbitration methods typically employ polling arbitration or priority arbitration based on instruction type. These arbitration methods are usually designed to balance instruction scheduling among processing units or to meet the priority requirements of the instruction sending side. However, for the instruction execution side, the instructions arbitrated by existing arbitration methods often fail to fully utilize current resources, resulting in resource waste and low resource utilization.

[0005] Therefore, how to improve the resource utilization of shaders has become an urgent problem to be solved. Summary of the Invention

[0006] To address the aforementioned technical problems, the technical solution adopted by this invention is as follows:

[0007] A shader-based instruction scheduling system includes: a shader, a processor, and a memory storing a computer program. The shader includes an instruction scheduling unit and M processing units. Each processing unit includes N thread bundles, each thread bundle corresponding to an instruction queue. The instruction queue includes several instructions to be executed, where M and N are both positive integers. When the computer program is executed by the processor, the following steps are implemented:

[0008] S101, For any instruction queue, select the instruction to be executed that satisfies the first preset condition from the first K instructions to be executed in the order of the queue as the initial instruction, where K is a positive integer.

[0009] S102, for any initial instruction, according to the target resource information corresponding to the initial instruction, add the initial instruction to the instruction set corresponding to the reference resource information that is consistent with the target resource information.

[0010] S103. Based on the preset instruction set priority order, the resource status corresponding to I resource types, and the initial instructions contained in J instruction sets, the target scheduling instruction is obtained, where I and J are positive integers.

[0011] Compared with the prior art, the present invention has significant advantages. Through the above technical solution, the shader-based instruction scheduling system provided by the present invention achieves considerable technical progress and practicality, and has broad industrial application value. It has at least the following advantages:

[0012] This invention divides instruction sets according to reference resource information, determines the instruction set to which the initial instruction belongs based on the target resource information corresponding to the initial instruction, and then determines the target scheduling instruction based on the priority order of the instruction sets, the resource status corresponding to each resource type, and the initial instructions contained in each instruction set. Before determining the target scheduling instruction, the instruction sets are filtered by the resource status corresponding to each resource type, avoiding resource checks through complex logic. Furthermore, the priority order of the instruction sets enables the target scheduling instruction to utilize resources with higher scarcity as much as possible, thereby improving the resource utilization of the shader. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram illustrating the process of a computer program being executed by a processor in a shader-based instruction scheduling system, as provided in an embodiment of the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] This embodiment provides a shader-based instruction scheduling system; see [link to documentation]. Figure 1This is a flowchart illustrating the execution of a computer program by a processor in a shader-based instruction scheduling system according to an embodiment of the present invention. The system includes a shader, a processor, and a memory storing the computer program. The shader includes an instruction scheduling unit and M processing units. Each processing unit includes N thread bundles, each thread bundle corresponding to an instruction queue. The instruction queue includes several instructions to be executed, where M and N are both positive integers. When the computer program is executed by the processor, the following steps are implemented:

[0017] S101, For any instruction queue, select the instruction to be executed that satisfies the first preset condition from the first K instructions to be executed in the order of the queue as the initial instruction; where K is a positive integer.

[0018] S102, for any initial instruction, according to the target resource information corresponding to the initial instruction, add the initial instruction to the instruction set corresponding to the reference resource information that is consistent with the target resource information;

[0019] S103. Based on the preset instruction set priority order, the resource status corresponding to I resource types, and the initial instructions contained in J instruction sets, the target scheduling instruction is obtained, where I and J are positive integers.

[0020] The instruction scheduling unit can be used to schedule the execution order of shader instructions. A thread bundle can refer to a group of threads that execute simultaneously. The thread bundle executes the same instruction as a whole. Several instructions to be executed in the instruction queue can conform to a preset queue order, for example, the queue order can be determined according to the order in which the instructions are generated.

[0021] The first preset condition can be used to determine the dependencies of the instruction to be executed. The initial instruction can refer to the instruction to be executed that has no dependencies.

[0022] Target resource information can represent the demand for each resource type when the corresponding initial instruction is executed, and reference resource information can also represent the demand for each resource type.

[0023] Instruction set priority order can characterize the degree of demand of the instruction set for scarce resources. Resource status can include occupied and unoccupied status, and resource type can include data transfer resources, workgroup scheduling resources, multi-target register resources, temporary register resources, etc.

[0024] In one specific implementation, the first preset condition is that the corresponding instruction to be executed has no dependency relationship with other instructions to be executed in each instruction queue.

[0025] If the instruction to be executed has a dependency relationship with other instructions to be executed in each instruction queue, it means that the instruction to be executed must wait for the dependent instructions to be executed before it can be executed. Therefore, it cannot be used as the initial instruction for subsequent arbitration.

[0026] In one specific implementation, the step of determining, for any instruction queue, the instruction that satisfies a first preset condition from the first K instructions to be executed according to the queue order as the initial instruction includes:

[0027] For any instruction queue, initialize the selection flag k=1;

[0028] Select the kth instruction to be executed from the instruction queue according to the queue order. If the kth instruction to be executed meets the first preset condition, then the kth instruction to be executed is used as the initial instruction.

[0029] Update k=k+1, return to the step of selecting the kth instruction to be executed from the instruction queue in the order of the queue, until k=K+1, and obtain several initial instructions in the instruction queue.

[0030] In this embodiment, the instruction set is divided according to reference resource information. Therefore, the number of instruction sets is usually larger than that of the instruction type division method. If each thread bundle only obtains a single instruction, there may be a large number of empty instruction sets, which will reduce the probability that the resources are fully utilized by the target scheduling instruction. In order to improve the resource utilization rate, this embodiment takes K instructions to be executed from the instruction queue of each thread bundle to determine the initial instruction, thereby improving the resource utilization rate of the shader.

[0031] Specifically, in this embodiment, K can be set to 3, and the implementer can adjust the value of K according to the actual situation.

[0032] In one specific implementation, the target resource information includes a first demand status corresponding to each of the I resource types, and the reference resource information includes a second demand status corresponding to each of the I resource types.

[0033] The step of adding the initial instruction to the instruction set corresponding to the reference resource information that is consistent with the target resource information, based on the target resource information corresponding to the initial instruction, includes:

[0034] For any resource type, if the first demand state corresponding to the resource type in the target resource information corresponding to the initial instruction is the same as the second demand state corresponding to the resource type in the reference resource information corresponding to the selected instruction set, then the demand state corresponding to the resource type is determined to be consistent.

[0035] If the demand status is consistent for all resource types, then the initial instruction is added to the selected instruction set.

[0036] The first demand state can be either demand or no demand, and the second demand state can also be either demand or no demand.

[0037] Specifically, in this embodiment, the resource demand status of each resource type is allocated according to the initial instruction, so that the initial instructions in the same instruction set require the same resources, which facilitates subsequent arbitration of instructions.

[0038] In one specific implementation, obtaining the target scheduling instruction based on a preset instruction set priority order, the resource states corresponding to I resource types, and the initial instructions contained in J instruction sets includes:

[0039] Based on the reference resource information corresponding to J instruction sets and the resource status corresponding to I resource types, R intermediate sets are selected from the J instruction sets, where R is an integer in the range [1, J].

[0040] The target scheduling instruction is obtained based on the priority order of the instruction set and the initial instructions contained in the R intermediate sets.

[0041] If a resource of a certain resource type is in a state of being occupied, but the reference resource information of a certain instruction set indicates that the instruction set requires resources of that resource type, then the instruction set is filtered out. Obviously, the initial instructions in this instruction set do not need to participate in arbitration, so as to avoid the situation where the determined target scheduling instruction cannot be executed in the current cycle, thereby improving the utilization rate of shader resources.

[0042] In one specific implementation, obtaining the target scheduling instruction based on the priority order of the instruction set and the initial instructions contained in the R intermediate sets includes:

[0043] Based on the number of initial instructions contained in each of the R intermediate sets, determine S temporary sets from the R intermediate sets, where S is an integer in the range [1, R].

[0044] The target scheduling instruction is obtained based on the priority order of the instruction set and the initial instructions contained in the S temporary sets.

[0045] If an intermediate set contains zero initial instructions, the intermediate set is filtered out to prevent it from participating in the process of selecting the target set according to the priority order of the instruction sets.

[0046] In one specific implementation, obtaining the target scheduling instruction based on the priority order of the instruction set and the initial instructions contained in the S temporary sets includes:

[0047] Based on the priority order of the instruction set, the target set is determined from the S temporary sets;

[0048] Arbitrate the initial instructions contained in the target set, and use the initial instructions obtained from the arbitration as the target scheduling instructions;

[0049] Update the resource status corresponding to each of the I resource types based on the reference resource information corresponding to the target scheduling instruction;

[0050] Return to the step of selecting R intermediate sets from the J instruction sets based on the reference resource information corresponding to the J instruction sets and the resource status corresponding to the I resource types, until no new target scheduling instruction can be obtained.

[0051] Since the initial instructions in the target set require the same type of resources, the arbitration of the initial instructions in the target set can be carried out using existing arbitration methods.

[0052] Specifically, after determining the target scheduling instruction, there may still be unused resources. Therefore, in this embodiment, the resource status corresponding to each of the I resource types is updated according to the reference resource information corresponding to the target scheduling instruction. Then, the process returns to the step of selecting R intermediate sets from the J instruction sets according to the reference resource information corresponding to each of the J instruction sets and the resource status corresponding to each of the I resource types, until no new target scheduling instruction can be obtained. This ensures that resources can be fully utilized by at least one target scheduling instruction, thereby improving the utilization rate of shader resources.

[0053] In one specific implementation, the process of determining the priority order of the instruction set includes:

[0054] Based on the resource scarcity levels corresponding to each of the I resource types, the I resource types are sorted to obtain a resource type sequence;

[0055] The priority order of the instruction sets is determined based on the resource type sequence and the reference resource information corresponding to each instruction set.

[0056] The degree of resource scarcity can be determined based on the number of processing units that share the resources of the corresponding resource type.

[0057] Specifically, a tree structure can be used to determine the priority order of instruction sets. Initialize the level identifier r=1, initialize the r-th level node to contain all instruction sets, take any node in the r-th level as the parent node, form the left child node of the parent node with the instruction set that requires the resource of the r-th resource type in the resource type sequence, and form the right child node of the parent node with the instruction set that does not require the resource of the r-th resource type in the resource type sequence. Update r=r+1, return to execute the step of taking any node in the r-th level as the parent node, until each instruction set has a corresponding leaf node. The priority order of instruction sets can be determined according to the order of the leaf nodes from left to right.

[0058] In this embodiment, the instruction set is divided according to the reference resource information. The instruction set to which the initial instruction belongs is determined according to the target resource information corresponding to the initial instruction. Then, the target scheduling instruction is determined according to the priority order of the instruction set, the resource status corresponding to each resource type, and the initial instructions contained in each instruction set. Before determining the target scheduling instruction, the instruction set is filtered by the resource status corresponding to each resource type, avoiding resource checks through complex logic. Furthermore, the priority order of the instruction set enables the target scheduling instruction to make the most of the scarce resources, thereby improving the resource utilization of the shader.

[0059] While specific embodiments of the invention have been described in detail by way of example, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the invention. The scope of this invention is defined by the appended claims.

Claims

1. A shader-based instruction scheduling system, characterized in that, The system includes: a shader, a processor, and a memory storing a computer program. The shader includes an instruction scheduling unit and M processing units. Each processing unit includes N thread bundles, and each thread bundle corresponds to an instruction queue. The instruction queue includes several instructions to be executed, where M and N are both positive integers. When the computer program is executed by the processor, the following steps are implemented: S101, For any instruction queue, select the instruction to be executed that satisfies the first preset condition from the first K instructions to be executed in the order of the queue as the initial instruction; where K is a positive integer. S102, for any initial instruction, based on the target resource information corresponding to the initial instruction, add the initial instruction to the instruction set corresponding to the reference resource information that is consistent with the target resource information, wherein the target resource information includes first demand states corresponding to I resource types respectively, and the reference resource information includes second demand states corresponding to the I resource types respectively. Adding the initial instruction to the instruction set corresponding to the reference resource information that is consistent with the target resource information based on the target resource information corresponding to the initial instruction includes: For any resource type, if the first demand state corresponding to the resource type in the target resource information corresponding to the initial instruction is the same as the second demand state corresponding to the resource type in the reference resource information corresponding to the selected instruction set, then the demand state corresponding to the resource type is determined to be consistent. If the demand status is consistent for all resource types, then add the initial instruction to the selected instruction set; S103. Based on the preset instruction set priority order, the resource status corresponding to I resource types, and the initial instructions contained in J instruction sets, the target scheduling instruction is obtained, where I and J are positive integers.

2. The shader-based instruction scheduling system according to claim 1, characterized in that, The first preset condition is that the corresponding instruction to be executed has no dependency relationship with other instructions to be executed in each instruction queue.

3. The shader-based instruction scheduling system according to claim 1, characterized in that, For any instruction queue, determining the instruction to be executed that satisfies the first preset condition from the first K instructions to be executed in the queue order as the initial instruction includes: For any instruction queue, initialize the selection flag k=1; Select the kth instruction to be executed from the instruction queue according to the queue order. If the kth instruction to be executed meets the first preset condition, then the kth instruction to be executed is used as the initial instruction. Update k=k+1, return to the step of selecting the kth instruction to be executed from the instruction queue in the order of the queue, until k=K+1, and obtain several initial instructions in the instruction queue.

4. The shader-based instruction scheduling system according to claim 1, characterized in that, The step of obtaining the target scheduling instruction based on the preset instruction set priority order, the resource status corresponding to I resource types, and the initial instructions contained in J instruction sets includes: Based on the reference resource information corresponding to J instruction sets and the resource status corresponding to I resource types, R intermediate sets are selected from the J instruction sets, where R is an integer in the range [1, J]. The target scheduling instruction is obtained based on the priority order of the instruction set and the initial instructions contained in the R intermediate sets.

5. The shader-based instruction scheduling system according to claim 4, characterized in that, The step of obtaining the target scheduling instruction based on the priority order of the instruction set and the initial instructions contained in the R intermediate sets includes: Based on the number of initial instructions contained in each of the R intermediate sets, determine S temporary sets from the R intermediate sets, where S is an integer in the range [1, R]. The target scheduling instruction is obtained based on the priority order of the instruction set and the initial instructions contained in the S temporary sets.

6. The shader-based instruction scheduling system according to claim 5, characterized in that, The step of obtaining the target scheduling instruction based on the priority order of the instruction set and the initial instructions contained in the S temporary sets includes: Based on the priority order of the instruction set, the target set is determined from the S temporary sets; Arbitrate the initial instructions contained in the target set, and use the initial instructions obtained from the arbitration as the target scheduling instructions; Update the resource status corresponding to each of the I resource types based on the reference resource information corresponding to the target scheduling instruction; Return to the step of selecting R intermediate sets from the J instruction sets based on the reference resource information corresponding to the J instruction sets and the resource status corresponding to the I resource types, until no new target scheduling instruction can be obtained.

7. The shader-based instruction scheduling system according to claim 1, characterized in that, The process of determining the priority order of the instruction set includes: Based on the resource scarcity levels corresponding to each of the I resource types, the I resource types are sorted to obtain a resource type sequence; The priority order of the instruction sets is determined based on the resource type sequence and the reference resource information corresponding to each instruction set.

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