Cache management method, storage network and electronic device

Abstract

The application discloses a cache management method, a storage network and electronic equipment, relates to the computer technical field, and a computing device is connected with a storage system through a switch. After it is determined that the storage system is started, a target migration cache amount in the computing device which can be mapped into the storage system is determined through a preset rule. Thus, idle memory resources distributed on computing nodes are integrated to form a larger and distributed cache pool for the storage system. The application provides an innovative architecture of taking idle memory of a computing device as an acceleration cache of a storage system. In the case of simplifying deployment by using an existing topology network, the overall storage system I / O performance is improved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a cache management method, storage network, and device. Background Technology

[0002] In current computer systems, storage devices typically have large-capacity cache space. When accessed data falls into the cache space, it can avoid accessing slow backend storage media and reduce latency. However, cache space is ultimately limited. When multiple computing devices access data concurrently, even access to hot data is still constrained by the hardware configuration of the front-end link of the storage device, and high-bandwidth, low-latency data services cannot be guaranteed.

[0003] Therefore, there is an urgent need for a cache processing method that optimizes cache space to solve the above-mentioned technical problems. Summary of the Invention

[0004] This application provides a cache management method, a storage network, and an electronic device to at least solve the problems in the related art.

[0005] This application provides a cache management method, including:

[0006] In response to the detection of storage system startup, the available cache resources are acquired and determined based on the impact of cache resources in the computing device;

[0007] In response to the detection that the amount of free cache resources exceeds a preset management threshold, a cache pre-processing operation is triggered, which includes:

[0008] Obtain the reserved proportion cache, and determine the target migration cache amount in the free cache resources based on the free cache resources, the reserved proportion cache, and the management threshold;

[0009] Send the target cache address that matches the target migration cache size to the storage system to form the storage system's front cache space.

[0010] This application provides a storage network, including:

[0011] Multiple computing devices, switches, and storage systems;

[0012] Multiple computing devices are connected via a switch;

[0013] The switch also communicates with the storage system;

[0014] A cache management component is deployed within the computing device. The cache management component is connected to the storage system through a data channel to map the target migration cache amount in the idle cache resources of each computing device to the storage system to form the front cache space of the storage system.

[0015] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing any of the above-described cache management methods when executing the computer program.

[0016] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described cache management methods.

[0017] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described cache management methods.

[0018] In the cache management method disclosed in this application, the computing device is connected to the storage system via a switch. After the storage system is started, the amount of idle memory resources within the computing device that can be mapped to the storage system is determined according to preset rules. This integrates the idle memory resources scattered across computing nodes into a larger, distributed cache pool for use by the storage system. This application proposes an innovative architecture that uses the idle memory of the computing device as an accelerated cache for the storage system, improving the overall I / O performance of the storage system while simplifying deployment using existing network topologies. Attached Figure Description

[0019] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 A flowchart of a cache management method provided in an embodiment of this application;

[0021] Figure 2 This application provides a schematic diagram of a cache pre-processing operation.

[0022] Figure 3 This application provides a schematic diagram of cached data feedback in an embodiment.

[0023] Figure 4 A schematic diagram of a storage network architecture provided in an embodiment of this application;

[0024] Figure 5 This is a schematic diagram of an electronic device provided in an embodiment of this application. Detailed Implementation

[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0026] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0027] As stated in the background technology disclosure, data center equipment can be functionally categorized into three types: computing devices, storage devices, and network devices. Computing devices directly serve customers, storage devices provide persistent storage and fast access to data from computing devices, and network devices support network interconnection. According to global data center construction standards and industry reports, the proportions of these three types of equipment vary significantly: computing devices account for more than half of the total number of devices, storage devices account for about one-fifth, and network devices account for less than one-fifth.

[0028] Compared to computing devices, storage devices prioritize the scalability and stability of the backend storage media in their hardware configuration, offering no significant advantage in CPU, cache, or PCIe scalability. However, a single storage device often needs to provide data access services to multiple computing devices simultaneously. When multiple computing devices access the storage device concurrently, even access to frequently accessed data is constrained by the hardware configuration of the storage device's front-end link, making it impossible to guarantee high-bandwidth, low-latency data services.

[0029] Storage devices typically have large-capacity I / O cache space. When data accessed by computing devices falls into this cache, it avoids access to slow backend storage media, significantly reducing access latency. However, storage device cache space is ultimately limited, and storage system caching strategies are generally based on volume hotspot access statistics, not on specific computing devices. As the number of serving computing devices increases, the number of mapped volumes increases, and the randomness of I / O access in the entire system also increases, leading to a decrease in cache hit rate and an increase in access latency.

[0030] In order to make full use of the idle cache resources of computing devices without affecting the original business operation of the system, this application designs an optimized cache processing method to achieve performance that exceeds the hardware bandwidth capacity of the storage system.

[0031] This application provides a caching method. After the storage system starts, the computing device determines the available cache resources based on the impact of cache resources. This allows for subsequent determination of whether to trigger pre-cache operations based on the available cache resources. This maps the available cache in the computing device to the storage system, thereby expanding the cache space of the storage system and creating a larger cache configuration space. Specifically, as shown... Figure 1 As shown, the method disclosed in the embodiments of this application is used in a computing device to optimize the cache space of the storage system, specifically including:

[0032] S100: In response to detecting that the storage system has started, obtain and determine the free cache resources based on the amount of cache resources in the computing device.

[0033] The computing device disclosed in this application is connected to the storage system via a switch. It is understood that multiple computing devices may be connected to a storage system, and the method disclosed in this application is executed in each computing device.

[0034] Specifically, the above-mentioned acquisition and determination of idle cache resources based on the impact of cache resources in the computing device includes: inputting the impact of cache resources into a first preset formula, wherein the impact of cache resources includes the number of idle physical page resources, the total number of page resources in the reclaimable cache area, the page access decay coefficient, the reclaimability weight, the cross-node access cost weight, and the size of the physical page memory area; and determining the idle cache resources based on the output of the first preset formula; the first preset formula is:

[0035] ;

[0036] Wherein, U represents free cache resources, which is the index calculated by the first preset formula in this application. F represents the number of free physical page resources, that is, the number of completely free physical pages, such as MemFree in / proc / meminfo (representing the amount of unused physical memory in the Linux system). The statistical essence of free physical pages (FreePages) is the allocatable pages of the kernel buddy system and PCP cache. N represents the total number of page resources in the reclaimable cache region, representing the total number of pages in the reclaimable memory region of the computing device, that is, the number of all page blocks marked as "not completely free but low value". Each block corresponds to an independent memory region, such as a file cache page, an anonymous page, or a slab (Slab Allocation Unit) allocation unit. H i This represents the page visit attenuation factor, specifically... λ, the decay coefficient, is the core parameter controlling the decay rate of historical access influence. Its value logic and meaning directly determine the system's sensitivity to the timeliness of page access. The larger the λ value, the faster the decay, and the greater the impact of recent access records on popularity calculation; the smaller the λ value, the slower the decay, and the longer the duration of the influence of historical access records. In cache reclamation scenarios, the value of λ needs to be determined according to business characteristics. For businesses with rapidly changing access patterns (such as news and information), λ should be a larger value (such as 0.1) to emphasize the latest access; for businesses with stable access patterns (such as databases), λ should be a smaller value (such as 0.02) to retain a longer access history. Δt represents the access timestamp based on the LRU linked list (PG_referenced flag). The larger Δt is (indicating no recent access), the higher the H... i The smaller. R i The recyclability weight is typically set as follows: anonymous pages 0.8, clean pages 1.0, dirty pages 0.6, and locked pages 0. However, those skilled in the art can adjust these weights in specific scenarios, and this application does not impose any limitations on this. i The cross-node cost weight is typically set to 1.0 for local nodes and 0.7 for remote nodes. However, those skilled in the art can adjust the weights in specific scenarios, and this application does not impose any limitations on this. The determination of whether something is remote or local depends on whether the NUMA (Non-Uniform Memory Access) of the RDMA (Remote Direct Memory Access) network card matches the NUMA of the memory. That is, whether the NUMA node of the network card performing the RDMA operation is the same as the NUMA node of the memory. Only when they match (are on the same NUMA node) is the memory considered "local" and optimal access performance achieved. Otherwise, even within the same computing device, cross-NUMA node access will incur significant performance overhead and is considered "remote" access. i This represents the size of the physical page memory region. It is understood that the aforementioned cache resource impact is information within the computing device, which can be directly obtained by the computing device using conventional techniques, and will not be elaborated upon here.

[0037] The above method of determining idle cache resources based on the impact of cache resources not only counts the number of idle pages, but also quantifies low-value occupied pages based on multiple dimensions such as access popularity, page type and access cost, and comprehensively evaluates the memory idle rate of the entire computing device, thereby improving the accuracy and reliability of idle cache resource statistics.

[0038] S200: In response to detecting that the amount of free cache resources is greater than the preset management threshold, a cache pre-processing operation is triggered.

[0039] It should be noted that the management threshold is 10 times the smallest manageable cache unit within the storage system's front-end cache space. For example, if the smallest unit within the storage system's front-end cache space is 10MB, then the management threshold is set to 100MB. Figure 2 As shown, the above pre-caching operations include:

[0040] S210. Obtain the reserved proportion cache, and determine the target migration cache amount in the free cache resources based on the free cache resources, the reserved proportion cache, and the management threshold.

[0041] The method for obtaining the reserved proportional cache includes: inputting the dynamic weighting coefficient, load prediction factor and idle cache resources into the second preset formula; determining the reserved proportional cache based on the output of the second preset formula; wherein the second preset formula is P=β*L*U; P represents the reserved proportional cache, β represents the dynamic weighting coefficient, L represents the load prediction factor, and U represents the idle cache resources.

[0042] In this specific implementation scenario, the load predictor is generated by an LSTM (Long Short-Term Memory) model, which predicts the future memory demand trend of the computing device over a certain period. The load predictor's value ranges from [0,1], where 0 represents peak load and 1 represents low load. The LSTM model is a pre-trained model. By inputting historical memory usage, process creation rate, and IO pressure prediction features into the LSTM model, it can predict the memory demand trend over a certain period. This time period is preferably set to 5 minutes, but can be set by those skilled in the art according to the actual scenario. Of course, in other specific implementation scenarios, a neural network model can also be used to determine the load predictor; this application does not limit the specific model type.

[0043] In specific implementation scenarios, the optimal maximum value for the aforementioned dynamic weighting coefficient is 0.5, indicating that half of the idle memory is migrated to the storage system. As the load on the computing device increases, the dynamic weighting coefficient decreases, and the total amount of memory reserved for the storage system within the computing device decreases rapidly, prioritizing the server's own computing business. The core function of the dynamic weighting coefficient is to adjust the influence of the load prediction factor on the reserved proportion cache, while reflecting the storage system's trade-off strategy between stability and efficiency. The dynamic weighting coefficient is dynamically adjusted based on environmental volatility. For example, in scenarios with high load fluctuations, such as e-commerce promotions, the dynamic weighting coefficient decreases, with a value range of [0.1-0.3], reducing the reserved proportion cache and freeing up resources for the computing device's own business. In stable scenarios, such as background batch processing, the dynamic weighting coefficient increases, increasing the amount of cache reserved for the storage system, thereby fully utilizing excess idle resources and increasing buffering capacity.

[0044] This application achieves dynamic adjustment of the reserved ratio cache through the above method, which meets the memory requirements of computing devices in different scenarios, thereby ensuring that the migrated computing devices can perform computing services normally and further improving the stability of the entire computing system.

[0045] In a specific implementation scenario, step S210 specifically includes: the process of determining the target migration cache specifically includes: determining the difference between the free cache resources and the reserved proportion cache as the cache amount to be approved; comparing the cache amount to be approved with the preset proportion management threshold; if the cache amount to be approved is greater than or equal to the preset proportion management threshold, then the reserved proportion cache is determined as the target migration cache amount; if the cache amount to be approved is less than the preset proportion management threshold, then the difference between the reserved proportion cache and the preset proportion management threshold is determined as the adjustment cache amount; the difference between the reserved proportion cache and the adjustment cache amount is determined as the target migration cache amount. It should be noted that when the computing device requests the target migration memory amount, it needs to ensure the memory capacity of the preset proportion of the reserved management threshold; this preset proportion is preferably set to 1 / 2 to ensure the normal execution of the computing device's own business, but it can be adjusted according to the actual scenario, and this application does not limit it.

[0046] In the scheme disclosed in this application, the target amount of cache that can be migrated to the storage system is determined under the dual constraints of a preset management threshold and a reserved cache ratio. This ensures that a minimum amount of cache is retained within the computing device, so that the computing device's own services are not affected after cache migration under any circumstances, thereby ensuring the stability of the computing device.

[0047] S220. Send the target cache address that matches the target migration cache size to the storage system to form the front cache space of the storage system.

[0048] After determining the target cache migration size, the target cache address matching this size is sent to the storage system. That is, a portion of the physical memory space on the computing device is logically treated as a front-end cache space for the storage system. The memory on the computing device is not physically moved to the storage device; it remains on the computing device. Through mapping, the storage system recognizes the migrated cache as part of its internal caching architecture. In specific implementation scenarios, the cache sizes migrated from the computing device to the storage system can be marked to indicate the computing device to which the cache space belongs, facilitating subsequent data access and analysis.

[0049] This application integrates idle memory resources scattered across computing nodes to form a larger, distributed cache pool for use by the storage system. It discloses an innovative architecture that uses the idle memory of a computing device as a storage acceleration cache, improving the overall I / O performance of the storage system while simplifying deployment using existing network topologies.

[0050] Furthermore, after performing step S200 above, that is, after completing the cache pre-processing operation, in the method disclosed in this application, the computing device will also perform the following steps, at which time the computing device performing these steps can be identified as a local computing device:

[0051] Generate a target data read instruction, which includes the target access address; send the target data read instruction to the storage system to trigger the storage system to perform a matching data feedback operation based on the target access address; and obtain the target feedback data determined by the storage system after performing the data feedback operation.

[0052] The aforementioned data feedback operations include a first feedback operation, a second feedback operation, and a third feedback operation. The storage system executes a matching data feedback operation based on the target access address, including:

[0053] The system detects whether the target access address is contained in the front cache space. In response to the detection that the target access address is not contained in the front cache space, it triggers a first feedback operation to obtain the target feedback data on the cache address that matches the target access address in the storage system. That is, if the access address is in the storage system but not in the front cache space, the storage system directly looks up the data on the corresponding address and provides feedback.

[0054] In response to the detection that the target access address is contained within the front cache space, the system checks whether the target access address matches the target migration cache address matched by the local computing device to generate a matching result. Based on the matching result, a second or third feedback operation is triggered. That is, when the target access address belongs to the front cache space constructed by the computing device, it is necessary to further confirm whether the target access address belongs to the computing device that initiated the target data read instruction (i.e., the local computing device) or another computing device connected remotely. Different operations will be triggered depending on whether the target access address belongs to different computing devices.

[0055] In response to the detection that the target access address matches the target migration cache address of the local computing device, a second feedback operation is executed to notify the local computing device to copy the target feedback data at the target access address within the local memory; that is, the computing device accepts the notification from the storage system and directly performs local memory copying to complete the IO service. In response to the detection that the target access address does not match the target migration cache address of the local computing device, a third feedback operation is triggered to notify the remote computing device to provide target feedback data that matches the target access address; in response to the detection that the target computing device is not included in the storage network to which the local computing device belongs, an exception prompt is generated to inform the user that the local computing device does not have permission to access. It should be noted that this application also proposes to adjust the caching strategy for the front-end cache space that has been included in the storage system. Specifically, the computing device sends its local network location information to the storage system, and the storage system collects the network location information of each computing device, including network type, such as Ethernet. Then, the computing device receives information from other computing devices that the storage system confirms belong to the same storage network, and further uses the IO card to actively establish a connection with other computing devices under the same storage network and authorize remote access to memory, thus constructing the storage network and laying the foundation for subsequent IO data pass-through.

[0056] The second feedback operation specifically includes: acquiring the target computing device matching the target access address; detecting whether the target computing device is included in the storage network to which the local computing device belongs; in response to detecting that the target computing device is included in the storage network to which the local computing device belongs, forwarding the target data read instruction to the target computing device; and triggering the target computing device to respond to the target data read instruction to obtain the target feedback data at the target access address within the target computing device. That is, if the cache space hit by the target access address belongs to a non-local computing device, and this non-local computing device has a network connection with the local computing device, the storage system will forward the target data read instruction, including the target access address, to the hit computing device. This computing device will then directly send the data at the target access address requested by the target data read instruction to the local computing device that initiated the target data read instruction, significantly saving the bandwidth of the storage system. Figure 3In the specific implementation scenario shown, when the read cache of a read command from computing device 1 (i.e., the local computing device) is distributed to computing device 2 (i.e., the remote computing device), the storage system forwards the read command to computing device 2 that hits the cache. Computing device 2 that hits the cache directly writes the data to computing device 1 via RDMA, and then the storage system acknowledges that the computing device's I / O operation is complete. The computing device that initiated the read command is unaware of this process, thereby achieving the goal of aggregating the bandwidth of the computing device's I / O card.

[0057] In some implementation scenarios, this application also proposes that when computing devices access the storage system, the storage system places frequently accessed data into a front-end cache space. The identification of hot data is specifically handled by the storage system through access hotspot statistics. In addition to statistical volume access hotspots, computing device information is used as part of the statistical factors. Requests originating from the same device and accessing the same address are identified. When the number of requests exceeds a certain threshold, the data at that address is determined as hot data. The aforementioned threshold is set by those skilled in the art based on actual conditions, and this application does not impose any limitations on it. Furthermore, it is understood that computing device services are divided into read-intensive and write-intensive types. This application also proposes to statistically analyze which computing devices have high read cache hit rates and which have low read cache hit rates. For computing devices with high read command hit rates, the storage system can allocate the cache space of computing devices with low read command hit rates to high-hit computing devices. When deploying services to computing devices, they can be separated according to read and write models to improve read cache hit rates. For computing devices with a high proportion of random access and high proportion of IO write operations (i.e., devices with low read cache hit rates), their cache configuration should be reduced. The above operations improve the access efficiency of read-intensive computing devices and further improve the read cache hit rate.

[0058] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0059] This application also provides a storage network, such as... Figure 4 As shown, it includes:

[0060] Multiple computing devices, switches, and storage systems;

[0061] Multiple computing devices are connected via a switch;

[0062] The switch also communicates with the storage system;

[0063] The computing device deploys a cache management component, and the communication method between the cache management component and the storage system is not limited to Ethernet and RoCE (RDMA over Converged Ethernet).

[0064] The cache management component connects to the storage system via a data channel to map the target amount of idle cache resources in each computing device to the storage system to form the front cache space of the storage system.

[0065] In some implementation scenarios, the above cache management component is used to perform the following operations:

[0066] In response to the detection of storage system startup, the available cache resources are acquired and determined based on the impact of cache resources in the computing device;

[0067] In response to the detection that the amount of free cache resources exceeds a preset management threshold, a cache pre-processing operation is triggered, which includes:

[0068] Obtain the reserved proportion cache, and determine the target migration cache amount in the free cache resources based on the free cache resources, the reserved proportion cache, and the management threshold;

[0069] Send the target cache address that matches the target migration cache size to the storage system to form the storage system's front cache space.

[0070] In some implementation scenarios, the aforementioned cache management component is also used to perform the following operations:

[0071] Generate a target data read instruction, which includes the target access address;

[0072] Send a target data read command to the storage system to trigger the storage system to perform a matching data feedback operation based on the target access address;

[0073] Obtain the target feedback data determined after the storage system performs data feedback operations.

[0074] Embodiments of this application also provide an electronic device, including: one or more processors; and a memory associated with the one or more processors, the memory being used to store program instructions, which, when read and executed by the one or more processors, perform the following operations:

[0075] In response to the detection of storage system startup, the available cache resources are acquired and determined based on the impact of cache resources in the computing device;

[0076] In response to the detection that the amount of free cache resources exceeds a preset management threshold, a cache pre-processing operation is triggered, which includes:

[0077] Obtain the reserved proportion cache, and determine the target migration cache amount in the free cache resources based on the free cache resources, the reserved proportion cache, and the management threshold;

[0078] Send the target cache address that matches the target migration cache size to the storage system to form the storage system's front cache space.

[0079] In some implementation scenarios, when program instructions are read and executed by one or more processors, the following operations are also performed:

[0080] Input the impact of cached resources into the first preset formula. The impact of cached resources includes the number of free physical page resources, the total number of page resources in the reclaimable cache area, the page access decay coefficient, the reclaimability weight, the cross-node access cost weight, and the size of the physical page memory area.

[0081] The idle cache resources are determined based on the output of the first preset formula;

[0082] The first preset formula is:

[0083] ;

[0084] U represents free cache resources, F represents the number of free physical page resources, N represents the total number of page resources in the reclaimable cache area, and H represents the number of free physical page resources. i R represents the page visit attenuation factor. i D represents the recyclability weight. i S represents the cross-node access cost weight. i Indicates the size of the physical page memory region.

[0085] In some implementation scenarios, when program instructions are read and executed by one or more processors, the following operations are also performed:

[0086] Input the dynamic weighting coefficient, load prediction factor, and idle cache resources into the second preset formula;

[0087] The reserved ratio buffer is determined based on the output of the second preset formula;

[0088] The second preset formula is P=β*L*U;

[0089] P represents the reserved proportion cache, β represents the dynamic weighting coefficient, L represents the load prediction factor, and U represents the idle cache resource.

[0090] In some implementation scenarios, when program instructions are read and executed by one or more processors, the following operations are also performed:

[0091] The difference between the free cache resources and the reserved proportion of cache is determined as the amount of cache to be approved;

[0092] Compare the amount of cache to be approved with the preset management threshold;

[0093] If the amount of cache to be approved is greater than or equal to the preset proportion of the management threshold, then the reserved proportion of cache is determined as the target migration cache amount;

[0094] If the amount of cache to be approved is less than the preset proportion of the management threshold, then the difference between the reserved proportion of cache and the preset proportion of the management threshold is determined as the amount of cache to be adjusted.

[0095] The difference between the reserved proportion of cache and the adjusted cache amount is the target migration cache amount.

[0096] In some implementation scenarios, when program instructions are read and executed by one or more processors, the following operations are also performed:

[0097] Generate a target data read instruction, which includes the target access address;

[0098] Send a target data read command to the storage system to trigger the storage system to perform a matching data feedback operation based on the target access address;

[0099] Obtain the target feedback data determined after the storage system performs data feedback operations.

[0100] In some implementation scenarios, when program instructions are read and executed by one or more processors, the following operations are also performed:

[0101] Check whether the target access address is contained in the front cache space;

[0102] In response to the detection that the target access address is not included in the front cache space, a first feedback operation is triggered to obtain the target feedback data on the cache address that matches the target access address in the storage system.

[0103] In response to the detection that the target access address is contained in the front cache space, the system checks whether the target access address matches the target migration cache address matched by the local computing device to generate a matching result.

[0104] Based on the matching results, a second or third feedback action is triggered.

[0105] In some implementation scenarios, when program instructions are read and executed by one or more processors, the following operations are also performed:

[0106] In response to the detection that the target access address matches the target migration cache address of the local computing device, a second feedback operation is performed to notify the local computing device to copy the target feedback data on the target access address within the local machine;

[0107] In response to the detection that the target access address does not match the target migration cache address matched by the local computing device, a third feedback operation is triggered to notify the remote computing device to provide target feedback data that matches the target access address.

[0108] In response to the detection that the target computing device matching the target access address is not included in the storage network to which the local computing device belongs, an exception message is generated to inform the user that the local computing device does not have permission to access it.

[0109] In some implementation scenarios, when program instructions are read and executed by one or more processors, the following operations are also performed:

[0110] Detect whether the target computing device is included in the storage network to which the local computing device belongs;

[0111] In response to the detection that the target computing device is included in the storage network to which the local computing device belongs, the target data read instruction is forwarded to the target computing device;

[0112] Trigger the target computing device to respond to the target data read command to obtain the target feedback data on the target access address within the target computing device.

[0113] in, Figure 5 An exemplary architecture of an electronic device is shown, which may include a processor 510, a video display adapter 511, a disk drive 512, an input / output interface 513, a network interface 514, and a memory 520. The processor 510, video display adapter 511, disk drive 512, input / output interface 513, network interface 514, and memory 520 can communicate with each other via a bus 530.

[0114] The processor 510 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solution provided in this application.

[0115] The memory 520 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 520 can store the operating system 521 for controlling the execution of the electronic device 500, and the basic input / output system (BIOS) 522 for controlling the low-level operations of the electronic device 500. Additionally, it can store a web browser 523, a data storage management system 524, and an icon / font processing system 525, etc. The aforementioned icon / font processing system 525 can be the application program that specifically implements the aforementioned steps in this embodiment. In summary, when the technical solution provided in this application is implemented through software or firmware, the relevant program code is stored in the memory 520 and is called and executed by the processor 510.

[0116] Input / output interface 513 is used to connect input / output modules to realize information input and output. Input / output modules can be configured as components in the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touch screens, microphones, various sensors, etc., and output devices may include displays, speakers, vibrators, indicator lights, etc.

[0117] Network interface 514 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0118] Bus 530 includes a pathway for transmitting information between various components of the device, such as processor 510, video display adapter 511, disk drive 512, input / output interface 513, network interface 514, and memory 520.

[0119] In addition, the electronic device 500 can also obtain information on specific claim conditions from the virtual resource object claim condition information database for use in condition judgment.

[0120] It should be noted that although the above-described device only shows the processor 510, video display adapter 511, disk drive 512, input / output interface 513, network interface 514, memory 520, bus 530, etc., in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the solution of this application, and does not necessarily include all the components shown in the figures.

[0121] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described cache management method embodiments at runtime.

[0122] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0123] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described cache management method embodiments.

[0124] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described cache management method embodiments.

[0125] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0126] The data management method provided in this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of this application.

Claims

1. A cache management method, characterized in that, When applied in a computing device, the method includes: In response to the detection of storage system startup, the idle cache resources are acquired and determined based on the impact of cache resources in the computing device; In response to detecting that the idle cache resources exceed a preset management threshold, a cache pre-processing operation is triggered, the cache pre-processing operation including: Obtain the reserved proportion cache, and determine the target migration cache amount in the free cache resources based on the free cache resources, the reserved proportion cache, and the management threshold; Send a target cache address that matches the target migration cache size to the storage system to form the front cache space of the storage system; The step of determining the free cache resources based on the impact of cache resources in the computing device includes: Input the cache resource impact amount into the first preset formula. The cache resource impact amount includes the number of idle physical page resources, the total number of page resources in the reclaimable cache area, the page access decay coefficient, the reclaimable weight, the cross-node access cost weight, and the physical page memory area size. The idle cache resources are determined based on the output of the first preset formula; The first preset formula is: ； U represents the free cache resources, F represents the number of free physical page resources, N represents the total number of page resources in the reclaimable cache area, and H represents the number of free physical page resources. i R represents the page access attenuation coefficient. i D represents the recyclable weight. i S represents the cross-node access cost weight. i This indicates the size of the physical page memory region; The acquisition of the reserved ratio cache includes: Input the dynamic weighting coefficient, load prediction factor, and the idle cache resources into the second preset formula; The reserved ratio buffer is determined based on the output of the second preset formula; The second preset formula is P=β*L*U; P represents the reserved proportional cache, β represents the dynamic weighting coefficient, L represents the load prediction factor, and U represents the idle cache resource.

2. The method according to claim 1, characterized in that, The step of determining the target migration cache amount in the free cache resources based on the free cache resources, the reserved proportion cache, and the management threshold includes: The difference between the idle cache resources and the reserved proportional cache is determined as the cache amount to be approved; Compare the amount of cache to be approved with the threshold for inclusion in the management system at a preset ratio; If the amount of cache to be approved is greater than or equal to the management threshold of the preset proportion, then the reserved proportion cache is determined as the target migration cache amount; If the amount of cache to be approved is less than the threshold for inclusion in the management system at a preset ratio, then the difference between the reserved ratio cache and the threshold for inclusion in the management system at a preset ratio is determined as the amount of cache to be adjusted. The difference between the reserved proportion cache and the adjusted cache amount is determined as the target migration cache amount.

3. The method according to claim 1, characterized in that, After sending the target cache address matching the target migration cache size to the storage system, the method further includes: Generate a target data read instruction, wherein the target data read instruction includes a target access address; Send the target data read instruction to the storage system to trigger the storage system to perform a matching data feedback operation based on the target access address; Obtain the target feedback data determined after the storage system performs the data feedback operation.

4. The method according to claim 3, characterized in that, The data feedback operation includes a first feedback operation, a second feedback operation, and a third feedback operation. The storage system executes a matching data feedback operation based on the target access address, including: Detect whether the target access address is included in the front cache space; In response to detecting that the target access address is not included in the front cache space, a first feedback operation is triggered to obtain target feedback data on the cache address that matches the target access address in the storage system; In response to detecting that the target access address is contained in the front cache space, the system detects whether the target access address matches the target migration cache address matched by the local computing device to generate a matching result. Based on the matching result, the second feedback operation or the third feedback operation is triggered.

5. The method according to claim 4, characterized in that, The step of triggering the second feedback operation or the third feedback operation based on the matching result includes: In response to the detection that the target access address matches the target migration cache address of the local computing device, a second feedback operation is performed to notify the local computing device to copy the target feedback data on the target access address within the local machine; In response to the detection that the target access address does not match the target migration cache address matched by the local computing device, a third feedback operation is triggered to notify the remote computing device to provide target feedback data that matches the target access address. In response to the detection that the target computing device matching the target access address is not included in the storage network to which the local computing device belongs, an exception message is generated to prompt the user that the local computing device does not have permission to access it.

6. The method according to claim 5, characterized in that, The second feedback operation includes: Detect whether the target computing device is included in the storage network to which the local computing device belongs; In response to detecting that the target computing device is included in the storage network to which the local computing device belongs, the target data read instruction is forwarded to the target computing device; The target computing device is triggered to respond to the target data read instruction to obtain the target feedback data on the target access address within the target computing device.

7. A storage network, characterized in that, The storage network includes: Multiple computing devices, switches, and storage systems; The multiple computing devices are connected to each other via the switch. The switch is also communicatively connected to the storage system; The computing device deploys a cache management component, which is connected to the storage system through a data channel to map the target migration cache amount in the idle cache resources of each computing device to the storage system to form the front cache space of the storage system. The cache management component is used to execute the cache management method as described in any one of claims 1-6.

8. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the cache management method as described in any one of claims 1 to 6 when executing the computer program.

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