Class-D audio power amplifier system

Abstract

The invention discloses a D-type audio power amplifier system. The system comprises an input stage, an integrator, a comparator, a driving stage and a power stage which are electrically connected in sequence, wherein the output of the power stage is connected to the input stage through a feedback loop; the system further comprises a common-mode level adjusting module which is used for adjusting the common-mode bias level of the input stage. According to the technical scheme provided by the invention, static power consumption caused by ripple current is effectively reduced on the basis of not increasing cost, avoiding deterioration of EMI (Electro-Magnetic Interference) characteristics and increasing switching loss by adaptively adjusting the common-mode bias level.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of audio power amplifiers, and in particular to a class D audio power amplifier system. Background Art

[0002] Although the efficiency of current Class D audio amplifiers can exceed 90%, the ripple current on the output filter still generates static power consumption that cannot be ignored.

[0003] The methods commonly used to reduce ripple current include: 1) increasing the inductance of the output filter (LC filter), but this will significantly increase the cost; 2) increasing the output PWM signal switching frequency, but this will deteriorate the EMI characteristics and also increase switching losses. Summary of the Invention

[0004] An embodiment of the present invention provides a class D audio power amplifier system to effectively reduce static power consumption caused by ripple current without introducing other problems.

[0005] An embodiment of the present invention provides a Class D audio power amplifier system, which includes an input stage, an integrator, a comparator, a driver stage, and a power stage electrically connected in sequence, wherein the output of the power stage is connected to the input stage via a feedback loop; the system also includes a common-mode level adjustment module for adjusting the common-mode bias level of the input stage.

[0006] Optionally, the common-mode level adjustment module includes a first operational amplifier and a second operational amplifier; the non-inverting input of the first operational amplifier is connected to the power supply voltage of the power stage, the inverting input is grounded through a resistor-adjustable voltage divider, and the output of the first operational amplifier is feedback connected to the inverting input of the first operational amplifier; the non-inverting input of the second operational amplifier is connected to the system reference voltage, the inverting input is connected to the output of the first operational amplifier, the output of the second operational amplifier is feedback connected to the inverting input of the second operational amplifier, and the output of the second operational amplifier outputs the common-mode bias level.

[0007] Optionally, the voltage divider unit includes multiple resistors connected in series, and the connection between each two adjacent resistors is grounded through a corresponding switch; the common-mode level adjustment module is specifically used to adjust the common-mode bias level of the input stage according to the switch state in the voltage divider unit.

[0008] Optionally, the system further includes a signal amplitude determination module, configured to generate an adjustment trigger signal for the common-mode level adjustment module according to the output signal amplitude of the input stage.

[0009] Optionally, the signal amplitude judgment module includes one or more groups of comparator units, each group includes a first comparator, a second comparator and an OR gate; the non-inverting input end of the first comparator is connected to the positive output end of the input stage, and the inverting input end is connected to a preset threshold voltage; the non-inverting input end of the second comparator is connected to the negative output end of the input stage, and the inverting input end is connected to the preset threshold voltage; the output end of the first comparator and the output end of the second comparator are respectively connected to the two input ends of the OR gate, and the output end of the OR gate outputs the adjustment trigger signal; the preset threshold voltages are different between multiple groups.

[0010] Optionally, the feedback loop includes a first resistor Rfb and a second resistor Rin, and the output of the power stage is connected to the input stage through the first resistor Rfb and the second resistor Rin in sequence; the preset threshold voltage is:

[0011] V T =k*VCC / 2*Rin / Rfb+Vcmfb;

[0012] Among them, V T represents the preset threshold voltage, k represents the target duty cycle of the power stage output, VCC represents the supply voltage of the power stage, and Vcmfb represents the current value of the common-mode bias level.

[0013] Optionally, the target duty cycle includes 15% and 30%.

[0014] Optionally, the signal amplitude determination module includes a delay unit for transmitting the latest adjustment trigger signal to the common mode level adjustment module after continuously generating the adjustment trigger signal for increasing the common mode bias level for a preset time period.

[0015] Optionally, the preset duration is 60 milliseconds.

[0016] Optionally, the input stage includes a fully differential amplifier, and the power stage is connected using a bridge push-pull circuit.

[0017] An embodiment of the present invention provides a Class D audio amplifier system comprising an input stage, an integrator, a comparator, a driver stage, and a power stage electrically connected in sequence. The output of the power stage is connected to the input stage via a feedback loop. The system also includes a common-mode level adjustment module for adjusting the common-mode bias level of the input stage. By adaptively adjusting the common-mode bias level, static power consumption caused by ripple current is effectively reduced without increasing cost, degrading EMI characteristics, or increasing switching losses. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1A schematic structural diagram of a Class D audio power amplifier system provided by an embodiment of the present invention;

[0019] Figure 2 A topological diagram of a portion of an exemplary system provided in an embodiment of the present invention;

[0020] Figure 3 A schematic diagram of the PWM voltage output and corresponding ripple current of a Class D power amplifier provided in an embodiment of the present invention;

[0021] Figure 4 A circuit diagram of an exemplary common-mode level adjustment module provided in an embodiment of the present invention;

[0022] Figure 5 A schematic structural diagram of another Class D audio power amplifier system provided by an embodiment of the present invention;

[0023] Figure 6 A circuit diagram of an exemplary signal amplitude determination module provided by an embodiment of the present invention;

[0024] Figure 7 A schematic diagram of an exemplary output signal reduction process adjustment principle provided by an embodiment of the present invention;

[0025] Figure 8 A schematic diagram of an exemplary output signal amplification process adjustment principle provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0026] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0027] In addition, the terms "first," "second," etc. may be used herein to describe various directions, actions, steps, or elements, but these directions, actions, steps, or elements are not limited by these terms. These terms are used solely to distinguish a first direction, action, step, or element from another direction, action, step, or element. For example, without departing from the scope of the embodiments of the present invention, a first operational amplifier may be referred to as a second operational amplifier, and similarly, a second operational amplifier may be referred to as a first operational amplifier. The first operational amplifier and the second operational amplifier are both operational amplifiers, but they are not the same operational amplifier. The terms "first," "second," etc. should not be understood to indicate or imply relative importance or to implicitly specify the number of the technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present invention, "plurality" means at least two, for example, two, three, etc., unless otherwise specifically defined.

[0028] Figure 1 This is a structural diagram of a Class D audio power amplifier system provided by an embodiment of the present invention. This embodiment is applicable to reducing the ripple current on the output filter of a Class D audio power amplifier with analog input. Figure 1 As shown, the system includes an input stage 100, an integrator 200, a comparator 300, a driver stage 400 and a power stage 500 electrically connected in sequence, and the output of the power stage 500 is connected to the input stage 100 through a feedback loop 600; the system also includes a common-mode level adjustment module 700 for adjusting the common-mode bias level of the input stage 100.

[0029] The exemplary system topology is as follows: Figure 2 As shown. Input stage 100 is used to receive the input audio signal and pre-amplify it. Optionally, the input stage 100 includes a fully differential amplifier (Pre-amp). The signal processed by input stage 100 is sent to integrator 200 (Integrator), which performs calculations based on the system reference voltage (VREF). Comparator 300 (Comparator) receives the signal output by integrator 200 and compares it with a preset triangular wave signal (Vtri). Driver stage 400 (Logic) receives the signal output by comparator 300 and drives power stage 500 accordingly. Power stage 500 includes a power transistor. Optionally, the power stage 500 uses a bridge push-pull circuit (BTL) connection. The output of power stage 500 is fed back to input stage 100 via feedback loop 600, thereby forming a closed-loop PWM conversion Class D power amplifier. The output of power stage 500 can also be connected to a speaker via an output LC filter to convert the system output signal into sound for playback.

[0030] Based on the above structure, a variable common-mode bias level (VCMFB) is provided for the input stage 100 through the common-mode level adjustment module 700. Specifically, different common-mode bias levels can be provided based on the change in the output signal amplitude of the input stage 100. For example, when the output signal amplitude decreases to a certain level, the common-mode bias level is increased to reduce the ripple current, while also improving the efficiency of the smaller output signal stage. When the output signal amplitude increases to a certain level, the common-mode bias level is lowered to avoid saturation of the system output signal.

[0031] Specifically, such as Figure 3 The figure shows the PWM voltage output and corresponding ripple current of the Class D power amplifier, where OUT+ and OUT- are the positive and negative PWM waveforms of the output, respectively. Rip is the ripple current on the inductor L. To provide the maximum output saturation voltage, when there is no input signal, the output PWM operates at a 50% duty cycle, such as Figure 3 For comparison, a set of PWM with a duty cycle significantly less than 50% and the corresponding inductor L ripple current waveform are given, as shown in the blue waveform in FIG. Figure 3 The red waveform in the figure. The peak value of the ripple current I Rip_peak =duty*VCC / (2*fsw*l), where VCC is the external power supply voltage that directly powers the power stage, which is usually in the range of several volts to tens of volts depending on the application, fsw is the PWM switching frequency, l is the output filter inductance value, duty is the PWM waveform duty cycle, and the output common-mode level VCM=VCC*duty. It can be seen that when the PWM duty cycle is reduced, the output common-mode level can be reduced, so that the inductor ripple current can be significantly reduced, and the static power consumption will also be reduced accordingly. When the input signal is zero, the output level is VCC / 2, and the common-mode level of the signal chain part (integrator, comparator) is biased at VDD / 2. VDD is the internally generated LDO stable level, which is used to power the low-voltage signal chain circuit. In order to balance the overall common-mode level, the input stage needs to be biased at a common-mode bias level related to both VCC and VDD. For example Figure 2 As shown, the feedback loop 600 may include a first resistor Rfb and a second resistor Rin, Figure 2 If currents I1 and I2 are balanced, we can obtain Vcmfb = VREF * (Rfb + Rin) / Rfb - VOUT * Rin / Rfb, and VOUT = VREF * (Rfb + Rin) / Rin - Vcmfb * Rfb / Rin, where VOUT is the output common-mode voltage. Therefore, given a fixed value for Rfb and Rin, increasing the common-mode bias voltage Vcmfb can reduce VOUT, thereby reducing the output PWM duty cycle and minimizing ripple current in the output filter inductor, saving power.

[0032] On the basis of the above technical solution, optional, such as Figure 4 As shown, the common-mode level adjustment module 700 includes a first operational amplifier Opamp1 and a second operational amplifier Opamp2. The non-inverting input of the first operational amplifier Opamp1 is connected to the power supply voltage VCC of the power stage 500, and the inverting input is grounded via a resistor-adjustable voltage divider. The output of the first operational amplifier Opamp1 is fed back to the inverting input of the first operational amplifier Opamp1. The non-inverting input of the second operational amplifier Opamp2 is connected to the system reference voltage VREF, and the inverting input is connected to the output of the first operational amplifier Opamp1. The output of the second operational amplifier Opamp2 is fed back to the inverting input of the second operational amplifier Opamp2, and the output of the second operational amplifier Opamp2 outputs the common-mode bias level. Thus, the common-mode bias level can be adjusted through the circuit.

[0033] Specifically, such as Figure 4 As shown, the non-inverting input of the first operational amplifier Opamp1 can be connected to the supply voltage VCC via resistor R1 and to ground via resistor R2. The output can be fed back to its inverting input via resistor R4. The voltage divider connected to its inverting input has a total resistance of R3. The output of the first operational amplifier Opamp1 can be connected to the inverting input of the second operational amplifier Opamp2 via resistor R5. The resistance of resistor R5 can be the same as the resistance of the first resistor Rfb. The output of the second operational amplifier Opamp2 can be fed back to its inverting input via resistor R6. The resistance of resistor R6 can be the same as the resistance of the second resistor Rin. The voltage reference V1 can be obtained as VCC*R2 / (R1+R2)*(R3+R4) / R3, and Vcmfb can be obtained as VREF*(R5+R6) / R5-V1*R6 / R5, where VREF can be VDD / 2. Therefore, by adjusting the resistance value of R3, a suitable common-mode bias level value can be generated to make the output PWM operate at different duty cycles when zero input is applied, such as 50%, 30% or 15% duty cycles.

[0034] Further optional, such as Figure 4 As shown, the voltage divider unit includes a plurality of resistors connected in series, and the junction between each two adjacent resistors is grounded via a corresponding switch; the common mode level adjustment module 700 is specifically used to adjust the common mode bias level of the input stage 100 according to the switch state in the voltage divider unit. Specifically, Figure 4In the example shown, three resistors are connected in series. The junction between each pair of adjacent resistors is grounded via switches SW1 and SW2. By controlling the states of individual switches (e.g., switches SW1 and SW2), the overall resistance of the voltage divider can be adjusted, thereby generating desired common-mode bias levels.

[0035] On the basis of the above technical solution, optional, such as Figure 5 As shown, the system further includes a signal amplitude determination module 800, configured to generate an adjustment trigger signal for the common-mode level adjustment module 700 based on the output signal amplitude of the input stage 100. Specifically, the common-mode level adjustment module 700 can adjust its own output common-mode bias level based on the adjustment trigger signal output by the signal amplitude determination module 800, thereby enabling automatic adjustment based on signal magnitude during normal system operation, thereby automatically adapting to a suitable output PWM duty cycle.

[0036] Further optional, such as Figure 6 As shown, the signal amplitude determination module 800 includes one or more groups of comparator units ( Figure 6 (The example includes two groups, each group includes a first comparator Comp1, a second comparator Comp2 and an OR gate; the non-inverting input of the first comparator Comp1 is connected to the positive output of the input stage 100, and the inverting input is connected to a preset threshold voltage; the non-inverting input of the second comparator Comp2 is connected to the negative output of the input stage 100, and the inverting input is connected to the preset threshold voltage; the output of the first comparator Comp1 and the output of the second comparator Comp2 are respectively connected to the two inputs of the OR gate, and the output of the OR gate outputs the adjustment trigger signal (such as Figure 6 The preset threshold voltages between the multiple groups are different (such as THR_30 and THR_15); Figure 6 V3 and V4 in FIG. ). Thus, a circuit can be used to output corresponding adjustment trigger signals based on the amplitude changes of the output signal of the input stage 100, thereby controlling the common-mode level adjustment module 700 to generate different common-mode bias levels. The number of comparator unit groups (i.e., the number of adjustment trigger signals output) can correspond to the number of switches in the voltage divider unit. The adjustment trigger signals output by each group of comparator units can be used to control the on / off state of the corresponding switch.

[0037] Further optional, such as Figure 2 As shown, the feedback loop 600 includes a first resistor Rfb and a second resistor Rin, and the output of the power stage 500 is connected to the input stage 100 through the first resistor Rfb and the second resistor Rin in sequence; the preset threshold voltage is:

[0038] V T =k*VCC / 2*Rin / Rfb+Vcmfb;

[0039] Among them, V T represents the preset threshold voltage, k represents the target duty cycle output by the power stage 500, VCC represents the supply voltage of the power stage 500, and Vcmfb represents the current value of the common-mode bias level.

[0040] Optionally, the target duty cycle includes 15% and 30%. The preset threshold voltages include V3 = 30% * VCC / 2 * Rin / Rfb + Vcmfb and V4 = 15% * VCC / 2 * Rin / Rfb + Vcmfb, and can be implemented by a simple addition circuit. Figure 2 It can be seen that the system output OUTP = -OUT1N*Rfb / Rin, OUTN = -OUT1P*Rfb / Rin, and the above-mentioned preset threshold voltage formula can be designed accordingly to be compared with the output signals OUT1P and OUT1N of the input stage 100. For example, Figure 6 As shown, when THR_15 = L, it means that the output signal amplitude is small, then THR_30 (also L at this time) can be used to control Figure 4 SW1 is closed and controlled by THR_15 Figure 4 SW2 in the circuit is closed, so that Vcmfb is adjusted to the maximum, thereby minimizing the output common mode level and the output PWM duty cycle (such as 15% duty cycle at zero input); when THR_15 = H and THR_30 = L, it means that the output signal amplitude is in the middle gear, and THR_30 can be used to control Figure 4 SW1 is closed and controlled by THR_15 Figure 4 SW2 in the circuit is disconnected, so that Vcmfb is adjusted to the middle value, so that the output common mode level is moderate and the output PWM duty cycle is moderate (such as 30% duty cycle when zero input); when THR_30=H, it means that the output signal amplitude is large, and THR_30 can be used to control Figure 4 SW1 is disconnected and controlled by THR_15 (both H at this time). Figure 4 SW2 in the circuit is disconnected, so that Vcmfb is adjusted to the minimum, thereby maximizing the output common-mode level and the output PWM duty cycle (50% duty cycle at zero input).

[0041] Based on the above technical solution, the signal amplitude determination module 800 optionally includes a delay unit for transmitting the latest adjustment trigger signal to the common-mode level adjustment module 700 after continuously generating the adjustment trigger signal for increasing the common-mode bias level for a preset duration. Optionally, the preset duration is 60 milliseconds.

[0042] Specifically, in order to avoid the introduction of noise components into the audio due to frequent switching of the common-mode bias level, the common-mode bias level can be adjusted after the output signal of the input stage 100 decreases and remains for a preset period of time. However, when the output signal of the input stage 100 increases, in order to avoid saturation of the system output signal, the common-mode bias level needs to be adjusted in a timely manner when the signal amplitude determination module 800 generates an adjustment trigger signal for lowering the common-mode bias level. For example, Figure 7 As shown in FIG, the output signal reduction process of the input stage 100 is shown. Based on the preset threshold voltages V3 and V4, when the signal decreases and remains for 60ms, the common mode bias level is increased, thereby reducing the output common mode level and the output PWM duty cycle at zero input, thereby achieving the purpose of reducing ripple current loss. Figure 8 As shown, the output signal increasing process of the input stage 100 is shown. Based on the preset threshold voltages V3 and V4, when the signal increases, the common-mode bias level is immediately lowered, thereby increasing the output common-mode level and increasing the output PWM duty cycle at zero input, thereby achieving the purpose of avoiding output signal saturation.

[0043] The Class D audio amplifier system provided in an embodiment of the present invention includes an input stage, an integrator, a comparator, a driver stage, and a power stage electrically connected in sequence. The output of the power stage is connected to the input stage via a feedback loop. The system also includes a common-mode level adjustment module for adjusting the common-mode bias level of the input stage. By adaptively adjusting the common-mode bias level, the system effectively reduces static power consumption caused by ripple current without increasing cost, degrading EMI characteristics, or increasing switching losses.

[0044] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A Class D audio power amplifier system, comprising an input stage, an integrator, a comparator, a driver stage, and a power stage electrically connected in sequence, wherein the output of the power stage is connected to the input stage via a feedback loop; The system further includes a common-mode level adjustment module for adjusting the common-mode bias level of the input stage.

2. The Class D audio power amplifier system according to claim 1, wherein: The common-mode level adjustment module includes a first operational amplifier and a second operational amplifier; the non-inverting input of the first operational amplifier is connected to the power supply voltage of the power stage, the inverting input is grounded through a resistor-adjustable voltage divider, and the output of the first operational amplifier is fed back to the inverting input of the first operational amplifier; the non-inverting input of the second operational amplifier is connected to the system reference voltage, the inverting input is connected to the output of the first operational amplifier, the output of the second operational amplifier is fed back to the inverting input of the second operational amplifier, and the output of the second operational amplifier outputs the common-mode bias level.

3. The Class D audio amplifier system according to claim 2, wherein: The voltage divider unit includes multiple resistors connected in series, and the connection between each two adjacent resistors is grounded through a corresponding switch; the common-mode level adjustment module is specifically used to adjust the common-mode bias level of the input stage according to the switch state in the voltage divider unit.

4. The Class D audio power amplifier system according to claim 1, wherein: The system further comprises a signal amplitude determination module configured to generate an adjustment trigger signal for the common-mode level adjustment module according to the output signal amplitude of the input stage.

5. The class D audio power amplifier system according to claim 4, characterized in that: The signal amplitude judgment module includes one or more groups of comparator units, each group includes a first comparator, a second comparator and an OR gate; the non-inverting input end of the first comparator is connected to the positive output end of the input stage, and the inverting input end is connected to a preset threshold voltage; the non-inverting input end of the second comparator is connected to the negative output end of the input stage, and the inverting input end is connected to the preset threshold voltage; the output end of the first comparator and the output end of the second comparator are respectively connected to the two input ends of the OR gate, and the output end of the OR gate outputs the adjustment trigger signal; the preset threshold voltages are different between multiple groups.

6. The class D audio power amplifier system according to claim 5, characterized in that: The feedback loop includes a first resistor Rfb and a second resistor Rin. The output of the power stage is connected to the input stage through the first resistor Rfb and the second resistor Rin in sequence. The preset threshold voltage is: V T =k*VCC / 2*Rin / Rfb+Vcmfb; Among them, V T represents the preset threshold voltage, k represents the target duty cycle of the power stage output, VCC represents the supply voltage of the power stage, and Vcmfb represents the current value of the common-mode bias level.

7. The class D audio power amplifier system according to claim 6, characterized in that: The target duty cycles include 15% and 30%.

8. The class D audio power amplifier system according to claim 4, characterized in that: The signal amplitude determination module includes a delay unit for transmitting the latest adjustment trigger signal to the common mode level adjustment module after continuously generating the adjustment trigger signal for increasing the common mode bias level for a preset time period.

9. The class D audio power amplifier system according to claim 8, characterized in that: The preset duration is 60 milliseconds.

10. The class D audio power amplifier system according to claim 1, wherein: The input stage includes a fully differential amplifier, and the power stage is connected using a bridge push-pull circuit.

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