Dense circuit preparation method, printed circuit board and preparation method thereof

Abstract

The invention discloses a preparation method of a dense circuit, a printed circuit board and a preparation method thereof, and the preparation method of the dense circuit comprises the steps: obtaining a target conductive layer, and carrying out the thinning of a preset position on the target conductive layer till a preset thickness is satisfied; wherein the preset position comprises a design position of the dense line; and etching the target conductive layer to form a dense line at a preset position. By means of the mode, the lateral erosion phenomenon during etching can be reduced, the situation of line breaking or ring breaking is reduced, and the preparation precision of dense lines at the preset position is improved.

Description

Technical Field

[0001] The present invention is applied to the technical field of circuit preparation, in particular to a preparation method of a dense circuit, a printed circuit board and a preparation method thereof. Background Art

[0002] PCB (Printed Circuit Board), also known as printed circuit board or printed circuit board, is an important electronic component with wide application. It is the support body of electronic components and also the carrier of electrical connection of electronic components.

[0003] The thickness of the conductive layer is inversely proportional to the line width control accuracy from a mechanistic point of view. The thicker the conductive layer, the more affected it is by the pool effect, the smaller the etching factor, and the more difficult it is to control the circuit. The pad size is also difficult to control when the hole spacing is small, and phenomena such as pad breakage caused by a small ring width are prone to occur.

[0004] The existing technology is based on a conventional etching process, which etches the entire surface. When the thickness of the conductive layer is too thick, it is difficult to prepare fine circuits, which can easily cause dimensional abnormalities and affect the function of the PCB. Summary of the Invention

[0005] The present invention provides a method for preparing dense circuits, a printed circuit board and a method for preparing the same, so as to solve the problem that fine circuits are difficult to prepare when the thickness of the conductive layer is too large.

[0006] To solve the above technical problems, the present invention provides a method for preparing dense circuits, comprising: obtaining a target conductive layer, thinning a preset position on the target conductive layer until a preset thickness is met; wherein the preset position includes a designed position of the dense circuit; etching the target conductive layer to form a dense circuit at the preset position.

[0007] Among them, the target conductive layer is obtained, and the preset position on the target conductive layer is thinned until the preset thickness is met, including: obtaining a first mask layer, and fitting the first mask layer and the target conductive layer; opening a window in the first mask layer based on the preset position to form a hollow area, and micro-etching the target conductive layer to thin the preset position on the target conductive layer through the hollow area until the preset thickness is met; removing the first mask layer.

[0008] The size of the hollowed-out area is larger than the design size of the corresponding dense circuit, and the size difference ranges from 30 to 150 microns.

[0009] Among them, the target conductive layer is etched to form a dense circuit at a preset position, including: laminating the second mask layer and the target conductive layer by vacuum adsorption; opening a window on the second mask layer based on the designed position of the dense circuit, wherein the position on the second mask layer except the designed position of the dense circuit is hollowed out; and the target conductive layer is etched until it penetrates the target conductive layer to form a dense circuit.

[0010] To solve the above technical problems, the present invention provides a method for preparing a printed circuit board, comprising: obtaining a processing board, wherein a target conductive layer is provided on at least one side of the processing board; thinning a preset position on the target conductive layer until a preset thickness is met; wherein the preset position includes a design position for a dense circuit; etching the target conductive layer to form a dense circuit at the preset position to obtain a printed circuit board.

[0011] Among them, the target conductive layer is etched to form a dense circuit at a preset position, including: laminating the second mask layer and the target conductive layer by vacuum adsorption; opening a window on the second mask layer based on the design position of the dense circuit and the design position of the ordinary circuit, wherein the position on the second mask layer except the design position of the dense circuit and the ordinary circuit is hollowed out; the target conductive layer is etched until it penetrates the target conductive layer, and the dense circuit and the ordinary circuit are formed simultaneously; and the second mask layer is removed.

[0012] The dense circuits include dense conductive circuits and dense vias, and the ordinary circuits include power circuits and non-dense conductive circuits.

[0013] Among them, the target conductive layer is etched to form dense circuits at preset positions to obtain a printed circuit board, including: pressing at least one dielectric layer and at least one conductive layer on the side of the target conductive layer away from the processed board to obtain an integral board; and performing circuit preparation and surface treatment on the integral board to obtain a printed circuit board.

[0014] To solve the above technical problems, the present invention provides a printed circuit board, comprising: a target conductive layer is provided on the printed circuit board, a plurality of grooves are formed on the target conductive layer, and a dense circuit is formed at the bottom of each groove; wherein the dense circuit is prepared by any of the above-mentioned dense circuit preparation methods or any of the above-mentioned printed circuit boards.

[0015] The target conductive layer has a thickness of at least 35 microns, and the thickness of the dense circuits ranges from 10 to 25 microns.

[0016] To solve the above technical problems, the method for preparing dense circuits of the present invention obtains a target conductive layer and thins a preset position on the target conductive layer until a preset thickness is met; wherein the preset position includes a designed position of the dense circuit; the target conductive layer is etched to form a dense circuit at the preset position, thereby thinning the preset position where the dense circuit is located in advance, so that the thickness of the local preset position on the target conductive layer is thinned, thereby reducing the side etching phenomenon during etching, reducing the occurrence of wire breakage or damage, improving the preparation accuracy of the dense circuit at the preset position, and facilitating the reliability and stability of the dense circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic flow chart of an embodiment of a method for preparing a dense circuit provided by the present invention;

[0018] Figure 2 This is a schematic flow chart of another embodiment of the method for preparing dense circuits provided by the present invention;

[0019] Figure 3 It is a schematic diagram of an embodiment of the design position of the first mask layer and the dense circuit provided by the present invention;

[0020] Figure 4 A schematic diagram of an embodiment of the second mask layer provided by the present invention;

[0021] Figure 5 This is a schematic flow chart of an embodiment of a method for preparing a printed circuit board provided by the present invention;

[0022] Figure 6 It is a structural schematic diagram of an embodiment of a printed circuit board provided by the present invention. DETAILED DESCRIPTION

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0024] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0025] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features specified as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that ordinary technicians in this field can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0026] See also Figure 1 , Figure 1 It is a flow chart of an embodiment of a method for preparing dense circuits provided by the present invention.

[0027] Step S11: obtaining a target conductive layer, and thinning a preset position on the target conductive layer until a preset thickness is met; wherein the preset position includes a design position of a dense circuit.

[0028] The target conductive layer of this embodiment is a thicker conductive layer, for example, its thickness can exceed 35 microns, specifically including but not limited to 35 microns, 36 microns, 38 microns, 40 microns, 45 microns, 48 ​​microns, 50 microns, 52 microns, 53 microns, 57 microns or 60 microns, etc.

[0029] Dense circuits include dense conductive circuits and dense vias. The line pitch of dense conductive circuits can be less than 4 mil, such as 4 mil, 3.5 mil, 3 mil, 2.8 mil, 2.4 mil, 2.0 mil, 1.5 mil or 1.0 mil, etc., which are not limited here; the hole pitch of dense vias can be below 400 microns, such as: 400 microns, 380 microns, 350 microns, 340 microns, 320 microns, 300 microns, 260 microns, 250 microns, 220 microns, 200 microns, 180 microns, 150 microns, 120 microns, 100 microns, 80 microns, 50 microns, 30 microns or 20 microns, etc.

[0030] When dense circuits need to be fabricated on a thicker target conductive layer, the undercutting caused by conventional etching can easily lead to broken wires or broken disks due to the small line width or hole pitch, affecting the reliability of the dense circuits. However, in this embodiment, the target conductive layer is first thinned at predetermined locations until a predetermined thickness is achieved; the predetermined locations include the designed locations for the dense circuits. The predetermined thickness is a thickness that the etching process can maintain precision, such as 30 microns, 28 microns, 25 microns, 20 microns, or 15 microns, etc., and is set based on actual needs and is not specifically limited here.

[0031] The thinning method may include micro-etching, grinding, milling, plasma etching, etc., which are not limited here.

[0032] Step S12: etching the target conductive layer to form dense circuits at predetermined locations.

[0033] Since the preset position where the dense circuit is located has been pre-thinned, its thickness can meet the etching thickness requirement. Therefore, this step can directly etch the target conductive layer to form a dense circuit at the preset position, thereby realizing the preparation of dense circuits on the thick target conductive layer.

[0034] Through the above steps, the method for preparing dense circuits in this embodiment obtains the target conductive layer and thins the preset positions on the target conductive layer until the preset thickness is met; wherein the preset positions include the designed positions of the dense circuits; the target conductive layer is etched to form dense circuits at the preset positions, thereby thinning the preset positions where the dense circuits are located in advance, so that the thickness of the local preset positions on the target conductive layer is thinned, thereby reducing the side etching phenomenon during etching, reducing the occurrence of wire breaks or damage, improving the preparation accuracy of the dense circuits at the preset positions, and facilitating the reliability and stability of the dense circuits.

[0035] See also Figure 2 , Figure 2 It is a flow chart of another embodiment of the method for preparing dense circuits provided by the present invention.

[0036] Step S21: obtaining a first mask layer, and laminating the first mask layer to the target conductive layer.

[0037] The first mask layer may include a negative film, a dry film, an anti-etching film, a liquid photoresist, a solder resist ink, etc., which is not limited here.

[0038] Step S22: opening windows on the first mask layer based on preset positions to form hollow areas, and micro-etching the target conductive layer to thin the preset positions on the target conductive layer through the hollow areas until a preset thickness is achieved.

[0039] The first mask layer is opened at predetermined locations corresponding to the designed locations of dense circuits to form hollow areas. This hollow area corresponds to the predetermined locations where the target conductive layer is exposed. This opening can be performed through development and exposure or local depth control.

[0040] In a specific application scenario, the size of the hollow area is larger than the design size of the corresponding dense circuit, and the size difference ranges from 30 to 150 microns. Specifically, it may include but is not limited to 30 microns, 35 microns, 40 microns, 50 microns, 67 microns, 80 microns, 89 microns, 90 microns, 100 microns, 105 microns, 109 microns, 111 microns, 115 microns, 125 microns, 136 microns, 147 microns or 150 microns, etc. This value can be adjusted according to the windowing accuracy requirements, and windows can be appropriately merged if the spacing is insufficient. By setting the above-mentioned size difference, it is ensured that the locations where the dense circuits are located are all thinned by the mask, thereby improving the thinning accuracy.

[0041] See also Figure 3 , Figure 3 It is a schematic diagram of an embodiment of the design position of the first mask layer and dense circuits provided by the present invention.

[0042] The design drawing 10 for dense circuits 11 shows the location, shape, and size of the dense circuits 11. A window is created on the first mask layer 20 based on the designed location of the dense circuits 11, creating corresponding hollow areas 21. The size of the hollow areas 21 is larger than the designed dimensions of the corresponding dense circuits 11. If the spacing between adjacent dense circuits 11 is too small, these adjacent dense circuits 11 can be merged and windowed.

[0043] At this time, the preset position on the target conductive layer is exposed through the hollow area 21 .

[0044] The thinning method of this embodiment is preferably micro-etching, which has high precision, easy control and high stability. In other embodiments, grinding, milling, plasma etching and the like can also be adopted, which are not limited here.

[0045] In one specific application scenario, microetching can be performed using a persulfate system. The formula: Sodium persulfate (Na2S2O8) or ammonium persulfate ((NH4)2S2O8) solution (5-10% concentration). Add sulfuric acid (H2SO4, 2-5%) to adjust the pH to 1.5-3.0.

[0046] In one specific application scenario, microetching can be performed using a sulfuric acid-hydrogen peroxide system (H2SO4-H2O2) with the following formula: hydrogen peroxide (3-8%) + sulfuric acid (5-10%) + stabilizer (to prevent H2O2 decomposition). In other application scenarios, microetching can also be performed using an acidic copper chloride (CuCl2-HCl) system. The specific microetching method is not limited here.

[0047] The target conductive layer is micro-etched to thin the preset position on the target conductive layer through the hollowed-out area until the preset position meets the preset thickness, thereby forming a local recessed plate.

[0048] The preset thickness is a thickness at which the etching process can maintain precision, for example, 30 microns, 28 microns, 25 microns, 20 microns or 15 microns, etc. It is set based on actual needs and is not specifically limited here.

[0049] After micro-etching, the first mask layer is removed.

[0050] Step S23: laminating the second mask layer to the target conductive layer by vacuum adsorption.

[0051] The second mask layer may include a dry film, an anti-etching film, a liquid photoresist, a solder resist ink, etc., which is not limited here.

[0052] Since after micro-etching, there will be a height difference between the preset position of the target conductive layer and other positions, in this step, the second mask layer is bonded to the target conductive layer by vacuum adsorption, so that the second mask layer is completely bonded to the target conductive layer with the surface height difference, thereby reducing the occurrence of etching agent leakage and improving etching accuracy.

[0053] Step S24: opening windows on the second mask layer based on the designed positions of the dense circuits, wherein positions on the second mask layer other than the designed positions of the dense circuits are hollowed out, and the target conductive layer is etched until the target conductive layer is penetrated to form dense circuits.

[0054] Based on the design locations of dense circuits, the second mask layer is reversely windowed. The windowing method includes developing, exposing, and localized depth control. The second mask layer is hollowed out except for the design locations of dense circuits. The locations where the second mask layer remains are the design locations of dense circuits.

[0055] See also Figure 4 , Figure 4 This is a schematic diagram of an embodiment of the second mask layer provided by the present invention.

[0056] The second mask layer of this embodiment is provided with a non-hollowed area 31, the shape and size of which are the same as the designed position of the dense circuit 11, which can be referred to in Figure 3 Design drawing 10 of dense circuit 11.

[0057] The target conductive layer is then etched until it penetrates the target conductive layer, forming a dense circuit. At this point, the thickness of the preset location has been reduced to a thickness that can be covered by etching, so the dense circuit can be prepared while maintaining the accuracy of the dense circuit.

[0058] Finally, the second mask layer is removed to obtain dense circuits.

[0059] Through the above steps, the preparation method of the dense circuit of this embodiment obtains the first mask layer, fits the first mask layer and the target conductive layer, opens a window on the first mask layer based on the preset position to form a hollow area, and micro-etches the target conductive layer to thin the preset position on the target conductive layer through the hollow area until the preset thickness is met, fits the second mask layer and the target conductive layer by vacuum adsorption, and finally opens a window on the second mask layer based on the design position of the dense circuit, and etches the target conductive layer until it penetrates the target conductive layer to form a dense circuit, thereby pre-thinning the preset position where the dense circuit is located, so that the thickness of the local preset position on the target conductive layer is thinned, thereby reducing the side etching phenomenon during etching, reducing the occurrence of wire breakage or damage, and improving the preparation accuracy of the dense circuit at the preset position, which is beneficial to the reliability and stability of the dense circuit.

[0060] See also Figure 5 , Figure 5 This is a flow chart illustrating an embodiment of a method for preparing a printed circuit board provided by the present invention. The method for preparing a printed circuit board of this embodiment includes the method for preparing dense circuits of any of the above embodiments. Specifically, the printed circuit board of this embodiment includes dense circuits prepared on a target conductive layer.

[0061] Step S31: obtaining a processed plate, wherein a target conductive layer is provided on at least one side of the processed plate.

[0062] The processed plate is a plate that has been pressed together. It can be an intermediate plate in the printed circuit board manufacturing process or a complete plate, without limitation. A target conductive layer is provided on at least one side of the processed plate. In this embodiment, the target conductive layer is provided on the outer side of the processed plate and is a relatively thick conductive layer, for example, its thickness can exceed 35 microns.

[0063] In a specific application scenario, the target conductive layer may be a power layer, a high-current signal layer, a ground layer, or a high-reliability interconnect layer, etc. The specific type is not limited here.

[0064] One side or two opposite sides of the processed plate may be provided with a target conductive layer to be processed. The specific operation is performed based on actual needs.

[0065] Step S32: thinning a preset position on the target conductive layer until a preset thickness is met; wherein the preset position includes a designed position of a dense circuit.

[0066] In this embodiment, the target conductive layer is first thinned at predetermined locations until a predetermined thickness is achieved. The predetermined locations include locations where dense circuits are designed. The predetermined thickness is a thickness that allows the etching process to maintain accuracy, such as 30 microns, 28 microns, 25 microns, 20 microns, or 15 microns. This thickness is determined based on actual needs and is not specifically limited here.

[0067] The thinning method may include micro-etching, grinding, milling, plasma etching, etc., which are not limited here.

[0068] Step S33: etching the target conductive layer to form dense circuits at preset positions to obtain a printed circuit board.

[0069] Since the preset position where the dense circuit is located has been pre-thinned, its thickness can meet the etching thickness requirement. Therefore, this step can directly etch the target conductive layer to form a dense circuit at the preset position, thereby realizing the preparation of dense circuits on the thick target conductive layer.

[0070] The method for preparing the dense circuit in this embodiment is the same as the method for preparing the dense circuit in the previous embodiment, and reference may be made to the above text, and no further details will be given.

[0071] Through the above steps, the method for preparing a printed circuit board of this embodiment obtains a processing board, wherein a target conductive layer is provided on at least one side of the processing board, and thins a preset position on the target conductive layer until a preset thickness is met; wherein the preset position includes a design position of a dense circuit; the target conductive layer is etched to form a dense circuit at the preset position to obtain a printed circuit board, thereby thinning the preset position where the dense circuit is located in advance, so that the thickness of the local preset position on the target conductive layer is thinned, thereby reducing the side etching phenomenon during etching, reducing the occurrence of wire breakage or damage, and improving the preparation accuracy of the dense circuit at the preset position, which is beneficial to the reliability and stability of the dense circuit and improves the reliability of the printed circuit board.

[0072] In some embodiments, the step of etching the target conductive layer to form dense circuits at preset positions may also include: laminating the second mask layer to the target conductive layer by vacuum adsorption, opening windows in the second mask layer based on the designed positions of the dense circuits and the designed positions of the ordinary circuits, wherein positions on the second mask layer other than the designed positions of the dense circuits and the ordinary circuits are hollowed out; etching the target conductive layer until the target conductive layer is penetrated to form dense circuits and ordinary circuits, and finally removing the second mask layer.

[0073] When conventional, normal circuits are required in addition to densely packed circuits on the target conductive layer, the second mask layer is reversely windowed based on the designed locations of the normal circuits to simultaneously etch the densely packed circuits and the normal circuits. Since the normal circuits have lower line width requirements, increasing their line width can reduce the impact of undercutting on circuit accuracy. The first mask layer does not require corresponding windowing for the normal circuits.

[0074] In some embodiments, the dense circuits include dense conductive circuits and dense vias, and the common circuits include power circuits and non-dense conductive circuits.

[0075] In some embodiments, the step of etching the target conductive layer to form dense circuits at a preset position to obtain a printed circuit board may also include: laminating at least one dielectric layer and at least one conductive layer on the side of the target conductive layer away from the processed board to obtain an integral board; and performing circuit preparation and surface treatment on the integral board to obtain a printed circuit board.

[0076] After the circuit preparation of the target conductive layer is completed, the processed board can continue to be layered, specifically, at least one dielectric layer and at least one conductive layer are alternately pressed in sequence to obtain an overall board. Finally, the overall board is subjected to circuit preparation and surface treatment to obtain a printed circuit board.

[0077] The above scheme thins the preset positions where dense circuits are located in advance, so that the thickness of the local preset positions on the target conductive layer is thinned, thereby reducing the side etching phenomenon during etching, reducing the occurrence of wire breaks or damage, and improving the preparation accuracy of dense circuits at preset positions. It is beneficial to the reliability and stability of dense circuits, improves the reliability of printed circuit boards, and can be applied to all boards that require the preparation of dense circuits.

[0078] See also Figure 6 , Figure 6 It is a structural schematic diagram of an embodiment of a printed circuit board provided by the present invention.

[0079] A target conductive layer 61 is provided on the printed circuit board 60 of this embodiment. A plurality of grooves 62 are formed on the target conductive layer 61 , and a dense circuit 63 is formed at the bottom of each groove 62 .

[0080] Among them, the dense circuit 63 is prepared by the dense circuit preparation method of any of the above-mentioned embodiments or the printed circuit board of any of the above-mentioned embodiments. Therefore, by pre-thinning the preset position where the dense circuit 63 is located, the thickness of the local preset position on the target conductive layer 61 is thinned, thereby reducing the side etching phenomenon during etching, reducing the occurrence of wire breakage or damage, and improving the preparation accuracy of the dense circuit 63 at the preset position, which is beneficial to the reliability and stability of the dense circuit 63 and improves the reliability of the printed circuit board 60.

[0081] In some embodiments, the target conductive layer 61 has a thickness of at least 35 microns, and may specifically be 35 microns, 36 microns, 38 microns, 40 microns, 45 microns, 48 ​​microns, 50 microns, 52 microns, 53 microns, 57 microns, or 60 microns, etc. The dense circuit 63 has a thickness in the range of 10-25 microns, and may specifically be 10 microns, 12 microns, 15 microns, 18 microns, 20 microns, or 25 microns, etc.

[0082] The above solution adopts a local thinning solution. While ensuring the overall thickness of the target conductive layer, it makes a fine circuit / hole spacing solution in the target conductive layer board, thereby improving the PCB yield while leaving more space for the client's circuit design.

[0083] The above description is only an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A method for preparing a dense circuit, characterized in that: The preparation method of the dense circuit includes: Obtaining a target conductive layer, and thinning a preset position on the target conductive layer until a preset thickness is met; wherein the preset position includes a design position of a dense circuit; The target conductive layer is etched to form the dense circuit at the preset position.

2. The method for preparing a dense circuit according to claim 1, characterized in that: The step of obtaining the target conductive layer and thinning a preset position on the target conductive layer until a preset thickness is met includes: Obtaining a first mask layer, and laminating the first mask layer to the target conductive layer; Opening windows in the first mask layer based on the preset positions to form hollow regions, and micro-etching the target conductive layer to thin the preset positions on the target conductive layer through the hollow regions until a preset thickness is achieved; The first mask layer is removed.

3. The method for preparing a dense circuit according to claim 2, characterized in that: The size of the hollow area is larger than the design size of the corresponding dense circuit, and the size difference ranges from 30 to 150 microns.

4. The method for preparing a dense circuit according to claim 1, characterized in that: The etching of the target conductive layer to form the dense circuit at the preset position includes: Laminating the second mask layer to the target conductive layer by vacuum adsorption; Opening windows on the second mask layer based on the designed positions of the dense circuits, wherein positions on the second mask layer other than the designed positions of the dense circuits are hollowed out; The target conductive layer is etched until the target conductive layer is penetrated to form the dense circuit.

5. A method for preparing a printed circuit board, characterized in that: The method for preparing the printed circuit board comprises: Obtaining a processed plate, wherein a target conductive layer is provided on at least one side of the processed plate; Thinning a preset position on the target conductive layer until a preset thickness is met; wherein the preset position includes a designed position of a dense circuit; The target conductive layer is etched to form the dense circuit at the preset position to obtain a printed circuit board.

6. The method for preparing a printed circuit board according to claim 5, wherein: The etching of the target conductive layer to form the dense circuit at the preset position includes: Laminating the second mask layer to the target conductive layer by vacuum adsorption; Opening windows on the second mask layer based on the designed positions of the dense circuits and the designed positions of the common circuits, wherein positions on the second mask layer other than the designed positions of the dense circuits and the common circuits are hollowed out; Etching the target conductive layer until the target conductive layer is penetrated, and simultaneously forming the dense circuit and the common circuit; The second mask layer is removed.

7. The method for preparing a printed circuit board according to claim 6, wherein: The dense circuits include dense conductive circuits and dense vias, and the common circuits include power circuits and non-dense conductive circuits.

8. The method for preparing a printed circuit board according to claim 5, wherein: The etching of the target conductive layer to form the dense circuit at the preset position to obtain a printed circuit board includes: Laminating at least one dielectric layer and at least one conductive layer on a side of the target conductive layer away from the processed plate to obtain an integral plate; The integral plate is subjected to circuit preparation and surface treatment to obtain the printed circuit board.

9. A printed circuit board, characterized in that: A target conductive layer is provided on the printed circuit board, a plurality of grooves are formed on the target conductive layer, and a dense circuit is formed at the bottom of each groove; Wherein, the dense circuit is prepared by the dense circuit preparation method according to any one of claims 1 to 4 or the printed circuit board according to any one of claims 5 to 8.

10. The printed circuit board according to claim 9, characterized in that The target conductive layer has a thickness of at least 35 microns, and the dense circuit has a thickness ranging from 10 to 25 microns.

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