Integrated circuit chip with stress compensation circuit

Abstract

An integrated circuit chip comprising a stress compensation circuit (6), the stress compensation circuit comprising a first compensation circuit branch (8p) connected between a first reference voltage supply (VB) and a second reference voltage connection (VG, VG1), and a second compensation circuit branch (8n) connected between the first reference voltage supply (VB) and a second voltage reference connection (VG, VG2), the second voltage reference connection may be the same as or different from the second reference voltage (VG1) of the first compensation circuit branch (8p); the first compensation circuit branch (8p) comprises a first voltage connection point (P) and a first stress-sensitive passive component (RP) connected between the first voltage connection point (P) and the second reference voltage (VG1), the second compensation circuit branch (8n) comprises a second voltage connection point (N) and a second stress-sensitive passive component (RN) connected between the second voltage connection point (N) and the second reference voltage connection (VG2), the first stress-sensitive passive component (RP) and the second stress-sensitive passive component (RN) are configured such that a value of a voltage difference between a first branch voltage (VP) output at the first voltage connection point (P) and a second branch voltage (VN) output at the second voltage connection point (N) represents a mechanical stress applied on the integrated circuit chip. The first compensation circuit branch (8p) comprises a first current supply (SP) connected between the first reference voltage supply (VB) and the first voltage connection point (P), and the second compensation circuit branch (8n) comprises a second current supply (SN) connected between the first reference voltage (VB) and the second voltage connection point (N), the first current supply (SP) and the first stress-sensitive passive component are connected in series, and the second current supply (SN) and the second stress-sensitive passive component (RN) are connected in series.

Description

[0001] The present invention relates to an integrated circuit chip having a stress compensation circuit. The present invention also relates to an integrated circuit chip including a magnetic field sensor, in particular a Hall effect device, for magnetic field and current sensing applications.

[0002] Semiconductor integrated circuit (IC) chips consist of thin rectangular sheets of semiconductor material on which microcircuit elements are formed. Due to their small thickness (typically a few tenths of a millimeter), they are sensitive to mechanical movements that cause bending, compression, or stretching. These can impose unpredictable changes on the electrical characteristics of circuit components, which can translate into altered and even degraded circuit performance.

[0003] These mechanical movements can have several causes: circuit packaging, temperature, or humidity, all of which can cause physical deformations on the surface of the integrated circuit chip. They are collectively labeled "mechanical stresses" by manufacturers and users, and represent external constraints that cannot be fully controlled.

[0004] A known method for detecting stress on an IC chip involves using diffused resistors, which are known to be highly sensitive to mechanical stress, arranged in a Wheatstone bridge configuration as described in US Pat. No. 9,016,135 B2, the electrical diagram of which is shown in FIG1a. In this arrangement, a combination of two different types of diffused resistors is used: P and N resistors. These are connected between a voltage supply (top node) and ground. Because the P and N diffused resistors respond differently to mechanical stress, the resistor bridge generates two voltages V at its output. P and V N , when stress is applied, these two voltages V P and V N Then, the voltage difference V P -V N The stress is sensed by electronic readout circuitry and processed in the circuitry to perform stress compensation for some function affected by mechanical stress.

[0005] At the physical level, the implementation on the IC is accomplished using two pairs of rectangular resistors wrapped around the device whose stress effects are to be measured. As described to the right below, each resistor is divided into horizontal and vertical components, making it possible to detect mechanical stress in every direction along the chip surface. A Wheatstone bridge consists of two branches, with some current flowing through each branch.

[0006] Given a supply or reference voltage V B , the current in the left branch is given by Ohm's law as V B Divide by the resistor R N and R P The sum of:

[0007]

[0008] Similarly, the current in the right branch is:

[0009]

[0010] So, I L =I R .

[0011] From this, the voltage difference at the output is simply:

[0012] V P -V N =(R P -R N )×I0

[0013] After writing:

[0014] I0=I L =I R

[0015] One limitation of this known arrangement is that the sensitivity of the output cannot be easily modified for optimal control of the readout circuitry for controlling stress-affecting component(s) of the IC chip. This problem is compounded in components such as magnetic field transducers, particularly Hall effect sensors, which exhibit nonlinear behavior under mechanical stress.

[0016] In view of the above, an object of the present invention is to provide an integrated circuit chip having a stress compensation circuit for optimally controlling components affected by stress.

[0017] Another object of the present invention is to provide a magnetic field transducer having an integrated circuit chip with a stress compensation circuit for optimally controlling a stressed magnetic field sensor.

[0018] It would be advantageous to provide an integrated circuit chip with stress compensation that is economical to manufacture and operate.

[0019] The object of the present invention is achieved by providing a semiconductor integrated circuit chip according to claim 1 and a magnetic field transducer according to claim 14 .

[0020] The dependent claims set out various advantageous features of embodiments of the invention.

[0021] The present invention discloses an integrated circuit chip including a stress compensation circuit, wherein the stress compensation circuit includes

[0022] - A first compensation circuit branch connected to a first reference voltage supply V B and the second reference voltage V G1 between, and

[0023] - A second compensation circuit branch connected to the first reference voltage supply V B and the second voltage reference V G 、V G2 The second voltage reference connection can be connected to the second reference voltage V of the first compensation circuit branch. G1 Same or different;

[0024] The first compensation circuit branch includes a first voltage connection point and a circuit connected between the first voltage connection point and the second reference voltage V G1 The first stress-sensitive passive component between

[0025] The second compensation circuit branch includes a second voltage connection point and a circuit connected between the second voltage connection point and the second reference voltage connection point V G2 A second stress-sensitive passive component between

[0026] The first stress-sensitive passive component and the second stress-sensitive passive component are configured so that a first branch voltage V outputted at a first voltage connection point is P and the second branch voltage V output at the second voltage connection point N The value of the voltage difference between represents the mechanical stress applied to the integrated circuit chip.

[0027] The first compensation circuit branch includes a circuit connected to a first reference voltage V B and a first current supply between the first voltage connection point, and the second compensation circuit branch includes a first reference voltage V B and a second voltage connection point, the first current supply and the first stress-sensitive passive component being connected in series, and the second current supply and the second stress-sensitive passive component being connected in series.

[0028] In an advantageous embodiment, the first and second current supplies are configured to generate the same supply current I P , I N .

[0029] In an advantageous embodiment, the first current supply generates a first supply current I P , the first supply current I P Different from the second supply current (I N ).

[0030] In an advantageous embodiment, the first stress-sensitive passive component is a P-diffused resistor and the second stress-sensitive passive component is an N-diffused resistor.

[0031] In an advantageous embodiment, the first and second stress-sensitive passive components each comprise at least a first and a second stress-sensitive element, such as a resistor, arranged laterally to each other on the surface of the integrated circuit chip, preferably arranged orthogonally to each other.

[0032] In an advantageous embodiment, the first and second elements (eg resistors) of the first stress-sensitive passive component are substantially identical elements, and the first and second elements (eg resistors) of the second stress-sensitive passive component are also substantially identical elements.

[0033] In an advantageous embodiment, the first stress-sensitive passive component comprises third and fourth elements (e.g. resistors), the first, second, third and fourth elements being respectively positioned around a substantially square or rectangular area, each of the four elements extending along a different side of the substantially square or rectangular area.

[0034] In an advantageous embodiment, the second stress-sensitive passive component comprises third and fourth elements, such as resistors, the first, second, third and fourth elements being respectively located around a substantially square or rectangular area, each of the four elements extending along a different side of the substantially square or rectangular area.

[0035] In a preferred embodiment, the integrated circuit chip further comprises an amplifier circuit connected to the first and second voltage connection points of the stress compensation circuit, the amplifier circuit comprising a first amplifier having an input connected to the first and second voltage connection points of the stress compensation circuit, and a second amplifier circuit having an input connected to the output of the first amplifier circuit, the second amplifier circuit having an output connected to the first and second voltage connection points.

[0036] In an advantageous embodiment, the first amplifier comprises or consists of an integrator, and the second amplifier comprises or consists of a voltage-to-current converter.

[0037] In an advantageous embodiment, the second amplifier comprises current mirrors to amplify the DC output of the amplifier circuit.

[0038] This document also discloses a magnetic field transducer, comprising an integrated circuit chip according to any of the aforementioned embodiments, the integrated circuit chip including a magnetic field sensor formed within semiconductor material of the integrated circuit chip, the first stress-sensitive passive component and the second stress-sensitive passive component being arranged adjacent to and at least partially surrounding the magnetic field sensor. The magnetic field sensor may specifically comprise a Hall effect sensor.

[0039] Other advantageous features of the present invention will become apparent from the following detailed description of embodiments of the invention and the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] FIG1a is a schematic circuit diagram of a stress compensation circuit according to the prior art;

[0041] FIG1 b is a schematic representation of the layout of the stress compensation circuit of FIG1 a around a magnetic field sensor (particularly a Hall effect sensor) according to the prior art;

[0042] Figure 2 is a schematic circuit diagram of a stress compensation circuit connected to an amplifier circuit of an integrated circuit chip according to an embodiment of the present invention;

[0043] Figure 3 is a schematic representation of a layout of a stress compensation circuit around a magnetic field sensor of an integrated circuit chip according to an embodiment of the present invention;

[0044] Figure 4 is a schematic circuit diagram of a first amplifier of an amplifier circuit of an integrated circuit chip according to an embodiment of the present invention;

[0045] Figure 5 is a schematic circuit diagram of a second amplifier of an integrated circuit chip according to an embodiment of the present invention;

[0046] Figure 6a is a schematic circuit diagram of a stress compensation circuit according to another embodiment of the present invention;

[0047] Figure 6b is based on Figure 6a Schematic representation of an embodiment of the layout of a stress compensation circuit around a magnetic field sensor of an integrated circuit chip.

[0048] Now refer to Figures 2 to 6b Embodiments of the present invention are described.

[0049] The semiconductor integrated circuit chip according to an embodiment of the present invention comprises a circuit feature, a stress compensation circuit 6 and an amplifier circuit 10 connected to the stress compensation circuit 6. For magnetic field sensing applications, the circuit feature particularly comprises a magnetic field sensor 4. The magnetic field sensor 4 may particularly be in the form of a Hall effect sensor formed within the semiconductor material of the integrated circuit chip, at or near the surface of the integrated circuit chip, and having a substantially square or rectangular shape, such as Figure 3 The stress compensation circuit 6 and the amplifier circuit 10 may also be formed within the semiconductor material of the integrated circuit chip.

[0050] The stress compensation circuit 6 comprises a first compensation circuit branch 8p and a second compensation circuit branch 8n, wherein the first and second compensation circuit branches are connected at one end to a first reference voltage supply V B The other (second) end of the first compensation circuit branch 8p and the other (second) end of the second compensation circuit branch 8n are connected to the second voltage reference V G1 、V G2 , thus the second reference voltage V at the second end of the first compensation circuit branch 8p G1 can be connected to the second reference voltage V at the second end of the second compensation branch 8n G2 In a preferred embodiment, the second reference voltage V of the first and second compensation circuit branches 8p, 8n is the same or different. G1 、V G2 The same, and can specifically be ground connection GND. However, in Figure 6a In the embodiment, the second terminal reference voltage V G1 、V G2 can be different from each other, which is especially useful for compensating offsets in stress compensation circuits. Possible offset sources are current sources S P and S N The mismatch between the input offset voltage and the read circuit. Therefore, in order to compensate for the offset, a second reference voltage V is driven differentially. G1 and V G2 The circuit is advantageous.

[0051] The first compensation circuit branch 8p includes

[0052] - A first voltage connection point P, which outputs a first voltage V P ,

[0053] -First current supply S P , which generates the interconnection at the first reference voltage supply point V B and a first current I between the first voltage connection point P P ,as well as

[0054] -First stress-sensitive passive component R P , which is connected between the first voltage connection point P and the second reference voltage connection point V G1 between,

[0055] The first current supply S P and the first stress-sensitive passive component R P Series connection.

[0056] Similarly, the second compensation circuit branch 8n includes

[0057] - A second voltage connection point N, which outputs a second voltage V N ,

[0058] - Second current supply S N , which generates the interconnection at the first reference voltage supply point V B and a second current I between the second voltage connection point N P ,as well as

[0059] - Second stress-sensitive passive component R N , which is connected between the second voltage connection point N and the second reference voltage connection point V G2 between,

[0060] The second current supply S N With the second stress-sensitive passive component R N Series connection.

[0061] In a preferred embodiment, the stress-sensitive passive component is a stress-sensitive resistor. In this embodiment, the first branch voltage output V P And the second branch voltage output V N The difference between the first current supply S P The current I P Multiply the value of the first stress-sensitive resistor R P The resistance R P The value of the second current supply S is subtracted N The current I N Multiply the value of the second stress sensitive resistor R N The resistance R N Value: V P -V N =I P R P –I N R N

[0062] The first stress-sensitive passive component R P The second stress-sensitive passive component R may advantageously be in the form of a P diffused resistor, and N This may advantageously be in the form of an N-diffused resistor.

[0063] It may be noted that, in one embodiment, when no stress is applied (ie, in an unstressed state), the resistor R P and R N The resistor values ​​may be of the same magnitude or, in a variant, of different magnitudes to compensate for the current supplied by the current source S P 、S N The generated supply current I P , I N The difference between the IC chip and the voltage VP -V N The first branch voltage output V P And the second branch voltage output V N It can also be configured to have different values ​​in the unstressed state to compensate for the offset: V N -V P =Offset voltage.

[0064] However, in a variant, the resistors may be replaced by other dipole components that are sensitive to stress, in the sense that they change the impedance at the voltage output P, ​​N depending on the stress applied to the component, examples of such dipole components being inductors and capacitors.

[0065] like Figure 3 As best shown, the first stress-sensitive passive component R P The magnetic field sensor 4 comprises at least a first stress-sensitive element and a second stress-sensitive element, such as a resistor, which are arranged laterally, in particular orthogonally, around the magnetic field sensor 4 to measure stresses applied in different directions, similar to what is known in the prior art. N Similarly, two stress-sensitive elements (for example stress-sensitive resistors) can be provided, which are arranged laterally, in particular orthogonally.

[0066] However, in the embodiment of the present invention, since each compensation circuit branch 8p, 8n has only a single stress-sensitive component, such as a diffused resistor R P 、R N Compared to the prior art that requires two diffused resistors to form a Wheatstone bridge, each stress-sensitive passive component can have two additional stress-sensitive elements (e.g., resistors), thereby increasing the sensitivity and / or accuracy of measuring mechanical stress applied to the integrated circuit chip in which these components and the magnetic field sensor are formed.

[0067] Therefore, the stress-sensitive element (eg, stress-sensitive resistor) of each of the branches 8 p , 8 n may have a rectangular shape arranged along each side of the square or rectangular magnetic field transducer 4 .

[0068] In an embodiment, each stress-sensitive element may have the shape of a thin linear strip extending over a substantial length (eg greater than 50%) of the length of an adjacent side of the magnetic field transducer 4 .

[0069] Forming a stress sensitive component R P 、R NThe plurality of stress sensitive elements may be interconnected in series with conductor paths therebetween, or may be part of an integrally formed single component including curved corner portions forming connections between orthogonally arranged elements.

[0070] exist Figure 2 In the embodiment, the second terminal V of the stress-sensitive passive component G1 、V G2 are the same, and may specifically be ground GND.

[0071] exist Figure 6b In the embodiment shown, the first and second compensation circuit branches are connected to different second reference voltages V G1 、V G2 , the first stress-sensitive passive component R P The first branch voltage output P and the reference voltage V G1 interconnected between them, and the second stress-sensitive passive component R N The voltage output N in the second branch is different from the voltage V G1 The reference voltage V G2 Interconnection between them.

[0072] Since the voltage V between the first branch voltage output P and the second branch voltage output N P -V N The measurement of the change has also to do with the corresponding current source S P 、S N The generated current I P , I N The magnitude of the value, so the sensitivity of the stress compensation circuit can be adjusted by selecting the two current sources S P 、S N The type and value of the two current sources S P 、S N In particular, a larger value than in a Wheatstone bridge circuit can be generated in order to increase the resistance across the first stress-sensitive passive component R P 、R N DC operating voltage.

[0073] The first and second branch voltage outputs P, N may be connected to an amplifier circuit 10, which may advantageously comprise a first amplifier 10A and a second amplifier 10B, such as Figure 2 and Figure 4 and 5The first and second voltage outputs P, N are connected to the input of the first amplifier 10A, and the output of the first amplifier 10A is connected to the input of the second amplifier 10B and thus drives the second amplifier 10B. The second amplifier 10B has outputs connected to the first branch and the second branch voltage outputs P, N, so that the feedback loop is closed at the first branch voltage output V P And the second branch voltage output V N An equal voltage is applied to the first stress-sensitive passive component R P and a second stress-sensitive passive component R N The difference between the values ​​of OUTPUT and OUTPUT is thus converted into an electrical quantity that can be used in the system to compensate for the effects of the stress on the electrical component of the integrated circuit that is subject to the stress, which in this embodiment is the magnetic field sensor 4, in particular a Hall effect sensor.

[0074] The first amplifier 10A may advantageously comprise Figure 4 The integrator shown is or consists of an integrator that is used to provide a sufficiently high DC gain to ensure that the output accurately reflects the voltage difference between the first and second branch voltage outputs P, N. The second amplifier 10B may advantageously include or consist of a voltage-to-current converter that includes a current mirror to generate a desired current at the output of the amplifier circuit 10.

[0075] However, it can be noted that the amplifier circuit can have different configurations, and thus various amplifier circuits known per se can be used to implement the first branch voltage output V without departing from the scope of the present invention. P And the second branch voltage output V N The difference between the amplification.

[0076] Reference Mark List

[0077] integrated circuit chips

[0078] Magnetic field sensor 4

[0079] Voltage supply connection point VB

[0080] Ground connection point GND

[0081] Stress compensation circuit 6

[0082] The first compensation circuit branch 8p

[0083] The first current supply S P

[0084] The first voltage connection point P

[0085] First stress-sensitive passive component(s) R P

[0086] P diffused resistor

[0087] Stress sensitive components

[0088] Stress sensitive resistor elements

[0089] Second compensation circuit branch 8n

[0090] The second current supply S N

[0091] The second voltage connection point N

[0092] Second stress-sensitive passive component(s) R N

[0093] N-diffused resistors

[0094] Stress sensitive components

[0095] Stress sensitive resistor elements

[0096] Amplifier circuit 10

[0097] First amplifier 10A

[0098] Integrator

[0099] Output connection OUTP, OUTN

[0100] Second amplifier 10B

[0101] Input connection OUTP, OUTN

[0102] Voltage-to-current converter

[0103] Current mirror

[0104] Output connection OUTPUT

[0105] The first branch voltage output V P

[0106] The first branch current I P

[0107] The second branch voltage output V N

[0108] The second branch current I N

[0109] The first reference voltage V B

[0110] The second reference voltage V G ,V G1,V G2 (GND)

Claims

1. An integrated circuit chip comprising a stress compensation circuit (6), the stress compensation circuit comprising - A first compensation circuit branch (8p), connected to a first reference voltage supply (V B ) and the second reference voltage connection (V G , V G1 ), and - a second compensation circuit branch (8n), connected to the first reference voltage supply (V B ) and a second voltage reference connection (V G , V G2 ), the second voltage reference connection can be connected to the second reference voltage (V G1 ) are the same or different; The first compensation circuit branch (8p) includes a first voltage connection point (P) and a second reference voltage (V G1 ) between the first stress-sensitive passive component (R P ), The second compensation circuit branch (8n) includes a second voltage connection point (N) and a second reference voltage connection point (V G2 ) between the second stress-sensitive passive component (R N ), The first stress-sensitive passive component (R P ) and the second stress-sensitive passive component (R N ) is configured so that the first branch voltage (V P ) and the second branch voltage (V N ) represents the mechanical stress applied to the integrated circuit chip, It is characterized by: The first compensation circuit branch (8p) includes a first reference voltage supply (V B ) and the first voltage connection point (P) between the first current supply (S P ), and the second compensation circuit branch (8n) includes a circuit connected to the first reference voltage (V B ) and the second voltage connection point (N) between the second current supply (S N ), the first current supply (S P ) and the first stress-sensitive passive component are connected in series, and the second current supply (S N ) and the second stress-sensitive passive component (R N ) are connected in series.

2. The integrated circuit chip according to claim 1 , wherein the first and second current supplies (S P , S N ) are configured to produce the same supply current (I P ,I N ).

3. The integrated circuit chip according to claim 1 , wherein the first current supply (S P ) is configured to generate a first supply current (I P ), and the second current supply (S N ) is configured to generate a second supply current (I N ), the first supply current (I P ) is different from the second supply current (I N ).

4. An integrated circuit chip according to any one of the preceding claims, wherein: The first stress-sensitive passive component and the second stress-sensitive passive component (R P , R N ) each comprising at least a first stress-sensitive element and a second stress-sensitive element arranged laterally to each other, preferably orthogonally to each other, on a surface of the integrated circuit chip.

5. An integrated circuit chip according to any one of the preceding claims, wherein: The first stress-sensitive passive component (R P ) the first stress-sensitive element and the second stress-sensitive element are substantially the same elements.

6. An integrated circuit chip according to any one of the two preceding claims, wherein: The second stress-sensitive passive component (R N ) the first stress-sensitive element and the second stress-sensitive element are substantially identical.

7. An integrated circuit chip according to any one of the three preceding claims, wherein: The first stress-sensitive passive component (R P ) includes third and fourth stress-sensitive elements, wherein the first, second, third and fourth stress-sensitive elements are respectively located around a substantially square or rectangular area, and each of the four stress-sensitive elements extends along a different side of the substantially square or rectangular area.

8. An integrated circuit chip according to any one of the preceding claims, wherein: The second stress-sensitive passive component (R N ) includes third and fourth stress-sensitive elements, wherein the first, second, third and fourth stress-sensitive elements are respectively positioned around a substantially square or rectangular area, and each of the four stress-sensitive elements extends along a different side of the substantially square or rectangular area.

9. An integrated circuit chip according to any one of the preceding claims, wherein: The first stress-sensitive passive component (R P ) is a stress sensitive resistor, and the second stress sensitive passive component (R N ) is a stress sensitive resistor.

10. An integrated circuit chip according to any one of the preceding claims, wherein: The first stress sensitive resistor (R P ) is a P diffused resistor, and the second stress sensitive resistor (R N ) is an N-diffused resistor.

11. An integrated circuit chip according to any one of the preceding claims, further comprising an amplifier circuit (10) connected to the first and second voltage connection points (P, N) of the stress compensation circuit (6), the amplifier circuit (10) comprising a first amplifier (10A) having inputs connected to the first and second voltage connection points (P, N) of the stress compensation circuit and a second amplifier circuit (10B) having inputs connected to the output of the first amplifier circuit, the second amplifier circuit having an output connected to the first and second voltage connection points (P, N).

12. An integrated circuit chip according to any one of the preceding claims, wherein: The first amplifier (10A) includes or consists of an integrator, and the second amplifier (10B) includes or consists of a voltage-current converter.

13. An integrated circuit chip as claimed in any preceding claim, wherein the second amplifier comprises a current mirror to amplify a DC output of the amplifier circuit.

14. A magnetic field transducer comprising an integrated circuit chip according to any one of the preceding claims, the integrated circuit chip comprising a magnetic field sensor formed within the semiconductor material of the integrated circuit chip, the first stress-sensitive passive component and the second stress-sensitive passive component being arranged adjacent to the magnetic field sensor and at least partially surrounding the magnetic field sensor.

15. A magnetic field transducer according to any one of the preceding claims, wherein: The magnetic field sensor is a Hall effect sensor.

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