Delay value calibration method, device and storage medium

Abstract

This application discloses a delay value calibration method, apparatus, and storage medium. The delay value calibration method includes acquiring multiple preset delay values. For each preset delay value: outputting a first control signal to a clock generator; acquiring a first analog waveform signal output by a main waveform generator and a second analog waveform signal output by any slave waveform generator, and performing at least one addition or subtraction operation between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal; acquiring multiple voltage signals corresponding to the multiple preset delay values, and calculating the final delay value based on the multiple voltage signals. Since the cable mismatch length does not need to be considered during the delay value calibration process, the calibration accuracy is not affected by the transmission delay matching error of the cable, thus achieving high synchronization accuracy.

Description

Technical Field

[0001] This invention relates to the field of waveform generator technology, and more specifically to a delay value calibration method, apparatus, and storage medium. Background Technology

[0002] An arbitrary waveform generator is an electronic testing device used to generate waveforms and other functional signals. It is an important signal source. Some arbitrary waveform generators also have modulation functions, which can perform additional functions such as amplitude modulation and frequency modulation on the output signal. Therefore, they are widely used in circuit teaching, development and design, and electronic product testing.

[0003] In some fields (such as phased array radar testing, quantum information system control, MIMO communication, etc.), it is necessary for multiple arbitrary waveform generators to work together. The phase difference of the output signals of each channel of multiple arbitrary waveform generators must be controlled within tens to hundreds of ps. Therefore, as the number of arbitrary waveform generators increases, it is necessary to perform synchronous calibration between the output channels of multiple arbitrary waveform generators.

[0004] Current calibration schemes calibrate the outputs of multiple arbitrary waveform generators based on a synchronizer. Specifically, the synchronizer outputs a trigger signal to multiple arbitrary waveform generators. Upon receiving the trigger signal, each arbitrary waveform generator outputs a corresponding waveform, thus synchronizing the outputs of the multiple generators. In this scheme, the synchronization accuracy depends on the transmission delay matching of the cables connecting the synchronizer to the multiple arbitrary waveform generators. However, the cable length mismatch error is significant, and the jitter of the trigger signal is also large, resulting in poor synchronization accuracy. Summary of the Invention

[0005] The main technical problem solved by this invention is the poor synchronization accuracy caused by large cable length mismatch error and large jitter of trigger signal when calibrating multiple arbitrary waveform generators synchronously.

[0006] According to a first aspect, one embodiment provides a delay value calibration method applied to a delay value calibration device, the delay value calibration device including a clock generator, the clock generator being connected to multiple waveform generators respectively, one of the multiple waveform generators being configured as a master waveform generator, and the other waveform generators being configured as slave waveform generators, the delay value calibration method comprising:

[0007] Multiple preset delay values ​​are obtained. For each preset delay value: a first control signal is output to the clock generator, the clock generator is used to output a first trigger signal to the main waveform generator in response to the first control signal, so that the main waveform generator generates and outputs a first analog waveform signal when it receives the first trigger signal; the clock generator is also used to output a second trigger signal to any slave waveform generator in response to the first control signal, so that the slave waveform generator generates and outputs a second analog waveform signal when it receives the second trigger signal; wherein, the delay between the first trigger signal and the second trigger signal is the current preset delay value, and the first analog waveform signal and the second analog waveform signal are at least clock domain synchronization signals;

[0008] The first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the slave waveform generators are obtained, and at least one addition or subtraction operation is performed between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the slave waveform generators to obtain a corresponding voltage signal.

[0009] Obtain multiple voltage signals corresponding to the multiple preset delay values, and calculate the final delay value based on the multiple voltage signals.

[0010] In one embodiment, acquiring multiple voltage signals corresponding to the multiple preset delay values ​​and calculating the final delay value based on the multiple voltage signals includes:

[0011] Determine the effective value of each of the plurality of voltage signals;

[0012] Based on the effective values ​​corresponding to the multiple voltage signals, curve fitting is performed using the least squares method, and the polynomial of the fitted curve is determined.

[0013] The final delay value is calculated using a polynomial based on the fitted curve.

[0014] In one embodiment, the delay value calibration device includes: an inverting amplifier circuit;

[0015] The step of acquiring the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator, and performing at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal, includes:

[0016] The inverting amplifier circuit acquires the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator. The inverting amplifier circuit then performs addition and amplification operations on the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal.

[0017] In one embodiment, the polynomial calculation of the final delay value based on the fitted curve includes:

[0018] The maximum point in the fitted curve is determined by the polynomial of the fitted curve.

[0019] The final delay value is calculated based on the maximum point in the fitted curve.

[0020] In one embodiment, the delay value calibration device includes: an instrumentation amplifier circuit;

[0021] The step of acquiring the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator, and performing at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal, includes:

[0022] The instrumentation amplifier circuit acquires the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator. The instrumentation amplifier circuit then performs subtraction and amplification operations on the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal.

[0023] In one embodiment, the delay value calibration device includes: a differential amplifier circuit;

[0024] The step of acquiring the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator, and performing at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal, includes:

[0025] The differential amplifier circuit acquires the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator. The differential amplifier circuit then performs subtraction and amplification operations on the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal.

[0026] In one embodiment, the polynomial calculation of the final delay value based on the fitted curve includes:

[0027] The minimum point in the fitted curve is determined by the polynomial of the fitted curve.

[0028] The final delay value is calculated based on the minimum point in the fitted curve.

[0029] According to the second aspect, one embodiment provides a delay value calibration device, the delay value calibration device comprising: a clock generator and a processing module;

[0030] The processing module is connected to the clock generator and is used to perform the delay value calibration method as described above.

[0031] In one embodiment, the delay value calibration device includes: an inverting amplifier circuit, which is used to acquire a first analog waveform signal output by the main waveform generator and a second analog waveform signal output by any slave waveform generator, and to perform addition and amplification operations on the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal;

[0032] or;

[0033] The delay value calibration device includes an instrumentation amplifier circuit, which is used to acquire the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the waveform generators, and to perform subtraction and amplification operations between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the waveform generators to obtain a corresponding voltage signal.

[0034] or;

[0035] The delay value calibration device includes a differential amplifier circuit, which is used to acquire the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the waveform generators, and to perform subtraction and amplification operations between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the waveform generators to obtain a corresponding voltage signal.

[0036] According to a third aspect, one embodiment provides a computer-readable storage medium storing a program that can be executed by a processor to implement the delay value calibration method as described above.

[0037] When performing delay value calibration according to the delay value calibration method, apparatus, and storage medium of the above embodiments,

[0038] One waveform generator from a set of multiple waveform generators is configured as the master waveform generator, and the others are configured as slave waveform generators. During synchronization calibration, multiple preset delay values ​​are acquired. For each preset delay value: a first trigger signal is output to the master waveform generator to cause it to output a first analog waveform signal; a second trigger signal is output to any one of the slave waveform generators to cause it to output a second analog waveform signal. At least one addition or subtraction operation is performed between the first and second analog waveform signals to obtain a corresponding voltage signal. For multiple preset delay values, multiple voltage signals are obtained. Finally, the final delay value is calculated based on these multiple voltage signals. Each slave waveform generator is calibrated individually to synchronize the outputs of the multiple waveform generators. Therefore, during delay value calibration, the output delay of the waveform generator is adjusted by adjusting multiple sets of first and second trigger signals output by the clock generator. The cable mismatch length does not need to be considered; therefore, the calibration accuracy is not affected by the cable transmission delay matching error, resulting in high synchronization accuracy. Attached Figure Description

[0039] Figure 1 A flowchart of the delay value calibration method;

[0040] Figure 2 A flowchart for calculating the final delay value in one embodiment;

[0041] Figure 3 This is a flowchart illustrating the calculation of the final delay value based on receiving a first analog waveform signal and a second analog waveform signal using an inverting amplifier circuit, as one embodiment.

[0042] Figure 4 This is a flowchart illustrating the calculation of the final delay value when receiving a first analog waveform signal and a second analog waveform signal based on a differential amplifier circuit or an instrumentation amplifier circuit, as described in one embodiment.

[0043] Figure 5 This is a schematic block diagram of a delay value calibration device in one embodiment;

[0044] Figure 6 This is a schematic diagram of the delay value calibration device in another embodiment;

[0045] Figure 7 The effective value of the output voltage signal of the inverting amplifier circuit in one embodiment and Relationship curve diagram;

[0046] Figure 8 This is a circuit diagram of a differential amplifier circuit in one embodiment;

[0047] Figure 9 This is a circuit diagram of an instrumentation amplifier circuit in one embodiment;

[0048] Figure 10 In one embodiment, the effective value of the output voltage signal of the differential discharge circuit or instrumentation amplifier circuit is... Relationship curve diagram;

[0049] Figure 11 This is a pulse diagram of a single trigger signal in one embodiment;

[0050] Figure 12 This is a circuit diagram of an inverting amplifier circuit in one embodiment.

[0051] Reference numerals: 100, Processing module; 101, Central processing unit; 102, Analog-to-digital converter; 103, Inverting amplifier circuit; 104, Switch array; 105, Differential amplifier circuit; 106, Instrumentation amplifier circuit; 200, Clock generator; 300, Master waveform generator; 400, Slave waveform generator. Detailed Implementation

[0052] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings. Similar elements in different embodiments are referred to by associated similar element reference numerals. In the following embodiments, many details are described to facilitate a better understanding of this application. However, those skilled in the art will readily recognize that some features may be omitted in different situations, or may be replaced by other elements, materials, or methods. In some cases, certain operations related to this application are not shown or described in the specification. This is to avoid obscuring the core parts of this application with excessive description. For those skilled in the art, detailed description of these related operations is not necessary; they can fully understand the related operations based on the description in the specification and general technical knowledge in the art.

[0053] Furthermore, the features, operations, or characteristics described in the specification can be combined in any suitable manner to form various embodiments. At the same time, the steps or actions in the method description can be rearranged or adjusted in a manner obvious to those skilled in the art. Therefore, the various orders in the specification and drawings are only for the clear description of a particular embodiment and do not imply a necessary order, unless otherwise stated that a particular order must be followed.

[0054] The serial numbers assigned to components in this document, such as "first" and "second," are used only to distinguish the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this application, unless otherwise specified, include both direct and indirect connections (linkages).

[0055] Previously, when calibrating multiple waveform generators (also known as arbitrary waveform generators) synchronously, a multi-channel high-speed signal acquisition instrument (such as a digital oscilloscope) was used to measure the phase difference between the output channels of multiple arbitrary waveform generators, and the phase difference was compensated into the arbitrary waveform generator to achieve synchronization of multiple arbitrary waveform generators. The disadvantage of this method is that it requires a high-bandwidth, high-sampling-rate signal acquisition instrument, the cost of synchronous calibration is relatively expensive, and it relies heavily on manual measurement, resulting in low calibration efficiency.

[0056] Therefore, a method for calibrating multiple waveform generators based on a synchronizer is proposed. Specifically, the synchronizer outputs a trigger signal to multiple arbitrary waveform generators. Upon receiving the trigger signal, each arbitrary waveform generator outputs a corresponding waveform, achieving output synchronization across the multiple generators. In this scheme, the synchronization accuracy depends on the transmission delay matching of the cables connecting the synchronizer to the multiple arbitrary waveform generators. However, significant cable length mismatch errors and large jitter in the trigger signal result in poor synchronization accuracy. Therefore, this calibration scheme limits the accuracy and flexibility of synchronization between different channels of multiple arbitrary waveform generators. In certain cutting-edge research fields, such as phased array radar testing, quantum information system control, and MIMO (Multiple-Input Multiple-Output) communication, a large number of waveform generators need to work collaboratively, requiring the phase difference of the output signals from each channel to be controlled within tens to hundreds of ps. As the number of waveform generators increases, the difference in the arrival time of the trigger signal at different generators leads to a large phase difference in the output waveforms, which is unacceptable in applications with high synchronization requirements.

[0057] To address the aforementioned technical problems, in some embodiments of this application, one of the multiple waveform generators is configured as the master waveform generator 300. Figure 5 , Figure 6(Master) and other waveform generators are configured as slave waveform generators 400 ( Figure 5 , Figure 6 In the process of synchronous calibration, multiple preset delay values ​​are obtained from _1 to _N. For each preset delay value, a first trigger signal is output to the main waveform generator 300 to make the main waveform generator 300 output a first analog waveform signal, and a second trigger signal is output to any slave waveform generator 400 to make the slave waveform generator 400 output a second analog waveform signal. At least one addition or subtraction operation is performed between the first analog waveform signal and the second analog waveform signal to obtain a corresponding voltage signal. For multiple preset delay values, multiple voltage signals are obtained. Finally, the final delay value is calculated based on the multiple voltage signals. Each slave waveform generator 400 is calibrated one by one to make the output of multiple waveform generators synchronized. Therefore, during the delay value calibration process, the delay of the analog waveform signal output by the waveform generator is adjusted by adjusting the delay of multiple sets of trigger signals output by the clock generator 200. For each set of analog waveform signals, at least one addition or subtraction operation is performed to obtain a corresponding voltage signal. Finally, the final delay value is calculated based on multiple voltage signals. It is not necessary to pay attention to the cable mismatch length. Therefore, the calibration accuracy is not affected by the transmission delay matching error of the cable, and the synchronization accuracy is high.

[0058] Some embodiments provide a waveform generator for outputting arbitrary waveforms based on received control signals. For example, it outputs sine waves, square waves, or other function signals. Another example is outputting arbitrary waveform signals based on received control signals.

[0059] Please refer to Figure 5 , Figure 6 A waveform generator includes at least one trigger signal input channel, one clock signal input channel, one clock signal output channel, one configuration interface, and one analog waveform output channel. The signals in the clock signal input and output channels can be either a built-in 10MHz clock reference signal or a sampling clock signal from a high-speed DAC (Digital to Analog Converter). The analog waveform output channel of the waveform generator outputs an analog waveform signal in response to the trigger signal received by its trigger signal input channel. The configuration interface can be understood as a communication interface, allowing communication and data exchange with external devices. This configuration interface can be an Ethernet port, serial port, Bluetooth interface, Wi-Fi interface, etc. For example, it can connect to a CPU via the configuration interface.

[0060] Some embodiments provide a delay value calibration device that can calibrate the delay values ​​between multiple waveform generators that need to work together, so as to improve the synchronization accuracy when multiple waveform generators output synchronously.

[0061] In some embodiments, please refer to Figure 5 , Figure 6 The delay value calibration device may include a processing module 100 and a clock generator 200. The processing module 100 is connected to the clock generator 200 and multiple waveform generators, and the clock generator 200 is connected to multiple waveform generators. The delay value calibration device is described in detail below.

[0062] In some embodiments, the clock generator 200 can be a clock generator 200 conforming to the JESD204B standard, so that the delay step accuracy between the first trigger signal and the second trigger signal can reach the level of several ps, thereby achieving a synchronization accuracy of several ps between multiple analog waveform output channels of multiple waveform generators, improving synchronization accuracy, and the technical solution is simple and easy to use. Figure 5 and Figure 6 In this context, SYSREF represents the trigger signal.

[0063] In some embodiments, the clock generator 200 may output several reference signals, which in this context refer to trigger signals, providing a system-level reference for the sampling timing. Please refer to [link to relevant documentation]. Figure 11 The clock generator 200 can output a square wave trigger signal. The trigger signal can be configured as a single pulse signal, several pulse signals, or a periodic pulse signal, and the width of the pulse signal can be flexibly configured.

[0064] In some embodiments, clock generator 200 may be a clock generator of model number LMX04832, which can provide delay adjustment with a step accuracy of 25ps; of course, clock generator 200 may also be a clock generator of model number LMX1204, which can provide delay adjustment with a step accuracy of up to 2.5ps.

[0065] In some embodiments, the processing module 100 is used to acquire multiple preset delay values. For each preset delay value: the processing module 100 is used to output a first control signal to the clock generator 200, the clock generator 200 is used to output a first trigger signal to the main waveform generator 300 in response to the first control signal, so that the main waveform generator 300 generates and outputs a first analog waveform signal when it receives the first trigger signal. The clock generator 200 is also used to output a second trigger signal to any slave waveform generator 400 in response to the first control signal, so that any slave waveform generator 400 generates and outputs a second analog waveform signal when it receives the second trigger signal. The delay between the first trigger signal and the second trigger signal is the current preset delay value, and the first analog waveform signal and the second analog waveform signal are at least clock domain synchronization signals. In setting the preset delay values, those skilled in the art can determine the number and specific values ​​of the preset delay values ​​according to the actual situation. Specifically, multiple preset delay values ​​can be set in advance for verification tests. That is, based on multiple preset delay values, the second analog waveform signal output from the waveform generator 400 and the first analog waveform signal output from the main waveform generator 300, adjusted by these multiple preset delay values, are tested to verify whether they meet the synchronization accuracy requirements. If yes, multiple waveform generators are calibrated one by one based on these multiple preset delay values. If not, the number and / or specific values ​​of the preset delay values ​​can be appropriately increased until the second analog waveform signal output from the waveform generator 400 and the first analog waveform signal output from the main waveform generator 300 meet the synchronization accuracy requirements. The verification process can use the delay value adjustment method of this application. In some embodiments, 10-20 preset delay values ​​can be set. For example, 15 preset delay values ​​can be set; 20 preset delay values ​​can also be set; of course, other numbers of preset delay values ​​can also be set, such as 10, 18, 17, 14, 12, 13, etc.

[0066] The first trigger signal can be understood as a reference signal. That is, when adjusting the delay value between the first trigger signal and the second trigger signal, the delay value of the second trigger signal relative to the first trigger signal is adjusted.

[0067] The processing module 100 is also used to acquire the first analog waveform signal output by the main waveform generator 300 and the second analog waveform signal output by any one of the slave waveform generators 400, and to perform at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator 300 and the second analog waveform signal output by any one of the slave waveform generators 400 to obtain a corresponding voltage signal.

[0068] The processing module 100 is also used to acquire multiple voltage signals corresponding to multiple preset delay values, and calculate the final delay value based on the multiple voltage signals.

[0069] During the delay value calibration process, based on the clock generator 200, the processing module 100 achieves synchronized output between the analog waveform output channels of multiple waveform generators. By adjusting the delay of multiple sets of trigger signals output by the clock generator 200, the delay between the analog waveform output channels of the waveform generators is adjusted, allowing the processing module 100 to receive voltage signals corresponding to the multiple sets of trigger signals. Finally, the final delay value is calculated based on multiple voltage signals, thus achieving precise synchronization between different analog waveform output channels of multiple waveform generators. The delay value adjustment process is independent of whether the cable lengths between the processing module 100 and any waveform generator are matched, and also independent of whether the cable lengths between the waveform generators are matched. This improves synchronization accuracy while enhancing flexibility and practicality.

[0070] Furthermore, during delay value calibration, the processing module 100 acquires the analog waveform signals from the main waveform generator 300 and any slave waveform generator 400 in real time, and can also calculate and determine whether the delay values ​​between the analog waveform output channels meet the requirements in order to obtain the best synchronization result.

[0071] In some embodiments, the processing module 100 and the clock generator 200 constitute a synchronizer, and the calibration process of the aforementioned delay value can be implemented using a synchronizer.

[0072] The above is an explanation of the delay value calibration device. The following explains how the delay value calibration device can calibrate the delay value of any two waveform generators.

[0073] Please refer to Figure 5 Before performing delay value calibration, the delay value calibration device can connect the synchronizer to multiple waveform generators, so that the reference clock can be synchronously output to multiple waveform generators through the clock output port of the synchronizer, so that the clocks of multiple waveform generators are synchronized, that is, the first analog waveform signal and the second analog waveform signal are clock domain synchronization signals.

[0074] Of course, please refer to Figure 6In a cascaded configuration, the master waveform generator 300 can be used as the first stage, with its clock signal output channel (Clock out) connected to the clock signal input channel (Clock in) of the next-stage slave waveform generator 400. The clock signal output channel of the slave waveform generator 400, connected to the master waveform generator 300, is then connected to the clock signal input channel of the next-stage slave waveform generator 400. This cascading method synchronizes the clocks of the multiple waveform generators. In other words, the clock system inside the master waveform generator 300 serves as the clock reference for the multiple slave waveform generators 400. The clock signal output channel of the master waveform generator 300 is connected to the clock signal input channel of the next-stage slave waveform generator 400 (slave_1), and the clock signal output channel of that slave waveform generator 400 is connected to the clock signal input channel of the next-stage slave waveform generator 400 (slave_2). This cascading method synchronizes the clocks of the multiple waveform generators.

[0075] Furthermore, for each preset delay value, the processing module 100 outputs a first control signal to the clock generator 200, causing the clock generator 200 to output a first trigger signal to the trigger signal input channel of the main waveform generator 300. When the first trigger signal is valid, the main waveform generator 300 responds to the first trigger signal, and its analog waveform output channel outputs a first analog waveform signal. Based on the current preset delay value, the clock generator 200 outputs a second trigger signal to the trigger signal input channel of any slave waveform generator 400. When the second trigger signal is valid, any slave waveform generator 400 responds to the second trigger signal, and its analog waveform output channel outputs a second analog waveform signal. In other words, using the first trigger signal as a reference, the second trigger signal is output to the trigger signal input channel of any slave waveform generator 400 based on the current preset delay value.

[0076] The processing module 100 receives a first analog waveform signal output from the main waveform generator 300 and a second analog waveform signal output from any waveform generator 400. After performing addition or subtraction, amplification, and analog-to-digital conversion on the first and second analog waveform signals, a corresponding voltage signal is obtained.

[0077] After the processing module 100 obtains the voltage signal, it outputs the first control signal to the main waveform generator 300 and any slave waveform generator 400 again based on the next preset delay value. The processing module 100 will then receive the first analog waveform signal output by the main waveform generator 300 and the second analog waveform signal output by any slave waveform generator 400, and then obtain a corresponding voltage signal. The specific process can be referred to the above process of obtaining the voltage signal, which will not be elaborated here.

[0078] Therefore, for multiple preset delay values, the processing module 100 will obtain voltage signals corresponding to the multiple preset delay values, and calculate the final delay value based on the multiple voltage signals. This final delay value is used as the delay value of any waveform generator 400 outputting the second trigger signal relative to the main waveform generator 300 outputting the first trigger signal, and is recorded in the processing module 100 for direct application when using multiple waveform generators; wherein, the final delay value can be calculated based on all the obtained voltage signals.

[0079] In some embodiments, the processing module 100 calculates and determines the effective value of each of the multiple voltage signals. After the effective values ​​of the multiple voltage signals are determined, the least squares method is used to perform curve fitting based on the effective values ​​corresponding to the multiple voltage signals, and the polynomial of the fitted curve is determined. Further, the final delay value is calculated based on the polynomial of the fitted curve.

[0080] Example 1

[0081] Please refer to Figure 5 , Figure 6 The processing module 100 may include a switch array 104, an inverting amplifier circuit 103, an analog-to-digital converter 102, and a central processing unit 101.

[0082] Please refer to Figure 5 , Figure 6 The switch array 104 can be configured with a first input terminal ( Figure 5 , Figure 6 The switch array in the middle has pin 0), and a first output terminal ( Figure 5 , Figure 6 The switch array in the middle has pin 0 corresponding to the connected pin, and several second input terminals ( Figure 5 , Figure 6 The switch array in the middle has pin 1-q and a second output terminal ( Figure 5 , Figure 6 (The pins 1-q of the switch array are connected to the pins respectively). The analog waveform output channel of the main waveform generator 300 is connected to the first input terminal of the switch array 104. The analog waveform output channel of each slave waveform generator 400 is connected to a second input terminal of the switch array 104. The first output terminal of the switch array 104 is connected to an input terminal of the inverting amplifier circuit 103, and the second output terminal of the switch array 104 is connected to the other input terminal of the inverting amplifier circuit 103.

[0083] During delay value calibration, the central processing unit 101 acquires multiple preset delay values. For each preset delay value, it outputs a first control signal to the clock generator 200. The clock generator 200, in response to the first control signal, outputs a first trigger signal to the main waveform generator 300. The clock generator 200 also outputs a second trigger signal to any slave waveform generator 400 in response to the first control signal. The central processing unit 101 can control the first input and first output terminals to be in a constant conducting state, so that the first analog waveform signal output by the main waveform generator 300 is output through the first output terminal. Simultaneously, the central processing unit 101 can control the second input and second output terminals of the switch array 104 connected to any slave waveform generator 400 (the slave waveform generator 400 that outputs the analog waveform signal) to be turned on, so that the second analog waveform signal output by that slave waveform generator 400 is output through the second output terminal. When the main waveform generator 300 and the switch array 104 are connected, the analog waveform output channel of the main waveform generator 300 and the first input terminal of the switch array 104 are fixedly connected by a cable, and the waveform generator 400 is sequentially connected to the second input terminal of the switch array 104 by a cable.

[0084] One input terminal of the inverting amplifier circuit 103 is connected to the first output terminal of the switch array 104, and the other input terminal of the inverting amplifier circuit 103 is connected to the second output terminal of the switch array 104. The inverting amplifier circuit 103 is used to receive the first analog waveform signal and the second analog waveform signal, and to perform addition and amplification operations on the first analog waveform signal and the second analog waveform signal to obtain an analog waveform signal.

[0085] Please refer to Figure 5 , Figure 6 and Figure 12 In the inverting amplifier circuit 103, the unconnected ends of resistors R1 and Rf are one input terminal of the inverting amplifier circuit 103, the unconnected ends of resistors R2 and Rf are the other input terminal of the inverting amplifier circuit 103, and the output terminal of operational amplifier U1 is the output terminal of the inverting amplifier circuit 103.

[0086] In one embodiment, the main waveform generator 300 and any slave waveform generator 400 output cosine signals with the same amplitude and frequency. Assuming the first analog waveform signal and the second analog waveform signal received at the two input terminals of the inverting amplifier circuit 103 are respectively... and .

[0087] The expression is:

[0088] ;

[0089] in, This represents the first analog waveform signal; This represents the amplitude of the first analog waveform signal; This represents the angular frequency of the first analog waveform signal; This represents the phase angle of the first analog waveform signal.

[0090] The expression is:

[0091] ;

[0092] in, This represents the second analog waveform signal; Indicates the amplitude of the second analog waveform signal; This represents the angular frequency of the second analog waveform signal; This represents the phase angle of the second analog waveform signal.

[0093] When resistor R1 equals resistor R2 in the inverting amplifier circuit, the relationship between the input signals at the two input terminals and the output signal at the output terminal of the inverting amplifier circuit 103 (i.e., the analog waveform signal output by the inverting amplifier circuit 103 mentioned above) is as follows:

[0094] ;

[0095] in, This represents the output signal of the inverting amplifier circuit 103; This indicates the resistance value of resistor R1; This indicates the resistance value of resistor R2; This indicates the resistance value of resistor Rf.

[0096] The input terminal of the analog-to-digital converter 102 is connected to the output terminal of the inverting amplifier circuit 103. The analog-to-digital converter 102 is used to receive the analog waveform signal output by the inverting amplifier circuit 103 and convert the analog waveform signal into a digital signal to be output to the central processing unit 101 (CPU, Central Processing Unit / Processor). The digital signal here is the voltage signal.

[0097] Analog-to-digital converter 102 will The signal is converted into a digital signal and output to the central processing unit 101. The central processing unit 101 receives the signal. Calculate the The corresponding effective values, i.e., the effective values ​​of the voltage signals, will be calculated for multiple preset delay values, resulting in multiple effective values ​​of the voltage signals: Vo1rms, Vo2rms, Vo3rms, Vo4rms...Voxrms (where x is a positive integer). After calculating the effective values ​​of multiple voltage signals, curve fitting is performed using the least squares method based on these values, and the polynomial of the fitted curve is determined. The final delay value is then calculated based on the polynomial of the fitted curve.

[0098] Please refer to Figure 7 This represents the relationship between the phase angle difference between the two input signals of the inverting amplifier circuit 103 in this embodiment and the effective value of the voltage signal. Combined with... Figure 7 and According to the calculation formula, when the first analog waveform signal output by the main waveform generator 300 is synchronized with the second analog waveform signal output by any one of the waveform generators 400, that is, , The effective value (rms) of the signal reaches its maximum, which is ( express Figure 7 The amplitude of the curve (at this point, the effective value of the signal acquired by the analog-to-digital converter 102 is also at its maximum). From Figure 7 It can be seen from this that, in When the difference is in the range [-π, π], when At that time, that is, At that time, from Figure 7 As can be seen from this, with As x increases, the effective value of the voltage signal output by the inverting proportional amplifier circuit, Voxrms (where x is a positive integer), will also increase.

[0099] when At that time, that is, At that time, from Figure 7 As can be seen from this, with As the delay value of the second trigger signal relative to the first trigger signal increases, the effective value of the voltage signal output by the inverting proportional amplifier circuit, Voxrms (where x is a positive integer), will decrease. Therefore, by adjusting the delay value of the second trigger signal relative to the first trigger signal, the voltage signal can be flexibly adjusted. The value changes. For multiple delay values ​​tx=[t1,t2,t3…tx], multiple effective values ​​of voltage signals will be obtained. =[ Vo1rms, Vo2rms, Vo3rms…Voxrms], in the coordinate system, the delay value is used as the horizontal axis, and the effective value of the voltage signal is used as the vertical axis, forming multiple coordinate points (t1, Vo1rms), (t2, Vo2rms), (t3, Vo3rms)…(tx, Vo1rms). The central processing unit 101 performs curve fitting based on these multiple coordinate points using the least squares method. The polynomial used in curve fitting is:

[0100] ;

[0101] in, , … , , The coefficients of the polynomial; t represents the output signal of the inverting amplifier circuit 103; t represents the delay value.

[0102] When fitting curves, curve fitting can be performed based on 6 coordinate points or 8 points. Theoretically, the more coordinate points there are, the better the fitted curve will be. Those skilled in the art can determine the number of coordinate points according to the actual situation, and no further restrictions are imposed here.

[0103] Use coordinate points The polynomial is fitted, and its coefficients are calculated. Further... Find the derivative and determine its derivative. The root, the root when the derivative is 0, is substituted into In the calculation The root corresponding to the maximum value is the final delay value. The central processing unit 101 configures the final delay value into the clock generator 200. By adjusting the delay value of the second trigger signal output by any slave waveform generator 400 relative to the first trigger signal, high-precision synchronization can be achieved between the second analog waveform signal output by any slave waveform generator 400 and the first analog waveform signal output by the main waveform generator 300, so that the first analog waveform signal and the second analog waveform signal are in phase.

[0104] The above process is for calibrating any one of the multiple waveform generators, the slave waveform generator 400. After any one slave waveform generator 400 is calibrated, the other uncalibrated slave waveform generators 400 can be calibrated one by one.

[0105] The central processing unit 101 can record the final delay value of each waveform generator 400. At this point, the delay value calibration is completed. When multiple waveform generators are used synchronously, the clock generator can be controlled to output the first trigger signal and the second trigger signal based on the final delay value of each waveform generator.

[0106] Example 2

[0107] The inverting amplifier circuit 103 can be replaced with the differential amplifier circuit 105. Please refer to [reference needed]. Figure 8 Here is a circuit diagram of differential amplifier circuit 105, where the end of resistor R3 that is not connected to operational amplifier U2 is one input terminal of differential amplifier circuit 105, the end of resistor R4 that is not connected to operational amplifier U2 is the other input terminal of differential amplifier circuit, and the output terminal of operational amplifier U2 is the output terminal of differential amplifier circuit 105.

[0108] The voltage signal output from the differential amplifier circuit 105 can be determined using the following formula:

[0109] ;

[0110] in, This represents the voltage signal output by the differential amplifier circuit 105; This represents the first analog waveform signal; This represents the second analog waveform signal; This indicates the resistance value of resistor R3; This indicates the resistance value of resistor R4; This indicates the resistance value of resistor R5; This indicates the resistance value of resistor R6; the resistance values ​​of resistors R3, R4, R5, and R6 are equal.

[0111] Please refer to Figure 10 Replace the inverting amplifier circuit 103 with the differential amplifier circuit 105. and When the first analog waveform signal and the second analog waveform signal are synchronized, i.e., when they are signals with the same amplitude and the same frequency, ,at this time, The effective value of Voxrms reaches its minimum point; ideally, Voxrms is 0V. From Figure 10 From this, we can see that within the range [-π, π], when At that time, that is, At that time, with As x increases, the effective value Voxrms (where x is a positive integer) of the voltage signal output by the differential amplifier circuit 105 will decrease; when At that time, that is, At that time, with As the value increases, the effective value Voxrms (where x is a positive integer) of the voltage signal output by the differential amplifier circuit 105 will also increase. Therefore, by adjusting the delay value between the first and second trigger signals (the delay value between the second trigger signal and the first trigger signal), the signal can be flexibly adjusted. The value of changes. The resistances of resistors R3, R4, R5, and R6 are equal, making ... Figure 10 In When the effective value of Voxrms reaches the minimum point 0. .

[0112] After replacing the inverting amplifier circuit 103 with the differential amplifier circuit 105, multiple coordinate points (t1, Vo1rms), (t2, Vo2rms), (t3, Vo3rms)...(tx, Vo1rms) can also be obtained. The polynomial is fitted, and the polynomial coefficients are calculated. Further... Find the derivative and the root when the derivative is zero. Substitute the root when the derivative is zero into the equation. In the calculation The root corresponding to the minimum point is the final delay value. By configuring the final delay value in the clock generator and adjusting the delay value of the second trigger signal output by any slave waveform generator 400 relative to the first trigger signal, high-precision synchronization can be achieved between the second analog waveform signal output by any slave waveform generator 400 and the first analog waveform signal output by the main waveform generator 300, so that the first analog waveform signal and the second analog waveform signal are in phase.

[0113] In this embodiment, the calibration process can refer to the calibration process described above based on the inverting amplifier circuit 103 to obtain the first analog waveform and the second analog waveform, and will not be elaborated further here.

[0114] Example 3

[0115] The inverting amplifier circuit 103 can be replaced with the instrumentation amplifier circuit 106. Please refer to [reference needed]. Figure 9 The diagram below shows the circuit diagram of the instrumentation amplifier circuit 106. Operational amplifier U3's non-inverting input is one input of the instrumentation amplifier circuit 106, operational amplifier U4's non-inverting input is the other input, and operational amplifier U5's output is the output of the instrumentation amplifier circuit 106. The voltage signal output from the instrumentation amplifier circuit 106 can be determined using the following formula:

[0116] ;

[0117] in, This indicates the voltage signal output by the instrument amplifier circuit 106; This represents the first analog waveform signal; This represents the second analog waveform signal; This indicates the resistance value of resistor R7; This indicates the resistance value of resistor R8; This indicates the resistance value of resistor R9; This indicates the resistance value of resistor R10; This indicates the resistance value of resistor RG.

[0118] Please refer to Figure 10 Replace the inverting amplifier circuit 103 with the instrumentation amplifier circuit 106. and When the first analog waveform signal and the second analog waveform signal are synchronized, i.e., when they are signals of the same amplitude and frequency, ,at this time, The effective value of Voxrms reaches its minimum point; ideally, Voxrms is 0V. From Figure 10 From this, we can see that within the range [-π, π], when At that time, that is, At that time, with As x increases, the effective value Voxrms (where x is a positive integer) of the voltage signal output by the instrument amplifier circuit 106 will decrease; when At that time, that is, At that time, with As the value increases, the effective value Voxrms (where x is a positive integer) of the voltage signal output by the instrument amplifier circuit 106 will also increase. Therefore, by adjusting the delay value between the first and second trigger signals (the delay value between the second trigger signal and the first trigger signal), the signal can be flexibly adjusted. The change in the value of .

[0119] After replacing the inverting amplifier circuit 103 with the instrumentation amplifier circuit 106, multiple coordinate points (t1, Vo1rms), (t2, Vo2rms), (t3, Vo3rms)...(tx, Vo1rms) can also be obtained. These multiple coordinate points can then be used... The polynomial is fitted, and the polynomial coefficients are calculated. Further... Find the derivative and the root when the derivative is zero. Substitute the root when the derivative is zero into the equation. In the calculation The root corresponding to the minimum point is the final delay value. The final delay value is configured in the clock generator 200. By adjusting the delay value of the second trigger signal output by any slave waveform generator 400 relative to the first trigger signal, high-precision synchronization can be achieved between the second analog waveform signal output by any slave waveform generator 400 and the first analog waveform signal output by the main waveform generator 300, so that the first analog waveform signal and the second analog waveform signal are in phase.

[0120] In this embodiment, the calibration process can refer to the calibration process described above based on the inverting amplifier circuit 103 to obtain the first analog waveform and the second analog waveform, and will not be elaborated further here.

[0121] In some embodiments, this application also provides a delay value calibration method applied to a delay value calibration device. The delay value calibration device includes a clock generator 200, which is connected to multiple waveform generators respectively. One of the waveform generators is configured as a master waveform generator 300, and the other waveform generators are configured as slave waveform generators 400. Please refer to [reference needed]. Figure 1 The delay value calibration methods include:

[0122] S100: Obtain multiple preset delay values, and control the output trigger signal for each preset delay value.

[0123] Multiple preset delay values ​​are obtained. For each preset delay value: a first control signal is output to a clock generator 200. The clock generator 200 is used to output a first trigger signal to a main waveform generator 300 in response to the first control signal, so that the main waveform generator 300 generates and outputs a first analog waveform signal when it receives the first trigger signal. The clock generator 200 is also used to output a second trigger signal to any slave waveform generator 400 in response to the first control signal, so that any slave waveform generator 400 generates and outputs a second analog waveform signal when it receives the second trigger signal. The delay between the first trigger signal and the second trigger signal is the current preset delay value, and the first analog waveform signal and the second analog waveform signal are at least clock domain synchronization signals.

[0124] The delay value calibration device may include a processing module 100 and a clock generator 200. The processing module 100 is connected to the clock generator 200 and multiple waveform generators, respectively. The clock generator 200 is connected to the multiple waveform generators. The processing module 100 is used to acquire multiple preset delay values. For each preset delay value: the processing module 100 is used to output a first control signal to the clock generator 200. The clock generator 200 is used to output a first trigger signal to the main waveform generator 300 in response to the first control signal, so that the main waveform generator 300 generates and outputs a first analog waveform signal when it receives the first trigger signal. It also outputs a second trigger signal to any slave waveform generator 400, so that any slave waveform generator 400 generates and outputs a second analog waveform signal when it receives the second trigger signal. The delay between the first trigger signal and the second trigger signal is the current preset delay value, and the first analog waveform signal and the second analog waveform signal are at least clock-domain synchronization signals. This is described in detail in a specific embodiment of a delay value calibration device, and will not be elaborated further here.

[0125] S200: Obtain the first analog waveform signal output by the main waveform generator 300 and the second analog waveform signal output by any slave waveform generator 400, and perform at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator 300 and the second analog waveform signal output by any slave waveform generator 400 to obtain a corresponding voltage signal.

[0126] The processing module 100 is further configured to acquire a first analog waveform signal output by the main waveform generator 300 and a second analog waveform signal output by any slave waveform generator 400, and to perform at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator 300 and the second analog waveform signal output by any slave waveform generator 400 to obtain a corresponding voltage signal. This is specifically described in a particular embodiment of a delay value calibration device, and will not be elaborated upon further here.

[0127] S300: Obtain multiple voltage signals corresponding to multiple preset delay values, and calculate the final delay value based on the multiple voltage signals.

[0128] The processing module 100 is also used to acquire multiple voltage signals corresponding to multiple preset delay values, and calculate the final delay value based on the multiple voltage signals. This is specifically described in a particular embodiment of a delay value calibration device, and will not be elaborated upon here.

[0129] In some embodiments, please refer to Figure 2 Step S300 includes the following steps:

[0130] S301. Determine the effective value of each voltage signal among multiple voltage signals;

[0131] S302. Based on the effective values ​​corresponding to multiple voltage signals, curve fitting is performed using the least squares method, and the polynomial of the fitted curve is determined.

[0132] S303. Calculate the final delay value using a polynomial method based on the fitted curve.

[0133] In this embodiment, after the processing module 100 determines the effective value of each of the multiple voltage signals, it performs curve fitting using the least squares method based on the effective values ​​corresponding to the multiple voltage signals, determines the polynomial of the fitted curve, and further calculates the final delay value based on the polynomial of the fitted curve. This is as described in a specific embodiment of a delay value calibration device, and will not be elaborated further here.

[0134] In some embodiments, when acquiring the first analog waveform signal and the second analog waveform signal based on the inverting amplifier circuit 103, please refer to... Figure 3 Step S303 includes the following steps:

[0135] S3031. Determine the maximum point in the fitted curve based on the polynomial of the fitted curve.

[0136] S3032. Calculate the final delay value based on the maximum point in the fitted curve.

[0137] In this embodiment, the processing module 100 differentiates the polynomial of the fitted curve and finds the root when the derivative is 0. Substituting the root when the derivative is 0 into the equation, the calculated result is obtained. The root corresponding to the maximum value is the final delay value. By configuring the final delay value into the clock generator 200 and adjusting the delay value of the second trigger signal output by any slave waveform generator 400 relative to the first trigger signal, high-precision synchronization can be achieved between the second analog waveform signal output by any slave waveform generator 400 and the first analog waveform signal output by the main waveform generator 300, so that the first analog waveform signal and the second analog waveform signal are in phase.

[0138] In some embodiments, when acquiring the first analog waveform signal and the second analog waveform signal based on the differential amplifier circuit 105 or the instrumentation amplifier circuit 106, please refer to... Figure 4 Step S303 includes the following steps:

[0139] S3033. Determine the minimum point in the fitted curve based on the polynomial of the fitted curve.

[0140] S3034. Calculate the final delay value based on the minimum point in the fitted curve.

[0141] In this embodiment, the processing module 100 differentiates the polynomial of the fitted curve and finds the root when the derivative is 0. The root when the derivative is 0 is then substituted into... In the calculation The root corresponding to the minimum point is the final delay value. The final delay value is configured in the clock generator 200. By adjusting the delay value of the second trigger signal output by any slave waveform generator 400 relative to the first trigger signal, high-precision synchronization can be achieved between the second analog waveform signal output by any slave waveform generator 400 and the first analog waveform signal output by the main waveform generator 300, so that the first analog waveform signal and the second analog waveform signal are in phase.

[0142] In some embodiments, this application also provides a computer-readable storage medium storing a program that can be executed by a processor to implement the delay value calibration method as described above.

[0143] In summary, this application provides a delay value calibration method, apparatus, and storage medium, which have the following beneficial effects:

[0144] One waveform generator from a set of multiple waveform generators is configured as the master waveform generator 300, and the other waveform generators are configured as slave waveform generators 400. During synchronization calibration, multiple preset delay values ​​are acquired. For each preset delay value: a first trigger signal is output to the master waveform generator 300 to make the master waveform generator 300 output a first analog waveform signal, and a second trigger signal is output to any slave waveform generator 400 to make that slave waveform generator 400 output a second analog waveform signal. At least one addition or subtraction operation is performed between the first analog waveform signal and the second analog waveform signal to obtain a corresponding voltage signal. For multiple preset delay values, multiple voltage signals are obtained. Finally, the final delay value is calculated based on the multiple voltage signals. Each slave waveform generator 400 is calibrated one by one to synchronize the outputs of the multiple waveform generators. Therefore, during the delay value calibration process, the delay of the analog waveform signal output by the waveform generator is adjusted by adjusting the delay of multiple sets of trigger signals output by the clock generator 200. For each set of analog waveform signals, at least one addition or subtraction operation is performed to obtain a corresponding voltage signal. Finally, the final delay value is calculated based on multiple voltage signals. It is not necessary to pay attention to the cable mismatch length. Therefore, the calibration accuracy is not affected by the transmission delay matching error of the cable, and the synchronization accuracy is high.

[0145] The above examples illustrate the present invention only to aid in understanding it and are not intended to limit the scope of the invention. Those skilled in the art can make various simple deductions, modifications, or substitutions based on the principles of this invention.

Claims

1. A method for calibrating a delay value, characterized in that, The delay value calibration device includes a clock generator, which is connected to multiple waveform generators. One of the waveform generators is configured as a master waveform generator, and the other waveform generators are configured as slave waveform generators. The delay value calibration method includes: Multiple preset delay values ​​are obtained. For each preset delay value: a first control signal is output to the clock generator, the clock generator is used to output a first trigger signal to the main waveform generator in response to the first control signal, so that the main waveform generator generates and outputs a first analog waveform signal when it receives the first trigger signal; the clock generator is also used to output a second trigger signal to any slave waveform generator in response to the first control signal, so that the slave waveform generator generates and outputs a second analog waveform signal when it receives the second trigger signal; wherein, the delay between the first trigger signal and the second trigger signal is the current preset delay value, and the first analog waveform signal and the second analog waveform signal are at least clock domain synchronization signals; The first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the slave waveform generators are obtained, and at least one addition or subtraction operation is performed between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the slave waveform generators to obtain a corresponding voltage signal. Acquire multiple voltage signals corresponding to the multiple preset delay values, and calculate the final delay value based on the multiple voltage signals; The step of acquiring multiple voltage signals corresponding to the multiple preset delay values ​​and calculating the final delay value based on the multiple voltage signals includes: Determine the effective value of each of the plurality of voltage signals; Based on the effective values ​​corresponding to the multiple voltage signals, curve fitting is performed using the least squares method, and the polynomial of the fitted curve is determined. The final delay value is calculated using a polynomial based on the fitted curve; Wherein, when the delay value calibration device includes an inverting amplifier circuit, the polynomial calculation of the final delay value based on the fitted curve includes: The maximum point in the fitted curve is determined by the polynomial of the fitted curve. The final delay value is calculated based on the maximum point in the fitted curve; When the delay value calibration device includes an instrumentation amplifier circuit or a differential amplifier circuit, the polynomial calculation of the final delay value based on the fitted curve includes: The minimum point in the fitted curve is determined by the polynomial of the fitted curve. The final delay value is calculated based on the minimum point in the fitted curve.

2. The delay value calibration method as described in claim 1, characterized in that, The delay value calibration device includes: an inverting proportional amplifier circuit; The step of acquiring the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator, and performing at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal, includes: The inverting amplifier circuit acquires the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator. The inverting amplifier circuit then performs addition and amplification operations on the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal.

3. The delay value calibration method as described in claim 1, characterized in that, The delay value calibration device includes: an instrumentation amplifier circuit; The step of acquiring the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator, and performing at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal, includes: The instrumentation amplifier circuit acquires the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator. The instrumentation amplifier circuit then performs subtraction and amplification operations on the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal.

4. The delay value calibration method as described in claim 1, characterized in that, The delay value calibration device includes: a differential amplifier circuit; The step of acquiring the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator, and performing at least an addition or subtraction operation between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal, includes: The differential amplifier circuit acquires the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator. The differential amplifier circuit then performs subtraction and amplification operations on the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal.

5. A delay value calibration device, characterized in that, The delay value calibration device includes: a clock transmitter. Generator and processing modules; The processing module is connected to the clock generator and is used to perform the delay value calibration method as described in any one of claims 1 to 4.

6. The delay value calibration device as described in claim 5, characterized in that, The delay value calibration device includes an inverting amplifier circuit, which is used to acquire the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator, and to perform addition and amplification operations on the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any slave waveform generator to obtain a corresponding voltage signal. or; The delay value calibration device includes an instrumentation amplifier circuit, which is used to acquire the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the waveform generators, and to perform subtraction and amplification operations between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the waveform generators to obtain a corresponding voltage signal. or; The delay value calibration device includes a differential amplifier circuit, which is used to acquire the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the waveform generators, and to perform subtraction and amplification operations between the first analog waveform signal output by the main waveform generator and the second analog waveform signal output by any one of the waveform generators to obtain a corresponding voltage signal.

7. A computer-readable storage medium, characterized in that, The medium stores a program that can be executed by a processor to implement the delay value calibration method as described in any one of claims 1 to 4.

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