Design method and system for monolithic integrated microfluid cooling channel of power device

Abstract

The invention relates to a design method and system for a monolithic integrated microfluid cooling channel of a power device, and the method comprises the steps: obtaining the size structure data, hot spot density data and heat source data of the power device, and carrying out the analysis of the microfluid cooling requirements, and obtaining the channel design requirements and heat source distribution information; performing microfluid channel network construction and surface insulation sealing treatment on a preset wide bandgap semiconductor substrate according to the channel design requirements to obtain a microfluid three-dimensional channel structure; performing power device active region layout according to the microfluid three-dimensional channel structure to obtain a device integrated structure; performing cooling simulation evaluation on the device integration structure according to the heat source distribution information to obtain a cooling evaluation result; and performing iterative verification optimization on the device integration structure according to the cooling evaluation result to obtain a target design scheme. The heat dissipation performance of the power device can be effectively improved, and the size of an external heat dissipation system is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of SiC power devices, in particular to a design method and system for monolithic integration of microfluidic cooling channels in power devices. BACKGROUND

[0002] Existing power device cooling technologies usually employ external cooling systems such as heat sinks, fans, or liquid cooling plates, etc. These methods have obvious limitations. First, there is thermal interface material between the external cooling structure and the chip, which increases thermal resistance and reduces cooling efficiency. Second, traditional cooling systems are bulky, which is not conducive to device miniaturization. Third, conventional cooling techniques are difficult to achieve precise cooling for hot spot areas inside the chip, leading to uneven temperature distribution in the device, affecting the reliability and life of the device.

[0003] Current research focuses on improving the performance of external cooling systems, such as developing high thermal conductivity materials or optimizing cooling structures, but rarely considers cooling from the device design level. There is a lack of system methods for monolithic integration of cooling channels and power devices at the chip level, making it difficult to achieve close coupling of heat sources and cooling channels. In addition, existing methods often ignore the uneven distribution of internal heat sources in power devices, making it difficult to achieve precise cooling for hot spot areas, resulting in low cooling efficiency and material waste. SUMMARY

[0004] The main purpose of the present application is to provide a design method and system for monolithic integration of microfluidic cooling channels in power devices, which can effectively improve the cooling performance of power devices and reduce the volume of external cooling systems.

[0005] To achieve the above purpose, the present application provides a design method for monolithic integration of microfluidic cooling channels in power devices, comprising: Obtain the size and structure data, hot spot density data, and heat source data of the power device, and perform microfluidic cooling requirement analysis to obtain channel design requirements and heat source distribution information; According to the channel design requirements, perform microfluidic channel network construction and surface insulation sealing treatment on the pre-set wide bandgap semiconductor substrate to obtain a microfluidic three-dimensional channel structure; According to the microfluidic three-dimensional channel structure, perform power device active area layout to obtain a device integration structure; According to the heat source distribution information, perform cooling simulation evaluation on the device integration structure to obtain a cooling evaluation result; According to the cooling evaluation result, perform iterative verification and optimization on the device integration structure to obtain a target design scheme.

[0006] Further, the size data, hotspot density data and heat source data of the power device are acquired, and microfluid cooling requirement analysis is performed to obtain channel design requirements and heat source distribution information, including: The circuit design diagram of the power device is scanned and analyzed to obtain the size data; The hotspot distribution of the power device is measured according to the size data to obtain the hotspot density data; The hotspot density data is divided by density to obtain a heat flow density zoning map; The heat source data is positioned according to the heat flow density zoning map to obtain the heat source distribution information; Cooling liquid matching calculation is performed according to the heat source distribution information to obtain channel diameter information; Heat transfer coefficient calculation and structure analysis are performed based on the channel diameter information to obtain the channel design requirements.

[0007] Further, the microfluid channel network construction and surface insulation sealing treatment are performed on the preset wide bandgap semiconductor substrate according to the channel design requirements to obtain a microfluid three-dimensional channel structure, including: The channel design requirements are parameterized extracted to obtain channel network parameters and channel cross-section geometric parameters; The wide bandgap semiconductor substrate is designed for asymmetric etching mask according to the channel network parameters to obtain a channel network mask pattern; The wide bandgap semiconductor substrate is designed for multi-stage gradient process according to the channel network mask pattern to obtain a microchannel depth structure; The microchannel depth structure is deposited with a nanometer thin film to obtain a microchannel inner wall structure; The microchannel inner wall structure is coated with a composite insulation layer according to the channel cross-section geometric parameters to obtain the microfluid three-dimensional channel structure.

[0008] Further, the microfluid channel network construction and surface insulation sealing treatment are performed on the preset wide bandgap semiconductor substrate according to the channel network mask pattern to obtain a microfluid three-dimensional channel structure, including: The surface of the wide bandgap semiconductor substrate is activated according to the channel network mask pattern to obtain a surface modification structure; The surface modification structure is coated with a selective area photoresist to obtain a first etching mask layer; The wide bandgap semiconductor substrate is etched by ion beam according to the first etching mask layer to obtain a primary microchannel structure; The primary microchannel structure is subjected to critical point drying to obtain a primary channel inner wall structure; According to the channel network mask pattern, secondary photoetching is performed on the primary channel inner wall structure to obtain a second etching mask layer; Deep reactive ion etching is performed on the second etching mask layer to obtain a depth micro-channel structure; Surface roughness optimization processing is performed on the depth micro-channel structure to obtain a micro-channel depth structure.

[0009] Further, the microfluidic three-dimensional channel structure is used to perform power device active area layout to obtain a device integrated structure, which includes: Thermal conduction characteristic analysis is performed on the microfluidic three-dimensional channel structure to obtain thermal conduction distribution data; According to the thermal conduction distribution data, substrate surface thermal field gradient calculation is performed on the power device to obtain temperature distribution data; Critical hot spot identification is performed on the temperature distribution data to obtain hot spot area coordinate set; According to the hot spot area coordinate set, a preliminary scheme design is performed on the power device to obtain a preliminary layout scheme; Channel coupling verification is performed on the preliminary layout scheme to obtain fluid-solid coupling parameters; According to the fluid-solid coupling parameters, electrode layout design is performed on the preliminary layout scheme to obtain an electrode layout scheme; The electrode layout scheme and the microfluidic three-dimensional channel structure are integrated and coupled to obtain a device integrated structure.

[0010] Further, the device integrated structure is simulated and evaluated according to the heat source distribution information to obtain a cooling evaluation result, which includes: According to the heat source distribution information, thermal distribution simulation is performed on the device integrated structure to obtain device thermal distribution data; Conjugate heat conduction analysis and convective heat transfer calculation are performed on the device thermal distribution data and the microfluidic three-dimensional channel structure to obtain a temperature field iterative solution; Convergence determination is performed on the temperature field iterative solution to obtain interface heat flow distribution data; Local thermal conduction coefficient is calculated according to the interface heat flow distribution data to obtain local heat transfer performance evaluation data of the microfluidic cooling channel; Fluid dynamics analysis is performed on the microfluidic three-dimensional channel structure to obtain fluid performance evaluation data; Cooling performance evaluation is performed on the local heat transfer performance evaluation data and the fluid performance evaluation data to obtain a cooling evaluation result.

[0011] Further, the convergence determination is performed on the temperature field iterative solution to obtain interface heat flow distribution data, which includes: The temperature change amount distribution data is statistically analyzed and processed to calculate the maximum temperature change amount and the average temperature change amount, and a temperature convergence index is obtained; The temperature convergence index is compared with a preset temperature convergence threshold to determine a convergence state identifier; The convergence state identifier is subjected to convergence branch discrimination according to a preset convergence condition, and when the convergence state identifier indicates that the convergence condition has been reached, heat flow extraction step information is obtained; The heat flow extraction step information is subjected to solid-liquid interface grid identification to obtain interface grid identification data; The interface temperature gradient field data is obtained by calculating the temperature gradient according to the interface grid identification data; The interface temperature gradient field data is subjected to density operation with a preset solid material thermal conductivity parameter to obtain a solid-liquid interface heat flux density vector field; The solid-liquid interface heat flux density vector field is subjected to heat flux density calculation to obtain the interface heat flow distribution data.

[0012] Further, the device integrated structure is subjected to iterative verification optimization according to the cooling evaluation result to obtain a target design scheme, comprising: The device integrated structure is subjected to regional distribution analysis according to the cooling evaluation result to obtain structure hotspot region positioning data; The microfluidic three-dimensional channel structure is subjected to parameterized association according to the structure hotspot region positioning data to obtain channel association data; The microfluidic three-dimensional channel structure is subjected to fluid flow resistance calculation according to the channel association data to obtain pressure drop and flow rate relationship data; The power device is subjected to spatial configuration evaluation according to the pressure drop and flow rate relationship data to obtain balance parameters; The target design scheme is obtained by generating a scheme iteration according to the balance parameters and the device integrated structure.

[0013] The application also provides a design device for a power device monolithic integrated microfluidic cooling channel, which is applied to the design method for the power device monolithic integrated microfluidic cooling channel. The acquisition module is used to acquire size structure data, hotspot density data and heat source data of the power device, and perform microfluidic cooling requirement analysis to obtain channel design requirements and heat source distribution information; The analysis module is used to construct a microfluidic channel network and perform surface insulation sealing treatment on a preset wide-bandgap semiconductor substrate according to the channel design requirements to obtain a microfluidic three-dimensional channel structure; An association module is configured to perform power device active region layout according to the microfluidic three-dimensional channel structure to obtain a device integration structure. A processing module is configured to perform cooling simulation evaluation on the device integration structure according to the heat source distribution information to obtain a cooling evaluation result. A control module is configured to perform iterative verification optimization on the device integration structure according to the cooling evaluation result to obtain a target design scheme.

[0014] The present application provides a design method and system for monolithic integration of microfluidic cooling channels for power devices, which has the following beneficial effects: By integrating microfluidic cooling channels in power devices, efficient thermal management can be achieved. First, microfluidic cooling requirements are analyzed according to the size and structure data of the power device, heat spot density data and heat source data, which can ensure the accuracy and effectiveness of the cooling channel design. Second, a wide bandgap semiconductor substrate is used to construct the microfluidic channel network and perform surface insulation and sealing treatment, forming a microfluidic three-dimensional channel structure, which can significantly improve the heat dissipation efficiency and reduce the device temperature. By performing power device active region layout in the microfluidic three-dimensional channel structure, thermal coupling integration is achieved, which tightly integrates the cooling channel with the heat source, improves the cooling effect and reduces the thermal resistance. Cooling simulation evaluation further optimizes the device integration structure, ensuring the reliability and stability of the cooling system. The iterative verification optimization process enables the design scheme to be continuously improved, ultimately meeting the cooling requirements. This design method not only effectively improves the heat dissipation performance of the power device, but also reduces the size of the external heat dissipation system, promoting the miniaturization and lightweight of the equipment, improving the integration and reliability of the system. By precisely cooling the hot spot area, the service life of the device is extended and the performance stability is enhanced. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 is a design method flowchart for monolithic integration of microfluidic cooling channels for power devices provided by the present application; Figure 2 is a design system structure diagram for monolithic integration of microfluidic cooling channels for power devices provided by the present application.

[0016] The implementation of the present application, functional features and advantages will be further described with reference to the accompanying drawings. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific examples described herein are only used to explain the present application and do not limit the present application.

[0018] The application will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0019] Referring to Figure 1 As shown in the drawings and specific embodiments, the application provides a design method of a power device monolithic integrated microfluid cooling channel, comprising: Step S1: Obtain the size structure data, hot spot density data and heat source data of the power device, and perform microfluid cooling requirement analysis to obtain channel design requirements and heat source distribution information; Step S2: Perform microfluid channel network construction and surface insulation sealing treatment on the preset wide bandgap semiconductor substrate according to the channel design requirements, to obtain a microfluid three-dimensional channel structure; Step S3: Perform power device active region layout according to the microfluid three-dimensional channel structure, to obtain a device integrated structure; Step S4: Perform cooling simulation evaluation on the device integrated structure according to the heat source distribution information, to obtain a cooling evaluation result; Step S5: Perform iterative verification optimization on the device integrated structure according to the cooling evaluation result, to obtain a target design scheme.

[0020] Based on the above steps, the detailed step process is as follows: Step S1: Obtain the basic data of the power device comprehensively, including the geometric size, internal structure layout, distribution of each functional area and other structure parameters of the device. At the same time, collect the hot spot density data of the device under different working conditions, which involves current density, switching frequency, on-resistance and other electrical parameters. The heat source data is obtained by thermal imager measurement or thermal model analysis to determine the hot spot position, heat flux density and temperature gradient distribution. Based on these data, perform microfluid cooling requirement analysis, calculate the maximum allowed junction temperature, thermal resistance requirement and cooling efficiency index. Through heat conduction path analysis, identify the key heat flow channel and bottleneck area. Combined with the working environment conditions and reliability requirements of the device, determine the cooling liquid selection standard, fluid flow range and pressure drop limit. The cooling requirement analysis also considers the power cycle characteristics, temperature fluctuation range and uniformity requirements. The analysis results form a channel design requirement document, which includes channel geometric shape restrictions, fluid inlet and outlet position suggestions, channel density distribution guidance and priority cooling area identification. The heat source distribution information is presented in the form of a heat map, which clearly shows the position, intensity and distribution characteristics of the hot spot area, providing an intuitive basis for subsequent microfluid channel network design.

[0021] Step S2: After determining the design requirements, select a suitable wide-bandgap semiconductor material as the substrate, such as silicon carbide (SiC), gallium nitride (GaN), or diamond film. These materials have excellent thermal conductivity and electrical properties, suitable for high-temperature and high-power application environments. Microfluidic channel network construction uses precision microfabrication techniques such as deep reactive ion etching (DRIE), laser microfabrication, or electrochemical etching processes. According to the heat source distribution characteristics, design the channel path and branch structure, and use higher density of serpentine or branch channels in hot spot areas, and relatively simple straight channels in uniform temperature areas. The channel cross-sectional shape can be rectangular, trapezoidal, or semicircular, usually with a width of 50-500 μm and a depth of 100-1000 μm, and the specific size is determined according to fluid dynamics calculations. Microchannel network design includes main flow channels, branch flow channels, and flow collection areas, and designs inlet and outlet structures to optimize fluid distribution. After completing the physical channel structure, perform surface insulation and sealing treatment, deposit a silicon dioxide or silicon nitride insulation layer on the inner wall of the channel, usually with a thickness of 200-500 nm to ensure electrical insulation performance. Channel sealing uses anodic bonding, fusion bonding, or low-temperature co-sintering technology to bond glass, ceramic, or cover plates of the same material with the channel structure. Sealing interface treatment ensures a pressure resistance of 10-100 MPa and good air tightness to prevent coolant leakage. After completing the surface treatment, perform air tightness testing and fluid resistance testing to verify the integrity of the channel network and fluid dynamics performance. The final microfluidic three-dimensional channel structure becomes the basis for subsequent power device integration.

[0022] Step S3: After the microfluidic channel structure is completed, the active area layout of the power device is planned based on the channel distribution diagram. The active area layout considers two key factors: thermal management efficiency and circuit functionality. The relative position of the heat source and the cooling channel is crucial for cooling efficiency. During the layout process, the drain or collector regions of high-power units, such as MOSFETs and IGBTs, are placed directly above the main cooling channels to ensure the shortest heat conduction path. Low-power areas within the power chip, such as the gate drive circuitry and signal processing units, can be located in areas with lower channel density. Considering heat diffusion characteristics, sufficient spacing is maintained between adjacent high-power units to avoid heat accumulation. The design also considers the thermal stress distribution of the substrate. By rationally arranging the power units, mechanical stress caused by thermal expansion is balanced. The electrical interconnect layout minimizes parasitic inductance and capacitance to improve switching performance. In multi-chip module design, the chip order and location are determined based on their power density and heat generation characteristics, with chips with higher heat flux density receiving priority for fresh coolant flow. Subsequently, the active layer is grown and prepared, typically using processes such as epitaxial growth, ion implantation, and thermal diffusion to form the functional layers required for the device. Metallization and interconnect layers are designed to avoid critical cooling channel areas to ensure efficient heat conduction. Finally, through 3D thermoelectric coupling modeling, a complete device integration structure model is formed. This model includes the precise location of the power unit, the heat conduction path, and the spatial relationship between the electrical interconnects and cooling channels, providing a foundation for subsequent simulation evaluation and optimization.

[0023] Step S4: After the device integration structure is completed, the design scheme is comprehensively evaluated using multi-physics coupled simulation software. The simulation analysis encompasses three dimensions: fluid dynamics, heat transfer, and structural mechanics. The fluid simulation model sets fluid parameters under realistic operating conditions, including inlet temperature, flow rate, pressure, and coolant physical properties. Computational fluid dynamics (CFD) methods are applied to solve the Navier-Stokes equations and energy equations to obtain the velocity, pressure, and temperature field distributions within the microfluidic channel. The simulation focuses on the laminar flow characteristics, uniformity of fluid distribution, and local turbulence and eddy currents within the channel. Heat conduction simulation, based on the actual operating conditions of the power device, simulates the heat generation rate and heat transfer path of each power unit, and calculates the device junction temperature distribution and maximum temperature point. Conjugate heat transfer analysis is used to evaluate the solid-liquid interface heat exchange efficiency and overall thermal resistance. The simulation considers the changes in fluid heat capacity, the temperature dependence of solid material thermal conductivity, and the effects of interfacial contact thermal resistance. Pressure analysis calculates the full-channel pressure drop, local flow resistance, and fluid power consumption to verify that the pumping power requirements are within the design range. Generate a comprehensive evaluation report based on simulation results, including temperature distribution cloud maps, flow field visualization, pressure gradient plots, and time-domain temperature response curves. Cooling evaluation results are presented in the form of key performance indicators, including maximum junction temperature, temperature uniformity index, maximum temperature gradient, system thermal resistance, peak voltage drop, and cooling system power consumption score.

[0024] Step S5: Perform targeted structure optimization according to the obtained cooling evaluation results. For temperature hot spot areas, enhance heat transfer by increasing local channel density, adjusting channel cross-sectional shape, or introducing turbulence-promoting structures. Channel network optimization includes reconfiguring branch structures, adjusting primary and secondary channel diameter ratios, and rebalancing the flow resistance of each parallel channel to ensure reasonable flow distribution. The inlet area design is particularly enhanced, using a diffusion-type flow splitting structure to reduce inlet dynamic pressure loss and improve channel utilization. Microchannel surfaces can be increased with microgrooves, micro-ribs, or other microstructures to disrupt the boundary layer, promote turbulent mixing, and increase heat transfer area. Re-evaluate the heat source distribution and, if necessary, adjust the power unit layout, optimize the heat flow path, and reduce thermal resistance. Material layer thickness and interface treatment methods are also optimized to reduce contact thermal resistance. After each optimization measure is implemented, multi-physical field simulation is performed again to compare the performance index changes before and after optimization and quantify the improvement effect. The optimization process uses the DOE (Design of Experiment) method or genetic algorithm for parameter sensitivity analysis to determine the key factors affecting system performance. Through multiple rounds of optimization iteration, the performance index is gradually improved until the design requirements are met or the physical limit is reached. The final optimization results form detailed technical documents, recording the optimization history and final values of each parameter. After completing the iterative optimization, a sample is made for physical verification testing to measure the actual temperature distribution, fluid parameters, and electrical performance, which are compared with the simulation results to verify the design reliability. After comprehensive evaluation, the final target design scheme is formed, including complete process parameters and manufacturing specifications.

[0025] Step S6: After the target design scheme is determined, design verification is performed using multiple methods for comprehensive evaluation, including sample preparation testing, extreme condition simulation, and reliability verification. Sample testing covers thermal resistance measurement, transient thermal response analysis, fluid pressure drop verification, and electrical performance testing. Infrared thermal imaging technology is used to obtain the device surface temperature distribution, and embedded temperature sensors are used to measure the internal key point temperature. Combined with electrical parameter testing, the influence of cooling effect on the electrical characteristics of the device is evaluated. Extreme condition testing verifies the reliability of the system under maximum power, highest environmental temperature, and lowest cooling flow conditions. Long-term reliability evaluation includes thermal cycle testing, thermal shock testing, and life acceleration testing, simulating the long-term working conditions of the actual application environment. After verification, the manufacturing process flow is planned in detail, including substrate processing, micro-channel formation, surface treatment, insulating layer deposition, active area preparation, sealing bonding, and packaging testing. Process documents detail the equipment requirements, process parameters, and quality control standards for each step. A process capability index (Cpk) monitoring system is established for key processes to ensure batch production quality stability. After completing the manufacturing process flow document, the final product data package is formed, including design drawings, material list, process flow, test specification, and application guide. This data package serves as the final output of product development, guiding subsequent engineering sample production and mass production implementation, marking the completion of the design process of power device monolithic integrated micro-fluid cooling channels.

[0026] The design method of a power device monolithic integrated micro-fluid cooling channel provided by the present application can achieve efficient thermal management by integrating a micro-fluid cooling channel in the power device. The micro-fluid cooling requirement analysis based on the size structure data, hot spot density data, and heat source data of the power device ensures the accuracy and effectiveness of the cooling channel design. Secondly, the micro-fluid channel network is constructed and the surface is insulated and sealed using a wide bandgap semiconductor substrate to form a micro-fluid three-dimensional channel structure, which can significantly improve the heat dissipation efficiency and reduce the device temperature. By arranging the active area of the power device in the micro-fluid three-dimensional channel structure, thermal coupling integration is achieved, which tightly combines the cooling channel with the heat source, improves the cooling effect, and reduces the thermal resistance. Cooling simulation evaluation further optimizes the device integration structure to ensure the reliability and stability of the cooling system. The iterative verification and optimization process enables the design scheme to be continuously improved, ultimately meeting the cooling requirements. This design method not only effectively improves the heat dissipation performance of the power device, but also reduces the size of the external cooling system, promotes the miniaturization and lightweight of the equipment, and improves the integration and reliability of the system. By precisely cooling the hot spot area, the service life of the device is extended and the performance stability is enhanced.

[0027] In one embodiment, the size data, hot spot density data, and heat source data of the power device are obtained, and micro-fluid cooling requirement analysis is performed to obtain channel design requirements and heat source distribution information, including: The size data is obtained by scanning and analyzing the circuit design diagram of the power device. The scanning and analyzing adopts a high-resolution optical scanner to digitally process the circuit design diagram of the power device, and the scanning resolution is not less than 1200 dpi, so as to ensure that the micron-level details are captured. The digital image obtained by scanning is subjected to edge detection and size calibration through image processing software, so as to extract the physical size parameters of the power device, including the length, width, height of the chip, the position coordinates and area of each functional area and other key data. The scanning and analyzing result forms a power device size data set, which serves as the basis for subsequent hot spot distribution measurement.

[0028] Based on the obtained size data, the hot spot distribution of the power device is measured to obtain hot spot density data. The hot spot distribution measurement adopts a method combining infrared thermal imaging and thermocouple array, and records the temperature distribution of different regions under the rated working state of the power device. During the measurement process, the working voltage of the power device is set to the rated value, the environmental temperature is controlled at 25±2°C, and the spacing between the measurement points is not greater than 1 / 10 of the characteristic size of the device. The power density value of each region is calculated by the thermal resistance method, and the unit is W / cm². The measurement result forms a hot spot density data matrix, and the data resolution reaches 0.1 W / cm², which provides a basis for the heat flux partitioning.

[0029] The hot spot density data is subjected to density division to obtain a heat flux partitioning map. The density division adopts a multi-threshold segmentation algorithm, and the hot spot density data is divided into three levels of high, medium and low according to the preset threshold. The high-density region is defined as the region with a power density greater than 100 W / cm², the medium-density region is defined as the region with a power density between 50-100 W / cm², and the low-density region is defined as the region with a power density less than 50 W / cm². During the partitioning process, a spatial continuity constraint is introduced to ensure that the density level difference between adjacent regions does not exceed one level. The partitioning result is presented in the form of a heat flux partitioning map, which contains information such as region number, area size, density level and boundary coordinates.

[0030] According to the heat flux partitioning map, the heat source data is subjected to heat source positioning to obtain heat source distribution information. The heat source positioning is based on the heat flux gradient analysis method, and identifies the source position of heat generation. During the positioning process, the accurate position of the heat generating element is determined in combination with the circuit function analysis of the power device. For the high-density region, the positioning accuracy of the heat source is controlled within ±0.5 mm; for the medium-density region, the positioning accuracy of the heat source is controlled within ±1 mm. The heat source positioning result contains parameters such as heat source coordinates, heat source intensity, heat source area and geometric shape, and forms a heat source distribution information database.

[0031] The heat source distribution information is subjected to density clustering to obtain a hotspot clustering area division result. The density clustering adopts a DBSCAN algorithm, and the parameter settings are: neighborhood radius = 5 mm, minimum point number = 3. In the clustering process, the weighted factor of the heat source intensity is considered, and the greater the heat source intensity, the higher the weight in clustering. The clustering result divides the power device surface into a plurality of hotspot clustering areas, each area having similar thermal characteristics. The clustering area division result contains area number, area area, area average heat flux density, area boundary contour and other information, providing spatial distribution basis for subsequent cooling channel design.

[0032] According to the hotspot clustering area division result, fluid parameter matching calculation of the cooling liquid is performed to obtain channel diameter information. The fluid parameter matching is based on the heat transfer equation and the principle of fluid mechanics, and the appropriate cooling liquid type and flow parameters are selected. The cooling liquid type is selected as deionized water, and the flow state is controlled in the transition region of Reynolds number Re = 2000-4000. The necessary flow size is calculated through the energy balance equation, and the initial constraint range of the channel hydraulic diameter is determined in combination with the pressure drop limit condition. For high heat flux density areas, the hydraulic diameter is constrained in the range of 0.2-0.5 mm; for medium heat flux density areas, the hydraulic diameter is constrained in the range of 0.5-1.0 mm. The initial constraint condition contains the number of channels, the range of single-channel hydraulic diameter, the layout mode of the channels and other parameters.

[0033] The heat transfer coefficient evaluation calculation is performed on the channel diameter information to obtain a cooling efficiency quantitative index. The heat transfer coefficient evaluation adopts a combination of numerical simulation and theoretical calculation. In the evaluation process, the influence of factors such as channel geometry, surface roughness, flow development state is considered. For laminar flow region, the classical Nusselt number calculation formula is adopted; for turbulent flow region, the Dittus-Boelter formula is adopted for calculation. The evaluation result contains the heat transfer coefficient value of each area, thermal resistance analysis, maximum temperature prediction and other parameters, forming a cooling efficiency quantitative index. The cooling efficiency is represented by the thermal resistance value, with the unit of K / W, and the lower the value represents the higher the cooling efficiency.

[0034] According to the cooling efficiency quantitative index, structure requirement analysis is performed to obtain channel design requirements. The structure requirement analysis is based on a multi-objective optimization method, and factors such as cooling efficiency, manufacturing feasibility, system integration are considered. The channel design requirements contain specific parameters such as channel layout scheme, channel cross-sectional shape, channel width and depth, channel wall thickness, inlet and outlet position. For high heat flux density areas, the channel design adopts a serpentine or parallel multi-channel structure, and the channel density is not less than 5 channels / cm; for medium heat flux density areas, the channel design adopts a tree branch structure, and the channel density is controlled in the range of 2-5 channels / cm. The channel design requirements also contain manufacturing process limitations, material selection suggestions, structure strength verification and other contents, providing comprehensive guidance for the actual processing and integration of the subsequent micro-fluid cooling channel.

[0035] The embodiment obtains the size and hot spot density data of the power device by combining scanning analysis and hot spot distribution measurement, realizes accurate characterization of the thermal characteristics of the power device, and provides a reliable data foundation for subsequent micro-fluid cooling channel design. Based on the heat flux partitioning and heat source positioning technology, the hot spot area in the power device can be accurately identified, so that targeted cooling scheme design is realized, and the inefficiency of the traditional uniform cooling method is avoided. The hot spot area is classified and divided by the density clustering algorithm, the cooling resources are reasonably allocated, different channel design parameters are used for different heat flux density areas, and the overall cooling efficiency is improved. Based on the fluid parameter matching and heat transfer coefficient evaluation method, the optimal channel hydraulic diameter and layout scheme are determined, which reduces the fluid pressure drop and pump power consumption while ensuring the cooling effect. The final channel design takes into account cooling efficiency, manufacturing feasibility and system integration, providing comprehensive technical support for the practical application of power device monolithic integrated micro-fluid cooling channels.

[0036] In one embodiment, the design method of the power device monolithic integrated micro-fluid cooling channel according to claim 1, the preset wide bandgap semiconductor substrate is subjected to micro-fluid channel network construction and surface insulation sealing treatment according to the channel design requirements, and a micro-fluid three-dimensional channel structure is obtained, including: According to the channel design requirements, the channel network parameters and the channel cross-section geometric parameters are extracted. The channel design requirements generally include performance indicators such as cooling efficiency, fluid flow rate, pressure drop, etc. By analyzing these requirements, the corresponding channel network parameters (such as channel length, branch number, connection mode, etc.) and channel cross-section geometric parameters (such as width, height, shape, etc.) are extracted. These parameters serve as the basis for subsequent design and manufacturing, ensuring that the channel design meets the expected cooling performance.

[0037] According to the obtained channel network parameters, the asymmetric etching mask design is performed on the wide bandgap semiconductor substrate, and the channel network mask pattern is obtained. The asymmetric etching mask design is to transfer the mask pattern to the semiconductor substrate by photolithography technology. The specific steps include: designing the mask pattern, preparing the mask plate, coating photoresist on the substrate surface, exposing, developing, etching, and finally obtaining the mask pattern of the multi-layer variable cross-section channel network. The multi-layer structure of the mask pattern can form channels with different depths and widths in the subsequent etching process.

[0038] According to the channel network mask pattern, a multi-stage gradient process design is performed on the wide bandgap semiconductor substrate to obtain a micro-channel depth structure. The multi-stage gradient process design includes: selecting appropriate etching materials and etching liquid, setting etching time and etching conditions, controlling the depth and shape change of each layer by layer etching, and forming a micro-channel depth structure. In each etching process, the etching conditions are accurately controlled to ensure that the depth and shape of each layer meet the design requirements, thereby obtaining the required three-dimensional structure.

[0039] Nanometer film deposition is performed on the obtained micro-channel depth structure to obtain a micro-channel inner wall structure. The nanometer film deposition includes: selecting appropriate thin film materials (such as SiO2, Si3N4, etc.), and using atomic layer deposition (ALD), chemical vapor deposition (CVD) or physical vapor deposition (PVD) method to selectively deposit thin film on the inner wall of the micro-channel. During the deposition process, the thickness and deposition rate of the thin film are controlled to ensure that the thin film uniformly covers the inner wall of the channel and improves the smoothness and thermal conductivity of the inner wall.

[0040] According to the geometric parameters of the channel cross section, the micro-channel inner wall structure is coated with a composite insulating layer to obtain composite insulating layer structure information. The composite insulating layer coating includes: selecting an insulating material with high dielectric strength (such as polyimide, aluminum oxide, etc.), and using low-temperature chemical vapor deposition (LTCVD) or spin coating method to uniformly coat an insulating material layer on the inner wall of the micro-channel. During the coating process, the thickness and coating conditions of the insulating layer are controlled to ensure that the insulating layer uniformly covers the inner wall of the channel and improves the dielectric strength and insulating performance of the channel.

[0041] The composite insulating layer structure information is subjected to selective area activation treatment and wafer hetero-bonding treatment to obtain a micro-fluid three-dimensional channel structure. The selective area activation treatment includes: using plasma treatment or chemical treatment method to activate the surface of the area that needs to be hetero-bonded to enhance the bonding strength. The wafer hetero-bonding treatment includes: accurately aligning the treated substrate with another substrate (such as a cover plate or a cooling plate), and realizing wafer-level bonding by heating, pressurizing and other methods to finally obtain a complete micro-fluid three-dimensional channel structure. During the wafer hetero-bonding process, the bonding conditions and parameters are controlled to ensure the bonding strength and interface quality, thereby ensuring the reliability and stability of the micro-channel structure.

[0042] The embodiment can effectively improve the thermal management performance of power devices. A microfluidic three-dimensional channel structure is constructed using a wide-bandgap semiconductor substrate. Through parameterized extraction and asymmetric etching mask design, the geometric parameters and topological structure of the cooling channel can be accurately controlled to meet different cooling needs. The combination of channel network mask pattern and multi-stage gradient process design ensures the three-dimensional variable-depth microchannel structure of the channel network, which greatly improves the cooling efficiency. Nano-film deposition and composite insulation layer coating not only enhance the smoothness and thermal conductivity of the inner wall of the microchannel, but also improve the dielectric strength and insulation performance of the channel, ensuring the reliability and stability of the system. Finally, through selective area activation treatment and wafer hetero-bonding treatment, the reliability and mechanical stability of the microchannel structure are further strengthened. This design method makes the cooling system of power devices more flexible and adaptable, enabling efficient operation under different power and operating conditions, while reducing power consumption and thermal stress, prolonging the service life of the device.

[0043] In one embodiment, a multi-stage gradient process design is performed on the wide-bandgap semiconductor substrate according to the channel network mask pattern to obtain a microchannel depth structure, including: The channel network mask pattern is subjected to digital layering processing. The channel network mask pattern refers to the original pattern template used to form a three-dimensional variable-depth microchannel network on the wide-bandgap semiconductor substrate. The digital layering process converts the mask pattern into a digital matrix through an optical image scanning device, and layers according to the design depth of different channel regions. The layering process uses professional graphics processing software to divide the channel network into multiple levels according to the depth requirements, with each level corresponding to a specific channel depth value. Through this processing, the channel network mask pattern is formed, which contains channel position coordinates, target depth values, cross-sectional shape parameters, etc., providing accurate manufacturing basis for subsequent processes.

[0044] According to the channel network mask pattern obtained in the previous step, the surface activation design is performed on the wide-bandgap semiconductor substrate. The wide-bandgap semiconductor substrate refers to a semiconductor material with a large bandgap, such as silicon carbide (SiC) and gallium nitride (GaN), which has excellent thermal conductivity and electrical insulation performance. Surface activation design forms nanoscale defects on the substrate surface through low-energy argon ion bombardment, enhancing surface reactivity. This process is carried out in a vacuum chamber, with ion energy controlled within 100-300eV and bombardment time of 30-60 seconds. After surface activation treatment, the substrate surface forms a surface modification structure, which has enhanced chemical reactivity, facilitating subsequent selective etching process. The average roughness of the surface modification structure is controlled within 5-10nm, ensuring the uniformity of the subsequent microchannel structure.

[0045] The obtained surface-modified structure is subjected to selective area photoresist coating. The selective area photoresist coating refers to a process of coating a photosensitive material in a specific area according to a design pattern. The process adopts a precision spin coating technique, uses a positive photoresist material, and the spin coating speed is 4000 rpm for 30 seconds to form a uniform photoresist layer with a thickness of 1.2 μm. After pre-baking at 90°C for 2 minutes, a mask alignment exposure system is used for pattern transfer, the exposure wavelength is 365 nm, and the exposure dose is 120 mJ / cm². After exposure, baking at 110°C for 90 seconds, and developing with a special developer for 60 seconds, a first etching mask layer is formed. The mask layer accurately replicates the required channel network pattern, with an edge resolution of 0.5 μm.

[0046] The wide bandgap semiconductor substrate is subjected to ion beam etching according to the first etching mask layer. Ion beam etching is a process that uses a high-energy ion beam to bombard the surface of the sample, causing surface atoms to detach and form an etching structure. The process is carried out in an ion beam etching device, using argon as the etching gas, with an ion energy of 500-800 eV and a beam current density of 0.5-1.0 mA / cm². The etching time is dynamically adjusted according to the design depth, generally controlled within 15-30 minutes. During the etching process, based on the protection of the mask layer, the exposed area is gradually etched to form a preliminary channel structure. After etching, oxygen plasma is used to remove the remaining photoresist, and a primary microchannel structure is obtained. The structure has a basic channel shape, with a depth range of 10-30 μm.

[0047] The primary microchannel structure is subjected to critical point drying. Critical point drying is a special drying method that avoids damage to microstructures caused by liquid surface tension. During the treatment process, the sample is first soaked in acetone for 10 minutes to remove surface residues, then replaced with isopropyl alcohol for 5 minutes, and then transferred to a critical point drying device. In the device, liquid carbon dioxide replaces isopropyl alcohol, the temperature rises to 31.1°C, and the pressure rises to 7.38 MPa, exceeding the critical point of carbon dioxide, directly changing from liquid to gas, avoiding damage to the channel structure by surface tension. Through critical point drying, the primary channel inner wall structure is obtained, which has high surface flatness and no micro-cracks, with an inner wall roughness of less than 5 nm.

[0048] Secondary lithography is a process of defining patterns again on the basis of the primary channels. This process uses a higher precision lithography process, using a thick film photoresist with a thickness of 2.0 pm, and low-speed spin coating (2000 rpm) to ensure uniform coverage of the inner wall of the channel. Multi-stage exposure technology is used for differential exposure of different regions according to the depth control parameter matrix, and the exposure dose is adjusted in the range of 80-150 mJ / cm2. After development, a second etching mask layer is obtained, which has a complex gradient thickness distribution corresponding to the target etching depth of different regions.

[0049] Deep reactive ion etching is performed on the second etching mask layer. Deep reactive ion etching is a high aspect ratio etching process that can achieve precise depth control. This process is performed in a deep reactive ion etching device using SF6 and C4F8 alternating flow: SF6 flow rate is 150 sccm, power is 800 W, time is 7 seconds, used for etching; C4F8 flow rate is 100 sccm, power is 600 W, time is 5 seconds, used for protecting the sidewall. By controlling the number of etching cycles, differential depth control of different regions is achieved. Based on the gradient thickness distribution of the second etching mask layer, the etching process automatically forms a depth difference, and a depth microchannel structure is obtained. The structure has a depth range of 30-150 pm, and the aspect ratio reaches 20:1 at the highest.

[0050] Surface roughness optimization is a key step to improve the fluid dynamics performance of the microchannel. The treatment adopts a two-stage process: first, low-temperature wet chemical polishing is performed, using KOH solution (concentration 10%) at 60°C for 5 minutes, to remove surface micro-etching marks; then hydrogen annealing treatment is performed, at 900°C for 30 minutes, to repair lattice defects and reduce surface roughness. After treatment, the inner wall roughness of the channel is reduced to below 2 nm, and the surface presents a highly smooth state. Through this treatment, a microchannel depth structure is finally obtained. The structure has a precisely controlled depth distribution, smooth inner wall of the channel, and smooth transition of corners.

[0051] The embodiment can accurately control the depth and shape of the microchannel by using the digital layering technology of the channel network mask pattern, and ensure the stability and high efficiency of the microfluid cooling channel network. Through accurate depth control, the method can adjust the depth of the microchannel according to the heat load demand of different regions, and optimize the cooling effect. In addition, the surface activation design forms a nano-scale modified structure on the surface of the wide-bandgap semiconductor substrate, improves the surface activity, provides higher precision and uniformity for the subsequent etching process, and further improves the manufacturing quality of the microchannel. The combination of selective area photoresist coating technology and ion beam etching process ensures the high precision and high aspect ratio of the microchannel structure, and meets the needs of power device integrated cooling. The critical point drying process effectively avoids the damage of the microstructure in the drying process, and maintains the integrity of the fine channel inner wall. The combination of secondary lithography and deep reactive ion etching realizes the accurate manufacturing of the deep microchannel structure, so that the channel has different depths in different regions to adapt to different cooling needs, and further optimizes the heat conduction performance of the fluid. Finally, through surface roughness optimization, the flow efficiency and heat conduction performance of the microchannel are significantly improved.

[0052] In one embodiment, the power device active region is arranged according to the microfluid three-dimensional channel structure to obtain a device integrated structure, including: The microfluid three-dimensional channel structure is analyzed for heat conduction characteristics. The analysis process uses thermal simulation software to establish a geometric model of the three-dimensional microfluid channel, and defines the channel material properties and boundary conditions. The channel structure is usually composed of high thermal conductivity materials such as silicon or SiC, and the internal flow medium is deionized water or ethylene glycol solution. The heat conduction characteristic analysis includes setting the microfluid flow parameters, heat source distribution and boundary temperature conditions, applying the heat conduction control equation to calculate the heat diffusion of the solid part, and establishing the fluid control equation to describe the temperature change of the fluid part. In the heat conduction analysis process, the microfluid channel structure is divided into a finite number of grid elements, and the heat conduction equation is solved at each grid element. After iterative calculation, the steady-state or transient temperature field distribution is obtained. The analysis results form heat conduction distribution data, which includes the thermal resistance, thermal conductivity and temperature gradient information of each point in the three-dimensional space, providing basic data support for subsequent heat field gradient calculation.

[0053] Based on the obtained heat conduction distribution data, the embodiment performs power device substrate surface thermal field gradient calculation. This step establishes a temperature distribution model of the substrate surface by numerical calculation method, introduces the heat distribution function under different working conditions of the power device, combines the thermal physical parameters of the substrate material, and constructs the heat conduction differential equation. The thermal field gradient calculation process divides the substrate surface into regular or irregular units by using the grid division method, applies the energy conservation equation on each unit, and establishes a linear or nonlinear equation set. When solving the equation set, the finite difference or finite element method is used to calculate the temperature value and its gradient of each grid node. In the calculation, the anisotropic thermal conductivity characteristics, temperature dependence and interface thermal resistance of the substrate material are considered, and finally the temperature field distribution data of the substrate surface is generated. The temperature distribution data is in the form of a three-dimensional array, which contains the temperature value and temperature gradient vector of each point on the substrate surface at different times, and provides a quantitative basis for hot spot identification.

[0054] Critical hot spot identification on the temperature distribution data is an important link for accurately positioning the key area of thermal management. This step sets a temperature threshold standard, which is determined based on the maximum working temperature limit of the power device. The hot spot identification process applies image processing or data clustering algorithm to automatically mark the areas that exceed the temperature threshold. The identification algorithm evaluates the temperature difference of each point in the temperature field relative to the surrounding area, and when the temperature of a certain area is significantly higher than that of the surrounding area and exceeds the set threshold, the area is marked as a hot spot. The boundary of each hot spot area is determined and the area is calculated, and the geometric features of the hot spot are extracted. After the critical hot spot identification is completed, the hot spot area coordinate set is generated, which records the center position, boundary contour, area size and maximum temperature value of each hot spot. The hot spot area coordinate set provides direct spatial planning basis for power device layout, guiding the subsequent device layout to avoid hot spot areas.

[0055] According to the hot spot area coordinate set, the embodiment performs preliminary scheme design of the power device. The design process establishes a device layout rule library, which specifies the minimum distance between devices, the safety distance between devices and channel walls, and the preferred layout position of high power density devices. The preliminary scheme design uses a layout algorithm, which formalizes the power device as a geometric unit, optimizes the position distribution of the device on the substrate according to the power density, size specification and electrical connection requirements of the device. In the layout process, high heat devices are preferentially arranged in areas with good heat conduction performance, while avoiding the identified hot spot areas. The preliminary scheme design also considers the electrical connection relationship between power devices, and tries to minimize the length and intersection of interconnection lines. After the design is completed, a preliminary layout scheme is formed, which contains the planar coordinates, size and orientation information of each power device unit, providing a basic model for subsequent thermal coupling analysis.

[0056] The thermal coupling analysis of the preliminary layout scheme aims to evaluate the thermal interaction among power devices. The thermal network model is established by regarding each power device as a thermal node and connecting the nodes by thermal resistance to form a network structure. The thermal coupling analysis first defines the thermal capacity and heat generation power of each node, and then calculates the thermal resistance value between nodes, which is determined by the distance between devices, the thermal conductivity of intermediate materials, and the contact area. The analysis simulates the heat flow in the system using a set of heat balance equations, and calculates the temperature changes of each node under different operating conditions. The heat balance equations are solved by matrix operation method to obtain the thermal coupling matrix. Each element of the thermal coupling matrix represents the thermal influence strength between the corresponding devices, and the larger the matrix element value, the higher the degree of thermal coupling. The thermal coupling analysis results reveal the thermal influence path and strength between different devices, providing quantitative basis for layout optimization.

[0057] The optimization of the preliminary layout scheme according to the thermal coupling matrix is a key step to improve the thermal performance of the system. The optimization process defines an objective function that considers the system's maximum temperature, temperature uniformity, and hot spot density. The layout optimization uses an iterative search algorithm, which adjusts the position of a device in each iteration, calculates the adjusted objective function value, and decides whether to accept the new layout according to specific criteria. In the optimization process, devices with strong thermal coupling are placed as far apart as possible to reduce mutual thermal influence, while considering the electrical connection requirements of the devices to balance the thermal and electrical performance requirements. The optimization algorithm converges to a local optimal solution through multiple iterations, obtaining the preliminary layout scheme. This scheme has a lower system maximum temperature and a more uniform temperature distribution than the preliminary layout scheme, providing an optimized layout basis for subsequent microfluid channel coupling verification.

[0058] The microfluid channel coupling verification of the preliminary layout scheme evaluates the compatibility of the layout scheme with the microfluid cooling system. The verification process establishes a solid-liquid coupling model to describe the interaction between thermal conduction in the solid part and convective heat transfer in the fluid part. The model sets the microfluid inlet conditions, fluid physical parameters, and flow boundary conditions, and applies computational fluid dynamics methods to simulate the flow and heat transfer process of the fluid in the channel. The coupling verification analyzes the temperature continuity and heat flow continuity at the solid-liquid interface, and evaluates the enhancement effect of microfluid flow on device heat dissipation. By modifying the microchannel geometry, flow rate, or fluid type, the parameter sensitivity analysis is performed to determine the optimal microfluid cooling parameter combination. The verification results generate a set of fluid-structure coupling parameters, including surface heat transfer coefficient distribution, fluid pressure drop, fluid temperature rise, pump power, and system total thermal resistance, which provide thermal environment parameters for electrode layout design.

[0059] According to the fluid-structure coupling parameters, the electrode layout design is performed on the preliminary layout scheme to realize the electrical interconnection of the power device. The design process defines the electrode material properties, geometric specifications, and manufacturing process constraints. The electrode layout adopts a routing algorithm, which plans the electrode routing path under the premise of meeting the process constraints such as minimum line width, line spacing, and corner radius. The routing process gives priority to low-temperature areas and avoids high-temperature hot spot areas to reduce the electrode arrangement density in the hot spot areas. The electrode layout design also considers the electrical performance requirements, including resistance minimization, parasitic inductance control, and current density limitation. After the design is completed, an electrode layout scheme is formed, which includes the electrode network topology, geometric size specifications, and hierarchical relationship definition, providing an electrode layout model for structural integration.

[0060] The structural integration coupling calculation of the electrode layout scheme and the microfluidic three-dimensional channel structure is the last step of the design method. The integrated calculation establishes a complete system model, including the power device active area, electrode network, and microfluidic cooling channel. The calculation process uses a multi-physical field coupling method to simultaneously solve the electric field, thermal field, and flow field equations to simulate the comprehensive performance of the system under actual working conditions. The integrated calculation considers the heat generated by the power device, the Joule heat of the electrode wires, the convective heat transfer of the microfluidic channel, and the thermal conduction of the substrate, and analyzes the interaction between the physical fields. Through the coupling calculation, the overall thermal management performance of the system is evaluated, including the maximum temperature, temperature uniformity, thermal resistance, and power consumption. The calculation results form a device integrated structure, which is an optimized integration scheme of the power device active area and the microfluidic cooling channel, achieving the design goal of high-efficiency heat dissipation and reliable operation of the power device.

[0061] This embodiment realizes the optimized integration of thermal management and device layout by systematically designing the power device monolithic integrated microfluidic cooling channel, significantly improving the heat dissipation efficiency and reliability of the power device. Based on the thermal conduction characteristic analysis and thermal field gradient calculation, the critical hot spots of the system are accurately identified, providing a scientific basis for device layout and avoiding local overheating phenomena caused by hot spot superposition effects. Through device thermal coupling analysis and layout optimization, the thermal balance of the power device in spatial distribution is achieved, reducing the maximum operating temperature of the system and prolonging the service life of the device. The microfluidic channel coupling verification ensures the best matching of the cooling system and the device layout, improves the heat exchange efficiency, and reduces the cooling power consumption. The combination of electrode layout design and structural integration coupling calculation optimizes the thermal management effect while ensuring electrical performance, realizes the multi-objective balance of power, heat dissipation, and space utilization, and provides an efficient and reliable thermal management solution for high-power density electronic systems.

[0062] In one embodiment, according to the heat source distribution information, the device integrated structure is simulated and evaluated for cooling, and the cooling evaluation results are obtained, including: The heat source distribution information refers to the heat generation distribution of the power device in the working state, including the position of the heat source, the power density, and the time characteristics. Based on the finite element method, the heat distribution of the device integrated structure is simulated, and a three-dimensional heat conduction model is established. The model includes the geometric structure of the solid material, the thermal physical parameters of the material (such as thermal conductivity, specific heat capacity, and density), and the boundary conditions. By solving the Fourier heat conduction equation, the device heat distribution data is obtained, which is represented as the temperature value T(x, y, z) at each point in the three-dimensional space. The device heat distribution data reflects the thermal influence of the heat source on the structure under the condition of no cooling, providing the thermal boundary conditions for the subsequent fluid-solid coupling calculation.

[0063] Physical parameter setting of microfluidic three-dimensional channel structure The microfluidic three-dimensional channel structure refers to the microfluidic channel network made inside or on the surface of a monolithic integrated chip. The physical parameters of the microfluidic channel are set, including the fluid type (water, ethylene glycol aqueous solution, fluorinated liquid, etc.), inlet temperature, inlet pressure or flow rate, fluid physical properties (density, viscosity, specific heat capacity, thermal conductivity), etc. It also includes the boundary condition setting of the solid-liquid interface, such as wall slip / no-slip condition, wall roughness, etc. These parameters constitute the initial conditions for fluid dynamics calculation, and determine the calculation basis for the subsequent fluid flow and heat transfer characteristics.

[0064] Based on the above initial conditions, the computational fluid dynamics (CFD) method is used to numerically simulate the microfluidic three-dimensional channel structure. The Navier-Stokes equation set and the continuity equation are solved to calculate the flow characteristics of the fluid in the microchannel. According to the size of the microchannel and the flow characteristics, the flow state (laminar flow / turbulent flow) is determined, and the appropriate turbulent flow model is selected (such as when there is turbulent flow). The microfluidic three-dimensional channel structure is calculated, including the spatial distribution data of the velocity field V(x, y, z) and the pressure field P(x, y, z), which describe the flow state of the fluid in the microchannel.

[0065] The device heat distribution data and the microfluidic three-dimensional channel structure are coupled to establish the thermodynamic boundary conditions on the solid-liquid interface. In the solid region, heat transfer is mainly achieved through thermal conduction; in the fluid region, heat transfer includes conduction and convection. Through the coupling solution of the energy equation and the momentum equation, the heat exchange calculation between the solid and the liquid is realized. The iterative calculation method is used to alternately solve the temperature distribution of the solid region and the temperature distribution of the fluid region until the temperature field iterative solution T'(x, y, z) of the entire calculation domain is obtained. The temperature field iterative solution reflects the temperature distribution state under the cooling action of the microfluid.

[0066] Convergence analysis is performed on the iterative solution of the temperature field to determine whether the iterative calculation has reached the convergence criteria. The convergence criteria is usually set to the maximum relative error between the results of two adjacent iterations being less than a pre-set threshold (e.g. 0.1%). After the calculation converges, the temperature gradient data on the solid-liquid interface is extracted, and the interface heat flux distribution data q"(x, y, z) is calculated according to the Fourier law. This data represents the heat passing through the solid-liquid interface per unit area, which is an important parameter for evaluating the cooling effect.

[0067] Based on the interface heat flux distribution data, the local heat transfer coefficient h(x, y, z) is calculated. The calculation formula is h(x, y, z) = q"(x, y, z) / [Tw(x, y, z) - Tf(x, y, z)], where Tw is the wall temperature and Tf is the fluid temperature at the corresponding position. Statistical analysis is performed on the local heat transfer coefficients of different regions of the microchannel to obtain local heat transfer performance evaluation data, including average heat transfer coefficient, maximum / minimum heat transfer coefficient, heat transfer coefficient distribution uniformity, etc. These data reflect the heat removal ability of the microfluidic cooling channel in different regions.

[0068] The fluid flow characteristics of the microfluidic three-dimensional channel structure are analyzed, mainly focusing on pressure distribution, fluid velocity distribution, fluid resistance, etc. The pressure difference between the inlet and outlet is calculated to obtain the flow resistance data of the microchannel. The velocity distribution is analyzed to determine whether there are flow dead zones or short circuit phenomena. The fluid state is analyzed according to the Reynolds number to evaluate the flow stability. The pump power requirement is calculated to evaluate the system energy consumption. By integrating these data, fluid performance evaluation data is formed to reflect the flow characteristics and energy consumption level of the microfluidic cooling system.

[0069] The local heat transfer performance evaluation data and the fluid performance evaluation data are comprehensively analyzed to evaluate the comprehensive performance of the microfluidic cooling channel. The heat removal capacity per unit pump power, i.e. the thermal efficiency index, is calculated. The temperature field distribution uniformity is analyzed to evaluate the impact of temperature gradient on device performance. The position and temperature value of the highest temperature point are evaluated to determine whether the device temperature limit requirements are met. Based on these analyses, cooling evaluation results are formed to provide a basis for the optimization design of the microfluidic cooling channel structure. The cooling evaluation results include thermal transfer efficiency, fluid efficiency, system comprehensive efficiency, temperature control effect, etc. multi-dimensional evaluation indexes.

[0070] The embodiment can accurately identify the high heat load area inside the power device in the design stage by cooling simulation evaluation of the device integrated structure according to the heat source distribution information, realize targeted optimization of the cooling structure, and avoid insufficient cooling effect or redundancy caused by uneven resource allocation. Through the coupling calculation of the temperature field and the fluid flow field, the cooling channel can realize efficient heat exchange on the premise of maintaining compact structure, thereby improving the heat dissipation efficiency and enhancing the thermal stability of the system. Through detailed evaluation of the heat flux density and local thermal conductivity coefficient of the solid-liquid interface, the distribution difference of the cooling effect in each region of the chip can be obtained, which helps to further reduce the risk of local overheating. The cooling evaluation result obtained by comprehensively analyzing the fluid performance evaluation and heat transfer performance data can provide quantitative basis for the iterative design of the micro-fluid cooling channel, improve the design accuracy and engineering feasibility.

[0071] In one embodiment, the convergence of the temperature field iterative solution is determined to obtain interface heat flow distribution data, including: In the design process of the power device monolithic integrated micro-fluid cooling channel, the convergence of the temperature field iterative solution is determined to determine whether the calculation result meets the predetermined accuracy requirement. The convergence of the temperature field iterative solution is determined by statistical analysis and processing of the temperature change amount distribution data of each iteration. First, the difference between the current temperature of each node and the temperature at the previous iteration is calculated to obtain the temperature change amount. These changes are used to calculate two key indicators: the maximum temperature change amount and the average temperature change amount. The maximum temperature change amount reflects the most unstable area in the entire calculation domain, and the average temperature change amount represents the stability of the overall temperature field. The two indicators are combined by weighting to form a temperature convergence index. The temperature convergence index is compared with the preset convergence threshold to determine whether the calculation meets the accuracy requirement.

[0072] The convergence branch discrimination is the core link of the convergence of the temperature field iterative solution. This process determines whether to terminate the calculation or continue iteration through strict logical judgment. The convergence state identifier is a Boolean variable generated by comparing the temperature convergence index with the preset convergence threshold. On this basis, the convergence branch discrimination is divided into three main discrimination standards: Main convergence condition: requires that the temperature convergence index is always lower than the preset convergence threshold in continuous multiple iterations. This condition ensures the stability of the temperature field and prevents false convergence caused by numerical fluctuations. The number of consecutive conditions satisfied is set to 3 to 5 to ensure the stability of the result.

[0073] Auxiliary convergence condition: monitors the relative change of the average temperature of the solid-liquid interface. When the temperature change of the solid-liquid interface is less than a certain threshold, it is considered that the calculation result is stable, thereby supplementing the judgment of the main convergence condition.

[0074] Safety termination condition: used to prevent the iterative process from falling into an infinite loop due to convergence difficulties. When the current iteration number reaches the maximum value, the calculation process will be forced to terminate. The maximum number of iterations is usually set to 50 to 200, ensuring the finiteness of the calculation.

[0075] The main convergence condition will be verified first. If it is met, it indicates that the calculation has converged, and the heat flow extraction phase is entered. If the main convergence condition is not met, the auxiliary convergence condition is checked, and the change of the average temperature of the solid-liquid interface is calculated and compared with the predetermined threshold. If neither of them is met, the safety termination condition is finally checked by comparing the current iteration number with the preset maximum iteration number. If any of the conditions is met, the convergence status identifier is set to "converged", indicating that the iterative calculation should be terminated.

[0076] When the convergence status identifier indicates that the convergence condition has been reached, the heat flow extraction step information is generated. This information includes four parts: convergence type identifier (records the specific condition type that triggered the termination of the calculation), final convergence precision value (records the temperature convergence index at the time of termination, used to evaluate the reliability of the results), total iteration number (reflects the efficiency of the calculation), and temperature field data index (points to the location where the final temperature field data is stored, providing a data source for subsequent heat flux density calculation).

[0077] When the temperature field iterative calculation is completed and the convergence condition is met, the solid-liquid interface heat flux density extraction phase is entered. First, identify the solid-liquid interface grid by traversing all the calculation grid cells to find the interface grid that contains both solid and fluid regions. The interface grid identification data obtained includes the location of the interface grid and the adjacent cell information, providing spatial reference for subsequent heat flux density calculation.

[0078] Interface temperature gradient field data is obtained by calculating the temperature gradient of each interface grid. This process uses numerical difference methods such as central difference or high-order difference to calculate the temperature gradient of each interface grid in three-dimensional space, ensuring the accuracy and stability of the temperature gradient calculation.

[0079] Based on the temperature gradient and the thermal conductivity parameters of the solid material, perform the density operation to obtain the solid-liquid interface heat flux density vector field. The calculation of heat flux density follows Fourier's law, i.e. the relationship between heat flux density vector and temperature gradient is determined by thermal conductivity. For isotropic materials, thermal conductivity is a constant; for anisotropic materials, thermal conductivity is a tensor. Multiply the components of the interface temperature gradient with the thermal conductivity in the corresponding direction to obtain the heat flux density vector of each interface grid node.

[0080] The interface normal heat flux density distribution data is obtained by extracting the component of the heat flux density vector in the normal direction of the solid-liquid interface. The normal vector of each interface grid is calculated, and the component of the heat flux density vector in the normal direction is extracted to obtain the distribution data of the interface normal heat flux density. These data reflect the intensity of heat transfer perpendicular to the solid-liquid interface direction, and are an important indicator for evaluating the cooling effect.

[0081] The solid-liquid interface heat flux density is calculated by the heat flux density interpolation function to obtain a continuous heat flux density distribution field. The interpolation function can be linear interpolation, spline interpolation or high-order polynomial interpolation, and the interpolation calculation covers the entire solid-liquid interface, providing data support for the subsequent optimization design of the micro-fluid cooling channel.

[0082] Through the above steps, the final temperature field and interface heat flow distribution data are generated. These data are output in the form of a matrix or a grid, containing the position coordinates of each point on the interface and the corresponding heat flux density values. The heat flux density distribution map intuitively displays the temperature field and heat transfer in the entire cooling channel, helping designers identify high-temperature areas and areas with insufficient cooling, thereby optimizing the geometry of the cooling channel, further improving the heat dissipation effect, and reducing the maximum operating temperature of the power device.

[0083] By analyzing the distribution of heat flux density, designers can adjust the shape, size and position of the cooling channel in high heat flux density areas to improve cooling efficiency and improve work efficiency and stability.

[0084] The present embodiment can effectively ensure the accuracy and stability of the temperature field calculation results by implementing the temperature field iterative convergence judgment and heat flux density extraction method in the design of the power device monolithic integrated micro-fluid cooling channel. By setting the convergence judgment standard and combining the main convergence condition, auxiliary convergence condition and safety termination condition, the calculation results can be effectively converged within a limited number of iterations, avoiding the waste of calculation resources caused by invalid iterations. The temperature field convergence judgment not only improves the calculation efficiency, but also enhances the reliability of the results, enabling designers to make further optimization design based on accurate temperature field data. By accurately extracting the solid-liquid interface heat flux density, the distribution of heat transfer in the cooling channel can be clearly displayed, providing a scientific basis for the optimization of the cooling system. Combined with the analysis of the interface normal heat flux density distribution, designers can effectively adjust the high heat flux density areas to optimize the geometry and layout of the micro-fluid cooling channel and improve the cooling efficiency. This method not only improves the heat dissipation performance, but also effectively reduces the operating temperature of the power device, improving the stability and work efficiency of the overall system.

[0085] In one embodiment, the device integrated structure is iteratively verified and optimized according to the cooling evaluation results to obtain a target design scheme, including: After obtaining the cooling evaluation results, regional distribution analysis is performed on the device integration structure. The device integration structure refers to the thermal conduction coupling structure formed by the power device and the microfluidic cooling channel. This structure transfers the heat generated by the power device to the microfluidic channel through the heat-conducting material. The regional distribution analysis uses thermal imaging technology to scan the temperature distribution of the power device in the working state and generates a thermal map. The thermal map shows the distribution of the surface temperature of the power device. By setting a temperature threshold (such as areas above 30°C higher than the ambient temperature), hot spot areas are identified. The structure hot spot area positioning data includes the coordinate position, area size, temperature gradient, and other information of the hot spot area. These data are stored in a three-dimensional coordinate system and used for subsequent parameterization correlation of the microfluidic channel structure.

[0086] According to the structure hot spot area positioning data, the microfluidic three-dimensional channel structure is parameterized and correlated. The microfluidic three-dimensional channel structure refers to the channel network designed inside or at the bottom of the power device for cooling liquid flow. The parameterization correlation process establishes the mapping relationship between the hot spot area and the geometric parameters of the microfluidic channel. The specific correlation method is to establish a mathematical model between the temperature field of the hot spot area and the geometric parameters of the channel (such as channel width, depth, spacing, number of branches, etc.). Through the coupling solution of the heat conduction equation and the fluid mechanics equation, the best channel parameters corresponding to each hot spot area are determined. The channel correlation data include the hot spot area coordinates and the corresponding channel geometric parameter set. These data are used for the construction of the subsequent heat flow multi-physical field coupling relationship.

[0087] According to the channel correlation data, the heat flow multi-physical field coupling relationship is constructed. The heat flow multi-physical field coupling relationship refers to the interaction relationship between the heat conduction field and the fluid flow field. In the construction process, the finite element analysis method is used to couple and solve the heat conduction equation and the Navier-Stokes equation. In the simulation analysis, the power device heat source distribution, material thermal conductivity, fluid flow rate, specific heat capacity, and other parameters are considered. Through multiple iterative calculations, the temperature distribution of the heat flow field, the velocity field and pressure field of the fluid flow, and other data are obtained. The quantitative mapping relationship is represented as a heat flow coupling heat transfer coefficient matrix, which describes the quantitative relationship between the temperature change of the hot spot area and the fluid flow rate, flow under a specific channel geometric structure. This mapping relationship provides a theoretical basis for subsequent channel optimization.

[0088] Channel optimization is performed on the microfluidic three-dimensional channel structure based on the quantitative mapping relationship. The channel optimization adopts a multi-objective optimization algorithm, aiming to maximize the heat transfer efficiency and minimize the fluid pressure drop. The optimization process considers the influence of channel width, depth, cross-sectional shape, bending angle, and other geometric parameters. The optimization algorithm uses genetic algorithm or particle swarm optimization method to find the optimal solution by iteratively calculating the heat transfer efficiency and fluid pressure drop under different channel geometric parameter combinations. Optimized channel geometry refers to the set of microfluidic three-dimensional channel structure parameters obtained through the optimization algorithm, which has the best heat transfer performance and flow performance, including detailed geometric dimensions, position distribution, connection mode, and other information of the channel.

[0089] Fluid flow resistance calculation is performed based on the optimized channel geometry. Fluid flow resistance calculation adopts computational fluid dynamics (CFD) method to simulate the flow state of fluid in the optimized channel structure under different flow conditions. The calculation process considers the parameters of fluid viscosity, density, flow rate, and other factors, as well as the geometric shape of the channel, surface roughness, and other factors. By solving the Navier-Stokes equation, the pressure distribution under different flow rates is obtained. The pressure drop-flow rate relationship data is represented as a pressure drop-flow rate curve, which describes the quantitative relationship between fluid flow rate and pressure loss under a specific channel geometry. These data are used to evaluate the pump power and flow control strategy required for the microfluidic cooling system.

[0090] Spatial configuration evaluation is performed on the power device based on the pressure drop-flow rate relationship data. Spatial configuration evaluation considers factors such as the layout of power devices, the distribution of microfluidic channels, and the overall size of the cooling system. The evaluation process uses a comprehensive analysis method of computational thermodynamics and fluid mechanics to simulate the heat transfer efficiency and fluid flow performance under different spatial configurations. The balance parameter is the set of optimal configuration parameters obtained by considering factors such as space utilization, manufacturing complexity, and cooling efficiency under the premise of meeting the heat dissipation requirements of power devices. The balance parameter includes channel density, fluid flow rate, pump power, and radiator size, which together determine the overall performance of the power device monolithic integrated microfluidic cooling system.

[0091] The scheme iteration generation is generated according to the balance parameters and the device integrated structure. The scheme iteration generation process adopts a method combining numerical simulation and optimization algorithm, and through multiple iteration calculations, the device integrated structure and the microfluid channel parameters are continuously adjusted until the design target is met. In the iteration process, the cooling performance after each scheme modification is evaluated, the gap with the design target is compared, and the optimization direction and step are adjusted according to the gap size. The target design scheme refers to the final design scheme that meets the multiple constraint conditions such as the heat dissipation requirement of the power device, the space limitation and the fluid pressure drop requirement. The target design scheme contains complete three-dimensional microfluid cooling channel structure model, material selection, manufacturing process suggestion and other information, which provides detailed technical reference for the actual manufacturing of the power device monolithic integrated microfluid cooling system.

[0092] The embodiment can effectively improve the cooling efficiency and flow performance by optimizing the design method of the power device monolithic integrated microfluid cooling channel, and meet the heat dissipation requirement of the high-power-density device. Through the regional distribution analysis of the device integrated structure according to the cooling evaluation result, the hot spot area can be accurately positioned, accurate data support is provided for the subsequent design of the microfluid channel, and the design deviation in the cooling scheme is effectively reduced. Combined with the quantitative mapping of the thermal flow multi-physical field coupling relationship, the geometry of the microfluid channel is optimized, so that the heat transfer capacity and the fluid flow performance of the cooling channel reach the best balance, thereby improving the efficiency of the thermal management. In addition, the accurate calculation of the pressure drop and flow relationship data ensures that the fluid flow resistance is minimized, reduces the energy consumption, and enables the entire cooling system to meet the high-efficiency heat dissipation while effectively saving energy.

[0093] Reference Figure 2 The application also provides a design device for a power device monolithic integrated microfluid cooling channel, which is applied to the design method for the power device monolithic integrated microfluid cooling channel according to any one of the above. The acquisition module is used to acquire the size structure data, hot spot density data and heat source data of the power device, and perform microfluid cooling requirement analysis to obtain channel design requirements and heat source distribution information. The analysis module is used to perform microfluid channel network construction and surface insulation sealing treatment on the preset wide-bandgap semiconductor substrate according to the channel design requirements, and obtain a microfluid three-dimensional channel structure. The correlation module is used to perform power device active area layout according to the microfluid three-dimensional channel structure, and obtain a device integrated structure. The processing module is used to perform cooling simulation evaluation on the device integrated structure according to the heat source distribution information, and obtain a cooling evaluation result. The control module is used to perform iteration verification optimization on the device integrated structure according to the cooling evaluation result, and obtain a target design scheme.

[0094] The application provides a design system of a power device monolithic integrated microfluid cooling channel. By integrating the microfluid cooling channel in the power device, efficient thermal management can be achieved. According to the size structure data, hot spot density data and heat source data of the power device, microfluid cooling requirement analysis can be performed to ensure the accuracy and effectiveness of the cooling channel design. Secondly, a wide bandgap semiconductor substrate is used to construct the microfluid channel network and perform surface insulation and sealing treatment, forming a microfluid three-dimensional channel structure, which can significantly improve the heat dissipation efficiency and reduce the device temperature. By arranging the power device active area in the microfluid three-dimensional channel structure, thermal coupling integration is realized, so that the cooling channel and the heat source are closely combined, the cooling effect is improved, and the thermal resistance is reduced. Cooling simulation evaluation further optimizes the device integrated structure, ensuring the reliability and stability of the cooling system. The iterative verification optimization process enables the design scheme to be continuously improved, and finally meets the cooling requirements. This design method not only effectively improves the heat dissipation performance of the power device, but also reduces the size of the external heat dissipation system, promotes the miniaturization and light weight of the equipment, and improves the integration and reliability of the system. By precisely cooling the hot spot area, the service life of the device is prolonged, and the performance stability is enhanced.

[0095] It should be noted that, for the convenience and brevity of description, the specific working processes of the above-described system and each module can be referred to the corresponding processes in the foregoing method embodiments, which will not be described here.

[0096] The above only describes the preferred embodiments of the application, and does not limit the patent scope of the application. Any equivalent structure or equivalent process transformation based on the content of the specification and drawings, or direct or indirect application in other related technical fields, is also included in the patent protection scope of the application.

Claims

1. A design method for a monolithically integrated microfluidic cooling channel for a power device, characterized in that: include: Obtain the size and structure data, hotspot density data, and heat source data of power devices, and perform microfluidic cooling requirements analysis to obtain channel design requirements and heat source distribution information; According to the channel design requirements, a microfluidic channel network is constructed and surface insulation and sealing treatment is performed on a preset wide bandgap semiconductor substrate to obtain a microfluidic three-dimensional channel structure; Layout the active area of ​​the power device according to the three-dimensional microfluidic channel structure to obtain a device integrated structure; performing a cooling simulation evaluation on the device integrated structure according to the heat source distribution information to obtain a cooling evaluation result; The device integrated structure is iteratively verified and optimized based on the cooling evaluation result to obtain a target design solution.

2. The method for designing a monolithically integrated microfluidic cooling channel for a power device according to claim 1, characterized in that: The acquisition of the size data, hotspot density data, and heat source data of the power device and the analysis of the microfluidic cooling requirements to obtain the channel design requirements and heat source distribution information includes: Scanning and analyzing a circuit design diagram of the power device to obtain the dimension data; Performing hotspot distribution measurement on the power device according to the size data to obtain hotspot density data; Performing density division on the hotspot density data to obtain a heat flux density partition map; Perform heat source positioning on the heat source data according to the heat flux density partition map to obtain the heat source distribution information; Performing coolant matching calculation based on the heat source distribution information to obtain channel diameter information; The heat transfer coefficient is calculated and the structure is analyzed based on the channel diameter information to obtain the channel design requirements.

3. The design method of a monolithically integrated microfluidic cooling channel for a power device according to claim 1, characterized in that: The microfluidic channel network is constructed and surface insulation and sealing treatment is performed on a preset wide bandgap semiconductor substrate according to the channel design requirements to obtain a microfluidic three-dimensional channel structure, including: Performing parameter extraction on the channel design requirements to obtain channel network parameters and channel cross-sectional geometric parameters; Designing an asymmetric etching mask for the wide bandgap semiconductor substrate according to the channel network parameters to obtain a channel network mask pattern; Performing a multi-stage gradient process design on the wide bandgap semiconductor substrate according to the channel network mask pattern to obtain a microchannel depth structure; performing nano-thin film deposition on the micro-channel depth structure to obtain a micro-channel inner wall structure; The microchannel inner wall structure is coated with a composite insulating layer according to the channel cross-sectional geometric parameters to obtain the microfluidic three-dimensional channel structure.

4. The method for designing a monolithically integrated microfluidic cooling channel for a power device according to claim 3, characterized in that: The multi-stage gradient process design is performed on the wide bandgap semiconductor substrate according to the channel network mask pattern to obtain a microchannel depth structure, including: Performing surface activation design on the wide bandgap semiconductor substrate according to the channel network mask pattern to obtain a surface modified structure; Performing selective area photoresist coating on the surface modified structure to obtain a first etching mask layer; performing ion beam etching on the wide bandgap semiconductor substrate according to the first etching mask layer to obtain a primary microchannel structure; performing critical point drying on the primary microchannel structure to obtain a primary channel inner wall structure; Performing secondary photolithography on the inner wall structure of the primary channel according to the channel network mask pattern to obtain a second etching mask layer; performing deep reactive ion etching on the second etching mask layer to obtain a deep microchannel structure; The deep microchannel structure is subjected to surface roughness optimization treatment to obtain a deep microchannel structure.

5. The method for designing a monolithically integrated microfluidic cooling channel for a power device according to claim 1, wherein: The power device active area layout is performed according to the microfluidic three-dimensional channel structure to obtain a device integrated structure, including: Analyzing the heat conduction characteristics of the microfluidic three-dimensional channel structure to obtain heat conduction distribution data; Calculating the thermal field gradient on the substrate surface of the power device according to the heat conduction distribution data to obtain temperature distribution data; Performing critical hot spot identification on the temperature distribution data to obtain a hot spot area coordinate set; Performing a preliminary design of the power device according to the hot spot area coordinate set to obtain a preliminary layout plan; Perform channel coupling verification on the preliminary layout scheme to obtain fluid-structure coupling parameters; Performing electrode layout design on the preliminary layout scheme according to the fluid-solid coupling parameters to obtain an electrode layout scheme; The electrode layout scheme and the microfluidic three-dimensional channel structure are subjected to structural integration coupling calculation to obtain a device integration structure.

6. The method for designing a monolithically integrated microfluidic cooling channel for a power device according to claim 1, wherein: The performing cooling simulation evaluation on the device integrated structure according to the heat source distribution information to obtain a cooling evaluation result includes: Performing a thermal distribution simulation on the device integrated structure according to the heat source distribution information to obtain device thermal distribution data; Perform conjugate heat conduction analysis and convection heat transfer calculation on the device thermal distribution data and the microfluidic three-dimensional channel structure to obtain an iterative solution of the temperature field; Conducting convergence judgment on the temperature field iterative solution to obtain interface heat flux distribution data; Calculating the local heat transfer coefficient based on the interface heat flux distribution data to obtain local heat transfer performance evaluation data of the microfluidic cooling channel; performing fluid dynamics analysis on the microfluidic three-dimensional channel structure to obtain fluid performance evaluation data; The local heat transfer performance evaluation data and the fluid performance evaluation data are used to perform cooling performance evaluation to obtain a cooling evaluation result.

7. The method for designing a monolithically integrated microfluidic cooling channel for a power device according to claim 6, characterized in that: The step of determining the convergence of the temperature field iterative solution to obtain interface heat flux distribution data includes: Performing statistical analysis on the temperature variation distribution data, calculating the maximum temperature variation and the average temperature variation, and obtaining a temperature convergence index; Comparing the temperature convergence index with a preset temperature convergence threshold to generate a convergence status indicator; Performing convergence branch discrimination on the convergence state identifier according to a preset convergence condition, and obtaining heat flow extraction step information when the convergence state identifier indicates that the convergence condition has been met; Performing solid-liquid interface grid identification on the heat flow extraction step information to obtain interface grid identification data; Performing temperature gradient calculation based on the interface grid identification data to obtain interface temperature gradient field data; Performing density calculation on the interface temperature gradient field data and the preset solid material thermal conductivity parameter to obtain a solid-liquid interface heat flux density vector field; The heat flux density of the solid-liquid interface heat flux density vector field is calculated to obtain the interface heat flux distribution data.

8. The method for designing a monolithically integrated microfluidic cooling channel for a power device according to claim 1, wherein: The iterative verification and optimization of the device integrated structure based on the cooling evaluation result to obtain a target design solution includes: Performing a regional distribution analysis on the device integrated structure according to the cooling evaluation result to obtain structural hot spot area positioning data; performing parameter correlation on the microfluidic three-dimensional channel structure according to the structural hot spot area positioning data to obtain channel correlation data; Calculating the fluid flow resistance of the microfluidic three-dimensional channel structure according to the channel association data to obtain pressure drop and flow rate relationship data; Performing a spatial configuration evaluation on the power device based on the pressure drop and flow rate relationship data to obtain a balance parameter; Schemes are iteratively generated according to the balance parameters and the device integration structure to obtain the target design scheme.

9. A design device for a monolithically integrated microfluidic cooling channel for a power device, characterized in that: The design method for a monolithically integrated microfluidic cooling channel for a power device as claimed in any one of claims 1 to 8 comprises: An acquisition module is used to obtain dimensional structure data, hotspot density data, and heat source data of power devices, and perform microfluidic cooling requirement analysis to obtain channel design requirements and heat source distribution information; An analysis module, configured to construct a microfluidic channel network and perform surface insulation and sealing treatment on a preset wide bandgap semiconductor substrate according to the channel design requirements to obtain a three-dimensional microfluidic channel structure; An association module, configured to perform a layout of a power device active area according to the microfluidic three-dimensional channel structure to obtain a device integrated structure; a processing module, configured to perform a cooling simulation evaluation on the device integrated structure based on the heat source distribution information to obtain a cooling evaluation result; A control module is used to iteratively verify and optimize the device integration structure according to the cooling evaluation result to obtain a target design solution.

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