Resistance-capacitance combined suppression method and system for dynamic stray current invading transformer substation

Abstract

The invention discloses a resistance-capacitance combined suppression method and system for a dynamic stray current invading transformer substation, and the method comprises the steps: constructing a stray current invading distributed circuit model of a target transformer substation, solving the stray current invading distributed circuit model, and obtaining an initial stray current before suppression; determining a stray current intrusion suppression model based on a main transformer neutral point resistance-capacitance method according to the stray current intrusion distribution circuit model, and solving the stray current intrusion suppression model to obtain suppressed target stray current; and according to the initial stray current and the target stray current, in combination with a suppression effect, determining a value scheme of suppression capacitance and suppression resistance. In combination with the suppression effect and the neutral point overvoltage constraint, a value scheme of capacitance and resistance is given, an implementation case and a verification method of a resistance-capacitance combined suppression system are further given, the total amount of invaded stray current can be limited within 25%, and reference is provided for stray current treatment.

Description

Technical Field

[0001] The present invention belongs to the technical field of power system operation and maintenance, and in particular relates to a resistance-capacitance combined suppression method and system for dynamic stray current intrusion into a substation. Background Art

[0002] With the development of rail transit and new energy systems, an increasing amount of stray current is being coupled into the power grid through various means, causing stray current intrusion into substations. Stray current refers to the normal operating current of an external system that intrudes into other systems through abnormal paths. For power systems, stray current intrusion can cause abnormal vibration and loss in transformers within substations, leading to mechanical and electrical failures, impacting the safe operation of the power grid and reducing power supply reliability.

[0003] To combat stray currents invading substations, a commonly used engineering approach is to connect capacitors in series with the neutral point. This method effectively suppresses DC stray currents only; it can interfere with AC stray currents, resulting in poor suppression. Alternatively, connecting resistors in series with the neutral point is a viable engineering approach. However, these resistors have a flow-through effect, making it difficult to fully suppress stray currents. Furthermore, both capacitors and resistors in series with the neutral point face the issue of neutral point overvoltage, and the neutral point resistor method also affects the transformer's zero-sequence protection, limiting its application. Summary of the Invention

[0004] The present invention provides a resistance-capacitance combined suppression method and system for dynamic stray current intrusion into a substation, which is used to solve the technical problem that the neutral point series resistance has a flow-through effect and it is difficult to achieve a comprehensive suppression effect on the stray current.

[0005] In a first aspect, the present invention provides a resistance-capacitance combined suppression method for dynamic stray current intrusion into a substation, comprising:

[0006] Constructing a stray current intrusion distribution circuit model of the target substation, solving the stray current intrusion distribution circuit model, and obtaining an initial stray current before suppression;

[0007] Determining a stray current intrusion suppression model based on a main transformer neutral point resistance-capacitance method according to the stray current intrusion distribution circuit model, and solving the stray current intrusion suppression model to obtain a suppressed target stray current;

[0008] According to the initial stray current and the target stray current, combined with the suppression effect, a value scheme for the suppression capacitor and the suppression resistor is determined.

[0009] In a second aspect, the present application provides a resistance-capacitance combined suppression system for dynamic stray current intrusion into a substation, comprising:

[0010] a construction module configured to construct a stray current intrusion distribution circuit model of a target substation, solve the stray current intrusion distribution circuit model, and obtain an initial stray current before suppression;

[0011] a determination module configured to determine a stray current intrusion suppression model based on a resistance-capacitance method for a main transformer neutral point according to the stray current intrusion distribution circuit model, and solve the stray current intrusion suppression model to obtain a target stray current after suppression;

[0012] an output module configured to determine a value scheme of a suppression capacitor and a suppression resistor according to the initial stray current and the target stray current in combination with a suppression effect.

[0013] In a third aspect, an electronic device is provided, comprising at least one processor and a memory connected to the at least one processor in communication, wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the steps of the resistance-capacitance combined suppression method for dynamic stray current intrusion into a substation according to any one of the embodiments of the present application.

[0014] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and the program instructions are executed by a processor to enable the processor to perform the steps of the resistance-capacitance combined suppression method for dynamic stray current intrusion into a substation according to any one of the embodiments of the present application.

[0015] The resistance-capacitance combined suppression method and system for dynamic stray current intrusion into a substation can obtain the intrusion stray current under the action of any stray current through model solving, and theoretically prove the effectiveness of the suppression method. In combination with the suppression effect and the neutral point overvoltage constraint, the value scheme of the capacitor and the resistor is given, and the implementation case and verification method of the resistance-capacitance combined suppression system are further given, which can limit the total amount of the intrusion stray current to within 25%, and provide a reference for stray current treatment. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0017] Figure 1A flow chart of a resistance-capacitance combined suppression method of a dynamic stray current invading a transformer substation is provided for an embodiment of the present application.

[0018] Figure 2 A schematic diagram of stray current distribution before suppression of a specific embodiment is provided for an embodiment of the present application.

[0019] Figure 3 A schematic diagram of stray current distribution after neutral point resistance-capacitance suppression of a specific embodiment is provided for an embodiment of the present application.

[0020] Figure 4 A schematic diagram of a neutral point resistance-capacitance system of a specific embodiment is provided for an embodiment of the present application.

[0021] Figure 5 A structural block diagram of a resistance-capacitance combined suppression system of a dynamic stray current invading a transformer substation is provided for an embodiment of the present application.

[0022] Figure 6 A structural schematic diagram of an electronic device is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0023] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in connection with the drawings of the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0024] Please refer to Figure 1 , which shows a flow chart of a resistance-capacitance combined suppression method of a dynamic stray current invading a transformer substation.

[0025] As shown in Figure 1 , the resistance-capacitance combined suppression method of a dynamic stray current invading a transformer substation specifically includes the following steps:

[0026] Step S101, a stray current invasion distribution circuit model of a target transformer substation is constructed, and the stray current invasion distribution circuit model is solved to obtain an initial stray current before suppression.

[0027] In this step, a circuit model shown in Figure 2 is established for stray current distribution of a target transformer substation.

[0028] The expression of the stray current invasion distribution circuit model is:

[0029]

[0030] Where, I T0 is the initial stray current before suppression, R g is the grounding resistance of the substation, R s is the equivalent resistance of the power station to the outside, I s is the dynamic stray current.

[0031] For the target substation, collecting information such as ground resistance and line resistance can complete the solution of the stray current intrusion distribution circuit model.

[0032] Since Rg∈(0.1, 0.5)Ω and Rs∈(0.01, 1)Ω in the project, I T0 is the source stray current I s part of the stray current, and will cause abnormal operation of the main transformer, and further treatment of the stray current is required.

[0033] Step S102 : determining a stray current intrusion suppression model based on a main transformer neutral point resistance-capacitance method according to the stray current intrusion distribution circuit model, and solving the stray current intrusion suppression model to obtain a suppressed target stray current.

[0034] In this step, if Figure 3 As shown, R n with C n They are the suppression resistor and suppression capacitor connected in series in the neutral point circuit of the main transformer. n and C n The introduction of I T It will drop significantly compared to before suppression, thus suppressing the intrusion of stray current into the main transformer of the substation.

[0035] The expression of the stray current intrusion suppression model is:

[0036] I T (t) = i R (t)+i C (t),

[0037]

[0038] u s (t) = I T0 (t)R s ,

[0039] u n (t) = I g (t)R g ,

[0040] Where, I T (t) is the target stray current after suppression at time t, i R (t) is time t, i C(t) is the potential of the main transformer grounding point at time t, u n is the suppression capacitance, i R (t) is the potential of the main transformer grounding point at time t, u n (t) is the potential of the main transformer grounding point at time t, u s (t) is the potential of the main transformer grounding point at time t, u n is the suppression resistance, I T0 (t) is the initial stray current before suppression at time t, I g (t) is the grounding current of the substation at time t, R s is the equivalent resistance of the substation to the outside world, R g is the grounding resistance of the substation.

[0041] The solution method of ordinary differential equations is used for the stray current intrusion suppression model, and the waveform of I s (t) can be calculated under any input I T (t).

[0042] In step S103, the value scheme of the suppression capacitance and the suppression resistance is determined according to the initial stray current and the target stray current, combined with the suppression effect.

[0043] In this step, the suppression efficiency is defined, and the stray current I s over a certain long time T is compared before and after suppression. I T (t) will have different waveforms. The dynamic waveform is not convenient for evaluating the treatment efficiency, so the ratio of the absolute value of the current is introduced to determine the suppression efficiency. The suppression efficiency is calculated, and the expression is:

[0044]

[0045] In the formula, η is the suppression efficiency, I T (t) is the target stray current after suppression at time t, I T0 (t) is the initial stray current before suppression at time t, I Ta is the absolute value average of the target stray current after suppression, I Ta0 is the absolute value average of the initial stray current before suppression, T = 1h;

[0046] It is judged whether the suppression efficiency is less than a preset threshold value;

[0047] If it is not less than the preset threshold value, the values of the suppression capacitance and the suppression resistance are adjusted to obtain different target stray currents, and the suppression efficiency is continuously calculated according to different target stray currents and the initial stray current until the suppression efficiency is less than the preset threshold value;

[0048] If it is less than the preset threshold value, the values of the suppression capacitance and the suppression resistance corresponding to the target stray current are taken as the final values.

[0049] Generally, the size of the neutral point series resistance-capacitance must be strictly selected to meet the requirements of stray current prevention and overvoltage. For the capacitance, the recommended capacitance size is the standard of 0.1Ω impedance at power frequency, i.e. 50Hz corresponds to C n = 0.035F. This capacitance is a large capacitance, and multiple capacitors need to be connected in parallel to meet the size requirement of the capacitor. In addition, the withstand voltage of the capacitor should be selected as the insulation level of the neutral point of the main transformer to prevent damage to the capacitor. For R n , the resistance should be selected to be 1-3Ω to meet the requirements of stray current treatment and neutral point insulation level.

[0050] In a specific embodiment, as shown in Figure 4 , the neutral point resistance-capacitance system of the main transformer circuit is first disconnected from the ground circuit of the original main transformer neutral point through switch S1, and another ground channel is modified, in which switch S2 and parallel R n and C n are connected and grounded.

[0051] In addition, a stray current monitoring unit needs to be installed at the original neutral point position to monitor stray current. Generally, after the stray current is detected by the sensor, the system sends a stray current alarm, and the user can close S2 first and then open S1 to put the suppression device into operation. After that, the stray current monitoring device alarm signal is eliminated, and the resistance-capacitance system implements the S1 closing operation at intervals (every 10 minutes), i.e. in the case of S2 closing and S1 opening, the switch S1 is closed for 1 second every 10 minutes to determine whether the stray current risk exists. If the stray current risk exists, the stray current monitoring unit will send a signal, and the neutral point resistance-capacitance system will open S1. If the risk disappears, the neutral point resistance-capacitance system will close S1 and then open S2 to exit the device. The neutral point resistance-capacitance system will record each operation to generate a log.

[0052] Two main transformers (T1 and T2) are taken in the station, and the neutral points are grounded for operation. Among them, the main transformer T1 is configured with a neutral point resistance-capacitance combined suppression system. After the neutral point resistance-capacitance combined suppression system is put into operation, the stray current of the neutral point of T1 changes, and the stray current monitoring sensor is taken in the neutral point circuit of the main transformer T2 without resistance-capacitance suppression system. Still, a longer measurement time T is taken, the absolute average value of the neutral point current of T1 is I1, and the absolute average value of the neutral point current of T2 is I2, and the expression is:

[0053]

[0054] If , it is proved that the suppression measure has achieved the effect, otherwise it is determined that the neutral point resistance-capacitance combined suppression system is not effective, and additional treatment measures need to be taken.

[0055] In summary, the method of the application can obtain the invasion stray current under the action of any stray current by model solving, and theoretically provides the effectiveness of the suppression method. In combination with the suppression effect and the neutral point overvoltage constraint, the value scheme of the capacitance and the resistance is given, and the implementation case and the verification method of the resistance-capacitance combined suppression system are further given, which can limit the total amount of the invasion stray current to within 25%, thereby providing a reference for stray current treatment.

[0056] Referring to Figure 5 , a structure block diagram of a resistance-capacitance combined suppression system of a dynamic stray current invasion substation is shown.

[0057] As shown in Figure 5 , the resistance-capacitance combined suppression system 200 includes a construction module 210, a determination module 220, and an output module 230.

[0058] The construction module 210 is configured to construct a stray current invasion distribution circuit model of a target substation, solve the stray current invasion distribution circuit model, and obtain an initial stray current before suppression.

[0059] The determination module 220 is configured to determine a stray current invasion suppression model based on a neutral point resistance-capacitance method of a main transformer according to the stray current invasion distribution circuit model, and solve the stray current invasion suppression model to obtain a target stray current after suppression.

[0060] The output module 230 is configured to determine a value scheme of a suppression capacitance and a suppression resistance according to the initial stray current and the target stray current in combination with the suppression effect.

[0061] It should be understood that Figure 5 the modules described in the specification correspond to each step in the method described in the Figure 1 . Therefore, the operations and features described above for the method and the corresponding technical effects are also applicable to the modules in Figure 5 , and will not be described here.

[0062] In some other embodiments, the application also provides a computer readable storage medium having a computer program stored thereon, and the program instructions are executed by a processor to make the processor execute the dynamic stray current invasion substation resistance-capacitance combined suppression method in any method embodiment described above.

[0063] As an implementation manner, the computer readable storage medium of the application stores computer executable instructions, and the computer executable instructions are configured to:

[0064] Constructing a stray current intrusion distribution circuit model of the target substation, solving the stray current intrusion distribution circuit model, and obtaining an initial stray current before suppression;

[0065] Determining a stray current intrusion suppression model based on a main transformer neutral point resistance-capacitance method according to the stray current intrusion distribution circuit model, and solving the stray current intrusion suppression model to obtain a suppressed target stray current;

[0066] According to the initial stray current and the target stray current, combined with the suppression effect, a value scheme for the suppression capacitor and the suppression resistor is determined.

[0067] The computer-readable storage medium may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the resistance-capacitance combined suppression system for dynamic stray current intrusion substations, etc. In addition, the computer-readable storage medium may include a high-speed random access memory, and may also include a memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the computer-readable storage medium may optionally include a memory remotely located relative to the processor, and these remote memories may be connected to the resistance-capacitance combined suppression system for dynamic stray current intrusion substations via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0068] Figure 6 Schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. Figure 6 As shown, the device includes: a processor 310 and a memory 320. The electronic device may also include: an input device 330 and an output device 340. The processor 310, the memory 320, the input device 330 and the output device 340 may be connected via a bus or other means. Figure 6 The example of the bus connection is taken. The memory 320 is the computer-readable storage medium mentioned above. The processor 310 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions and modules stored in the memory 320, that is, realizes the method for the combined resistance and capacitance suppression of dynamic stray current intrusion into the substation in the above-mentioned method embodiment. The input device 330 can receive input digital or character information, and generate key signal input related to the user settings and function control of the combined resistance and capacitance suppression system for dynamic stray current intrusion into the substation. The output device 340 may include a display device such as a display screen.

[0069] The electronic device can execute the method provided by the embodiments of the application, has the function modules and beneficial effects corresponding to the execution method. Technical details not described in detail in the embodiments can be referred to the method provided by the embodiments of the application.

[0070] As an implementation form, the electronic device is applied to a resistance-capacitance combined suppression system of a dynamic stray current intrusion substation, and is used for a client and includes at least one processor and a memory in communication connection with the at least one processor. The memory stores instructions executable by the at least one processor. The instructions are executed by the at least one processor to enable the at least one processor to:

[0071] construct a stray current intrusion distribution circuit model of a target substation, solve the stray current intrusion distribution circuit model, and obtain an initial stray current before suppression;

[0072] determine a stray current intrusion suppression model based on a resistance-capacitance method of a main transformer neutral point according to the stray current intrusion distribution circuit model, and solve the stray current intrusion suppression model to obtain a target stray current after suppression;

[0073] determine a value scheme of a suppression capacitor and a suppression resistor according to the initial stray current and the target stray current in combination with a suppression effect.

[0074] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be realized by means of software and a necessary general hardware platform, and of course, can also be realized by hardware. Based on such understanding, the above technical solutions can be embodied in the form of a software product, which can be stored in a computer readable storage medium, such as a ROM / RAM, a magnetic disk, an optical disk, etc., and includes a plurality of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the method of each embodiment or some parts of the embodiment.

[0075] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the application, and not to limit them; although the application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to some technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the application.

Claims

1. A resistance-capacitance combined suppression method for dynamic stray current intrusion into a substation, characterized in that: include: Constructing a stray current intrusion distribution circuit model of the target substation, solving the stray current intrusion distribution circuit model, and obtaining an initial stray current before suppression; Determining a stray current intrusion suppression model based on a main transformer neutral point resistance-capacitance method according to the stray current intrusion distribution circuit model, and solving the stray current intrusion suppression model to obtain a suppressed target stray current; According to the initial stray current and the target stray current, combined with the suppression effect, a value scheme for the suppression capacitor and the suppression resistor is determined.

2. The method for jointly suppressing dynamic stray current intrusion into a substation by resistance and capacitance according to claim 1 is characterized in that: The expression of the stray current intrusion distribution circuit model is: Where, I T0 is the initial stray current before suppression, R g is the grounding resistance of the substation, R s is the equivalent resistance of the power station to the outside, I s is the dynamic stray current.

3. The method for jointly suppressing the dynamic stray current intrusion into a substation by resistance and capacitance according to claim 1 is characterized in that: The expression of the stray current intrusion suppression model is: L T (t)=i R (t)+i C (t), u s (t)=I T0 (t)R s , u n (t)=I g (t)R g , Where, I T (t) is the target stray current after suppression at time t, i R (t) is time t, i C (t) is time t, C n is the suppression capacitance, i R (t) is time t, u n (t) is the potential of the main transformer grounding point at time t, u s (t) is the node potential of the system at time t, R n is the suppression resistor, I T0 (t) is the initial stray current before suppression at time t, I g (t) is the ground current of the substation at time t, R s is the equivalent resistance of the power station to the outside, R g is the grounding resistance of the substation.

4. The method for jointly suppressing the dynamic stray current intrusion into a substation by resistance and capacitance according to claim 1 is characterized in that: The scheme for determining the values ​​of the suppression capacitor and the suppression resistor based on the initial stray current and the target stray current in combination with the suppression effect includes: The suppression efficiency is calculated according to the initial stray current and the target stray current, and the expression is: Where η is the inhibition efficiency, I T (t) is the target stray current after suppression at time t, I T0 (t) is the initial stray current before suppression at time t, I Ta is the absolute mean value of the target stray current after suppression, I Ta0 is the absolute mean value of the initial stray current before suppression, T = 1h; Determining whether the suppression efficiency is less than a preset threshold; If it is not less than the preset threshold, the values ​​of the suppression capacitor and the suppression resistor are adjusted to obtain different target stray currents, and the suppression efficiency is continued to be calculated according to the different target stray currents and the initial stray current until the suppression efficiency is less than the preset threshold.

5. The method for jointly suppressing the dynamic stray current intrusion into the substation by resistance and capacitance according to claim 4 is characterized in that: After determining whether the suppression efficiency is less than a preset threshold, the method further includes: If it is less than a preset threshold, the values ​​of the suppression capacitor and the suppression resistor corresponding to the target stray current are taken as the final values.

6. A resistance-capacitance combined suppression system for dynamic stray current intrusion into a substation, characterized by: include: A construction module is configured to construct a stray current intrusion distribution circuit model of the target substation, solve the stray current intrusion distribution circuit model, and obtain an initial stray current before suppression; a determination module configured to determine a stray current intrusion suppression model based on a main transformer neutral point resistance-capacitance method according to the stray current intrusion distribution circuit model, and solve the stray current intrusion suppression model to obtain a suppressed target stray current; The output module is configured to determine a value scheme for the suppression capacitor and the suppression resistor according to the initial stray current and the target stray current in combination with the suppression effect.

7. The resistance-capacitance combined suppression system for dynamic stray current intrusion into a substation according to claim 5 is characterized in that: The output module includes: A calculation unit is configured to calculate a suppression efficiency according to the initial stray current and the target stray current, wherein the expression is: Where η is the inhibition efficiency, I T (t) is the target stray current after suppression at time t, I T0 (t) is the initial stray current before suppression at time t, I Ta is the absolute mean value of the target stray current after suppression, I Ta0 is the absolute mean value of the initial stray current before suppression, T = 1h; a judging unit configured to judge whether the suppression efficiency is less than a preset threshold; The adjustment unit is configured to adjust the values ​​of the suppression capacitor and the suppression resistor if the value is not less than a preset threshold, so as to obtain different target stray currents, and continue to calculate the suppression efficiency according to the different target stray currents and the initial stray current until the suppression efficiency is less than the preset threshold.

8. The resistance-capacitance combined suppression system for dynamic stray current intrusion into a substation according to claim 5 is characterized in that: The output module also includes: The value taking unit is configured to take the values ​​of the suppression capacitor and the suppression resistor corresponding to the target stray current as the final values ​​if the value is less than a preset threshold.

9. An electronic device, characterized in that: include: At least one processor, and a memory communicatively connected to the at least one processor, wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 5.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to any one of claims 1 to 5 is implemented.

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