Gallium nitride devices, methods of making the same, and power devices

Abstract

The gallium nitride device, the preparation method thereof and the power equipment provided by the present disclosure comprise a channel layer, a barrier layer located at one side of the channel layer, a p-type cap layer located at a side of the barrier layer away from the channel layer, a gate metal layer located at a side of the p-type cap layer away from the barrier layer, and a conduction enhancement layer located between the gate metal layer and the p-type cap layer. By adding the conduction enhancement layer, holes are more easily injected, the pressure drop of the Schottky junction formed by the p-type cap layer and the gate metal layer is reduced, and the gate voltage can be applied more on the heterojunction formed by the barrier layer and the channel layer, thereby facilitating the regulation of the turn-on characteristics of the gallium nitride device.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to a gallium nitride device, its fabrication method, and a power device. Background Technology

[0002] In the development of semiconductor power switching devices, third-generation wide-bandgap semiconductor materials have attracted widespread attention due to their superior physical properties. These materials, especially gallium nitride (GaN), exhibit great potential in high-efficiency power conversion and modulation due to their high electron mobility, wide bandgap, high critical breakdown field strength, and electron saturation drift velocity. These properties of GaN materials give them significant advantages in designing high-performance power switching devices, especially in the fabrication of high electron mobility transistors (HEMTs).

[0003] In enhancement-mode gallium nitride (GaN) devices with a p-type gate structure, the Schottky junction formed between the gate metal layer and the pGaN layer generates a depletion region at zero gate voltage. This depletion region effectively depletes the two-dimensional electron gas (2DEG) in the channel beneath the pGaN layer, thereby achieving normally-off characteristics. However, the presence of this Schottky junction also means that a sufficiently high critical gate positive bias voltage (threshold voltage) needs to be applied to turn on the device in order to overcome the Schottky barrier and eliminate the depletion region in order to re-accumulate channel electrons.

[0004] When the gate leakage current is low, during the positive gate voltage turn-on process, the gate drive voltage will generate a voltage drop in the pGaN layer, significantly weakening the effective electric field acting on the AlGaN / pGaN interface. This results in insufficient accumulation of the channel two-dimensional electron gas (2DEG), manifested as an abnormally high threshold voltage (Vth) and deteriorated turn-on characteristics. Simultaneously, the excessively low gate leakage current makes it difficult for the device to recapture carriers when affected by donor traps, causing a shift in the device's threshold voltage. Summary of the Invention

[0005] This disclosure provides a gallium nitride device, its fabrication method, and a power device for controlling the turn-on characteristics of the gallium nitride device.

[0006] This disclosure provides a gallium nitride device, its fabrication method, and a power device, the specific solutions of which are as follows:

[0007] On one hand, embodiments of this disclosure provide a gallium nitride device, including:

[0008] Channel layer;

[0009] The barrier layer is located on one side of the channel layer;

[0010] The p-type cap layer is located on the side of the barrier layer away from the channel layer;

[0011] A gate metal layer is located on the side of the p-type cap layer away from the barrier layer;

[0012] A conduction enhancement layer is located between the gate metal layer and the p-type cap layer.

[0013] In some embodiments, in the gallium nitride device provided in the present disclosure, the material of the conduction enhancement layer includes p-type gallium nitride and at least one of titanium, aluminum, and nickel doped into the p-type gallium nitride.

[0014] In some embodiments, in the gallium nitride device provided in the present disclosure, the material of the conduction enhancement layer includes titanium nitride, and the nitrogen content in the titanium nitride gradually increases in the direction from the p-type cap layer to the gate metal layer.

[0015] In some embodiments, in the gallium nitride device provided in the present disclosure, the thickness of the conduction enhancement layer is less than or equal to 20 nm.

[0016] In some embodiments, the gallium nitride device provided in this disclosure further includes an insertion layer located between the channel layer and the barrier layer.

[0017] On the other hand, embodiments of this disclosure provide a method for fabricating the above-mentioned gallium nitride device, comprising:

[0018] The channel layer and the barrier layer are formed sequentially;

[0019] A p-type cap layer, a gate metal layer, and a conduction enhancement layer are formed on the barrier layer.

[0020] In some embodiments, in the above-described fabrication method provided in this disclosure, forming a p-type cap layer, a gate metal layer, and a conduction enhancement layer on the barrier layer specifically includes:

[0021] A p-type cap layer and a gate metal layer are formed on the barrier layer, wherein the p-type cap layer comprises gallium nitride, and the gate metal layer comprises at least one of titanium, aluminum, and nickel;

[0022] A passivation layer is deposited covering the gate metal layer and the barrier layer;

[0023] High-temperature annealing allows the metal in the gate metal layer to diffuse into the p-type cap layer, forming a conduction enhancement layer.

[0024] In some embodiments, in the above-described fabrication method provided in this disclosure, forming a p-type cap layer, a gate metal layer, and a conduction enhancement layer on the barrier layer specifically includes:

[0025] A p-type cap layer, an insertion metal layer, and a gate metal layer are formed on the barrier layer, wherein the p-type cap layer comprises gallium nitride, the insertion metal layer comprises at least one of titanium, aluminum, and nickel, and the gate metal layer comprises titanium nitride and / or tungsten.

[0026] A passivation layer is deposited covering the gate metal layer and the barrier layer;

[0027] High-temperature annealing allows the metal in the inserted metal layer to diffuse into the p-type cap layer, forming a conductive reinforcement layer.

[0028] In some embodiments, in the above-described fabrication method provided in this disclosure, forming a p-type cap layer, a gate metal layer, and a conduction enhancement layer on the barrier layer specifically includes:

[0029] A p-type cap layer is epitaxially grown on the barrier layer;

[0030] By controlling the nitrogen flow rate during the magnetron sputtering process to increase from 0 to a stable state, a titanium nitride conduction enhancement layer with a nitrogen content that gradually increases in the direction from the p-type cap layer to the gate metal layer, and a titanium nitride gate metal layer with a stable nitrogen content are sequentially prepared based on the titanium target.

[0031] On the other hand, embodiments of this disclosure provide a power device including the gallium nitride device described above in embodiments of this disclosure.

[0032] The beneficial effects of this disclosure are as follows:

[0033] The gallium nitride (GaN) device, its fabrication method, and power device provided in this disclosure include a channel layer; a barrier layer located on one side of the channel layer; a p-type cap layer located on the side of the barrier layer away from the channel layer; a gate metal layer located on the side of the p-type cap layer away from the barrier layer; and a conduction enhancement layer located between the gate metal layer and the p-type cap layer. By adding the conduction enhancement layer, holes can be more easily injected, the voltage drop of the Schottky junction formed by the p-type cap layer / gate metal layer is reduced, and the gate voltage can be applied more to the heterostructure formed by the barrier layer and the channel layer, thereby facilitating the control of the turn-on characteristics of the GaN device. Attached Figure Description

[0034] Figure 1 This is a schematic diagram of the structure of a gallium nitride device provided in an embodiment of this disclosure;

[0035] Figure 2 A schematic diagram of a gallium nitride device provided in the first fabrication process according to an embodiment of this disclosure;

[0036] Figure 3 A schematic diagram of another structure of the gallium nitride device provided in the first fabrication process according to the embodiments of this disclosure;

[0037] Figure 4 A schematic diagram of another structure of the gallium nitride device provided in the first fabrication process according to the embodiments of this disclosure;

[0038] Figure 5 A schematic diagram of another structure of the gallium nitride device provided in the first fabrication process according to the embodiments of this disclosure;

[0039] Figure 6 A schematic diagram of a gallium nitride device provided in an embodiment of this disclosure during a second fabrication process;

[0040] Figure 7 This is a schematic diagram of yet another structure of the gallium nitride device provided in the second fabrication process according to the embodiments of this disclosure;

[0041] Figure 8 This is a schematic diagram of yet another structure of the gallium nitride device provided in the second fabrication process according to the embodiments of this disclosure;

[0042] Figure 9 This is a schematic diagram of yet another structure of the gallium nitride device provided in the second fabrication process according to the embodiments of this disclosure;

[0043] Figure 10 An interface distribution diagram of a gallium nitride device provided in an embodiment of this disclosure;

[0044] Figure 11 The threshold voltage of the gallium nitride device provided in the embodiments of this disclosure;

[0045] Figure 12 The transconductance half-peak width of the gallium nitride device provided in the embodiments of this disclosure;

[0046] Figure 13 The subthreshold swing distribution of the gallium nitride device provided in the embodiments of this disclosure;

[0047] Figure 14 The gate breakdown characteristic curve of the gallium nitride device provided in the embodiments of this disclosure. Detailed Implementation

[0048] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. It should be noted that the dimensions and shapes of the figures in the drawings do not reflect actual proportions and are only intended to illustrate the content of this disclosure. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of known functions and known components are omitted.

[0049] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure and the claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “inner,” “outer,” “upper,” and “lower” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described object changes.

[0050] In some embodiments, this disclosure provides a gallium nitride device, such as... Figure 1 As shown, the structure may include: a channel layer 101, a barrier layer 102, a p-type cap layer 103, a gate metal layer 104, and a conduction enhancement layer 105; wherein, the material of the channel layer 101 may include gallium nitride (GaN); the barrier layer 102 may be located on one side of the channel layer 101, and the material of the barrier layer 102 may include aluminum gallium nitride (AlGaN); an insertion layer (e.g., the material of the insertion layer includes aluminum nitride AlN) may exist between the channel layer 101 and the barrier layer 102, or there may be no insertion layer; the barrier layer 102 and the channel layer 101 form a heterostructure that can induce a two-dimensional electron gas (2DEG); the p-type cap layer 103 is located on the side of the barrier layer 102 away from the channel layer 101, and the p-type cap layer 103... The material may include magnesium (Mg) doped gallium nitride (GaN); the gate metal layer 104 is located on the side of the p-type cap layer 103 away from the barrier layer 102, and the material of the gate metal layer 104 may be titanium (Ti), aluminum (Al), nickel (Ni), tungsten (W), titanium nitride (TiN), etc.; the conduction enhancement layer 105 may be located between the gate metal layer 104 and the p-type cap layer 103, and the material of the conduction enhancement layer 105 may include p-type gallium nitride (e.g., magnesium doped gallium nitride), and at least one of titanium, aluminum, and nickel doped with p-type gallium nitride, or the material of the conduction enhancement layer 105 may include titanium nitride, and the nitrogen content in the titanium nitride gradually increases in the direction from the p-type cap layer 103 to the gate metal layer 104. The conduction enhancement layer 105 can be understood as a transition layer located between the p-type cap layer 103 and the gate metal layer 104. Specifically, the content of each component is relatively stable in the p-type cap layer 103 and the gate metal layer 104, while the content of at least some components gradually changes in the conduction enhancement layer 105. For example, in Figure 10In the p-type cap layer 103, the Ga and N compositions show relatively small variations. Similarly, the Ti and N compositions in the gate metal layer 104 show relatively small variations. In the conduction enhancement layer 105, the Ga composition gradually decreases from the p-cap layer 103 towards the gate metal layer 104, the Ti composition gradually increases from the p-cap layer 103 towards the gate metal layer 104, and the N composition shows slight variations. By adding the conduction enhancement layer 105, the gate leakage current of the gallium nitride device increases, allowing for better control of the device's turn-on characteristics, a reduction in the transconductance half-width at half-maximum, and a reduction in the subthreshold swing.

[0051] Based on the same inventive concept, this disclosure provides a method for fabricating the above-mentioned gallium nitride device, which may include the following steps:

[0052] The channel layer 101 and the barrier layer 102 are formed sequentially;

[0053] A p-type cap layer 103, a gate metal layer 104, and a conduction enhancement layer 105 are formed on the barrier layer 102.

[0054] In some embodiments, the conduction enhancement layer 105 of this disclosure may be formed by metal diffusion from the gate metal layer 104 into the p-type cap layer 103. In this case, the fabrication process of the gallium nitride device of this disclosure may specifically include the following steps:

[0055] Step 1: As Figure 2 As shown, a substrate (not shown in the figure) is selected, and a core layer (not shown in the figure), a buffer layer (not shown in the figure), a channel layer 101, an insertion layer (not shown in the figure), a barrier layer 102, and a p-type cap layer 103 are sequentially grown on the substrate (not shown in the figure).

[0056] Step 2: As Figure 2 As shown, a gate metal layer 104 is deposited, and the gate metal can be an engineering metal such as titanium (Ti), aluminum (Al), or nickel (Ni). After photolithography with photoresist, the gate metal layer 104 and the corresponding p-type cap layer 103 are etched under the protection of the photoresist, as shown. Figure 3 As shown.

[0057] Step 3: As Figure 4 As shown, after removing the photoresist, a passivation layer 106 is deposited covering the gate metal layer 104 and the barrier layer 102. Then, high-temperature annealing causes the metal of the gate metal layer 104 to diffuse into the p-type cap layer 103, forming a conduction enhancement layer 105.

[0058] Step 4: As Figure 5 As shown, an ohmic metal layer 107 for the source / drain is formed by etching the passivation layer 106 and the barrier layer 102 and depositing metal. A source / drain in contact with the ohmic metal layer 107 can then be formed.

[0059] In some embodiments, the conduction enhancement layer 105 of this disclosure can be formed by adding an insertion metal layer 108 between the gate metal layer 104 and the p-type cap layer 103, and by the metal of the insertion metal layer 108 diffusing into the p-type cap layer 103. In this case, the fabrication process of the gallium nitride device of this disclosure may specifically include the following steps:

[0060] Step 1: As Figure 6 As shown, a substrate (not shown in the figure) is selected, and a core layer (not shown in the figure), a buffer layer (not shown in the figure), a channel layer 101, an insertion layer (not shown in the figure), a barrier layer 102, and a p-type cap layer 103 are sequentially grown on the substrate (not shown in the figure).

[0061] Step 2: As Figure 6 As shown, a metal layer 108 is deposited, and its material can be an engineering metal such as titanium (Ti), aluminum (Al), or nickel (Ni). The thickness of the metal layer 108 is no more than 20 nm. Optionally, the best material for the metal layer 108 is titanium (Ti), and the best thickness is 25 Å. This ultra-thin metal layer 108 serves to form the subsequent conduction enhancement layer 105. Due to its thinness, it can form a self-stopping effect, avoiding excessive gate leakage that could lead to device malfunction.

[0062] Step 3: As Figure 6 As shown, a gate metal layer 104 is deposited. This gate metal layer 104 needs to be a material that is relatively stable under high-temperature annealing, such as titanium nitride (TiN) or tungsten (W), to form a self-stopping effect with the inserted metal layer 108. Figure 7 As shown, after photolithography of the photoresist, the gate metal layer 104 and the corresponding insertion metal layer 108 and p-type cap layer 103 are etched under the protection of the photoresist.

[0063] Step 4: As Figure 8 As shown, after removing the photoresist, a passivation layer 106 is deposited covering the gate metal layer 104 and the barrier layer 102; then, high-temperature annealing is used to diffuse the metal inserted into the metal layer 108 into the p-type cap layer 103 to form a conduction enhancement layer 105.

[0064] Step 5: As Figure 9 As shown, an ohmic metal layer 107 for the source / drain is formed by etching the passivation layer 106 and the barrier layer 102 and depositing metal. A source / drain in contact with the ohmic metal layer 107 can then be formed.

[0065] In some embodiments, this disclosure allows for the deposition of an ultrathin Ti metal layer with a thickness of 2.5 nm on the surface of the p-type cap layer 103, followed by high-temperature annealing to incorporate the Ti metal into the p-type cap layer 103, forming a conduction enhancement layer 105. This disclosure... Figures 10 to 14 The relevant curves for the corresponding gallium nitride devices are given. Figures 11 to 13 The comparative gallium nitride device has a similar structure to the gallium nitride device disclosed herein, the only difference being that the gallium nitride device disclosed herein has a conduction enhancement layer 105, while the comparative gallium nitride device does not have a conduction enhancement layer 105. Figure 10 As shown, in the gallium nitride device of this disclosure, there is a transition layer of about 5 nm between the p-type cap layer 103 and the gate metal layer 104. This transition layer is the conduction enhancement layer 105. This conduction enhancement layer 105 enables the gallium nitride device to have a smaller and more convergent threshold voltage Vth (e.g., ...). Figure 11 (as shown), smaller transconductance half-width at half maximum (FWHM) of Gm (as shown) Figure 12 As shown), smaller subthreshold swing SS (e.g. Figure 13 As shown in the figure, it demonstrates that the conduction enhancement layer 105 can significantly improve the turn-on characteristics of gallium nitride devices. Additionally, as... Figure 14 As shown, the hard breakdown point of this gate structure is approximately 11V, which is much higher than its operating voltage.

[0066] In some embodiments, the conduction enhancement layer 105 can also be formed during the preparation of the gate metal layer 104. Specifically, in the above embodiments, a stable flow rate of nitrogen gas (N2) can be introduced during the sputtering deposition of the gate metal layer 104, so that the sputtered titanium target atoms react chemically with the nitrogen gas to form a titanium nitride layer with stable nitrogen content as the gate metal layer 104. In this embodiment, the nitrogen flow rate can be set to increase from 0 to a stable state, so that the nitrogen gas forms the gate metal layer 104 with the titanium target after reaching the stable nitrogen flow rate, and forms a titanium nitride layer with gradually increasing nitrogen content as the conduction enhancement layer 105 before the nitrogen flow rate increases from 0 to a stable state. In this way, the same effect can be achieved without depositing the insertion metal layer 108 of the above embodiments.

[0067] In summary, the gallium nitride device provided in this embodiment, excluding the substrate, nucleation layer, and buffer layer structure from bottom to top, mainly includes: a channel layer 101 on the buffer layer, a barrier layer 102 on the channel layer 101, a p-type cap layer 103 on the barrier layer 102, a conduction enhancement layer 105 on the p-type cap layer 103, a gate metal layer 104 on the conduction enhancement layer 105, and ohmic metal layers 107 on both sides of the barrier layer 102 for the source / drain. An insertion layer may or may not exist between the channel layer 101 and the barrier layer 102. Furthermore, the barrier layer 102 and the channel layer 101 form a heterostructure, which can induce a two-dimensional electron gas (2DEG).

[0068] In some embodiments, a conduction enhancement layer 105 can be formed on the surface of the p-type cap layer 103 by ion implantation, epitaxy, metal doping, etc. Through this conduction enhancement layer 105, the gate leakage current of the gallium nitride device increases, allowing for better control of the device's turn-on characteristics, reducing the transconductance half-width at half-maximum, and reducing the subthreshold swing. The material of the conduction enhancement layer 105 may include Ti / Al / TiN / Ni, etc. A preferred embodiment involves adding an ultrathin Ti layer with a thickness not exceeding 20 nm, and then incorporating Ti metal into the p-type cap layer 103 through high-temperature annealing to form the conduction enhancement layer 105. The Ti layer thickness should not be too thick, ensuring that the formation of the conduction enhancement layer 105 is a self-stopping and stable process, guaranteeing that there is not excessive Ti metal in the gate; and avoiding gate structure instability caused by inconsistent dry and wet etching rates between Ti and the gate metal layer (e.g., TiN).

[0069] Based on the same inventive concept, this disclosure provides a power device including the gallium nitride device described above. Since the principle by which this power device solves the problem is similar to that of the gallium nitride device, the implementation of the power device provided in this disclosure can refer to the implementation of the gallium nitride device described above, and repeated details will not be elaborated further.

[0070] In some embodiments, the power devices provided in this disclosure may include, but are not limited to, radio frequency amplifiers, mixers, radar, satellites, power supplies, automotive electronics, energy-saving lamps, and home appliances. Of course, the power devices provided in this disclosure may include other structures besides semiconductor devices. For example, when the power device is a radar, it may also include structures such as transmitters, antennas, and receivers; when the power device is a mixer, it may also include structures such as input ports and output ports.

[0071] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0072] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of the embodiments of this disclosure. Therefore, if these modifications and variations to the embodiments of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include these modifications and variations.

Claims

1. A gallium nitride device, characterized by, The gallium nitride device comprises: a channel layer; a barrier layer located on one side of the channel layer; a p-type cap layer located on a side of the barrier layer away from the channel layer; a gate metal layer located on a side of the p-type cap layer away from the barrier layer, a material of the gate metal layer comprising titanium nitride; a conduction enhancement layer located between the gate metal layer and the p-type cap layer, a material of the conduction enhancement layer comprising titanium nitride, a nitrogen content in the titanium nitride gradually increasing in a direction from the p-type cap layer to the gate metal layer.

2. The gallium nitride device of claim 1, wherein, A thickness of the conduction enhancement layer is less than or equal to 20 nm.

3. The gallium nitride device of claim 1 or 2, wherein, An interposed layer is further included between the channel layer and the barrier layer.

4. A method of fabricating a gallium nitride device as claimed in any one of claims 1 to 3, wherein, The gallium nitride device comprises: forming a channel layer and a barrier layer in sequence; forming a p-type cap layer, a gate metal layer and a conduction enhancement layer on the barrier layer, specifically comprising: epitaxially growing a p-type cap layer on the barrier layer; controlling a nitrogen flow in a magnetron sputtering process to gradually increase from 0 to a steady state, so that a conduction enhancement layer with a gradually increasing nitrogen content in a direction from the p-type cap layer to the gate metal layer and a gate metal layer with a stable nitrogen content are prepared in sequence based on a titanium target material.

5. A power device, characterized by The gallium nitride device comprises: a gallium nitride device according to any one of claims 1-3.

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