Semiconductor structure and display structure for illumination
By optimizing the light-receiving area and conductive layer design of the semiconductor structure, the leakage current problem of thin-film transistor displays caused by light exposure was solved, achieving stable display effects and cost-effectiveness.
Patent Information
- Application Number
- CN202410439370.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-12
- Publication Date
- 2025-10-21
AI Technical Summary
Existing thin-film transistor displays are prone to leakage current due to the photoelectric effect when exposed to light, resulting in image distortion. Furthermore, existing solutions may increase design costs or be unsuitable.
By designing a semiconductor structure, the light-receiving area of the first semiconductor layer is increased, and the photovoltage is transmitted to the second gate through the conductive layer to drive the integrated circuit to update the display area, thus avoiding the need to add additional components.
It achieves stable display images without adding extra components, avoids image distortion caused by lighting, and reduces design costs.
Smart Images
Figure CN120826017A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of electronic paper, and in particular to a semiconductor structure and a display structure for illumination. Background Art
[0002] The existing thin film transistor (TFT) structure mainly includes a substrate, a first metal layer, an insulating layer, a semiconductor layer and a second metal layer. The thin film transistor structure is formed by stacking the insulating layer, the semiconductor layer and the second metal layer in sequence on the substrate.
[0003] The thin film transistor operates by applying a voltage to the first metal layer to determine whether the source and drain of the second metal layer are conductive. Specifically, when a positive voltage is applied to the first metal layer, a channel is established in the semiconductor layer for signal transmission between the source of the second metal layer and the drain of the second metal layer, causing the source of the second metal layer to transmit signals through the semiconductor layer and the drain of the second metal layer; when a negative voltage is applied to the first metal layer, the channel of the semiconductor layer disappears, causing the source of the second metal layer and the drain of the second metal layer to be unable to transmit signals.
[0004] However, since part of the semiconductor layer is exposed outside the second metal layer, the semiconductor layer can directly receive external light sources. When the external light source shines on the semiconductor layer, the semiconductor layer establishes a channel due to the photoelectric effect, and the source and drain of the second metal layer are connected, causing the storage capacitor of the thin film transistor display to leak, and driving the ink particles above the semiconductor layer, causing the display image of the thin film transistor display to be distorted.
[0005] In order to solve the above-mentioned problem, the prior art provides a third metal layer on top of the semiconductor layer. The third metal layer shields the semiconductor layer to prevent the semiconductor layer from receiving the external light source, thereby preventing leakage current.
[0006] However, the method of preventing leakage current by providing the third metal layer not only increases the design cost but is also not applicable to the 6PEP (Photo Etching Process) structural design.
[0007] Therefore, the existing technology is indeed in need of further providing more improved solutions. Summary of the Invention
[0008] In view of the above-mentioned problems of the prior art, the main purpose of this application is to provide a semiconductor structure for illumination, which drives the update of the display screen by receiving light on the semiconductor layer, thereby avoiding the distortion of the display screen caused only by external light sources, and achieving the purpose of stabilizing the screen without adding additional components on the semiconductor layer.
[0009] To achieve the above-mentioned purpose, the technical solution adopted by this application is mainly to make the semiconductor structure for illumination include: substrate; a first gate having a first conductive layer and a second conductive layer, wherein the first conductive layer and the second conductive layer are spaced apart and arranged on the substrate; a first semiconductor layer, disposed on the first gate and configured to receive a light source; a first insulating layer disposed between the substrate and the first semiconductor layer; a first source electrode, covering a portion of the first semiconductor layer; a first drain electrode, which is spaced apart from the first source electrode to form a first opening and covers another portion of the first semiconductor layer; a second gate, spaced apart from the first gate and disposed on the substrate, and electrically connected to the second conductive layer; a second semiconductor layer disposed on the second gate; a second insulating layer disposed between the substrate and the second semiconductor layer; a second source electrode covering a portion of the second semiconductor layer; a second drain electrode, which is spaced apart from the first source electrode to form a second opening and covers another portion of the second semiconductor layer; and Wherein, the first drain is connected in series to the second conductive layer.
[0010] Preferably, a light-receiving area of the first opening corresponding to the first semiconductor layer is larger than a light-receiving area of the second opening corresponding to the second semiconductor layer.
[0011] Preferably, the second insulating layer at least covers a portion of the second gate.
[0012] Preferably, the horizontal area of the light receiving area of the first semiconductor layer is larger than the horizontal area of the light receiving area of the second semiconductor layer.
[0013] Preferably, the second conductive layer is connected in series with the second gate.
[0014] Preferably, the second conductive layer extends toward the second gate, and after being bent, continues to extend toward the second gate. When the second conductive layer approaches the second gate, it further bends back and continues to extend toward the second gate, so that the second conductive layer is connected in series with the second gate.
[0015] Preferably, the first conductive layer extends away from the second gate electrode and then bends back to extend toward the first source electrode.
[0016] Preferably, the first conductive layer and the second conductive layer are connected in series.
[0017] Preferably, the first conductive layer extends away from the second gate electrode and bends toward the first drain electrode, and bends again near the first drain electrode, so that the first conductive layer is connected in series with the second conductive layer.
[0018] To achieve the above-mentioned purpose, the technical solution adopted by this application is mainly to make the display structure including the aforementioned semiconductor structure for illumination include: a display layer located above the semiconductor structure; An upper substrate is located above the display layer.
[0019] Preferably, the first opening is located in a non-display area of the substrate.
[0020] Through the above-mentioned structure, the light-receiving area of the first semiconductor structure is increased, thereby increasing the leakage current, thereby increasing the voltage received by the first drain, and transmitting the voltage to the second gate to drive the integrated circuit connected to the second gate, so that the integrated circuit further drives the display area corresponding to the second semiconductor structure to update the screen. In this way, the display structure will not suffer from display image distortion due to the influence of the light source, and there is no need to add additional components on the second semiconductor layer, so as to stabilize the image displayed by the display structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0022] Figure 1 FIG. 1 is a top view of an embodiment of a semiconductor structure for illumination according to the present application.
[0023] Figure 2 It is a cross-sectional view taken along line AA of the semiconductor structure for illumination of the present application.
[0024] Figure 3 It is a cross-sectional view taken along line BB of the semiconductor structure for illumination of the present application.
[0025] Figure 4 FIG. 4 is a top view of another embodiment of a semiconductor structure for illumination according to the present application.
[0026] Figure 5 It is a schematic diagram of the display structure of this application. DETAILED DESCRIPTION
[0027] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0028] Regarding the preferred embodiment of the semiconductor structure 10 for illumination of the present application, Figure 1 、 Figure 2 and Figure 3 As shown, the semiconductor structure 10 for illumination includes a substrate P, a first gate M1, a first insulating layer G1, a first semiconductor layer AS1, a first source S1, a first drain D1, a second gate M2, a second insulating layer G2, a second semiconductor layer AS2, a second source S2, and a second drain D2. The substrate P provides the aforementioned components. In this embodiment, the substrate P is glass.
[0029] In detail, the first gate M1 has a first conductive layer L1 and a second conductive layer L2. The first conductive layer L1 and the second conductive layer L2 are arranged on the substrate P at a distance from each other. The first insulating layer G1 is arranged between the substrate P and the first semiconductor layer AS1, and the first insulating layer G1 at least covers a portion of the first conductive layer L1. That is, the first insulating layer G1 is stacked on the first conductive layer L1 and covers a portion of the first conductive layer L1, so that the first conductive layer L1 and the second conductive layer L2 can be electrically isolated due to the arrangement of the first insulating layer G1.
[0030] The first semiconductor layer AS1 is stacked on a portion of the first insulating layer G1. The first source electrode S1 is stacked on the substrate P, a portion of the first insulating layer G1, and a portion of the first semiconductor layer AS1. The first drain electrode D1 is stacked and overlying the second conductive layer L2 and a portion of the first semiconductor layer AS1. The first source electrode S1 and the first drain electrode D1 are spaced apart to form a first opening OP1, allowing another portion of the first semiconductor layer AS1 to be exposed through the first opening OP1 to receive light. Specifically, the first source electrode S1 and the first drain electrode D1 are each disposed at two opposing ends of the first semiconductor layer AS1.
[0031] The first gate M1 , the first insulating layer G1 , the first semiconductor layer AS1 , the first source S1 , and the first drain D1 are stacked on the substrate P to form a first semiconductor structure R1 .
[0032] The second gate M2 is arranged on the substrate P at a distance from the first gate M1, the second insulating layer G2 is arranged between the substrate P and the second semiconductor layer AS2, and the second insulating layer G2 at least covers a portion of the second gate M2. In other words, the second insulating layer G2 is stacked on the second gate M2 and covers at least a portion of the second gate M2. The second semiconductor layer AS2 is stacked on a portion of the second insulating layer G2, that is, the second insulating layer G2 is arranged between the second gate M2 and the second insulating layer G2. The second source S2 and the second drain D2 are respectively stacked on the substrate P, a portion of the second insulating layer G2 and a portion of the second semiconductor layer AS2, wherein the second source S2 and the second drain D2 are spaced apart from each other to form a second opening OP2, so that another portion of the second semiconductor layer AS2 can be exposed through the position of the second opening OP2, wherein the first drain D1 is connected in series to the second conductive layer L2.
[0033] In this embodiment, the light receiving area of the first opening OP1 corresponding to the first semiconductor layer AS1 is larger than the light receiving area of the second opening OP2 corresponding to the second semiconductor layer AS2, and the second conductive layer L2 is electrically connected to the second gate M2. Specifically, the first gate M1 and the second gate M2 are metal layers.
[0034] The second gate M2 , the second insulating layer G2 , the second semiconductor layer AS2 , the second source S2 , and the second drain D2 are stacked on the substrate P to form a second semiconductor structure R2 .
[0035] By increasing the light-receiving area of the first semiconductor layer AS1, the light-receiving area of the first semiconductor layer AS1 is increased, thereby increasing the leakage current, thereby increasing the voltage received by the first drain electrode D1, and transmitting the voltage to the second gate M2 via the second conductive layer L2, so that the driving voltage of the second gate M2 is also increased. Since the voltage is increased, the integrated circuit or Flash chip electrically connected to the second gate M2 will be more likely to detect the voltage. After detecting the voltage, the integrated circuit or the Flash chip (not shown) will promptly call the appropriate waveform (Waveform, WF) to drive the display area corresponding to the second semiconductor structure R2 that displays abnormally due to light to update the screen, thereby achieving a normal display effect. In addition, there is no need to add additional components to the second semiconductor layer AS2 to prevent the second semiconductor layer AS2 from receiving the external light source, which would increase the design cost, thereby achieving the effect of reducing design costs.
[0036] In other words, even if the second semiconductor layer AS2 receives the external light source and causes the display image to be distorted, since the first semiconductor layer AS1 receives more external light sources at the same time, the integrated circuit of the second semiconductor layer AS2 will be immediately driven, so that the display image corresponding to the second semiconductor layer AS2 will be updated immediately.
[0037] In this embodiment, the horizontal area of the light receiving area of the first semiconductor layer AS1 is greater than the horizontal area of the light receiving area of the second semiconductor layer AS2.
[0038] In this embodiment, still refer to Figure 1As shown, the second conductive layer L2 extends toward the second gate M2, and after being bent, it continues to extend toward the second gate M2. Then, when the second conductive layer L2 approaches the second gate M2, it further bends back and continues to extend toward the second gate M2, so that the second conductive layer L2 is connected in series with the second gate M2. Specifically, as shown in the figure, the second semiconductor structure R2 is arranged above the first semiconductor structure R1, and the second conductive layer L2 extends upward from the first semiconductor structure R1 to form a first conductive segment L21. Then, the first conductive segment L21 bends and continues to extend to form a second conductive segment L22. Subsequently, when approaching the second gate M2, the second conductive segment L22 bends back to form a third conductive segment L23. Therefore, the second conductive layer L2 completes the bending and bend between the first semiconductor structure R1 and the second semiconductor structure R2. The absolute value of the aforementioned bending degree is the same as the absolute value of the bend degree, and the bending degree is the same as the bending degree. The degree and the degree of the inflection include, but are not limited to, 90 degrees and less than 180 degrees. Specifically, if a virtual normal extending upward from the first conductive segment L21 bends downward (i.e., toward the first gate M1) between the second conductive segment L22, and the degree of the inflection is negative 90 degrees, and a virtual normal extending leftward from the second conductive segment L22 bends upward (i.e., toward the second gate M2) between the third conductive segment L23, and the degree of the inflection is positive 90 degrees, the absolute value of the bend degree is positive 90 degrees and the absolute value of the inflection degree is positive 90 degrees, and the absolute values of the two are the same. For another example, if the bend degree is negative 30 degrees and the inflection degree is 30 degrees, the absolute values of the two are both 30 degrees.
[0039] In this embodiment, under active driving, the first conductive layer L1 extends downward away from the second gate M2, bends back, and then extends toward the first source S1, so that the first conductive layer L1 is connected to the first first source S1. The degree of the aforementioned bend includes, but is not limited to, 90 degrees and less than 180 degrees from a virtual normal extending downward from the first conductive layer L1 toward the first source S1. The active driving causes each light-emitting structure (i.e., the second semiconductor structure R2) to emit light independently.
[0040] In another embodiment, if Figure 4As shown, the second semiconductor structure R2 of this embodiment is the same as the previous embodiment, so it is not repeated here. In the case of passive driving, the first conductive layer L1 extends downward away from the second gate M2 and bends to extend toward the first drain D1, and bends again when approaching the first drain D1, so that the first conductive layer L1 is connected in series with the second conductive layer L2. The degree of the aforementioned bending includes, but is not limited to, 90 degrees and less than 180 degrees from the virtual normal extending downward or rightward from the first conductive layer L1 to the direction of the second conductive layer L2. The passive driving is to make each light-emitting structure (i.e., the second semiconductor structure R2) emit light in a scanning sequence.
[0041] In addition, the present application provides a display structure 20, such as Figure 5 As shown, the display structure 20 includes a semiconductor structure 11, a display layer 21 and an upper substrate 22, and the portion of the semiconductor structure 11 is substantially the same as the above-mentioned semiconductor structure 10 for illumination, and the substrate P of the semiconductor structure 11 has a display area P1 and a non-display area P2, the display area P1 corresponds to the area 210 used by the display structure 20 to display the picture, and the remaining area 211 corresponding to the non-display picture is the non-display area P2, the display layer 21 is located above the semiconductor structure 11, and the upper substrate 22 is located above the display layer 21, that is, the display layer 21 is located between the semiconductor structure 11 and the upper substrate 22, and is arranged corresponding to the display area P1, and the semiconductor structure 11 is arranged in combination with the display layer 21, so that the display structure 20 can stably display the picture due to the semiconductor structure 11. Specifically, the display structure 20 can be an electronic paper display, a liquid crystal display or other display with a display layer. In another embodiment, the first semiconductor structure R1 and the first opening OP1 may be disposed in the non-display area P2 to prevent excessive components from being disposed in the display area P1 and affecting image quality.
[0042] In summary, by increasing the light-receiving area of the first semiconductor layer AS1 of the present application and thereby increasing the leakage current, the voltage received by the first drain electrode D1 is increased, and the voltage is transmitted to the second gate M2 to drive the integrated circuit connected to the second gate M2, so that the integrated circuit further drives the display area corresponding to the second semiconductor structure R2 to update the screen. In this way, the display structure will not be affected by the light source and the display image will not be distorted, and there is no need to add additional components on the second semiconductor layer AS2, so as to stabilize the image displayed by the display structure.
[0043] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.
[0044] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which fall within the scope of protection of this application.
Claims
1. A semiconductor structure for illumination, characterized in that: include: substrate; a first gate having a first conductive layer and a second conductive layer, wherein the first conductive layer and the second conductive layer are spaced apart and arranged on the substrate; a first semiconductor layer, disposed on the first gate and configured to receive a light source; a first insulating layer disposed between the substrate and the first semiconductor layer; a first source electrode, covering a portion of the first semiconductor layer; a first drain electrode, which is spaced apart from the first source electrode to form a first opening and covers another portion of the first semiconductor layer; a second gate, spaced apart from the first gate and disposed on the substrate, and electrically connected to the second conductive layer; a second semiconductor layer disposed on the second gate; a second insulating layer disposed between the substrate and the second semiconductor layer; a second source electrode covering a portion of the second semiconductor layer; a second drain electrode, which is spaced apart from the first source electrode to form a second opening and covers another portion of the second semiconductor layer; as well as Wherein, the first drain is connected in series to the second conductive layer.
2. The semiconductor structure for illumination according to claim 1, wherein: A light-receiving area of the first opening corresponding to the first semiconductor layer is larger than a light-receiving area of the second opening corresponding to the second semiconductor layer.
3. The semiconductor structure for illumination according to claim 1, wherein: The second insulating layer at least covers a portion of the second gate.
4. The semiconductor structure for illumination according to claim 1, wherein: A horizontal area of the light receiving area of the first semiconductor layer is larger than a horizontal area of the light receiving area of the second semiconductor layer.
5. The semiconductor structure for illumination according to claim 1, wherein: The second conductive layer is connected in series with the second gate.
6. The semiconductor structure for illumination according to claim 5, wherein: The second conductive layer extends toward the second gate, bends, and continues to extend toward the second gate. When the second conductive layer approaches the second gate, it further bends and continues to extend toward the second gate, so that the second conductive layer is connected in series with the second gate.
7. The semiconductor structure for illumination according to claim 6, wherein: The first conductive layer extends away from the second gate electrode and then bends back to extend toward the first source electrode.
8. The semiconductor structure for illumination according to claim 1, wherein: The first conductive layer and the second conductive layer are connected in series.
9. The semiconductor structure for illumination according to claim 7, wherein: The first conductive layer extends away from the second gate electrode and bends toward the first drain electrode, and bends again near the first drain electrode, so that the first conductive layer and the second conductive layer are connected in series.
10. A display structure comprising the semiconductor structure for illumination according to claim 1, characterized in that: include: A display layer, which is located above the semiconductor structure for illumination; An upper substrate is located above the display layer.
11. The display structure according to claim 10 comprising the semiconductor structure for illumination according to claim 1, wherein: The first opening is located in a non-display area of the substrate.